LLVM  6.0.0svn
Namespaces | Macros | Functions | Variables
HexagonHardwareLoops.cpp File Reference
#include "HexagonInstrInfo.h"
#include "HexagonSubtarget.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/Pass.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include <cassert>
#include <cstdint>
#include <cstdlib>
#include <iterator>
#include <map>
#include <set>
#include <string>
#include <utility>
#include <vector>
Include dependency graph for HexagonHardwareLoops.cpp:

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Macros

#define DEBUG_TYPE   "hwloops"
 

Functions

 STATISTIC (NumHWLoops, "Number of loops converted to hardware loops")
 
FunctionPassllvm::createHexagonHardwareLoops ()
 
void llvm::initializeHexagonHardwareLoopsPass (PassRegistry &)
 
 INITIALIZE_PASS_BEGIN (HexagonHardwareLoops, "hwloops", "Hexagon Hardware Loops", false, false) INITIALIZE_PASS_END(HexagonHardwareLoops
 
static bool isImmValidForOpcode (unsigned CmpOpc, int64_t Imm)
 

Variables

static cl::opt< int > HWLoopLimit ("hexagon-max-hwloop", cl::Hidden, cl::init(-1))
 
static cl::opt< std::string > PHFn ("hexagon-hwloop-phfn", cl::Hidden, cl::init(""))
 
static cl::opt< boolHWCreatePreheader ("hexagon-hwloop-preheader", cl::Hidden, cl::init(true), cl::desc("Add a preheader to a hardware loop if one doesn't exist"))
 
static cl::opt< boolSpecPreheader ("hwloop-spec-preheader", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Allow speculation of preheader " "instructions"))
 
 hwloops
 
Hexagon Hardware Loops
 
Hexagon Hardware false
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "hwloops"

Definition at line 66 of file HexagonHardwareLoops.cpp.

Function Documentation

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( HexagonHardwareLoops  ,
"hwloops"  ,
"Hexagon Hardware Loops ,
false  ,
false   
)

◆ isImmValidForOpcode()

static bool isImmValidForOpcode ( unsigned  CmpOpc,
int64_t  Imm 
)
static

Definition at line 1579 of file HexagonHardwareLoops.cpp.

References llvm::LoopBase< BlockT, LoopT >::addBasicBlockToLoop(), llvm::MachineDominatorTree::addNewBlock(), llvm::MachineInstr::addOperand(), llvm::MachineBasicBlock::addSuccessor(), llvm::HexagonInstrInfo::analyzeBranch(), assert(), llvm::MachineDominatorTree::changeImmediateDominator(), llvm::SmallVectorImpl< T >::clear(), llvm::SmallSet< T, N, C >::count(), llvm::MachineFunction::CreateMachineBasicBlock(), llvm::MachineFunction::CreateMachineInstr(), llvm::MachineOperand::CreateMBB(), llvm::MachineOperand::CreateReg(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::dbgs(), DEBUG, llvm::MachineDominatorTree::dominates(), E, llvm::SmallSet< T, N, C >::empty(), llvm::SmallVectorBase::empty(), llvm::MachineBasicBlock::end(), llvm::MachineLoop::findLoopControlBlock(), llvm::MachineLoopInfo::findLoopPreheader(), llvm::MachineLoopInfo::getBase(), llvm::MachineInstr::getDesc(), llvm::LoopBase< BlockT, LoopT >::getHeader(), llvm::DomTreeNodeBase< NodeT >::getIDom(), llvm::MachineOperand::getImm(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::LoopBase< BlockT, LoopT >::getLoopLatch(), llvm::MachineOperand::getMBB(), llvm::MachineFunction::getName(), llvm::MachineDominatorTree::getNode(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::LoopBase< BlockT, LoopT >::getParentLoop(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineOperand::getSubReg(), llvm::MachineRegisterInfo::getVRegDef(), llvm::MachineBasicBlock::hasAddressTaken(), HWCreatePreheader, I, llvm::SmallSet< T, N, C >::insert(), llvm::MachineBasicBlock::insert(), llvm::MachineFunction::insert(), llvm::HexagonInstrInfo::insertBranch(), llvm::MachineBasicBlock::instr_begin(), llvm::MachineBasicBlock::instr_end(), llvm::MCInstrDesc::isAdd(), llvm::MachineInstr::isCompare(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isImplicit(), llvm::isInt< 8 >(), isReg(), llvm::MachineOperand::isReg(), llvm::isUInt< 8 >(), llvm::MachineOperand::isUse(), Kind, P, llvm::X86II::PD, PHFn, llvm::MachineBasicBlock::pred_begin(), llvm::MachineBasicBlock::pred_end(), llvm::MachineBasicBlock::pred_size(), llvm::MachineInstr::RemoveOperand(), llvm::MachineBasicBlock::ReplaceUsesOfBlockWith(), llvm::MachineOperand::setMBB(), llvm::MachineOperand::setReg(), llvm::MachineOperand::setSubReg(), llvm::SmallVectorTemplateCommon< T >::size(), SpecPreheader, and llvm::X86II::TB.

◆ STATISTIC()

STATISTIC ( NumHWLoops  ,
"Number of loops converted to hardware loops  
)

Variable Documentation

◆ false

Hexagon Hardware false

Definition at line 373 of file HexagonHardwareLoops.cpp.

◆ HWCreatePreheader

cl::opt<bool> HWCreatePreheader("hexagon-hwloop-preheader", cl::Hidden, cl::init(true), cl::desc("Add a preheader to a hardware loop if one doesn't exist"))
static

Referenced by isImmValidForOpcode().

◆ HWLoopLimit

cl::opt<int> HWLoopLimit("hexagon-max-hwloop", cl::Hidden, cl::init(-1))
static

◆ hwloops

hwloops

Definition at line 373 of file HexagonHardwareLoops.cpp.

◆ Loops

Hexagon Hardware Loops

◆ PHFn

cl::opt<std::string> PHFn("hexagon-hwloop-phfn", cl::Hidden, cl::init(""))
static

Referenced by isImmValidForOpcode().

◆ SpecPreheader

cl::opt<bool> SpecPreheader("hwloop-spec-preheader", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Allow speculation of preheader " "instructions"))
static