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LoopStrengthReduce.cpp
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1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This transformation analyzes and transforms the induction variables (and
10 // computations derived from them) into forms suitable for efficient execution
11 // on the target.
12 //
13 // This pass performs a strength reduction on array references inside loops that
14 // have as one or more of their components the loop induction variable, it
15 // rewrites expressions to take advantage of scaled-index addressing modes
16 // available on the target, and it performs a variety of other optimizations
17 // related to loop induction variables.
18 //
19 // Terminology note: this code has a lot of handling for "post-increment" or
20 // "post-inc" users. This is not talking about post-increment addressing modes;
21 // it is instead talking about code like this:
22 //
23 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
24 // ...
25 // %i.next = add %i, 1
26 // %c = icmp eq %i.next, %n
27 //
28 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
29 // it's useful to think about these as the same register, with some uses using
30 // the value of the register before the add and some using it after. In this
31 // example, the icmp is a post-increment user, since it uses %i.next, which is
32 // the value of the induction variable after the increment. The other common
33 // case of post-increment users is users outside the loop.
34 //
35 // TODO: More sophistication in the way Formulae are generated and filtered.
36 //
37 // TODO: Handle multiple loops at a time.
38 //
39 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
40 // of a GlobalValue?
41 //
42 // TODO: When truncation is free, truncate ICmp users' operands to make it a
43 // smaller encoding (on x86 at least).
44 //
45 // TODO: When a negated register is used by an add (such as in a list of
46 // multiple base registers, or as the increment expression in an addrec),
47 // we may not actually need both reg and (-1 * reg) in registers; the
48 // negation can be implemented by using a sub instead of an add. The
49 // lack of support for taking this into consideration when making
50 // register pressure decisions is partly worked around by the "Special"
51 // use kind.
52 //
53 //===----------------------------------------------------------------------===//
54 
56 #include "llvm/ADT/APInt.h"
57 #include "llvm/ADT/DenseMap.h"
58 #include "llvm/ADT/DenseSet.h"
59 #include "llvm/ADT/Hashing.h"
61 #include "llvm/ADT/STLExtras.h"
62 #include "llvm/ADT/SetVector.h"
64 #include "llvm/ADT/SmallPtrSet.h"
65 #include "llvm/ADT/SmallSet.h"
66 #include "llvm/ADT/SmallVector.h"
68 #include "llvm/Analysis/IVUsers.h"
70 #include "llvm/Analysis/LoopInfo.h"
71 #include "llvm/Analysis/LoopPass.h"
78 #include "llvm/Config/llvm-config.h"
79 #include "llvm/IR/BasicBlock.h"
80 #include "llvm/IR/Constant.h"
81 #include "llvm/IR/Constants.h"
82 #include "llvm/IR/DerivedTypes.h"
83 #include "llvm/IR/Dominators.h"
84 #include "llvm/IR/GlobalValue.h"
85 #include "llvm/IR/IRBuilder.h"
86 #include "llvm/IR/InstrTypes.h"
87 #include "llvm/IR/Instruction.h"
88 #include "llvm/IR/Instructions.h"
89 #include "llvm/IR/IntrinsicInst.h"
90 #include "llvm/IR/Intrinsics.h"
91 #include "llvm/IR/Module.h"
92 #include "llvm/IR/OperandTraits.h"
93 #include "llvm/IR/Operator.h"
94 #include "llvm/IR/PassManager.h"
95 #include "llvm/IR/Type.h"
96 #include "llvm/IR/Use.h"
97 #include "llvm/IR/User.h"
98 #include "llvm/IR/Value.h"
99 #include "llvm/IR/ValueHandle.h"
100 #include "llvm/Pass.h"
101 #include "llvm/Support/Casting.h"
103 #include "llvm/Support/Compiler.h"
104 #include "llvm/Support/Debug.h"
106 #include "llvm/Support/MathExtras.h"
108 #include "llvm/Transforms/Scalar.h"
109 #include "llvm/Transforms/Utils.h"
111 #include <algorithm>
112 #include <cassert>
113 #include <cstddef>
114 #include <cstdint>
115 #include <cstdlib>
116 #include <iterator>
117 #include <limits>
118 #include <numeric>
119 #include <map>
120 #include <utility>
121 
122 using namespace llvm;
123 
124 #define DEBUG_TYPE "loop-reduce"
125 
126 /// MaxIVUsers is an arbitrary threshold that provides an early opportunity for
127 /// bail out. This threshold is far beyond the number of users that LSR can
128 /// conceivably solve, so it should not affect generated code, but catches the
129 /// worst cases before LSR burns too much compile time and stack space.
130 static const unsigned MaxIVUsers = 200;
131 
132 // Temporary flag to cleanup congruent phis after LSR phi expansion.
133 // It's currently disabled until we can determine whether it's truly useful or
134 // not. The flag should be removed after the v3.0 release.
135 // This is now needed for ivchains.
137  "enable-lsr-phielim", cl::Hidden, cl::init(true),
138  cl::desc("Enable LSR phi elimination"));
139 
140 // The flag adds instruction count to solutions cost comparision.
141 static cl::opt<bool> InsnsCost(
142  "lsr-insns-cost", cl::Hidden, cl::init(true),
143  cl::desc("Add instruction count to a LSR cost model"));
144 
145 // Flag to choose how to narrow complex lsr solution
147  "lsr-exp-narrow", cl::Hidden, cl::init(false),
148  cl::desc("Narrow LSR complex solution using"
149  " expectation of registers number"));
150 
151 // Flag to narrow search space by filtering non-optimal formulae with
152 // the same ScaledReg and Scale.
154  "lsr-filter-same-scaled-reg", cl::Hidden, cl::init(true),
155  cl::desc("Narrow LSR search space by filtering non-optimal formulae"
156  " with the same ScaledReg and Scale"));
157 
159  "lsr-backedge-indexing", cl::Hidden, cl::init(true),
160  cl::desc("Enable the generation of cross iteration indexed memops"));
161 
163  "lsr-complexity-limit", cl::Hidden,
165  cl::desc("LSR search space complexity limit"));
166 
168  "lsr-setupcost-depth-limit", cl::Hidden, cl::init(7),
169  cl::desc("The limit on recursion depth for LSRs setup cost"));
170 
171 #ifndef NDEBUG
172 // Stress test IV chain generation.
174  "stress-ivchain", cl::Hidden, cl::init(false),
175  cl::desc("Stress test LSR IV chains"));
176 #else
177 static bool StressIVChain = false;
178 #endif
179 
180 namespace {
181 
182 struct MemAccessTy {
183  /// Used in situations where the accessed memory type is unknown.
184  static const unsigned UnknownAddressSpace =
186 
187  Type *MemTy = nullptr;
188  unsigned AddrSpace = UnknownAddressSpace;
189 
190  MemAccessTy() = default;
191  MemAccessTy(Type *Ty, unsigned AS) : MemTy(Ty), AddrSpace(AS) {}
192 
193  bool operator==(MemAccessTy Other) const {
194  return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace;
195  }
196 
197  bool operator!=(MemAccessTy Other) const { return !(*this == Other); }
198 
199  static MemAccessTy getUnknown(LLVMContext &Ctx,
200  unsigned AS = UnknownAddressSpace) {
201  return MemAccessTy(Type::getVoidTy(Ctx), AS);
202  }
203 
204  Type *getType() { return MemTy; }
205 };
206 
207 /// This class holds data which is used to order reuse candidates.
208 class RegSortData {
209 public:
210  /// This represents the set of LSRUse indices which reference
211  /// a particular register.
212  SmallBitVector UsedByIndices;
213 
214  void print(raw_ostream &OS) const;
215  void dump() const;
216 };
217 
218 } // end anonymous namespace
219 
220 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
221 void RegSortData::print(raw_ostream &OS) const {
222  OS << "[NumUses=" << UsedByIndices.count() << ']';
223 }
224 
225 LLVM_DUMP_METHOD void RegSortData::dump() const {
226  print(errs()); errs() << '\n';
227 }
228 #endif
229 
230 namespace {
231 
232 /// Map register candidates to information about how they are used.
233 class RegUseTracker {
234  using RegUsesTy = DenseMap<const SCEV *, RegSortData>;
235 
236  RegUsesTy RegUsesMap;
238 
239 public:
240  void countRegister(const SCEV *Reg, size_t LUIdx);
241  void dropRegister(const SCEV *Reg, size_t LUIdx);
242  void swapAndDropUse(size_t LUIdx, size_t LastLUIdx);
243 
244  bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
245 
246  const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
247 
248  void clear();
249 
251  using const_iterator = SmallVectorImpl<const SCEV *>::const_iterator;
252 
253  iterator begin() { return RegSequence.begin(); }
254  iterator end() { return RegSequence.end(); }
255  const_iterator begin() const { return RegSequence.begin(); }
256  const_iterator end() const { return RegSequence.end(); }
257 };
258 
259 } // end anonymous namespace
260 
261 void
262 RegUseTracker::countRegister(const SCEV *Reg, size_t LUIdx) {
263  std::pair<RegUsesTy::iterator, bool> Pair =
264  RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
265  RegSortData &RSD = Pair.first->second;
266  if (Pair.second)
267  RegSequence.push_back(Reg);
268  RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
269  RSD.UsedByIndices.set(LUIdx);
270 }
271 
272 void
273 RegUseTracker::dropRegister(const SCEV *Reg, size_t LUIdx) {
274  RegUsesTy::iterator It = RegUsesMap.find(Reg);
275  assert(It != RegUsesMap.end());
276  RegSortData &RSD = It->second;
277  assert(RSD.UsedByIndices.size() > LUIdx);
278  RSD.UsedByIndices.reset(LUIdx);
279 }
280 
281 void
282 RegUseTracker::swapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
283  assert(LUIdx <= LastLUIdx);
284 
285  // Update RegUses. The data structure is not optimized for this purpose;
286  // we must iterate through it and update each of the bit vectors.
287  for (auto &Pair : RegUsesMap) {
288  SmallBitVector &UsedByIndices = Pair.second.UsedByIndices;
289  if (LUIdx < UsedByIndices.size())
290  UsedByIndices[LUIdx] =
291  LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : false;
292  UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
293  }
294 }
295 
296 bool
297 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
298  RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
299  if (I == RegUsesMap.end())
300  return false;
301  const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
302  int i = UsedByIndices.find_first();
303  if (i == -1) return false;
304  if ((size_t)i != LUIdx) return true;
305  return UsedByIndices.find_next(i) != -1;
306 }
307 
308 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
309  RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
310  assert(I != RegUsesMap.end() && "Unknown register!");
311  return I->second.UsedByIndices;
312 }
313 
314 void RegUseTracker::clear() {
315  RegUsesMap.clear();
316  RegSequence.clear();
317 }
318 
319 namespace {
320 
321 /// This class holds information that describes a formula for computing
322 /// satisfying a use. It may include broken-out immediates and scaled registers.
323 struct Formula {
324  /// Global base address used for complex addressing.
325  GlobalValue *BaseGV = nullptr;
326 
327  /// Base offset for complex addressing.
328  int64_t BaseOffset = 0;
329 
330  /// Whether any complex addressing has a base register.
331  bool HasBaseReg = false;
332 
333  /// The scale of any complex addressing.
334  int64_t Scale = 0;
335 
336  /// The list of "base" registers for this use. When this is non-empty. The
337  /// canonical representation of a formula is
338  /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and
339  /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty().
340  /// 3. The reg containing recurrent expr related with currect loop in the
341  /// formula should be put in the ScaledReg.
342  /// #1 enforces that the scaled register is always used when at least two
343  /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2.
344  /// #2 enforces that 1 * reg is reg.
345  /// #3 ensures invariant regs with respect to current loop can be combined
346  /// together in LSR codegen.
347  /// This invariant can be temporarily broken while building a formula.
348  /// However, every formula inserted into the LSRInstance must be in canonical
349  /// form.
351 
352  /// The 'scaled' register for this use. This should be non-null when Scale is
353  /// not zero.
354  const SCEV *ScaledReg = nullptr;
355 
356  /// An additional constant offset which added near the use. This requires a
357  /// temporary register, but the offset itself can live in an add immediate
358  /// field rather than a register.
359  int64_t UnfoldedOffset = 0;
360 
361  Formula() = default;
362 
363  void initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
364 
365  bool isCanonical(const Loop &L) const;
366 
367  void canonicalize(const Loop &L);
368 
369  bool unscale();
370 
371  bool hasZeroEnd() const;
372 
373  size_t getNumRegs() const;
374  Type *getType() const;
375 
376  void deleteBaseReg(const SCEV *&S);
377 
378  bool referencesReg(const SCEV *S) const;
379  bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
380  const RegUseTracker &RegUses) const;
381 
382  void print(raw_ostream &OS) const;
383  void dump() const;
384 };
385 
386 } // end anonymous namespace
387 
388 /// Recursion helper for initialMatch.
389 static void DoInitialMatch(const SCEV *S, Loop *L,
392  ScalarEvolution &SE) {
393  // Collect expressions which properly dominate the loop header.
394  if (SE.properlyDominates(S, L->getHeader())) {
395  Good.push_back(S);
396  return;
397  }
398 
399  // Look at add operands.
400  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
401  for (const SCEV *S : Add->operands())
402  DoInitialMatch(S, L, Good, Bad, SE);
403  return;
404  }
405 
406  // Look at addrec operands.
407  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
408  if (!AR->getStart()->isZero() && AR->isAffine()) {
409  DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
410  DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
411  AR->getStepRecurrence(SE),
412  // FIXME: AR->getNoWrapFlags()
413  AR->getLoop(), SCEV::FlagAnyWrap),
414  L, Good, Bad, SE);
415  return;
416  }
417 
418  // Handle a multiplication by -1 (negation) if it didn't fold.
419  if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
420  if (Mul->getOperand(0)->isAllOnesValue()) {
421  SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
422  const SCEV *NewMul = SE.getMulExpr(Ops);
423 
426  DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
427  const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
428  SE.getEffectiveSCEVType(NewMul->getType())));
429  for (const SCEV *S : MyGood)
430  Good.push_back(SE.getMulExpr(NegOne, S));
431  for (const SCEV *S : MyBad)
432  Bad.push_back(SE.getMulExpr(NegOne, S));
433  return;
434  }
435 
436  // Ok, we can't do anything interesting. Just stuff the whole thing into a
437  // register and hope for the best.
438  Bad.push_back(S);
439 }
440 
441 /// Incorporate loop-variant parts of S into this Formula, attempting to keep
442 /// all loop-invariant and loop-computable values in a single base register.
443 void Formula::initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
446  DoInitialMatch(S, L, Good, Bad, SE);
447  if (!Good.empty()) {
448  const SCEV *Sum = SE.getAddExpr(Good);
449  if (!Sum->isZero())
450  BaseRegs.push_back(Sum);
451  HasBaseReg = true;
452  }
453  if (!Bad.empty()) {
454  const SCEV *Sum = SE.getAddExpr(Bad);
455  if (!Sum->isZero())
456  BaseRegs.push_back(Sum);
457  HasBaseReg = true;
458  }
459  canonicalize(*L);
460 }
461 
462 /// Check whether or not this formula satisfies the canonical
463 /// representation.
464 /// \see Formula::BaseRegs.
465 bool Formula::isCanonical(const Loop &L) const {
466  if (!ScaledReg)
467  return BaseRegs.size() <= 1;
468 
469  if (Scale != 1)
470  return true;
471 
472  if (Scale == 1 && BaseRegs.empty())
473  return false;
474 
475  const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
476  if (SAR && SAR->getLoop() == &L)
477  return true;
478 
479  // If ScaledReg is not a recurrent expr, or it is but its loop is not current
480  // loop, meanwhile BaseRegs contains a recurrent expr reg related with current
481  // loop, we want to swap the reg in BaseRegs with ScaledReg.
482  auto I =
483  find_if(make_range(BaseRegs.begin(), BaseRegs.end()), [&](const SCEV *S) {
484  return isa<const SCEVAddRecExpr>(S) &&
485  (cast<SCEVAddRecExpr>(S)->getLoop() == &L);
486  });
487  return I == BaseRegs.end();
488 }
489 
490 /// Helper method to morph a formula into its canonical representation.
491 /// \see Formula::BaseRegs.
492 /// Every formula having more than one base register, must use the ScaledReg
493 /// field. Otherwise, we would have to do special cases everywhere in LSR
494 /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ...
495 /// On the other hand, 1*reg should be canonicalized into reg.
496 void Formula::canonicalize(const Loop &L) {
497  if (isCanonical(L))
498  return;
499  // So far we did not need this case. This is easy to implement but it is
500  // useless to maintain dead code. Beside it could hurt compile time.
501  assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
502 
503  // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
504  if (!ScaledReg) {
505  ScaledReg = BaseRegs.back();
506  BaseRegs.pop_back();
507  Scale = 1;
508  }
509 
510  // If ScaledReg is an invariant with respect to L, find the reg from
511  // BaseRegs containing the recurrent expr related with Loop L. Swap the
512  // reg with ScaledReg.
513  const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
514  if (!SAR || SAR->getLoop() != &L) {
515  auto I = find_if(make_range(BaseRegs.begin(), BaseRegs.end()),
516  [&](const SCEV *S) {
517  return isa<const SCEVAddRecExpr>(S) &&
518  (cast<SCEVAddRecExpr>(S)->getLoop() == &L);
519  });
520  if (I != BaseRegs.end())
521  std::swap(ScaledReg, *I);
522  }
523 }
524 
525 /// Get rid of the scale in the formula.
526 /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
527 /// \return true if it was possible to get rid of the scale, false otherwise.
528 /// \note After this operation the formula may not be in the canonical form.
529 bool Formula::unscale() {
530  if (Scale != 1)
531  return false;
532  Scale = 0;
533  BaseRegs.push_back(ScaledReg);
534  ScaledReg = nullptr;
535  return true;
536 }
537 
538 bool Formula::hasZeroEnd() const {
539  if (UnfoldedOffset || BaseOffset)
540  return false;
541  if (BaseRegs.size() != 1 || ScaledReg)
542  return false;
543  return true;
544 }
545 
546 /// Return the total number of register operands used by this formula. This does
547 /// not include register uses implied by non-constant addrec strides.
548 size_t Formula::getNumRegs() const {
549  return !!ScaledReg + BaseRegs.size();
550 }
551 
552 /// Return the type of this formula, if it has one, or null otherwise. This type
553 /// is meaningless except for the bit size.
554 Type *Formula::getType() const {
555  return !BaseRegs.empty() ? BaseRegs.front()->getType() :
556  ScaledReg ? ScaledReg->getType() :
557  BaseGV ? BaseGV->getType() :
558  nullptr;
559 }
560 
561 /// Delete the given base reg from the BaseRegs list.
562 void Formula::deleteBaseReg(const SCEV *&S) {
563  if (&S != &BaseRegs.back())
564  std::swap(S, BaseRegs.back());
565  BaseRegs.pop_back();
566 }
567 
568 /// Test if this formula references the given register.
569 bool Formula::referencesReg(const SCEV *S) const {
570  return S == ScaledReg || is_contained(BaseRegs, S);
571 }
572 
573 /// Test whether this formula uses registers which are used by uses other than
574 /// the use with the given index.
575 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
576  const RegUseTracker &RegUses) const {
577  if (ScaledReg)
578  if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
579  return true;
580  for (const SCEV *BaseReg : BaseRegs)
581  if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
582  return true;
583  return false;
584 }
585 
586 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
587 void Formula::print(raw_ostream &OS) const {
588  bool First = true;
589  if (BaseGV) {
590  if (!First) OS << " + "; else First = false;
591  BaseGV->printAsOperand(OS, /*PrintType=*/false);
592  }
593  if (BaseOffset != 0) {
594  if (!First) OS << " + "; else First = false;
595  OS << BaseOffset;
596  }
597  for (const SCEV *BaseReg : BaseRegs) {
598  if (!First) OS << " + "; else First = false;
599  OS << "reg(" << *BaseReg << ')';
600  }
601  if (HasBaseReg && BaseRegs.empty()) {
602  if (!First) OS << " + "; else First = false;
603  OS << "**error: HasBaseReg**";
604  } else if (!HasBaseReg && !BaseRegs.empty()) {
605  if (!First) OS << " + "; else First = false;
606  OS << "**error: !HasBaseReg**";
607  }
608  if (Scale != 0) {
609  if (!First) OS << " + "; else First = false;
610  OS << Scale << "*reg(";
611  if (ScaledReg)
612  OS << *ScaledReg;
613  else
614  OS << "<unknown>";
615  OS << ')';
616  }
617  if (UnfoldedOffset != 0) {
618  if (!First) OS << " + ";
619  OS << "imm(" << UnfoldedOffset << ')';
620  }
621 }
622 
623 LLVM_DUMP_METHOD void Formula::dump() const {
624  print(errs()); errs() << '\n';
625 }
626 #endif
627 
628 /// Return true if the given addrec can be sign-extended without changing its
629 /// value.
630 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
631  Type *WideTy =
633  return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
634 }
635 
636 /// Return true if the given add can be sign-extended without changing its
637 /// value.
638 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
639  Type *WideTy =
641  return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
642 }
643 
644 /// Return true if the given mul can be sign-extended without changing its
645 /// value.
646 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
647  Type *WideTy =
649  SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
650  return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
651 }
652 
653 /// Return an expression for LHS /s RHS, if it can be determined and if the
654 /// remainder is known to be zero, or null otherwise. If IgnoreSignificantBits
655 /// is true, expressions like (X * Y) /s Y are simplified to Y, ignoring that
656 /// the multiplication may overflow, which is useful when the result will be
657 /// used in a context where the most significant bits are ignored.
658 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
659  ScalarEvolution &SE,
660  bool IgnoreSignificantBits = false) {
661  // Handle the trivial case, which works for any SCEV type.
662  if (LHS == RHS)
663  return SE.getConstant(LHS->getType(), 1);
664 
665  // Handle a few RHS special cases.
666  const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
667  if (RC) {
668  const APInt &RA = RC->getAPInt();
669  // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
670  // some folding.
671  if (RA.isAllOnesValue())
672  return SE.getMulExpr(LHS, RC);
673  // Handle x /s 1 as x.
674  if (RA == 1)
675  return LHS;
676  }
677 
678  // Check for a division of a constant by a constant.
679  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
680  if (!RC)
681  return nullptr;
682  const APInt &LA = C->getAPInt();
683  const APInt &RA = RC->getAPInt();
684  if (LA.srem(RA) != 0)
685  return nullptr;
686  return SE.getConstant(LA.sdiv(RA));
687  }
688 
689  // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
690  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
691  if ((IgnoreSignificantBits || isAddRecSExtable(AR, SE)) && AR->isAffine()) {
692  const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
693  IgnoreSignificantBits);
694  if (!Step) return nullptr;
695  const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
696  IgnoreSignificantBits);
697  if (!Start) return nullptr;
698  // FlagNW is independent of the start value, step direction, and is
699  // preserved with smaller magnitude steps.
700  // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
701  return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
702  }
703  return nullptr;
704  }
705 
706  // Distribute the sdiv over add operands, if the add doesn't overflow.
707  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
708  if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
710  for (const SCEV *S : Add->operands()) {
711  const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits);
712  if (!Op) return nullptr;
713  Ops.push_back(Op);
714  }
715  return SE.getAddExpr(Ops);
716  }
717  return nullptr;
718  }
719 
720  // Check for a multiply operand that we can pull RHS out of.
721  if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
722  if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
724  bool Found = false;
725  for (const SCEV *S : Mul->operands()) {
726  if (!Found)
727  if (const SCEV *Q = getExactSDiv(S, RHS, SE,
728  IgnoreSignificantBits)) {
729  S = Q;
730  Found = true;
731  }
732  Ops.push_back(S);
733  }
734  return Found ? SE.getMulExpr(Ops) : nullptr;
735  }
736  return nullptr;
737  }
738 
739  // Otherwise we don't know.
740  return nullptr;
741 }
742 
743 /// If S involves the addition of a constant integer value, return that integer
744 /// value, and mutate S to point to a new SCEV with that value excluded.
745 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
746  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
747  if (C->getAPInt().getMinSignedBits() <= 64) {
748  S = SE.getConstant(C->getType(), 0);
749  return C->getValue()->getSExtValue();
750  }
751  } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
752  SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
753  int64_t Result = ExtractImmediate(NewOps.front(), SE);
754  if (Result != 0)
755  S = SE.getAddExpr(NewOps);
756  return Result;
757  } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
758  SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
759  int64_t Result = ExtractImmediate(NewOps.front(), SE);
760  if (Result != 0)
761  S = SE.getAddRecExpr(NewOps, AR->getLoop(),
762  // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
764  return Result;
765  }
766  return 0;
767 }
768 
769 /// If S involves the addition of a GlobalValue address, return that symbol, and
770 /// mutate S to point to a new SCEV with that value excluded.
772  if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
773  if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
774  S = SE.getConstant(GV->getType(), 0);
775  return GV;
776  }
777  } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
778  SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
779  GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
780  if (Result)
781  S = SE.getAddExpr(NewOps);
782  return Result;
783  } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
784  SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
785  GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
786  if (Result)
787  S = SE.getAddRecExpr(NewOps, AR->getLoop(),
788  // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
790  return Result;
791  }
792  return nullptr;
793 }
794 
795 /// Returns true if the specified instruction is using the specified value as an
796 /// address.
797 static bool isAddressUse(const TargetTransformInfo &TTI,
798  Instruction *Inst, Value *OperandVal) {
799  bool isAddress = isa<LoadInst>(Inst);
800  if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
801  if (SI->getPointerOperand() == OperandVal)
802  isAddress = true;
803  } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
804  // Addressing modes can also be folded into prefetches and a variety
805  // of intrinsics.
806  switch (II->getIntrinsicID()) {
807  case Intrinsic::memset:
808  case Intrinsic::prefetch:
809  if (II->getArgOperand(0) == OperandVal)
810  isAddress = true;
811  break;
812  case Intrinsic::memmove:
813  case Intrinsic::memcpy:
814  if (II->getArgOperand(0) == OperandVal ||
815  II->getArgOperand(1) == OperandVal)
816  isAddress = true;
817  break;
818  default: {
819  MemIntrinsicInfo IntrInfo;
820  if (TTI.getTgtMemIntrinsic(II, IntrInfo)) {
821  if (IntrInfo.PtrVal == OperandVal)
822  isAddress = true;
823  }
824  }
825  }
826  } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
827  if (RMW->getPointerOperand() == OperandVal)
828  isAddress = true;
829  } else if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) {
830  if (CmpX->getPointerOperand() == OperandVal)
831  isAddress = true;
832  }
833  return isAddress;
834 }
835 
836 /// Return the type of the memory being accessed.
837 static MemAccessTy getAccessType(const TargetTransformInfo &TTI,
838  Instruction *Inst, Value *OperandVal) {
839  MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace);
840  if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
841  AccessTy.MemTy = SI->getOperand(0)->getType();
842  AccessTy.AddrSpace = SI->getPointerAddressSpace();
843  } else if (const LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
844  AccessTy.AddrSpace = LI->getPointerAddressSpace();
845  } else if (const AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
846  AccessTy.AddrSpace = RMW->getPointerAddressSpace();
847  } else if (const AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) {
848  AccessTy.AddrSpace = CmpX->getPointerAddressSpace();
849  } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
850  switch (II->getIntrinsicID()) {
851  case Intrinsic::prefetch:
852  case Intrinsic::memset:
853  AccessTy.AddrSpace = II->getArgOperand(0)->getType()->getPointerAddressSpace();
854  AccessTy.MemTy = OperandVal->getType();
855  break;
856  case Intrinsic::memmove:
857  case Intrinsic::memcpy:
858  AccessTy.AddrSpace = OperandVal->getType()->getPointerAddressSpace();
859  AccessTy.MemTy = OperandVal->getType();
860  break;
861  default: {
862  MemIntrinsicInfo IntrInfo;
863  if (TTI.getTgtMemIntrinsic(II, IntrInfo) && IntrInfo.PtrVal) {
864  AccessTy.AddrSpace
865  = IntrInfo.PtrVal->getType()->getPointerAddressSpace();
866  }
867 
868  break;
869  }
870  }
871  }
872 
873  // All pointers have the same requirements, so canonicalize them to an
874  // arbitrary pointer type to minimize variation.
875  if (PointerType *PTy = dyn_cast<PointerType>(AccessTy.MemTy))
876  AccessTy.MemTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
877  PTy->getAddressSpace());
878 
879  return AccessTy;
880 }
881 
882 /// Return true if this AddRec is already a phi in its loop.
883 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
884  for (PHINode &PN : AR->getLoop()->getHeader()->phis()) {
885  if (SE.isSCEVable(PN.getType()) &&
886  (SE.getEffectiveSCEVType(PN.getType()) ==
887  SE.getEffectiveSCEVType(AR->getType())) &&
888  SE.getSCEV(&PN) == AR)
889  return true;
890  }
891  return false;
892 }
893 
894 /// Check if expanding this expression is likely to incur significant cost. This
895 /// is tricky because SCEV doesn't track which expressions are actually computed
896 /// by the current IR.
897 ///
898 /// We currently allow expansion of IV increments that involve adds,
899 /// multiplication by constants, and AddRecs from existing phis.
900 ///
901 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
902 /// obvious multiple of the UDivExpr.
903 static bool isHighCostExpansion(const SCEV *S,
904  SmallPtrSetImpl<const SCEV*> &Processed,
905  ScalarEvolution &SE) {
906  // Zero/One operand expressions
907  switch (S->getSCEVType()) {
908  case scUnknown:
909  case scConstant:
910  return false;
911  case scTruncate:
912  return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
913  Processed, SE);
914  case scZeroExtend:
915  return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
916  Processed, SE);
917  case scSignExtend:
918  return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
919  Processed, SE);
920  }
921 
922  if (!Processed.insert(S).second)
923  return false;
924 
925  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
926  for (const SCEV *S : Add->operands()) {
927  if (isHighCostExpansion(S, Processed, SE))
928  return true;
929  }
930  return false;
931  }
932 
933  if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
934  if (Mul->getNumOperands() == 2) {
935  // Multiplication by a constant is ok
936  if (isa<SCEVConstant>(Mul->getOperand(0)))
937  return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
938 
939  // If we have the value of one operand, check if an existing
940  // multiplication already generates this expression.
941  if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
942  Value *UVal = U->getValue();
943  for (User *UR : UVal->users()) {
944  // If U is a constant, it may be used by a ConstantExpr.
945  Instruction *UI = dyn_cast<Instruction>(UR);
946  if (UI && UI->getOpcode() == Instruction::Mul &&
947  SE.isSCEVable(UI->getType())) {
948  return SE.getSCEV(UI) == Mul;
949  }
950  }
951  }
952  }
953  }
954 
955  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
956  if (isExistingPhi(AR, SE))
957  return false;
958  }
959 
960  // Fow now, consider any other type of expression (div/mul/min/max) high cost.
961  return true;
962 }
963 
964 /// If any of the instructions in the specified set are trivially dead, delete
965 /// them and see if this makes any of their operands subsequently dead.
966 static bool
968  bool Changed = false;
969 
970  while (!DeadInsts.empty()) {
971  Value *V = DeadInsts.pop_back_val();
972  Instruction *I = dyn_cast_or_null<Instruction>(V);
973 
974  if (!I || !isInstructionTriviallyDead(I))
975  continue;
976 
977  for (Use &O : I->operands())
978  if (Instruction *U = dyn_cast<Instruction>(O)) {
979  O = nullptr;
980  if (U->use_empty())
981  DeadInsts.emplace_back(U);
982  }
983 
984  I->eraseFromParent();
985  Changed = true;
986  }
987 
988  return Changed;
989 }
990 
991 namespace {
992 
993 class LSRUse;
994 
995 } // end anonymous namespace
996 
997 /// Check if the addressing mode defined by \p F is completely
998 /// folded in \p LU at isel time.
999 /// This includes address-mode folding and special icmp tricks.
1000 /// This function returns true if \p LU can accommodate what \p F
1001 /// defines and up to 1 base + 1 scaled + offset.
1002 /// In other words, if \p F has several base registers, this function may
1003 /// still return true. Therefore, users still need to account for
1004 /// additional base registers and/or unfolded offsets to derive an
1005 /// accurate cost model.
1006 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1007  const LSRUse &LU, const Formula &F);
1008 
1009 // Get the cost of the scaling factor used in F for LU.
1010 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1011  const LSRUse &LU, const Formula &F,
1012  const Loop &L);
1013 
1014 namespace {
1015 
1016 /// This class is used to measure and compare candidate formulae.
1017 class Cost {
1018  const Loop *L = nullptr;
1019  ScalarEvolution *SE = nullptr;
1020  const TargetTransformInfo *TTI = nullptr;
1022 
1023 public:
1024  Cost() = delete;
1025  Cost(const Loop *L, ScalarEvolution &SE, const TargetTransformInfo &TTI) :
1026  L(L), SE(&SE), TTI(&TTI) {
1027  C.Insns = 0;
1028  C.NumRegs = 0;
1029  C.AddRecCost = 0;
1030  C.NumIVMuls = 0;
1031  C.NumBaseAdds = 0;
1032  C.ImmCost = 0;
1033  C.SetupCost = 0;
1034  C.ScaleCost = 0;
1035  }
1036 
1037  bool isLess(Cost &Other);
1038 
1039  void Lose();
1040 
1041 #ifndef NDEBUG
1042  // Once any of the metrics loses, they must all remain losers.
1043  bool isValid() {
1044  return ((C.Insns | C.NumRegs | C.AddRecCost | C.NumIVMuls | C.NumBaseAdds
1045  | C.ImmCost | C.SetupCost | C.ScaleCost) != ~0u)
1046  || ((C.Insns & C.NumRegs & C.AddRecCost & C.NumIVMuls & C.NumBaseAdds
1047  & C.ImmCost & C.SetupCost & C.ScaleCost) == ~0u);
1048  }
1049 #endif
1050 
1051  bool isLoser() {
1052  assert(isValid() && "invalid cost");
1053  return C.NumRegs == ~0u;
1054  }
1055 
1056  void RateFormula(const Formula &F,
1058  const DenseSet<const SCEV *> &VisitedRegs,
1059  const LSRUse &LU,
1060  SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr);
1061 
1062  void print(raw_ostream &OS) const;
1063  void dump() const;
1064 
1065 private:
1066  void RateRegister(const Formula &F, const SCEV *Reg,
1068  void RatePrimaryRegister(const Formula &F, const SCEV *Reg,
1070  SmallPtrSetImpl<const SCEV *> *LoserRegs);
1071 };
1072 
1073 /// An operand value in an instruction which is to be replaced with some
1074 /// equivalent, possibly strength-reduced, replacement.
1075 struct LSRFixup {
1076  /// The instruction which will be updated.
1077  Instruction *UserInst = nullptr;
1078 
1079  /// The operand of the instruction which will be replaced. The operand may be
1080  /// used more than once; every instance will be replaced.
1081  Value *OperandValToReplace = nullptr;
1082 
1083  /// If this user is to use the post-incremented value of an induction
1084  /// variable, this set is non-empty and holds the loops associated with the
1085  /// induction variable.
1086  PostIncLoopSet PostIncLoops;
1087 
1088  /// A constant offset to be added to the LSRUse expression. This allows
1089  /// multiple fixups to share the same LSRUse with different offsets, for
1090  /// example in an unrolled loop.
1091  int64_t Offset = 0;
1092 
1093  LSRFixup() = default;
1094 
1095  bool isUseFullyOutsideLoop(const Loop *L) const;
1096 
1097  void print(raw_ostream &OS) const;
1098  void dump() const;
1099 };
1100 
1101 /// A DenseMapInfo implementation for holding DenseMaps and DenseSets of sorted
1102 /// SmallVectors of const SCEV*.
1103 struct UniquifierDenseMapInfo {
1104  static SmallVector<const SCEV *, 4> getEmptyKey() {
1106  V.push_back(reinterpret_cast<const SCEV *>(-1));
1107  return V;
1108  }
1109 
1110  static SmallVector<const SCEV *, 4> getTombstoneKey() {
1112  V.push_back(reinterpret_cast<const SCEV *>(-2));
1113  return V;
1114  }
1115 
1116  static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1117  return static_cast<unsigned>(hash_combine_range(V.begin(), V.end()));
1118  }
1119 
1120  static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1121  const SmallVector<const SCEV *, 4> &RHS) {
1122  return LHS == RHS;
1123  }
1124 };
1125 
1126 /// This class holds the state that LSR keeps for each use in IVUsers, as well
1127 /// as uses invented by LSR itself. It includes information about what kinds of
1128 /// things can be folded into the user, information about the user itself, and
1129 /// information about how the use may be satisfied. TODO: Represent multiple
1130 /// users of the same expression in common?
1131 class LSRUse {
1132  DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1133 
1134 public:
1135  /// An enum for a kind of use, indicating what types of scaled and immediate
1136  /// operands it might support.
1137  enum KindType {
1138  Basic, ///< A normal use, with no folding.
1139  Special, ///< A special case of basic, allowing -1 scales.
1140  Address, ///< An address use; folding according to TargetLowering
1141  ICmpZero ///< An equality icmp with both operands folded into one.
1142  // TODO: Add a generic icmp too?
1143  };
1144 
1145  using SCEVUseKindPair = PointerIntPair<const SCEV *, 2, KindType>;
1146 
1147  KindType Kind;
1148  MemAccessTy AccessTy;
1149 
1150  /// The list of operands which are to be replaced.
1152 
1153  /// Keep track of the min and max offsets of the fixups.
1154  int64_t MinOffset = std::numeric_limits<int64_t>::max();
1155  int64_t MaxOffset = std::numeric_limits<int64_t>::min();
1156 
1157  /// This records whether all of the fixups using this LSRUse are outside of
1158  /// the loop, in which case some special-case heuristics may be used.
1159  bool AllFixupsOutsideLoop = true;
1160 
1161  /// RigidFormula is set to true to guarantee that this use will be associated
1162  /// with a single formula--the one that initially matched. Some SCEV
1163  /// expressions cannot be expanded. This allows LSR to consider the registers
1164  /// used by those expressions without the need to expand them later after
1165  /// changing the formula.
1166  bool RigidFormula = false;
1167 
1168  /// This records the widest use type for any fixup using this
1169  /// LSRUse. FindUseWithSimilarFormula can't consider uses with different max
1170  /// fixup widths to be equivalent, because the narrower one may be relying on
1171  /// the implicit truncation to truncate away bogus bits.
1172  Type *WidestFixupType = nullptr;
1173 
1174  /// A list of ways to build a value that can satisfy this user. After the
1175  /// list is populated, one of these is selected heuristically and used to
1176  /// formulate a replacement for OperandValToReplace in UserInst.
1177  SmallVector<Formula, 12> Formulae;
1178 
1179  /// The set of register candidates used by all formulae in this LSRUse.
1181 
1182  LSRUse(KindType K, MemAccessTy AT) : Kind(K), AccessTy(AT) {}
1183 
1184  LSRFixup &getNewFixup() {
1185  Fixups.push_back(LSRFixup());
1186  return Fixups.back();
1187  }
1188 
1189  void pushFixup(LSRFixup &f) {
1190  Fixups.push_back(f);
1191  if (f.Offset > MaxOffset)
1192  MaxOffset = f.Offset;
1193  if (f.Offset < MinOffset)
1194  MinOffset = f.Offset;
1195  }
1196 
1197  bool HasFormulaWithSameRegs(const Formula &F) const;
1198  float getNotSelectedProbability(const SCEV *Reg) const;
1199  bool InsertFormula(const Formula &F, const Loop &L);
1200  void DeleteFormula(Formula &F);
1201  void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1202 
1203  void print(raw_ostream &OS) const;
1204  void dump() const;
1205 };
1206 
1207 } // end anonymous namespace
1208 
1209 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1210  LSRUse::KindType Kind, MemAccessTy AccessTy,
1211  GlobalValue *BaseGV, int64_t BaseOffset,
1212  bool HasBaseReg, int64_t Scale,
1213  Instruction *Fixup = nullptr);
1214 
1215 static unsigned getSetupCost(const SCEV *Reg, unsigned Depth) {
1216  if (isa<SCEVUnknown>(Reg) || isa<SCEVConstant>(Reg))
1217  return 1;
1218  if (Depth == 0)
1219  return 0;
1220  if (const auto *S = dyn_cast<SCEVAddRecExpr>(Reg))
1221  return getSetupCost(S->getStart(), Depth - 1);
1222  if (auto S = dyn_cast<SCEVCastExpr>(Reg))
1223  return getSetupCost(S->getOperand(), Depth - 1);
1224  if (auto S = dyn_cast<SCEVNAryExpr>(Reg))
1225  return std::accumulate(S->op_begin(), S->op_end(), 0,
1226  [&](unsigned i, const SCEV *Reg) {
1227  return i + getSetupCost(Reg, Depth - 1);
1228  });
1229  if (auto S = dyn_cast<SCEVUDivExpr>(Reg))
1230  return getSetupCost(S->getLHS(), Depth - 1) +
1231  getSetupCost(S->getRHS(), Depth - 1);
1232  return 0;
1233 }
1234 
1235 /// Tally up interesting quantities from the given register.
1236 void Cost::RateRegister(const Formula &F, const SCEV *Reg,
1238  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
1239  // If this is an addrec for another loop, it should be an invariant
1240  // with respect to L since L is the innermost loop (at least
1241  // for now LSR only handles innermost loops).
1242  if (AR->getLoop() != L) {
1243  // If the AddRec exists, consider it's register free and leave it alone.
1244  if (isExistingPhi(AR, *SE))
1245  return;
1246 
1247  // It is bad to allow LSR for current loop to add induction variables
1248  // for its sibling loops.
1249  if (!AR->getLoop()->contains(L)) {
1250  Lose();
1251  return;
1252  }
1253 
1254  // Otherwise, it will be an invariant with respect to Loop L.
1255  ++C.NumRegs;
1256  return;
1257  }
1258 
1259  unsigned LoopCost = 1;
1260  if (TTI->isIndexedLoadLegal(TTI->MIM_PostInc, AR->getType()) ||
1261  TTI->isIndexedStoreLegal(TTI->MIM_PostInc, AR->getType())) {
1262 
1263  // If the step size matches the base offset, we could use pre-indexed
1264  // addressing.
1265  if (TTI->shouldFavorBackedgeIndex(L)) {
1266  if (auto *Step = dyn_cast<SCEVConstant>(AR->getStepRecurrence(*SE)))
1267  if (Step->getAPInt() == F.BaseOffset)
1268  LoopCost = 0;
1269  }
1270 
1271  if (TTI->shouldFavorPostInc()) {
1272  const SCEV *LoopStep = AR->getStepRecurrence(*SE);
1273  if (isa<SCEVConstant>(LoopStep)) {
1274  const SCEV *LoopStart = AR->getStart();
1275  if (!isa<SCEVConstant>(LoopStart) &&
1276  SE->isLoopInvariant(LoopStart, L))
1277  LoopCost = 0;
1278  }
1279  }
1280  }
1281  C.AddRecCost += LoopCost;
1282 
1283  // Add the step value register, if it needs one.
1284  // TODO: The non-affine case isn't precisely modeled here.
1285  if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
1286  if (!Regs.count(AR->getOperand(1))) {
1287  RateRegister(F, AR->getOperand(1), Regs);
1288  if (isLoser())
1289  return;
1290  }
1291  }
1292  }
1293  ++C.NumRegs;
1294 
1295  // Rough heuristic; favor registers which don't require extra setup
1296  // instructions in the preheader.
1297  C.SetupCost += getSetupCost(Reg, SetupCostDepthLimit);
1298  // Ensure we don't, even with the recusion limit, produce invalid costs.
1299  C.SetupCost = std::min<unsigned>(C.SetupCost, 1 << 16);
1300 
1301  C.NumIVMuls += isa<SCEVMulExpr>(Reg) &&
1302  SE->hasComputableLoopEvolution(Reg, L);
1303 }
1304 
1305 /// Record this register in the set. If we haven't seen it before, rate
1306 /// it. Optional LoserRegs provides a way to declare any formula that refers to
1307 /// one of those regs an instant loser.
1308 void Cost::RatePrimaryRegister(const Formula &F, const SCEV *Reg,
1310  SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1311  if (LoserRegs && LoserRegs->count(Reg)) {
1312  Lose();
1313  return;
1314  }
1315  if (Regs.insert(Reg).second) {
1316  RateRegister(F, Reg, Regs);
1317  if (LoserRegs && isLoser())
1318  LoserRegs->insert(Reg);
1319  }
1320 }
1321 
1322 void Cost::RateFormula(const Formula &F,
1324  const DenseSet<const SCEV *> &VisitedRegs,
1325  const LSRUse &LU,
1326  SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1327  assert(F.isCanonical(*L) && "Cost is accurate only for canonical formula");
1328  // Tally up the registers.
1329  unsigned PrevAddRecCost = C.AddRecCost;
1330  unsigned PrevNumRegs = C.NumRegs;
1331  unsigned PrevNumBaseAdds = C.NumBaseAdds;
1332  if (const SCEV *ScaledReg = F.ScaledReg) {
1333  if (VisitedRegs.count(ScaledReg)) {
1334  Lose();
1335  return;
1336  }
1337  RatePrimaryRegister(F, ScaledReg, Regs, LoserRegs);
1338  if (isLoser())
1339  return;
1340  }
1341  for (const SCEV *BaseReg : F.BaseRegs) {
1342  if (VisitedRegs.count(BaseReg)) {
1343  Lose();
1344  return;
1345  }
1346  RatePrimaryRegister(F, BaseReg, Regs, LoserRegs);
1347  if (isLoser())
1348  return;
1349  }
1350 
1351  // Determine how many (unfolded) adds we'll need inside the loop.
1352  size_t NumBaseParts = F.getNumRegs();
1353  if (NumBaseParts > 1)
1354  // Do not count the base and a possible second register if the target
1355  // allows to fold 2 registers.
1356  C.NumBaseAdds +=
1357  NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(*TTI, LU, F)));
1358  C.NumBaseAdds += (F.UnfoldedOffset != 0);
1359 
1360  // Accumulate non-free scaling amounts.
1361  C.ScaleCost += getScalingFactorCost(*TTI, LU, F, *L);
1362 
1363  // Tally up the non-zero immediates.
1364  for (const LSRFixup &Fixup : LU.Fixups) {
1365  int64_t O = Fixup.Offset;
1366  int64_t Offset = (uint64_t)O + F.BaseOffset;
1367  if (F.BaseGV)
1368  C.ImmCost += 64; // Handle symbolic values conservatively.
1369  // TODO: This should probably be the pointer size.
1370  else if (Offset != 0)
1371  C.ImmCost += APInt(64, Offset, true).getMinSignedBits();
1372 
1373  // Check with target if this offset with this instruction is
1374  // specifically not supported.
1375  if (LU.Kind == LSRUse::Address && Offset != 0 &&
1376  !isAMCompletelyFolded(*TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
1377  Offset, F.HasBaseReg, F.Scale, Fixup.UserInst))
1378  C.NumBaseAdds++;
1379  }
1380 
1381  // If we don't count instruction cost exit here.
1382  if (!InsnsCost) {
1383  assert(isValid() && "invalid cost");
1384  return;
1385  }
1386 
1387  // Treat every new register that exceeds TTI.getNumberOfRegisters() - 1 as
1388  // additional instruction (at least fill).
1389  // TODO: Need distinguish register class?
1390  unsigned TTIRegNum = TTI->getNumberOfRegisters(
1391  TTI->getRegisterClassForType(false, F.getType())) - 1;
1392  if (C.NumRegs > TTIRegNum) {
1393  // Cost already exceeded TTIRegNum, then only newly added register can add
1394  // new instructions.
1395  if (PrevNumRegs > TTIRegNum)
1396  C.Insns += (C.NumRegs - PrevNumRegs);
1397  else
1398  C.Insns += (C.NumRegs - TTIRegNum);
1399  }
1400 
1401  // If ICmpZero formula ends with not 0, it could not be replaced by
1402  // just add or sub. We'll need to compare final result of AddRec.
1403  // That means we'll need an additional instruction. But if the target can
1404  // macro-fuse a compare with a branch, don't count this extra instruction.
1405  // For -10 + {0, +, 1}:
1406  // i = i + 1;
1407  // cmp i, 10
1408  //
1409  // For {-10, +, 1}:
1410  // i = i + 1;
1411  if (LU.Kind == LSRUse::ICmpZero && !F.hasZeroEnd() &&
1412  !TTI->canMacroFuseCmp())
1413  C.Insns++;
1414  // Each new AddRec adds 1 instruction to calculation.
1415  C.Insns += (C.AddRecCost - PrevAddRecCost);
1416 
1417  // BaseAdds adds instructions for unfolded registers.
1418  if (LU.Kind != LSRUse::ICmpZero)
1419  C.Insns += C.NumBaseAdds - PrevNumBaseAdds;
1420  assert(isValid() && "invalid cost");
1421 }
1422 
1423 /// Set this cost to a losing value.
1424 void Cost::Lose() {
1427  C.AddRecCost = std::numeric_limits<unsigned>::max();
1428  C.NumIVMuls = std::numeric_limits<unsigned>::max();
1429  C.NumBaseAdds = std::numeric_limits<unsigned>::max();
1431  C.SetupCost = std::numeric_limits<unsigned>::max();
1432  C.ScaleCost = std::numeric_limits<unsigned>::max();
1433 }
1434 
1435 /// Choose the lower cost.
1436 bool Cost::isLess(Cost &Other) {
1437  if (InsnsCost.getNumOccurrences() > 0 && InsnsCost &&
1438  C.Insns != Other.C.Insns)
1439  return C.Insns < Other.C.Insns;
1440  return TTI->isLSRCostLess(C, Other.C);
1441 }
1442 
1443 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1444 void Cost::print(raw_ostream &OS) const {
1445  if (InsnsCost)
1446  OS << C.Insns << " instruction" << (C.Insns == 1 ? " " : "s ");
1447  OS << C.NumRegs << " reg" << (C.NumRegs == 1 ? "" : "s");
1448  if (C.AddRecCost != 0)
1449  OS << ", with addrec cost " << C.AddRecCost;
1450  if (C.NumIVMuls != 0)
1451  OS << ", plus " << C.NumIVMuls << " IV mul"
1452  << (C.NumIVMuls == 1 ? "" : "s");
1453  if (C.NumBaseAdds != 0)
1454  OS << ", plus " << C.NumBaseAdds << " base add"
1455  << (C.NumBaseAdds == 1 ? "" : "s");
1456  if (C.ScaleCost != 0)
1457  OS << ", plus " << C.ScaleCost << " scale cost";
1458  if (C.ImmCost != 0)
1459  OS << ", plus " << C.ImmCost << " imm cost";
1460  if (C.SetupCost != 0)
1461  OS << ", plus " << C.SetupCost << " setup cost";
1462 }
1463 
1464 LLVM_DUMP_METHOD void Cost::dump() const {
1465  print(errs()); errs() << '\n';
1466 }
1467 #endif
1468 
1469 /// Test whether this fixup always uses its value outside of the given loop.
1470 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1471  // PHI nodes use their value in their incoming blocks.
1472  if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1473  for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1474  if (PN->getIncomingValue(i) == OperandValToReplace &&
1475  L->contains(PN->getIncomingBlock(i)))
1476  return false;
1477  return true;
1478  }
1479 
1480  return !L->contains(UserInst);
1481 }
1482 
1483 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1484 void LSRFixup::print(raw_ostream &OS) const {
1485  OS << "UserInst=";
1486  // Store is common and interesting enough to be worth special-casing.
1487  if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1488  OS << "store ";
1489  Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false);
1490  } else if (UserInst->getType()->isVoidTy())
1491  OS << UserInst->getOpcodeName();
1492  else
1493  UserInst->printAsOperand(OS, /*PrintType=*/false);
1494 
1495  OS << ", OperandValToReplace=";
1496  OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
1497 
1498  for (const Loop *PIL : PostIncLoops) {
1499  OS << ", PostIncLoop=";
1500  PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
1501  }
1502 
1503  if (Offset != 0)
1504  OS << ", Offset=" << Offset;
1505 }
1506 
1507 LLVM_DUMP_METHOD void LSRFixup::dump() const {
1508  print(errs()); errs() << '\n';
1509 }
1510 #endif
1511 
1512 /// Test whether this use as a formula which has the same registers as the given
1513 /// formula.
1514 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1515  SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1516  if (F.ScaledReg) Key.push_back(F.ScaledReg);
1517  // Unstable sort by host order ok, because this is only used for uniquifying.
1518  llvm::sort(Key);
1519  return Uniquifier.count(Key);
1520 }
1521 
1522 /// The function returns a probability of selecting formula without Reg.
1523 float LSRUse::getNotSelectedProbability(const SCEV *Reg) const {
1524  unsigned FNum = 0;
1525  for (const Formula &F : Formulae)
1526  if (F.referencesReg(Reg))
1527  FNum++;
1528  return ((float)(Formulae.size() - FNum)) / Formulae.size();
1529 }
1530 
1531 /// If the given formula has not yet been inserted, add it to the list, and
1532 /// return true. Return false otherwise. The formula must be in canonical form.
1533 bool LSRUse::InsertFormula(const Formula &F, const Loop &L) {
1534  assert(F.isCanonical(L) && "Invalid canonical representation");
1535 
1536  if (!Formulae.empty() && RigidFormula)
1537  return false;
1538 
1539  SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1540  if (F.ScaledReg) Key.push_back(F.ScaledReg);
1541  // Unstable sort by host order ok, because this is only used for uniquifying.
1542  llvm::sort(Key);
1543 
1544  if (!Uniquifier.insert(Key).second)
1545  return false;
1546 
1547  // Using a register to hold the value of 0 is not profitable.
1548  assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1549  "Zero allocated in a scaled register!");
1550 #ifndef NDEBUG
1551  for (const SCEV *BaseReg : F.BaseRegs)
1552  assert(!BaseReg->isZero() && "Zero allocated in a base register!");
1553 #endif
1554 
1555  // Add the formula to the list.
1556  Formulae.push_back(F);
1557 
1558  // Record registers now being used by this use.
1559  Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1560  if (F.ScaledReg)
1561  Regs.insert(F.ScaledReg);
1562 
1563  return true;
1564 }
1565 
1566 /// Remove the given formula from this use's list.
1567 void LSRUse::DeleteFormula(Formula &F) {
1568  if (&F != &Formulae.back())
1569  std::swap(F, Formulae.back());
1570  Formulae.pop_back();
1571 }
1572 
1573 /// Recompute the Regs field, and update RegUses.
1574 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1575  // Now that we've filtered out some formulae, recompute the Regs set.
1576  SmallPtrSet<const SCEV *, 4> OldRegs = std::move(Regs);
1577  Regs.clear();
1578  for (const Formula &F : Formulae) {
1579  if (F.ScaledReg) Regs.insert(F.ScaledReg);
1580  Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1581  }
1582 
1583  // Update the RegTracker.
1584  for (const SCEV *S : OldRegs)
1585  if (!Regs.count(S))
1586  RegUses.dropRegister(S, LUIdx);
1587 }
1588 
1589 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1590 void LSRUse::print(raw_ostream &OS) const {
1591  OS << "LSR Use: Kind=";
1592  switch (Kind) {
1593  case Basic: OS << "Basic"; break;
1594  case Special: OS << "Special"; break;
1595  case ICmpZero: OS << "ICmpZero"; break;
1596  case Address:
1597  OS << "Address of ";
1598  if (AccessTy.MemTy->isPointerTy())
1599  OS << "pointer"; // the full pointer type could be really verbose
1600  else {
1601  OS << *AccessTy.MemTy;
1602  }
1603 
1604  OS << " in addrspace(" << AccessTy.AddrSpace << ')';
1605  }
1606 
1607  OS << ", Offsets={";
1608  bool NeedComma = false;
1609  for (const LSRFixup &Fixup : Fixups) {
1610  if (NeedComma) OS << ',';
1611  OS << Fixup.Offset;
1612  NeedComma = true;
1613  }
1614  OS << '}';
1615 
1616  if (AllFixupsOutsideLoop)
1617  OS << ", all-fixups-outside-loop";
1618 
1619  if (WidestFixupType)
1620  OS << ", widest fixup type: " << *WidestFixupType;
1621 }
1622 
1623 LLVM_DUMP_METHOD void LSRUse::dump() const {
1624  print(errs()); errs() << '\n';
1625 }
1626 #endif
1627 
1629  LSRUse::KindType Kind, MemAccessTy AccessTy,
1630  GlobalValue *BaseGV, int64_t BaseOffset,
1631  bool HasBaseReg, int64_t Scale,
1632  Instruction *Fixup/*= nullptr*/) {
1633  switch (Kind) {
1634  case LSRUse::Address:
1635  return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset,
1636  HasBaseReg, Scale, AccessTy.AddrSpace, Fixup);
1637 
1638  case LSRUse::ICmpZero:
1639  // There's not even a target hook for querying whether it would be legal to
1640  // fold a GV into an ICmp.
1641  if (BaseGV)
1642  return false;
1643 
1644  // ICmp only has two operands; don't allow more than two non-trivial parts.
1645  if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1646  return false;
1647 
1648  // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1649  // putting the scaled register in the other operand of the icmp.
1650  if (Scale != 0 && Scale != -1)
1651  return false;
1652 
1653  // If we have low-level target information, ask the target if it can fold an
1654  // integer immediate on an icmp.
1655  if (BaseOffset != 0) {
1656  // We have one of:
1657  // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1658  // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1659  // Offs is the ICmp immediate.
1660  if (Scale == 0)
1661  // The cast does the right thing with
1662  // std::numeric_limits<int64_t>::min().
1663  BaseOffset = -(uint64_t)BaseOffset;
1664  return TTI.isLegalICmpImmediate(BaseOffset);
1665  }
1666 
1667  // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1668  return true;
1669 
1670  case LSRUse::Basic:
1671  // Only handle single-register values.
1672  return !BaseGV && Scale == 0 && BaseOffset == 0;
1673 
1674  case LSRUse::Special:
1675  // Special case Basic to handle -1 scales.
1676  return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1677  }
1678 
1679  llvm_unreachable("Invalid LSRUse Kind!");
1680 }
1681 
1683  int64_t MinOffset, int64_t MaxOffset,
1684  LSRUse::KindType Kind, MemAccessTy AccessTy,
1685  GlobalValue *BaseGV, int64_t BaseOffset,
1686  bool HasBaseReg, int64_t Scale) {
1687  // Check for overflow.
1688  if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1689  (MinOffset > 0))
1690  return false;
1691  MinOffset = (uint64_t)BaseOffset + MinOffset;
1692  if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1693  (MaxOffset > 0))
1694  return false;
1695  MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1696 
1697  return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset,
1698  HasBaseReg, Scale) &&
1699  isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset,
1700  HasBaseReg, Scale);
1701 }
1702 
1704  int64_t MinOffset, int64_t MaxOffset,
1705  LSRUse::KindType Kind, MemAccessTy AccessTy,
1706  const Formula &F, const Loop &L) {
1707  // For the purpose of isAMCompletelyFolded either having a canonical formula
1708  // or a scale not equal to zero is correct.
1709  // Problems may arise from non canonical formulae having a scale == 0.
1710  // Strictly speaking it would best to just rely on canonical formulae.
1711  // However, when we generate the scaled formulae, we first check that the
1712  // scaling factor is profitable before computing the actual ScaledReg for
1713  // compile time sake.
1714  assert((F.isCanonical(L) || F.Scale != 0));
1715  return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1716  F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale);
1717 }
1718 
1719 /// Test whether we know how to expand the current formula.
1720 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1721  int64_t MaxOffset, LSRUse::KindType Kind,
1722  MemAccessTy AccessTy, GlobalValue *BaseGV,
1723  int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1724  // We know how to expand completely foldable formulae.
1725  return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1726  BaseOffset, HasBaseReg, Scale) ||
1727  // Or formulae that use a base register produced by a sum of base
1728  // registers.
1729  (Scale == 1 &&
1730  isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1731  BaseGV, BaseOffset, true, 0));
1732 }
1733 
1734 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1735  int64_t MaxOffset, LSRUse::KindType Kind,
1736  MemAccessTy AccessTy, const Formula &F) {
1737  return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1738  F.BaseOffset, F.HasBaseReg, F.Scale);
1739 }
1740 
1742  const LSRUse &LU, const Formula &F) {
1743  // Target may want to look at the user instructions.
1744  if (LU.Kind == LSRUse::Address && TTI.LSRWithInstrQueries()) {
1745  for (const LSRFixup &Fixup : LU.Fixups)
1746  if (!isAMCompletelyFolded(TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
1747  (F.BaseOffset + Fixup.Offset), F.HasBaseReg,
1748  F.Scale, Fixup.UserInst))
1749  return false;
1750  return true;
1751  }
1752 
1753  return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1754  LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg,
1755  F.Scale);
1756 }
1757 
1758 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1759  const LSRUse &LU, const Formula &F,
1760  const Loop &L) {
1761  if (!F.Scale)
1762  return 0;
1763 
1764  // If the use is not completely folded in that instruction, we will have to
1765  // pay an extra cost only for scale != 1.
1766  if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1767  LU.AccessTy, F, L))
1768  return F.Scale != 1;
1769 
1770  switch (LU.Kind) {
1771  case LSRUse::Address: {
1772  // Check the scaling factor cost with both the min and max offsets.
1773  int ScaleCostMinOffset = TTI.getScalingFactorCost(
1774  LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg,
1775  F.Scale, LU.AccessTy.AddrSpace);
1776  int ScaleCostMaxOffset = TTI.getScalingFactorCost(
1777  LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg,
1778  F.Scale, LU.AccessTy.AddrSpace);
1779 
1780  assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1781  "Legal addressing mode has an illegal cost!");
1782  return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
1783  }
1784  case LSRUse::ICmpZero:
1785  case LSRUse::Basic:
1786  case LSRUse::Special:
1787  // The use is completely folded, i.e., everything is folded into the
1788  // instruction.
1789  return 0;
1790  }
1791 
1792  llvm_unreachable("Invalid LSRUse Kind!");
1793 }
1794 
1795 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1796  LSRUse::KindType Kind, MemAccessTy AccessTy,
1797  GlobalValue *BaseGV, int64_t BaseOffset,
1798  bool HasBaseReg) {
1799  // Fast-path: zero is always foldable.
1800  if (BaseOffset == 0 && !BaseGV) return true;
1801 
1802  // Conservatively, create an address with an immediate and a
1803  // base and a scale.
1804  int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1805 
1806  // Canonicalize a scale of 1 to a base register if the formula doesn't
1807  // already have a base register.
1808  if (!HasBaseReg && Scale == 1) {
1809  Scale = 0;
1810  HasBaseReg = true;
1811  }
1812 
1813  return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset,
1814  HasBaseReg, Scale);
1815 }
1816 
1817 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1818  ScalarEvolution &SE, int64_t MinOffset,
1819  int64_t MaxOffset, LSRUse::KindType Kind,
1820  MemAccessTy AccessTy, const SCEV *S,
1821  bool HasBaseReg) {
1822  // Fast-path: zero is always foldable.
1823  if (S->isZero()) return true;
1824 
1825  // Conservatively, create an address with an immediate and a
1826  // base and a scale.
1827  int64_t BaseOffset = ExtractImmediate(S, SE);
1828  GlobalValue *BaseGV = ExtractSymbol(S, SE);
1829 
1830  // If there's anything else involved, it's not foldable.
1831  if (!S->isZero()) return false;
1832 
1833  // Fast-path: zero is always foldable.
1834  if (BaseOffset == 0 && !BaseGV) return true;
1835 
1836  // Conservatively, create an address with an immediate and a
1837  // base and a scale.
1838  int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1839 
1840  return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1841  BaseOffset, HasBaseReg, Scale);
1842 }
1843 
1844 namespace {
1845 
1846 /// An individual increment in a Chain of IV increments. Relate an IV user to
1847 /// an expression that computes the IV it uses from the IV used by the previous
1848 /// link in the Chain.
1849 ///
1850 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1851 /// original IVOperand. The head of the chain's IVOperand is only valid during
1852 /// chain collection, before LSR replaces IV users. During chain generation,
1853 /// IncExpr can be used to find the new IVOperand that computes the same
1854 /// expression.
1855 struct IVInc {
1856  Instruction *UserInst;
1857  Value* IVOperand;
1858  const SCEV *IncExpr;
1859 
1860  IVInc(Instruction *U, Value *O, const SCEV *E)
1861  : UserInst(U), IVOperand(O), IncExpr(E) {}
1862 };
1863 
1864 // The list of IV increments in program order. We typically add the head of a
1865 // chain without finding subsequent links.
1866 struct IVChain {
1867  SmallVector<IVInc, 1> Incs;
1868  const SCEV *ExprBase = nullptr;
1869 
1870  IVChain() = default;
1871  IVChain(const IVInc &Head, const SCEV *Base)
1872  : Incs(1, Head), ExprBase(Base) {}
1873 
1874  using const_iterator = SmallVectorImpl<IVInc>::const_iterator;
1875 
1876  // Return the first increment in the chain.
1877  const_iterator begin() const {
1878  assert(!Incs.empty());
1879  return std::next(Incs.begin());
1880  }
1881  const_iterator end() const {
1882  return Incs.end();
1883  }
1884 
1885  // Returns true if this chain contains any increments.
1886  bool hasIncs() const { return Incs.size() >= 2; }
1887 
1888  // Add an IVInc to the end of this chain.
1889  void add(const IVInc &X) { Incs.push_back(X); }
1890 
1891  // Returns the last UserInst in the chain.
1892  Instruction *tailUserInst() const { return Incs.back().UserInst; }
1893 
1894  // Returns true if IncExpr can be profitably added to this chain.
1895  bool isProfitableIncrement(const SCEV *OperExpr,
1896  const SCEV *IncExpr,
1897  ScalarEvolution&);
1898 };
1899 
1900 /// Helper for CollectChains to track multiple IV increment uses. Distinguish
1901 /// between FarUsers that definitely cross IV increments and NearUsers that may
1902 /// be used between IV increments.
1903 struct ChainUsers {
1905  SmallPtrSet<Instruction*, 4> NearUsers;
1906 };
1907 
1908 /// This class holds state for the main loop strength reduction logic.
1909 class LSRInstance {
1910  IVUsers &IU;
1911  ScalarEvolution &SE;
1912  DominatorTree &DT;
1913  LoopInfo &LI;
1914  AssumptionCache &AC;
1915  TargetLibraryInfo &LibInfo;
1916  const TargetTransformInfo &TTI;
1917  Loop *const L;
1918  bool FavorBackedgeIndex = false;
1919  bool Changed = false;
1920 
1921  /// This is the insert position that the current loop's induction variable
1922  /// increment should be placed. In simple loops, this is the latch block's
1923  /// terminator. But in more complicated cases, this is a position which will
1924  /// dominate all the in-loop post-increment users.
1925  Instruction *IVIncInsertPos = nullptr;
1926 
1927  /// Interesting factors between use strides.
1928  ///
1929  /// We explicitly use a SetVector which contains a SmallSet, instead of the
1930  /// default, a SmallDenseSet, because we need to use the full range of
1931  /// int64_ts, and there's currently no good way of doing that with
1932  /// SmallDenseSet.
1934 
1935  /// Interesting use types, to facilitate truncation reuse.
1937 
1938  /// The list of interesting uses.
1939  mutable SmallVector<LSRUse, 16> Uses;
1940 
1941  /// Track which uses use which register candidates.
1942  RegUseTracker RegUses;
1943 
1944  // Limit the number of chains to avoid quadratic behavior. We don't expect to
1945  // have more than a few IV increment chains in a loop. Missing a Chain falls
1946  // back to normal LSR behavior for those uses.
1947  static const unsigned MaxChains = 8;
1948 
1949  /// IV users can form a chain of IV increments.
1951 
1952  /// IV users that belong to profitable IVChains.
1954 
1955  void OptimizeShadowIV();
1956  bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1957  ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1958  void OptimizeLoopTermCond();
1959 
1960  void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1961  SmallVectorImpl<ChainUsers> &ChainUsersVec);
1962  void FinalizeChain(IVChain &Chain);
1963  void CollectChains();
1964  void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1965  SmallVectorImpl<WeakTrackingVH> &DeadInsts);
1966 
1967  void CollectInterestingTypesAndFactors();
1968  void CollectFixupsAndInitialFormulae();
1969 
1970  // Support for sharing of LSRUses between LSRFixups.
1972  UseMapTy UseMap;
1973 
1974  bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1975  LSRUse::KindType Kind, MemAccessTy AccessTy);
1976 
1977  std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind,
1978  MemAccessTy AccessTy);
1979 
1980  void DeleteUse(LSRUse &LU, size_t LUIdx);
1981 
1982  LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1983 
1984  void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1985  void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1986  void CountRegisters(const Formula &F, size_t LUIdx);
1987  bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1988 
1989  void CollectLoopInvariantFixupsAndFormulae();
1990 
1991  void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1992  unsigned Depth = 0);
1993 
1994  void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
1995  const Formula &Base, unsigned Depth,
1996  size_t Idx, bool IsScaledReg = false);
1997  void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1998  void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1999  const Formula &Base, size_t Idx,
2000  bool IsScaledReg = false);
2001  void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
2002  void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx,
2003  const Formula &Base,
2004  const SmallVectorImpl<int64_t> &Worklist,
2005  size_t Idx, bool IsScaledReg = false);
2006  void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
2007  void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
2008  void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
2009  void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
2010  void GenerateCrossUseConstantOffsets();
2011  void GenerateAllReuseFormulae();
2012 
2013  void FilterOutUndesirableDedicatedRegisters();
2014 
2015  size_t EstimateSearchSpaceComplexity() const;
2016  void NarrowSearchSpaceByDetectingSupersets();
2017  void NarrowSearchSpaceByCollapsingUnrolledCode();
2018  void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
2019  void NarrowSearchSpaceByFilterFormulaWithSameScaledReg();
2020  void NarrowSearchSpaceByDeletingCostlyFormulas();
2021  void NarrowSearchSpaceByPickingWinnerRegs();
2022  void NarrowSearchSpaceUsingHeuristics();
2023 
2024  void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
2025  Cost &SolutionCost,
2027  const Cost &CurCost,
2028  const SmallPtrSet<const SCEV *, 16> &CurRegs,
2029  DenseSet<const SCEV *> &VisitedRegs) const;
2030  void Solve(SmallVectorImpl<const Formula *> &Solution) const;
2031 
2033  HoistInsertPosition(BasicBlock::iterator IP,
2034  const SmallVectorImpl<Instruction *> &Inputs) const;
2036  AdjustInsertPositionForExpand(BasicBlock::iterator IP,
2037  const LSRFixup &LF,
2038  const LSRUse &LU,
2039  SCEVExpander &Rewriter) const;
2040 
2041  Value *Expand(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2042  BasicBlock::iterator IP, SCEVExpander &Rewriter,
2043  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2044  void RewriteForPHI(PHINode *PN, const LSRUse &LU, const LSRFixup &LF,
2045  const Formula &F, SCEVExpander &Rewriter,
2046  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2047  void Rewrite(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2048  SCEVExpander &Rewriter,
2049  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2050  void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution);
2051 
2052 public:
2053  LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE, DominatorTree &DT,
2054  LoopInfo &LI, const TargetTransformInfo &TTI, AssumptionCache &AC,
2055  TargetLibraryInfo &LibInfo);
2056 
2057  bool getChanged() const { return Changed; }
2058 
2059  void print_factors_and_types(raw_ostream &OS) const;
2060  void print_fixups(raw_ostream &OS) const;
2061  void print_uses(raw_ostream &OS) const;
2062  void print(raw_ostream &OS) const;
2063  void dump() const;
2064 };
2065 
2066 } // end anonymous namespace
2067 
2068 /// If IV is used in a int-to-float cast inside the loop then try to eliminate
2069 /// the cast operation.
2070 void LSRInstance::OptimizeShadowIV() {
2071  const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2072  if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2073  return;
2074 
2075  for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
2076  UI != E; /* empty */) {
2077  IVUsers::const_iterator CandidateUI = UI;
2078  ++UI;
2079  Instruction *ShadowUse = CandidateUI->getUser();
2080  Type *DestTy = nullptr;
2081  bool IsSigned = false;
2082 
2083  /* If shadow use is a int->float cast then insert a second IV
2084  to eliminate this cast.
2085 
2086  for (unsigned i = 0; i < n; ++i)
2087  foo((double)i);
2088 
2089  is transformed into
2090 
2091  double d = 0.0;
2092  for (unsigned i = 0; i < n; ++i, ++d)
2093  foo(d);
2094  */
2095  if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
2096  IsSigned = false;
2097  DestTy = UCast->getDestTy();
2098  }
2099  else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
2100  IsSigned = true;
2101  DestTy = SCast->getDestTy();
2102  }
2103  if (!DestTy) continue;
2104 
2105  // If target does not support DestTy natively then do not apply
2106  // this transformation.
2107  if (!TTI.isTypeLegal(DestTy)) continue;
2108 
2109  PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
2110  if (!PH) continue;
2111  if (PH->getNumIncomingValues() != 2) continue;
2112 
2113  // If the calculation in integers overflows, the result in FP type will
2114  // differ. So we only can do this transformation if we are guaranteed to not
2115  // deal with overflowing values
2116  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(PH));
2117  if (!AR) continue;
2118  if (IsSigned && !AR->hasNoSignedWrap()) continue;
2119  if (!IsSigned && !AR->hasNoUnsignedWrap()) continue;
2120 
2121  Type *SrcTy = PH->getType();
2122  int Mantissa = DestTy->getFPMantissaWidth();
2123  if (Mantissa == -1) continue;
2124  if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
2125  continue;
2126 
2127  unsigned Entry, Latch;
2128  if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
2129  Entry = 0;
2130  Latch = 1;
2131  } else {
2132  Entry = 1;
2133  Latch = 0;
2134  }
2135 
2137  if (!Init) continue;
2138  Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
2139  (double)Init->getSExtValue() :
2140  (double)Init->getZExtValue());
2141 
2142  BinaryOperator *Incr =
2144  if (!Incr) continue;
2145  if (Incr->getOpcode() != Instruction::Add
2146  && Incr->getOpcode() != Instruction::Sub)
2147  continue;
2148 
2149  /* Initialize new IV, double d = 0.0 in above example. */
2150  ConstantInt *C = nullptr;
2151  if (Incr->getOperand(0) == PH)
2152  C = dyn_cast<ConstantInt>(Incr->getOperand(1));
2153  else if (Incr->getOperand(1) == PH)
2154  C = dyn_cast<ConstantInt>(Incr->getOperand(0));
2155  else
2156  continue;
2157 
2158  if (!C) continue;
2159 
2160  // Ignore negative constants, as the code below doesn't handle them
2161  // correctly. TODO: Remove this restriction.
2162  if (!C->getValue().isStrictlyPositive()) continue;
2163 
2164  /* Add new PHINode. */
2165  PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
2166 
2167  /* create new increment. '++d' in above example. */
2168  Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
2169  BinaryOperator *NewIncr =
2170  BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
2171  Instruction::FAdd : Instruction::FSub,
2172  NewPH, CFP, "IV.S.next.", Incr);
2173 
2174  NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
2175  NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
2176 
2177  /* Remove cast operation */
2178  ShadowUse->replaceAllUsesWith(NewPH);
2179  ShadowUse->eraseFromParent();
2180  Changed = true;
2181  break;
2182  }
2183 }
2184 
2185 /// If Cond has an operand that is an expression of an IV, set the IV user and
2186 /// stride information and return true, otherwise return false.
2187 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
2188  for (IVStrideUse &U : IU)
2189  if (U.getUser() == Cond) {
2190  // NOTE: we could handle setcc instructions with multiple uses here, but
2191  // InstCombine does it as well for simple uses, it's not clear that it
2192  // occurs enough in real life to handle.
2193  CondUse = &U;
2194  return true;
2195  }
2196  return false;
2197 }
2198 
2199 /// Rewrite the loop's terminating condition if it uses a max computation.
2200 ///
2201 /// This is a narrow solution to a specific, but acute, problem. For loops
2202 /// like this:
2203 ///
2204 /// i = 0;
2205 /// do {
2206 /// p[i] = 0.0;
2207 /// } while (++i < n);
2208 ///
2209 /// the trip count isn't just 'n', because 'n' might not be positive. And
2210 /// unfortunately this can come up even for loops where the user didn't use
2211 /// a C do-while loop. For example, seemingly well-behaved top-test loops
2212 /// will commonly be lowered like this:
2213 ///
2214 /// if (n > 0) {
2215 /// i = 0;
2216 /// do {
2217 /// p[i] = 0.0;
2218 /// } while (++i < n);
2219 /// }
2220 ///
2221 /// and then it's possible for subsequent optimization to obscure the if
2222 /// test in such a way that indvars can't find it.
2223 ///
2224 /// When indvars can't find the if test in loops like this, it creates a
2225 /// max expression, which allows it to give the loop a canonical
2226 /// induction variable:
2227 ///
2228 /// i = 0;
2229 /// max = n < 1 ? 1 : n;
2230 /// do {
2231 /// p[i] = 0.0;
2232 /// } while (++i != max);
2233 ///
2234 /// Canonical induction variables are necessary because the loop passes
2235 /// are designed around them. The most obvious example of this is the
2236 /// LoopInfo analysis, which doesn't remember trip count values. It
2237 /// expects to be able to rediscover the trip count each time it is
2238 /// needed, and it does this using a simple analysis that only succeeds if
2239 /// the loop has a canonical induction variable.
2240 ///
2241 /// However, when it comes time to generate code, the maximum operation
2242 /// can be quite costly, especially if it's inside of an outer loop.
2243 ///
2244 /// This function solves this problem by detecting this type of loop and
2245 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
2246 /// the instructions for the maximum computation.
2247 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
2248  // Check that the loop matches the pattern we're looking for.
2249  if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
2250  Cond->getPredicate() != CmpInst::ICMP_NE)
2251  return Cond;
2252 
2253  SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
2254  if (!Sel || !Sel->hasOneUse()) return Cond;
2255 
2256  const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2257  if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2258  return Cond;
2259  const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
2260 
2261  // Add one to the backedge-taken count to get the trip count.
2262  const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
2263  if (IterationCount != SE.getSCEV(Sel)) return Cond;
2264 
2265  // Check for a max calculation that matches the pattern. There's no check
2266  // for ICMP_ULE here because the comparison would be with zero, which
2267  // isn't interesting.
2269  const SCEVNAryExpr *Max = nullptr;
2270  if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
2271  Pred = ICmpInst::ICMP_SLE;
2272  Max = S;
2273  } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
2274  Pred = ICmpInst::ICMP_SLT;
2275  Max = S;
2276  } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
2277  Pred = ICmpInst::ICMP_ULT;
2278  Max = U;
2279  } else {
2280  // No match; bail.
2281  return Cond;
2282  }
2283 
2284  // To handle a max with more than two operands, this optimization would
2285  // require additional checking and setup.
2286  if (Max->getNumOperands() != 2)
2287  return Cond;
2288 
2289  const SCEV *MaxLHS = Max->getOperand(0);
2290  const SCEV *MaxRHS = Max->getOperand(1);
2291 
2292  // ScalarEvolution canonicalizes constants to the left. For < and >, look
2293  // for a comparison with 1. For <= and >=, a comparison with zero.
2294  if (!MaxLHS ||
2295  (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
2296  return Cond;
2297 
2298  // Check the relevant induction variable for conformance to
2299  // the pattern.
2300  const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
2301  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
2302  if (!AR || !AR->isAffine() ||
2303  AR->getStart() != One ||
2304  AR->getStepRecurrence(SE) != One)
2305  return Cond;
2306 
2307  assert(AR->getLoop() == L &&
2308  "Loop condition operand is an addrec in a different loop!");
2309 
2310  // Check the right operand of the select, and remember it, as it will
2311  // be used in the new comparison instruction.
2312  Value *NewRHS = nullptr;
2313  if (ICmpInst::isTrueWhenEqual(Pred)) {
2314  // Look for n+1, and grab n.
2315  if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
2316  if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2317  if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2318  NewRHS = BO->getOperand(0);
2319  if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
2320  if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2321  if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2322  NewRHS = BO->getOperand(0);
2323  if (!NewRHS)
2324  return Cond;
2325  } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
2326  NewRHS = Sel->getOperand(1);
2327  else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
2328  NewRHS = Sel->getOperand(2);
2329  else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
2330  NewRHS = SU->getValue();
2331  else
2332  // Max doesn't match expected pattern.
2333  return Cond;
2334 
2335  // Determine the new comparison opcode. It may be signed or unsigned,
2336  // and the original comparison may be either equality or inequality.
2337  if (Cond->getPredicate() == CmpInst::ICMP_EQ)
2338  Pred = CmpInst::getInversePredicate(Pred);
2339 
2340  // Ok, everything looks ok to change the condition into an SLT or SGE and
2341  // delete the max calculation.
2342  ICmpInst *NewCond =
2343  new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2344 
2345  // Delete the max calculation instructions.
2346  Cond->replaceAllUsesWith(NewCond);
2347  CondUse->setUser(NewCond);
2348  Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2349  Cond->eraseFromParent();
2350  Sel->eraseFromParent();
2351  if (Cmp->use_empty())
2352  Cmp->eraseFromParent();
2353  return NewCond;
2354 }
2355 
2356 /// Change loop terminating condition to use the postinc iv when possible.
2357 void
2358 LSRInstance::OptimizeLoopTermCond() {
2360 
2361  // We need a different set of heuristics for rotated and non-rotated loops.
2362  // If a loop is rotated then the latch is also the backedge, so inserting
2363  // post-inc expressions just before the latch is ideal. To reduce live ranges
2364  // it also makes sense to rewrite terminating conditions to use post-inc
2365  // expressions.
2366  //
2367  // If the loop is not rotated then the latch is not a backedge; the latch
2368  // check is done in the loop head. Adding post-inc expressions before the
2369  // latch will cause overlapping live-ranges of pre-inc and post-inc expressions
2370  // in the loop body. In this case we do *not* want to use post-inc expressions
2371  // in the latch check, and we want to insert post-inc expressions before
2372  // the backedge.
2373  BasicBlock *LatchBlock = L->getLoopLatch();
2374  SmallVector<BasicBlock*, 8> ExitingBlocks;
2375  L->getExitingBlocks(ExitingBlocks);
2376  if (llvm::all_of(ExitingBlocks, [&LatchBlock](const BasicBlock *BB) {
2377  return LatchBlock != BB;
2378  })) {
2379  // The backedge doesn't exit the loop; treat this as a head-tested loop.
2380  IVIncInsertPos = LatchBlock->getTerminator();
2381  return;
2382  }
2383 
2384  // Otherwise treat this as a rotated loop.
2385  for (BasicBlock *ExitingBlock : ExitingBlocks) {
2386  // Get the terminating condition for the loop if possible. If we
2387  // can, we want to change it to use a post-incremented version of its
2388  // induction variable, to allow coalescing the live ranges for the IV into
2389  // one register value.
2390 
2391  BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2392  if (!TermBr)
2393  continue;
2394  // FIXME: Overly conservative, termination condition could be an 'or' etc..
2395  if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2396  continue;
2397 
2398  // Search IVUsesByStride to find Cond's IVUse if there is one.
2399  IVStrideUse *CondUse = nullptr;
2400  ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2401  if (!FindIVUserForCond(Cond, CondUse))
2402  continue;
2403 
2404  // If the trip count is computed in terms of a max (due to ScalarEvolution
2405  // being unable to find a sufficient guard, for example), change the loop
2406  // comparison to use SLT or ULT instead of NE.
2407  // One consequence of doing this now is that it disrupts the count-down
2408  // optimization. That's not always a bad thing though, because in such
2409  // cases it may still be worthwhile to avoid a max.
2410  Cond = OptimizeMax(Cond, CondUse);
2411 
2412  // If this exiting block dominates the latch block, it may also use
2413  // the post-inc value if it won't be shared with other uses.
2414  // Check for dominance.
2415  if (!DT.dominates(ExitingBlock, LatchBlock))
2416  continue;
2417 
2418  // Conservatively avoid trying to use the post-inc value in non-latch
2419  // exits if there may be pre-inc users in intervening blocks.
2420  if (LatchBlock != ExitingBlock)
2421  for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2422  // Test if the use is reachable from the exiting block. This dominator
2423  // query is a conservative approximation of reachability.
2424  if (&*UI != CondUse &&
2425  !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2426  // Conservatively assume there may be reuse if the quotient of their
2427  // strides could be a legal scale.
2428  const SCEV *A = IU.getStride(*CondUse, L);
2429  const SCEV *B = IU.getStride(*UI, L);
2430  if (!A || !B) continue;
2431  if (SE.getTypeSizeInBits(A->getType()) !=
2432  SE.getTypeSizeInBits(B->getType())) {
2433  if (SE.getTypeSizeInBits(A->getType()) >
2434  SE.getTypeSizeInBits(B->getType()))
2435  B = SE.getSignExtendExpr(B, A->getType());
2436  else
2437  A = SE.getSignExtendExpr(A, B->getType());
2438  }
2439  if (const SCEVConstant *D =
2440  dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2441  const ConstantInt *C = D->getValue();
2442  // Stride of one or negative one can have reuse with non-addresses.
2443  if (C->isOne() || C->isMinusOne())
2444  goto decline_post_inc;
2445  // Avoid weird situations.
2446  if (C->getValue().getMinSignedBits() >= 64 ||
2447  C->getValue().isMinSignedValue())
2448  goto decline_post_inc;
2449  // Check for possible scaled-address reuse.
2450  if (isAddressUse(TTI, UI->getUser(), UI->getOperandValToReplace())) {
2451  MemAccessTy AccessTy = getAccessType(
2452  TTI, UI->getUser(), UI->getOperandValToReplace());
2453  int64_t Scale = C->getSExtValue();
2454  if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2455  /*BaseOffset=*/0,
2456  /*HasBaseReg=*/false, Scale,
2457  AccessTy.AddrSpace))
2458  goto decline_post_inc;
2459  Scale = -Scale;
2460  if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2461  /*BaseOffset=*/0,
2462  /*HasBaseReg=*/false, Scale,
2463  AccessTy.AddrSpace))
2464  goto decline_post_inc;
2465  }
2466  }
2467  }
2468 
2469  LLVM_DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2470  << *Cond << '\n');
2471 
2472  // It's possible for the setcc instruction to be anywhere in the loop, and
2473  // possible for it to have multiple users. If it is not immediately before
2474  // the exiting block branch, move it.
2475  if (&*++BasicBlock::iterator(Cond) != TermBr) {
2476  if (Cond->hasOneUse()) {
2477  Cond->moveBefore(TermBr);
2478  } else {
2479  // Clone the terminating condition and insert into the loopend.
2480  ICmpInst *OldCond = Cond;
2481  Cond = cast<ICmpInst>(Cond->clone());
2482  Cond->setName(L->getHeader()->getName() + ".termcond");
2483  ExitingBlock->getInstList().insert(TermBr->getIterator(), Cond);
2484 
2485  // Clone the IVUse, as the old use still exists!
2486  CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2487  TermBr->replaceUsesOfWith(OldCond, Cond);
2488  }
2489  }
2490 
2491  // If we get to here, we know that we can transform the setcc instruction to
2492  // use the post-incremented version of the IV, allowing us to coalesce the
2493  // live ranges for the IV correctly.
2494  CondUse->transformToPostInc(L);
2495  Changed = true;
2496 
2497  PostIncs.insert(Cond);
2498  decline_post_inc:;
2499  }
2500 
2501  // Determine an insertion point for the loop induction variable increment. It
2502  // must dominate all the post-inc comparisons we just set up, and it must
2503  // dominate the loop latch edge.
2504  IVIncInsertPos = L->getLoopLatch()->getTerminator();
2505  for (Instruction *Inst : PostIncs) {
2506  BasicBlock *BB =
2507  DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2508  Inst->getParent());
2509  if (BB == Inst->getParent())
2510  IVIncInsertPos = Inst;
2511  else if (BB != IVIncInsertPos->getParent())
2512  IVIncInsertPos = BB->getTerminator();
2513  }
2514 }
2515 
2516 /// Determine if the given use can accommodate a fixup at the given offset and
2517 /// other details. If so, update the use and return true.
2518 bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset,
2519  bool HasBaseReg, LSRUse::KindType Kind,
2520  MemAccessTy AccessTy) {
2521  int64_t NewMinOffset = LU.MinOffset;
2522  int64_t NewMaxOffset = LU.MaxOffset;
2523  MemAccessTy NewAccessTy = AccessTy;
2524 
2525  // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2526  // something conservative, however this can pessimize in the case that one of
2527  // the uses will have all its uses outside the loop, for example.
2528  if (LU.Kind != Kind)
2529  return false;
2530 
2531  // Check for a mismatched access type, and fall back conservatively as needed.
2532  // TODO: Be less conservative when the type is similar and can use the same
2533  // addressing modes.
2534  if (Kind == LSRUse::Address) {
2535  if (AccessTy.MemTy != LU.AccessTy.MemTy) {
2536  NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext(),
2537  AccessTy.AddrSpace);
2538  }
2539  }
2540 
2541  // Conservatively assume HasBaseReg is true for now.
2542  if (NewOffset < LU.MinOffset) {
2543  if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2544  LU.MaxOffset - NewOffset, HasBaseReg))
2545  return false;
2546  NewMinOffset = NewOffset;
2547  } else if (NewOffset > LU.MaxOffset) {
2548  if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2549  NewOffset - LU.MinOffset, HasBaseReg))
2550  return false;
2551  NewMaxOffset = NewOffset;
2552  }
2553 
2554  // Update the use.
2555  LU.MinOffset = NewMinOffset;
2556  LU.MaxOffset = NewMaxOffset;
2557  LU.AccessTy = NewAccessTy;
2558  return true;
2559 }
2560 
2561 /// Return an LSRUse index and an offset value for a fixup which needs the given
2562 /// expression, with the given kind and optional access type. Either reuse an
2563 /// existing use or create a new one, as needed.
2564 std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr,
2565  LSRUse::KindType Kind,
2566  MemAccessTy AccessTy) {
2567  const SCEV *Copy = Expr;
2568  int64_t Offset = ExtractImmediate(Expr, SE);
2569 
2570  // Basic uses can't accept any offset, for example.
2571  if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr,
2572  Offset, /*HasBaseReg=*/ true)) {
2573  Expr = Copy;
2574  Offset = 0;
2575  }
2576 
2577  std::pair<UseMapTy::iterator, bool> P =
2578  UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0));
2579  if (!P.second) {
2580  // A use already existed with this base.
2581  size_t LUIdx = P.first->second;
2582  LSRUse &LU = Uses[LUIdx];
2583  if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2584  // Reuse this use.
2585  return std::make_pair(LUIdx, Offset);
2586  }
2587 
2588  // Create a new use.
2589  size_t LUIdx = Uses.size();
2590  P.first->second = LUIdx;
2591  Uses.push_back(LSRUse(Kind, AccessTy));
2592  LSRUse &LU = Uses[LUIdx];
2593 
2594  LU.MinOffset = Offset;
2595  LU.MaxOffset = Offset;
2596  return std::make_pair(LUIdx, Offset);
2597 }
2598 
2599 /// Delete the given use from the Uses list.
2600 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2601  if (&LU != &Uses.back())
2602  std::swap(LU, Uses.back());
2603  Uses.pop_back();
2604 
2605  // Update RegUses.
2606  RegUses.swapAndDropUse(LUIdx, Uses.size());
2607 }
2608 
2609 /// Look for a use distinct from OrigLU which is has a formula that has the same
2610 /// registers as the given formula.
2611 LSRUse *
2612 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2613  const LSRUse &OrigLU) {
2614  // Search all uses for the formula. This could be more clever.
2615  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2616  LSRUse &LU = Uses[LUIdx];
2617  // Check whether this use is close enough to OrigLU, to see whether it's
2618  // worthwhile looking through its formulae.
2619  // Ignore ICmpZero uses because they may contain formulae generated by
2620  // GenerateICmpZeroScales, in which case adding fixup offsets may
2621  // be invalid.
2622  if (&LU != &OrigLU &&
2623  LU.Kind != LSRUse::ICmpZero &&
2624  LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2625  LU.WidestFixupType == OrigLU.WidestFixupType &&
2626  LU.HasFormulaWithSameRegs(OrigF)) {
2627  // Scan through this use's formulae.
2628  for (const Formula &F : LU.Formulae) {
2629  // Check to see if this formula has the same registers and symbols
2630  // as OrigF.
2631  if (F.BaseRegs == OrigF.BaseRegs &&
2632  F.ScaledReg == OrigF.ScaledReg &&
2633  F.BaseGV == OrigF.BaseGV &&
2634  F.Scale == OrigF.Scale &&
2635  F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2636  if (F.BaseOffset == 0)
2637  return &LU;
2638  // This is the formula where all the registers and symbols matched;
2639  // there aren't going to be any others. Since we declined it, we
2640  // can skip the rest of the formulae and proceed to the next LSRUse.
2641  break;
2642  }
2643  }
2644  }
2645  }
2646 
2647  // Nothing looked good.
2648  return nullptr;
2649 }
2650 
2651 void LSRInstance::CollectInterestingTypesAndFactors() {
2653 
2654  // Collect interesting types and strides.
2656  for (const IVStrideUse &U : IU) {
2657  const SCEV *Expr = IU.getExpr(U);
2658 
2659  // Collect interesting types.
2660  Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2661 
2662  // Add strides for mentioned loops.
2663  Worklist.push_back(Expr);
2664  do {
2665  const SCEV *S = Worklist.pop_back_val();
2666  if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2667  if (AR->getLoop() == L)
2668  Strides.insert(AR->getStepRecurrence(SE));
2669  Worklist.push_back(AR->getStart());
2670  } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2671  Worklist.append(Add->op_begin(), Add->op_end());
2672  }
2673  } while (!Worklist.empty());
2674  }
2675 
2676  // Compute interesting factors from the set of interesting strides.
2678  I = Strides.begin(), E = Strides.end(); I != E; ++I)
2680  std::next(I); NewStrideIter != E; ++NewStrideIter) {
2681  const SCEV *OldStride = *I;
2682  const SCEV *NewStride = *NewStrideIter;
2683 
2684  if (SE.getTypeSizeInBits(OldStride->getType()) !=
2685  SE.getTypeSizeInBits(NewStride->getType())) {
2686  if (SE.getTypeSizeInBits(OldStride->getType()) >
2687  SE.getTypeSizeInBits(NewStride->getType()))
2688  NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2689  else
2690  OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2691  }
2692  if (const SCEVConstant *Factor =
2693  dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2694  SE, true))) {
2695  if (Factor->getAPInt().getMinSignedBits() <= 64)
2696  Factors.insert(Factor->getAPInt().getSExtValue());
2697  } else if (const SCEVConstant *Factor =
2698  dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2699  NewStride,
2700  SE, true))) {
2701  if (Factor->getAPInt().getMinSignedBits() <= 64)
2702  Factors.insert(Factor->getAPInt().getSExtValue());
2703  }
2704  }
2705 
2706  // If all uses use the same type, don't bother looking for truncation-based
2707  // reuse.
2708  if (Types.size() == 1)
2709  Types.clear();
2710 
2711  LLVM_DEBUG(print_factors_and_types(dbgs()));
2712 }
2713 
2714 /// Helper for CollectChains that finds an IV operand (computed by an AddRec in
2715 /// this loop) within [OI,OE) or returns OE. If IVUsers mapped Instructions to
2716 /// IVStrideUses, we could partially skip this.
2717 static User::op_iterator
2719  Loop *L, ScalarEvolution &SE) {
2720  for(; OI != OE; ++OI) {
2721  if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2722  if (!SE.isSCEVable(Oper->getType()))
2723  continue;
2724 
2725  if (const SCEVAddRecExpr *AR =
2726  dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2727  if (AR->getLoop() == L)
2728  break;
2729  }
2730  }
2731  }
2732  return OI;
2733 }
2734 
2735 /// IVChain logic must consistently peek base TruncInst operands, so wrap it in
2736 /// a convenient helper.
2737 static Value *getWideOperand(Value *Oper) {
2738  if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2739  return Trunc->getOperand(0);
2740  return Oper;
2741 }
2742 
2743 /// Return true if we allow an IV chain to include both types.
2744 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2745  Type *LType = LVal->getType();
2746  Type *RType = RVal->getType();
2747  return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy() &&
2748  // Different address spaces means (possibly)
2749  // different types of the pointer implementation,
2750  // e.g. i16 vs i32 so disallow that.
2751  (LType->getPointerAddressSpace() ==
2752  RType->getPointerAddressSpace()));
2753 }
2754 
2755 /// Return an approximation of this SCEV expression's "base", or NULL for any
2756 /// constant. Returning the expression itself is conservative. Returning a
2757 /// deeper subexpression is more precise and valid as long as it isn't less
2758 /// complex than another subexpression. For expressions involving multiple
2759 /// unscaled values, we need to return the pointer-type SCEVUnknown. This avoids
2760 /// forming chains across objects, such as: PrevOper==a[i], IVOper==b[i],
2761 /// IVInc==b-a.
2762 ///
2763 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2764 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2765 static const SCEV *getExprBase(const SCEV *S) {
2766  switch (S->getSCEVType()) {
2767  default: // uncluding scUnknown.
2768  return S;
2769  case scConstant:
2770  return nullptr;
2771  case scTruncate:
2772  return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2773  case scZeroExtend:
2774  return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2775  case scSignExtend:
2776  return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2777  case scAddExpr: {
2778  // Skip over scaled operands (scMulExpr) to follow add operands as long as
2779  // there's nothing more complex.
2780  // FIXME: not sure if we want to recognize negation.
2781  const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2782  for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2783  E(Add->op_begin()); I != E; ++I) {
2784  const SCEV *SubExpr = *I;
2785  if (SubExpr->getSCEVType() == scAddExpr)
2786  return getExprBase(SubExpr);
2787 
2788  if (SubExpr->getSCEVType() != scMulExpr)
2789  return SubExpr;
2790  }
2791  return S; // all operands are scaled, be conservative.
2792  }
2793  case scAddRecExpr:
2794  return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2795  }
2796 }
2797 
2798 /// Return true if the chain increment is profitable to expand into a loop
2799 /// invariant value, which may require its own register. A profitable chain
2800 /// increment will be an offset relative to the same base. We allow such offsets
2801 /// to potentially be used as chain increment as long as it's not obviously
2802 /// expensive to expand using real instructions.
2803 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2804  const SCEV *IncExpr,
2805  ScalarEvolution &SE) {
2806  // Aggressively form chains when -stress-ivchain.
2807  if (StressIVChain)
2808  return true;
2809 
2810  // Do not replace a constant offset from IV head with a nonconstant IV
2811  // increment.
2812  if (!isa<SCEVConstant>(IncExpr)) {
2813  const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2814  if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2815  return false;
2816  }
2817 
2818  SmallPtrSet<const SCEV*, 8> Processed;
2819  return !isHighCostExpansion(IncExpr, Processed, SE);
2820 }
2821 
2822 /// Return true if the number of registers needed for the chain is estimated to
2823 /// be less than the number required for the individual IV users. First prohibit
2824 /// any IV users that keep the IV live across increments (the Users set should
2825 /// be empty). Next count the number and type of increments in the chain.
2826 ///
2827 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2828 /// effectively use postinc addressing modes. Only consider it profitable it the
2829 /// increments can be computed in fewer registers when chained.
2830 ///
2831 /// TODO: Consider IVInc free if it's already used in another chains.
2832 static bool
2834  ScalarEvolution &SE) {
2835  if (StressIVChain)
2836  return true;
2837 
2838  if (!Chain.hasIncs())
2839  return false;
2840 
2841  if (!Users.empty()) {
2842  LLVM_DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2843  for (Instruction *Inst
2844  : Users) { dbgs() << " " << *Inst << "\n"; });
2845  return false;
2846  }
2847  assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2848 
2849  // The chain itself may require a register, so intialize cost to 1.
2850  int cost = 1;
2851 
2852  // A complete chain likely eliminates the need for keeping the original IV in
2853  // a register. LSR does not currently know how to form a complete chain unless
2854  // the header phi already exists.
2855  if (isa<PHINode>(Chain.tailUserInst())
2856  && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2857  --cost;
2858  }
2859  const SCEV *LastIncExpr = nullptr;
2860  unsigned NumConstIncrements = 0;
2861  unsigned NumVarIncrements = 0;
2862  unsigned NumReusedIncrements = 0;
2863  for (const IVInc &Inc : Chain) {
2864  if (Inc.IncExpr->isZero())
2865  continue;
2866 
2867  // Incrementing by zero or some constant is neutral. We assume constants can
2868  // be folded into an addressing mode or an add's immediate operand.
2869  if (isa<SCEVConstant>(Inc.IncExpr)) {
2870  ++NumConstIncrements;
2871  continue;
2872  }
2873 
2874  if (Inc.IncExpr == LastIncExpr)
2875  ++NumReusedIncrements;
2876  else
2877  ++NumVarIncrements;
2878 
2879  LastIncExpr = Inc.IncExpr;
2880  }
2881  // An IV chain with a single increment is handled by LSR's postinc
2882  // uses. However, a chain with multiple increments requires keeping the IV's
2883  // value live longer than it needs to be if chained.
2884  if (NumConstIncrements > 1)
2885  --cost;
2886 
2887  // Materializing increment expressions in the preheader that didn't exist in
2888  // the original code may cost a register. For example, sign-extended array
2889  // indices can produce ridiculous increments like this:
2890  // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2891  cost += NumVarIncrements;
2892 
2893  // Reusing variable increments likely saves a register to hold the multiple of
2894  // the stride.
2895  cost -= NumReusedIncrements;
2896 
2897  LLVM_DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2898  << "\n");
2899 
2900  return cost < 0;
2901 }
2902 
2903 /// Add this IV user to an existing chain or make it the head of a new chain.
2904 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2905  SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2906  // When IVs are used as types of varying widths, they are generally converted
2907  // to a wider type with some uses remaining narrow under a (free) trunc.
2908  Value *const NextIV = getWideOperand(IVOper);
2909  const SCEV *const OperExpr = SE.getSCEV(NextIV);
2910  const SCEV *const OperExprBase = getExprBase(OperExpr);
2911 
2912  // Visit all existing chains. Check if its IVOper can be computed as a
2913  // profitable loop invariant increment from the last link in the Chain.
2914  unsigned ChainIdx = 0, NChains = IVChainVec.size();
2915  const SCEV *LastIncExpr = nullptr;
2916  for (; ChainIdx < NChains; ++ChainIdx) {
2917  IVChain &Chain = IVChainVec[ChainIdx];
2918 
2919  // Prune the solution space aggressively by checking that both IV operands
2920  // are expressions that operate on the same unscaled SCEVUnknown. This
2921  // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2922  // first avoids creating extra SCEV expressions.
2923  if (!StressIVChain && Chain.ExprBase != OperExprBase)
2924  continue;
2925 
2926  Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2927  if (!isCompatibleIVType(PrevIV, NextIV))
2928  continue;
2929 
2930  // A phi node terminates a chain.
2931  if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2932  continue;
2933 
2934  // The increment must be loop-invariant so it can be kept in a register.
2935  const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2936  const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2937  if (!SE.isLoopInvariant(IncExpr, L))
2938  continue;
2939 
2940  if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2941  LastIncExpr = IncExpr;
2942  break;
2943  }
2944  }
2945  // If we haven't found a chain, create a new one, unless we hit the max. Don't
2946  // bother for phi nodes, because they must be last in the chain.
2947  if (ChainIdx == NChains) {
2948  if (isa<PHINode>(UserInst))
2949  return;
2950  if (NChains >= MaxChains && !StressIVChain) {
2951  LLVM_DEBUG(dbgs() << "IV Chain Limit\n");
2952  return;
2953  }
2954  LastIncExpr = OperExpr;
2955  // IVUsers may have skipped over sign/zero extensions. We don't currently
2956  // attempt to form chains involving extensions unless they can be hoisted
2957  // into this loop's AddRec.
2958  if (!isa<SCEVAddRecExpr>(LastIncExpr))
2959  return;
2960  ++NChains;
2961  IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2962  OperExprBase));
2963  ChainUsersVec.resize(NChains);
2964  LLVM_DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2965  << ") IV=" << *LastIncExpr << "\n");
2966  } else {
2967  LLVM_DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2968  << ") IV+" << *LastIncExpr << "\n");
2969  // Add this IV user to the end of the chain.
2970  IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2971  }
2972  IVChain &Chain = IVChainVec[ChainIdx];
2973 
2974  SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2975  // This chain's NearUsers become FarUsers.
2976  if (!LastIncExpr->isZero()) {
2977  ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2978  NearUsers.end());
2979  NearUsers.clear();
2980  }
2981 
2982  // All other uses of IVOperand become near uses of the chain.
2983  // We currently ignore intermediate values within SCEV expressions, assuming
2984  // they will eventually be used be the current chain, or can be computed
2985  // from one of the chain increments. To be more precise we could
2986  // transitively follow its user and only add leaf IV users to the set.
2987  for (User *U : IVOper->users()) {
2988  Instruction *OtherUse = dyn_cast<Instruction>(U);
2989  if (!OtherUse)
2990  continue;
2991  // Uses in the chain will no longer be uses if the chain is formed.
2992  // Include the head of the chain in this iteration (not Chain.begin()).
2993  IVChain::const_iterator IncIter = Chain.Incs.begin();
2994  IVChain::const_iterator IncEnd = Chain.Incs.end();
2995  for( ; IncIter != IncEnd; ++IncIter) {
2996  if (IncIter->UserInst == OtherUse)
2997  break;
2998  }
2999  if (IncIter != IncEnd)
3000  continue;
3001 
3002  if (SE.isSCEVable(OtherUse->getType())
3003  && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
3004  && IU.isIVUserOrOperand(OtherUse)) {
3005  continue;
3006  }
3007  NearUsers.insert(OtherUse);
3008  }
3009 
3010  // Since this user is part of the chain, it's no longer considered a use
3011  // of the chain.
3012  ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
3013 }
3014 
3015 /// Populate the vector of Chains.
3016 ///
3017 /// This decreases ILP at the architecture level. Targets with ample registers,
3018 /// multiple memory ports, and no register renaming probably don't want
3019 /// this. However, such targets should probably disable LSR altogether.
3020 ///
3021 /// The job of LSR is to make a reasonable choice of induction variables across
3022 /// the loop. Subsequent passes can easily "unchain" computation exposing more
3023 /// ILP *within the loop* if the target wants it.
3024 ///
3025 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
3026 /// will not reorder memory operations, it will recognize this as a chain, but
3027 /// will generate redundant IV increments. Ideally this would be corrected later
3028 /// by a smart scheduler:
3029 /// = A[i]
3030 /// = A[i+x]
3031 /// A[i] =
3032 /// A[i+x] =
3033 ///
3034 /// TODO: Walk the entire domtree within this loop, not just the path to the
3035 /// loop latch. This will discover chains on side paths, but requires
3036 /// maintaining multiple copies of the Chains state.
3037 void LSRInstance::CollectChains() {
3038  LLVM_DEBUG(dbgs() << "Collecting IV Chains.\n");
3039  SmallVector<ChainUsers, 8> ChainUsersVec;
3040 
3041  SmallVector<BasicBlock *,8> LatchPath;
3042  BasicBlock *LoopHeader = L->getHeader();
3043  for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
3044  Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
3045  LatchPath.push_back(Rung->getBlock());
3046  }
3047  LatchPath.push_back(LoopHeader);
3048 
3049  // Walk the instruction stream from the loop header to the loop latch.
3050  for (BasicBlock *BB : reverse(LatchPath)) {
3051  for (Instruction &I : *BB) {
3052  // Skip instructions that weren't seen by IVUsers analysis.
3053  if (isa<PHINode>(I) || !IU.isIVUserOrOperand(&I))
3054  continue;
3055 
3056  // Ignore users that are part of a SCEV expression. This way we only
3057  // consider leaf IV Users. This effectively rediscovers a portion of
3058  // IVUsers analysis but in program order this time.
3059  if (SE.isSCEVable(I.getType()) && !isa<SCEVUnknown>(SE.getSCEV(&I)))
3060  continue;
3061 
3062  // Remove this instruction from any NearUsers set it may be in.
3063  for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
3064  ChainIdx < NChains; ++ChainIdx) {
3065  ChainUsersVec[ChainIdx].NearUsers.erase(&I);
3066  }
3067  // Search for operands that can be chained.
3068  SmallPtrSet<Instruction*, 4> UniqueOperands;
3069  User::op_iterator IVOpEnd = I.op_end();
3070  User::op_iterator IVOpIter = findIVOperand(I.op_begin(), IVOpEnd, L, SE);
3071  while (IVOpIter != IVOpEnd) {
3072  Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
3073  if (UniqueOperands.insert(IVOpInst).second)
3074  ChainInstruction(&I, IVOpInst, ChainUsersVec);
3075  IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
3076  }
3077  } // Continue walking down the instructions.
3078  } // Continue walking down the domtree.
3079  // Visit phi backedges to determine if the chain can generate the IV postinc.
3080  for (PHINode &PN : L->getHeader()->phis()) {
3081  if (!SE.isSCEVable(PN.getType()))
3082  continue;
3083 
3084  Instruction *IncV =
3085  dyn_cast<Instruction>(PN.getIncomingValueForBlock(L->getLoopLatch()));
3086  if (IncV)
3087  ChainInstruction(&PN, IncV, ChainUsersVec);
3088  }
3089  // Remove any unprofitable chains.
3090  unsigned ChainIdx = 0;
3091  for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
3092  UsersIdx < NChains; ++UsersIdx) {
3093  if (!isProfitableChain(IVChainVec[UsersIdx],
3094  ChainUsersVec[UsersIdx].FarUsers, SE))
3095  continue;
3096  // Preserve the chain at UsesIdx.
3097  if (ChainIdx != UsersIdx)
3098  IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
3099  FinalizeChain(IVChainVec[ChainIdx]);
3100  ++ChainIdx;
3101  }
3102  IVChainVec.resize(ChainIdx);
3103 }
3104 
3105 void LSRInstance::FinalizeChain(IVChain &Chain) {
3106  assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
3107  LLVM_DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
3108 
3109  for (const IVInc &Inc : Chain) {
3110  LLVM_DEBUG(dbgs() << " Inc: " << *Inc.UserInst << "\n");
3111  auto UseI = find(Inc.UserInst->operands(), Inc.IVOperand);
3112  assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand");
3113  IVIncSet.insert(UseI);
3114  }
3115 }
3116 
3117 /// Return true if the IVInc can be folded into an addressing mode.
3118 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
3119  Value *Operand, const TargetTransformInfo &TTI) {
3120  const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
3121  if (!IncConst || !isAddressUse(TTI, UserInst, Operand))
3122  return false;
3123 
3124  if (IncConst->getAPInt().getMinSignedBits() > 64)
3125  return false;
3126 
3127  MemAccessTy AccessTy = getAccessType(TTI, UserInst, Operand);
3128  int64_t IncOffset = IncConst->getValue()->getSExtValue();
3129  if (!isAlwaysFoldable(TTI, LSRUse::Address, AccessTy, /*BaseGV=*/nullptr,
3130  IncOffset, /*HasBaseReg=*/false))
3131  return false;
3132 
3133  return true;
3134 }
3135 
3136 /// Generate an add or subtract for each IVInc in a chain to materialize the IV
3137 /// user's operand from the previous IV user's operand.
3138 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
3139  SmallVectorImpl<WeakTrackingVH> &DeadInsts) {
3140  // Find the new IVOperand for the head of the chain. It may have been replaced
3141  // by LSR.
3142  const IVInc &Head = Chain.Incs[0];
3143  User::op_iterator IVOpEnd = Head.UserInst->op_end();
3144  // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
3145  User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
3146  IVOpEnd, L, SE);
3147  Value *IVSrc = nullptr;
3148  while (IVOpIter != IVOpEnd) {
3149  IVSrc = getWideOperand(*IVOpIter);
3150 
3151  // If this operand computes the expression that the chain needs, we may use
3152  // it. (Check this after setting IVSrc which is used below.)
3153  //
3154  // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
3155  // narrow for the chain, so we can no longer use it. We do allow using a
3156  // wider phi, assuming the LSR checked for free truncation. In that case we
3157  // should already have a truncate on this operand such that
3158  // getSCEV(IVSrc) == IncExpr.
3159  if (SE.getSCEV(*IVOpIter) == Head.IncExpr
3160  || SE.getSCEV(IVSrc) == Head.IncExpr) {
3161  break;
3162  }
3163  IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
3164  }
3165  if (IVOpIter == IVOpEnd) {
3166  // Gracefully give up on this chain.
3167  LLVM_DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
3168  return;
3169  }
3170  assert(IVSrc && "Failed to find IV chain source");
3171 
3172  LLVM_DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
3173  Type *IVTy = IVSrc->getType();
3174  Type *IntTy = SE.getEffectiveSCEVType(IVTy);
3175  const SCEV *LeftOverExpr = nullptr;
3176  for (const IVInc &Inc : Chain) {
3177  Instruction *InsertPt = Inc.UserInst;
3178  if (isa<PHINode>(InsertPt))
3179  InsertPt = L->getLoopLatch()->getTerminator();
3180 
3181  // IVOper will replace the current IV User's operand. IVSrc is the IV
3182  // value currently held in a register.
3183  Value *IVOper = IVSrc;
3184  if (!Inc.IncExpr->isZero()) {
3185  // IncExpr was the result of subtraction of two narrow values, so must
3186  // be signed.
3187  const SCEV *IncExpr = SE.getNoopOrSignExtend(Inc.IncExpr, IntTy);
3188  LeftOverExpr = LeftOverExpr ?
3189  SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
3190  }
3191  if (LeftOverExpr && !LeftOverExpr->isZero()) {
3192  // Expand the IV increment.
3193  Rewriter.clearPostInc();
3194  Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
3195  const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
3196  SE.getUnknown(IncV));
3197  IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
3198 
3199  // If an IV increment can't be folded, use it as the next IV value.
3200  if (!canFoldIVIncExpr(LeftOverExpr, Inc.UserInst, Inc.IVOperand, TTI)) {
3201  assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
3202  IVSrc = IVOper;
3203  LeftOverExpr = nullptr;
3204  }
3205  }
3206  Type *OperTy = Inc.IVOperand->getType();
3207  if (IVTy != OperTy) {
3208  assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
3209  "cannot extend a chained IV");
3210  IRBuilder<> Builder(InsertPt);
3211  IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
3212  }
3213  Inc.UserInst->replaceUsesOfWith(Inc.IVOperand, IVOper);
3214  DeadInsts.emplace_back(Inc.IVOperand);
3215  }
3216  // If LSR created a new, wider phi, we may also replace its postinc. We only
3217  // do this if we also found a wide value for the head of the chain.
3218  if (isa<PHINode>(Chain.tailUserInst())) {
3219  for (PHINode &Phi : L->getHeader()->phis()) {
3220  if (!isCompatibleIVType(&Phi, IVSrc))
3221  continue;
3222  Instruction *PostIncV = dyn_cast<Instruction>(
3223  Phi.getIncomingValueForBlock(L->getLoopLatch()));
3224  if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
3225  continue;
3226  Value *IVOper = IVSrc;
3227  Type *PostIncTy = PostIncV->getType();
3228  if (IVTy != PostIncTy) {
3229  assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
3230  IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
3231  Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
3232  IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
3233  }
3234  Phi.replaceUsesOfWith(PostIncV, IVOper);
3235  DeadInsts.emplace_back(PostIncV);
3236  }
3237  }
3238 }
3239 
3240 void LSRInstance::CollectFixupsAndInitialFormulae() {
3241  BranchInst *ExitBranch = nullptr;
3242  bool SaveCmp = TTI.canSaveCmp(L, &ExitBranch, &SE, &LI, &DT, &AC, &LibInfo);
3243 
3244  for (const IVStrideUse &U : IU) {
3245  Instruction *UserInst = U.getUser();
3246  // Skip IV users that are part of profitable IV Chains.
3247  User::op_iterator UseI =
3248  find(UserInst->operands(), U.getOperandValToReplace());
3249  assert(UseI != UserInst->op_end() && "cannot find IV operand");
3250  if (IVIncSet.count(UseI)) {
3251  LLVM_DEBUG(dbgs() << "Use is in profitable chain: " << **UseI << '\n');
3252  continue;
3253  }
3254 
3255  LSRUse::KindType Kind = LSRUse::Basic;
3256  MemAccessTy AccessTy;
3257  if (isAddressUse(TTI, UserInst, U.getOperandValToReplace())) {
3258  Kind = LSRUse::Address;
3259  AccessTy = getAccessType(TTI, UserInst, U.getOperandValToReplace());
3260  }
3261 
3262  const SCEV *S = IU.getExpr(U);
3263  PostIncLoopSet TmpPostIncLoops = U.getPostIncLoops();
3264 
3265  // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
3266  // (N - i == 0), and this allows (N - i) to be the expression that we work
3267  // with rather than just N or i, so we can consider the register
3268  // requirements for both N and i at the same time. Limiting this code to
3269  // equality icmps is not a problem because all interesting loops use
3270  // equality icmps, thanks to IndVarSimplify.
3271  if (ICmpInst *CI = dyn_cast<ICmpInst>(UserInst)) {
3272  // If CI can be saved in some target, like replaced inside hardware loop
3273  // in PowerPC, no need to generate initial formulae for it.
3274  if (SaveCmp && CI == dyn_cast<ICmpInst>(ExitBranch->getCondition()))
3275  continue;
3276  if (CI->isEquality()) {
3277  // Swap the operands if needed to put the OperandValToReplace on the
3278  // left, for consistency.
3279  Value *NV = CI->getOperand(1);
3280  if (NV == U.getOperandValToReplace()) {
3281  CI->setOperand(1, CI->getOperand(0));
3282  CI->setOperand(0, NV);
3283  NV = CI->getOperand(1);
3284  Changed = true;
3285  }
3286 
3287  // x == y --> x - y == 0
3288  const SCEV *N = SE.getSCEV(NV);
3289  if (SE.isLoopInvariant(N, L) && isSafeToExpand(N, SE)) {
3290  // S is normalized, so normalize N before folding it into S
3291  // to keep the result normalized.
3292  N = normalizeForPostIncUse(N, TmpPostIncLoops, SE);
3293  Kind = LSRUse::ICmpZero;
3294  S = SE.getMinusSCEV(N, S);
3295  }
3296 
3297  // -1 and the negations of all interesting strides (except the negation
3298  // of -1) are now also interesting.
3299  for (size_t i = 0, e = Factors.size(); i != e; ++i)
3300  if (Factors[i] != -1)
3301  Factors.insert(-(uint64_t)Factors[i]);
3302  Factors.insert(-1);
3303  }
3304  }
3305 
3306  // Get or create an LSRUse.
3307  std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3308  size_t LUIdx = P.first;
3309  int64_t Offset = P.second;
3310  LSRUse &LU = Uses[LUIdx];
3311 
3312  // Record the fixup.
3313  LSRFixup &LF = LU.getNewFixup();
3314  LF.UserInst = UserInst;
3315  LF.OperandValToReplace = U.getOperandValToReplace();
3316  LF.PostIncLoops = TmpPostIncLoops;
3317  LF.Offset = Offset;
3318  LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3319 
3320  if (!LU.WidestFixupType ||
3321  SE.getTypeSizeInBits(LU.WidestFixupType) <
3322  SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3323  LU.WidestFixupType = LF.OperandValToReplace->getType();
3324 
3325  // If this is the first use of this LSRUse, give it a formula.
3326  if (LU.Formulae.empty()) {
3327  InsertInitialFormula(S, LU, LUIdx);
3328  CountRegisters(LU.Formulae.back(), LUIdx);
3329  }
3330  }
3331 
3332  LLVM_DEBUG(print_fixups(dbgs()));
3333 }
3334 
3335 /// Insert a formula for the given expression into the given use, separating out
3336 /// loop-variant portions from loop-invariant and loop-computable portions.
3337 void
3338 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
3339  // Mark uses whose expressions cannot be expanded.
3340  if (!isSafeToExpand(S, SE))
3341  LU.RigidFormula = true;
3342 
3343  Formula F;
3344  F.initialMatch(S, L, SE);
3345  bool Inserted = InsertFormula(LU, LUIdx, F);
3346  assert(Inserted && "Initial formula already exists!"); (void)Inserted;
3347 }
3348 
3349 /// Insert a simple single-register formula for the given expression into the
3350 /// given use.
3351 void
3352 LSRInstance::InsertSupplementalFormula(const SCEV *S,
3353  LSRUse &LU, size_t LUIdx) {
3354  Formula F;
3355  F.BaseRegs.push_back(S);
3356  F.HasBaseReg = true;
3357  bool Inserted = InsertFormula(LU, LUIdx, F);
3358  assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
3359 }
3360 
3361 /// Note which registers are used by the given formula, updating RegUses.
3362 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3363  if (F.ScaledReg)
3364  RegUses.countRegister(F.ScaledReg, LUIdx);
3365  for (const SCEV *BaseReg : F.BaseRegs)
3366  RegUses.countRegister(BaseReg, LUIdx);
3367 }
3368 
3369 /// If the given formula has not yet been inserted, add it to the list, and
3370 /// return true. Return false otherwise.
3371 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3372  // Do not insert formula that we will not be able to expand.
3373  assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F) &&
3374  "Formula is illegal");
3375 
3376  if (!LU.InsertFormula(F, *L))
3377  return false;
3378 
3379  CountRegisters(F, LUIdx);
3380  return true;
3381 }
3382 
3383 /// Check for other uses of loop-invariant values which we're tracking. These
3384 /// other uses will pin these values in registers, making them less profitable
3385 /// for elimination.
3386 /// TODO: This currently misses non-constant addrec step registers.
3387 /// TODO: Should this give more weight to users inside the loop?
3388 void
3389 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3390  SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3392 
3393  while (!Worklist.empty()) {
3394  const SCEV *S = Worklist.pop_back_val();
3395 
3396  // Don't process the same SCEV twice
3397  if (!Visited.insert(S).second)
3398  continue;
3399 
3400  if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3401  Worklist.append(N->op_begin(), N->op_end());
3402  else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
3403  Worklist.push_back(C->getOperand());
3404  else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3405  Worklist.push_back(D->getLHS());
3406  Worklist.push_back(D->getRHS());
3407  } else if (const SCEVUnknown *US = dyn_cast<SCEVUnknown>(S)) {
3408  const Value *V = US->getValue();
3409  if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3410  // Look for instructions defined outside the loop.
3411  if (L->contains(Inst)) continue;
3412  } else if (isa<UndefValue>(V))
3413  // Undef doesn't have a live range, so it doesn't matter.
3414  continue;
3415  for (const Use &U : V->uses()) {
3416  const Instruction *UserInst = dyn_cast<Instruction>(U.getUser());
3417  // Ignore non-instructions.
3418  if (!UserInst)
3419  continue;
3420  // Ignore instructions in other functions (as can happen with
3421  // Constants).
3422  if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3423  continue;
3424  // Ignore instructions not dominated by the loop.
3425  const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3426  UserInst->getParent() :
3427  cast<PHINode>(UserInst)->getIncomingBlock(
3428  PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3429  if (!DT.dominates(L->getHeader(), UseBB))
3430  continue;
3431  // Don't bother if the instruction is in a BB which ends in an EHPad.
3432  if (UseBB->getTerminator()->isEHPad())
3433  continue;
3434  // Don't bother rewriting PHIs in catchswitch blocks.
3435  if (isa<CatchSwitchInst>(UserInst->getParent()->getTerminator()))
3436  continue;
3437  // Ignore uses which are part of other SCEV expressions, to avoid
3438  // analyzing them multiple times.
3439  if (SE.isSCEVable(UserInst->getType())) {
3440  const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3441  // If the user is a no-op, look through to its uses.
3442  if (!isa<SCEVUnknown>(UserS))
3443  continue;
3444  if (UserS == US) {
3445  Worklist.push_back(
3446  SE.getUnknown(const_cast<Instruction *>(UserInst)));
3447  continue;
3448  }
3449  }
3450  // Ignore icmp instructions which are already being analyzed.
3451  if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3452  unsigned OtherIdx = !U.getOperandNo();
3453  Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3454  if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3455  continue;
3456  }
3457 
3458  std::pair<size_t, int64_t> P = getUse(
3459  S, LSRUse::Basic, MemAccessTy());
3460  size_t LUIdx = P.first;
3461  int64_t Offset = P.second;
3462  LSRUse &LU = Uses[LUIdx];
3463  LSRFixup &LF = LU.getNewFixup();
3464  LF.UserInst = const_cast<Instruction *>(UserInst);
3465  LF.OperandValToReplace = U;
3466  LF.Offset = Offset;
3467  LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3468  if (!LU.WidestFixupType ||
3469  SE.getTypeSizeInBits(LU.WidestFixupType) <
3470  SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3471  LU.WidestFixupType = LF.OperandValToReplace->getType();
3472  InsertSupplementalFormula(US, LU, LUIdx);
3473  CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3474  break;
3475  }
3476  }
3477  }
3478 }
3479 
3480 /// Split S into subexpressions which can be pulled out into separate
3481 /// registers. If C is non-null, multiply each subexpression by C.
3482 ///
3483 /// Return remainder expression after factoring the subexpressions captured by
3484 /// Ops. If Ops is complete, return NULL.
3485 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3487  const Loop *L,
3488  ScalarEvolution &SE,
3489  unsigned Depth = 0) {
3490  // Arbitrarily cap recursion to protect compile time.
3491  if (Depth >= 3)
3492  return S;
3493 
3494  if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3495  // Break out add operands.
3496  for (const SCEV *S : Add->operands()) {
3497  const SCEV *Remainder = CollectSubexprs(S, C, Ops, L, SE, Depth+1);
3498  if (Remainder)
3499  Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3500  }
3501  return nullptr;
3502  } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3503  // Split a non-zero base out of an addrec.
3504  if (AR->getStart()->isZero() || !AR->isAffine())
3505  return S;
3506 
3507  const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3508  C, Ops, L, SE, Depth+1);
3509  // Split the non-zero AddRec unless it is part of a nested recurrence that
3510  // does not pertain to this loop.
3511  if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3512  Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3513  Remainder = nullptr;
3514  }
3515  if (Remainder != AR->getStart()) {
3516  if (!Remainder)
3517  Remainder = SE.getConstant(AR->getType(), 0);
3518  return SE.getAddRecExpr(Remainder,
3519  AR->getStepRecurrence(SE),
3520  AR->getLoop(),
3521  //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3523  }
3524  } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3525  // Break (C * (a + b + c)) into C*a + C*b + C*c.
3526  if (Mul->getNumOperands() != 2)
3527  return S;
3528  if (const SCEVConstant *Op0 =
3529  dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3530  C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3531  const SCEV *Remainder =
3532  CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3533  if (Remainder)
3534  Ops.push_back(SE.getMulExpr(C, Remainder));
3535  return nullptr;
3536  }
3537  }
3538  return S;
3539 }
3540 
3541 /// Return true if the SCEV represents a value that may end up as a
3542 /// post-increment operation.
3544  LSRUse &LU, const SCEV *S, const Loop *L,
3545  ScalarEvolution &SE) {
3546  if (LU.Kind != LSRUse::Address ||
3547  !LU.AccessTy.getType()->isIntOrIntVectorTy())
3548  return false;
3549  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S);
3550  if (!AR)
3551  return false;
3552  const SCEV *LoopStep = AR->getStepRecurrence(SE);
3553  if (!isa<SCEVConstant>(LoopStep))
3554  return false;
3555  if (LU.AccessTy.getType()->getScalarSizeInBits() !=
3556  LoopStep->getType()->getScalarSizeInBits())
3557  return false;
3558  // Check if a post-indexed load/store can be used.
3559  if (TTI.isIndexedLoadLegal(TTI.MIM_PostInc, AR->getType()) ||
3560  TTI.isIndexedStoreLegal(TTI.MIM_PostInc, AR->getType())) {
3561  const SCEV *LoopStart = AR->getStart();
3562  if (!isa<SCEVConstant>(LoopStart) && SE.isLoopInvariant(LoopStart, L))
3563  return true;
3564  }
3565  return false;
3566 }
3567 
3568 /// Helper function for LSRInstance::GenerateReassociations.
3569 void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
3570  const Formula &Base,
3571  unsigned Depth, size_t Idx,
3572  bool IsScaledReg) {
3573  const SCEV *BaseReg = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3574  // Don't generate reassociations for the base register of a value that
3575  // may generate a post-increment operator. The reason is that the
3576  // reassociations cause extra base+register formula to be created,
3577  // and possibly chosen, but the post-increment is more efficient.
3578  if (TTI.shouldFavorPostInc() && mayUsePostIncMode(TTI, LU, BaseReg, L, SE))
3579  return;
3581  const SCEV *Remainder = CollectSubexprs(BaseReg, nullptr, AddOps, L, SE);
3582  if (Remainder)
3583  AddOps.push_back(Remainder);
3584 
3585  if (AddOps.size() == 1)
3586  return;
3587 
3589  JE = AddOps.end();
3590  J != JE; ++J) {
3591  // Loop-variant "unknown" values are uninteresting; we won't be able to
3592  // do anything meaningful with them.
3593  if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3594  continue;
3595 
3596  // Don't pull a constant into a register if the constant could be folded
3597  // into an immediate field.
3598  if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3599  LU.AccessTy, *J, Base.getNumRegs() > 1))
3600  continue;
3601 
3602  // Collect all operands except *J.
3603  SmallVector<const SCEV *, 8> InnerAddOps(
3604  ((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3605  InnerAddOps.append(std::next(J),
3606  ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3607 
3608  // Don't leave just a constant behind in a register if the constant could
3609  // be folded into an immediate field.
3610  if (InnerAddOps.size() == 1 &&
3611  isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3612  LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3613  continue;
3614 
3615  const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3616  if (InnerSum->isZero())
3617  continue;
3618  Formula F = Base;
3619 
3620  // Add the remaining pieces of the add back into the new formula.
3621  const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3622  if (InnerSumSC && SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3623  TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3624  InnerSumSC->getValue()->getZExtValue())) {
3625  F.UnfoldedOffset =
3626  (uint64_t)F.UnfoldedOffset + InnerSumSC->getValue()->getZExtValue();
3627  if (IsScaledReg)
3628  F.ScaledReg = nullptr;
3629  else
3630  F.BaseRegs.erase(F.BaseRegs.begin() + Idx);
3631  } else if (IsScaledReg)
3632  F.ScaledReg = InnerSum;
3633  else
3634  F.BaseRegs[Idx] = InnerSum;
3635 
3636  // Add J as its own register, or an unfolded immediate.
3637  const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3638  if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3639  TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3640  SC->getValue()->getZExtValue()))
3641  F.UnfoldedOffset =
3642  (uint64_t)F.UnfoldedOffset + SC->getValue()->getZExtValue();
3643  else
3644  F.BaseRegs.push_back(*J);
3645  // We may have changed the number of register in base regs, adjust the
3646  // formula accordingly.
3647  F.canonicalize(*L);
3648 
3649  if (InsertFormula(LU, LUIdx, F))
3650  // If that formula hadn't been seen before, recurse to find more like
3651  // it.
3652  // Add check on Log16(AddOps.size()) - same as Log2_32(AddOps.size()) >> 2)
3653  // Because just Depth is not enough to bound compile time.
3654  // This means that every time AddOps.size() is greater 16^x we will add
3655  // x to Depth.
3656  GenerateReassociations(LU, LUIdx, LU.Formulae.back(),
3657  Depth + 1 + (Log2_32(AddOps.size()) >> 2));
3658  }
3659 }
3660 
3661 /// Split out subexpressions from adds and the bases of addrecs.
3662 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3663  Formula Base, unsigned Depth) {
3664  assert(Base.isCanonical(*L) && "Input must be in the canonical form");
3665  // Arbitrarily cap recursion to protect compile time.
3666  if (Depth >= 3)
3667  return;
3668 
3669  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3670  GenerateReassociationsImpl(LU, LUIdx, Base, Depth, i);
3671 
3672  if (Base.Scale == 1)
3673  GenerateReassociationsImpl(LU, LUIdx, Base, Depth,
3674  /* Idx */ -1, /* IsScaledReg */ true);
3675 }
3676 
3677 /// Generate a formula consisting of all of the loop-dominating registers added
3678 /// into a single register.
3679 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3680  Formula Base) {
3681  // This method is only interesting on a plurality of registers.
3682  if (Base.BaseRegs.size() + (Base.Scale == 1) +
3683  (Base.UnfoldedOffset != 0) <= 1)
3684  return;
3685 
3686  // Flatten the representation, i.e., reg1 + 1*reg2 => reg1 + reg2, before
3687  // processing the formula.
3688  Base.unscale();
3690  Formula NewBase = Base;
3691  NewBase.BaseRegs.clear();
3692  Type *CombinedIntegerType = nullptr;
3693  for (const SCEV *BaseReg : Base.BaseRegs) {
3694  if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3695  !SE.hasComputableLoopEvolution(BaseReg, L)) {
3696  if (!CombinedIntegerType)
3697  CombinedIntegerType = SE.getEffectiveSCEVType(BaseReg->getType());
3698  Ops.push_back(BaseReg);
3699  }
3700  else
3701  NewBase.BaseRegs.push_back(BaseReg);
3702  }
3703 
3704  // If no register is relevant, we're done.
3705  if (Ops.size() == 0)
3706  return;
3707 
3708  // Utility function for generating the required variants of the combined
3709  // registers.
3710  auto GenerateFormula = [&](const SCEV *Sum) {
3711  Formula F = NewBase;
3712 
3713  // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3714  // opportunity to fold something. For now, just ignore such cases
3715  // rather than proceed with zero in a register.
3716  if (Sum->isZero())
3717  return;
3718 
3719  F.BaseRegs.push_back(Sum);
3720  F.canonicalize(*L);
3721  (void)InsertFormula(LU, LUIdx, F);
3722  };
3723 
3724  // If we collected at least two registers, generate a formula combining them.
3725  if (Ops.size() > 1) {
3726  SmallVector<const SCEV *, 4> OpsCopy(Ops); // Don't let SE modify Ops.
3727  GenerateFormula(SE.getAddExpr(OpsCopy));
3728  }
3729 
3730  // If we have an unfolded offset, generate a formula combining it with the
3731  // registers collected.
3732  if (NewBase.UnfoldedOffset) {
3733  assert(CombinedIntegerType && "Missing a type for the unfolded offset");
3734  Ops.push_back(SE.getConstant(CombinedIntegerType, NewBase.UnfoldedOffset,
3735  true));
3736  NewBase.UnfoldedOffset = 0;
3737  GenerateFormula(SE.getAddExpr(Ops));
3738  }
3739 }
3740 
3741 /// Helper function for LSRInstance::GenerateSymbolicOffsets.
3742 void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
3743  const Formula &Base, size_t Idx,
3744  bool IsScaledReg) {
3745  const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3746  GlobalValue *GV = ExtractSymbol(G, SE);
3747  if (G->isZero() || !GV)
3748  return;
3749  Formula F = Base;
3750  F.BaseGV = GV;
3751  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3752  return;
3753  if (IsScaledReg)
3754  F.ScaledReg = G;
3755  else
3756  F.BaseRegs[Idx] = G;
3757  (void)InsertFormula(LU, LUIdx, F);
3758 }
3759 
3760 /// Generate reuse formulae using symbolic offsets.
3761 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3762  Formula Base) {
3763  // We can't add a symbolic offset if the address already contains one.
3764  if (Base.BaseGV) return;
3765 
3766  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3767  GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, i);
3768  if (Base.Scale == 1)
3769  GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, /* Idx */ -1,
3770  /* IsScaledReg */ true);
3771 }
3772 
3773 /// Helper function for LSRInstance::GenerateConstantOffsets.
3774 void LSRInstance::GenerateConstantOffsetsImpl(
3775  LSRUse &LU, unsigned LUIdx, const Formula &Base,
3776  const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3777 
3778  auto GenerateOffset = [&](const SCEV *G, int64_t Offset) {
3779  Formula F = Base;
3780  F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
3781 
3782  if (isLegalUse(TTI, LU.MinOffset - Offset, LU.MaxOffset - Offset, LU.Kind,
3783  LU.AccessTy, F)) {
3784  // Add the offset to the base register.
3785  const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);
3786  // If it cancelled out, drop the base register, otherwise update it.
3787  if (NewG->isZero()) {
3788  if (IsScaledReg) {
3789  F.Scale = 0;
3790  F.ScaledReg = nullptr;
3791  } else
3792  F.deleteBaseReg(F.BaseRegs[Idx]);
3793  F.canonicalize(*L);
3794  } else if (IsScaledReg)
3795  F.ScaledReg = NewG;
3796  else
3797  F.BaseRegs[Idx] = NewG;
3798 
3799  (void)InsertFormula(LU, LUIdx, F);
3800  }
3801  };
3802 
3803  const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3804 
3805  // With constant offsets and constant steps, we can generate pre-inc
3806  // accesses by having the offset equal the step. So, for access #0 with a
3807  // step of 8, we generate a G - 8 base which would require the first access
3808  // to be ((G - 8) + 8),+,8. The pre-indexed access then updates the pointer
3809  // for itself and hopefully becomes the base for other accesses. This means
3810  // means that a single pre-indexed access can be generated to become the new
3811  // base pointer for each iteration of the loop, resulting in no extra add/sub
3812  // instructions for pointer updating.
3813  if (FavorBackedgeIndex && LU.Kind == LSRUse::Address) {
3814  if (auto *GAR = dyn_cast<SCEVAddRecExpr>(G)) {
3815  if (auto *StepRec =
3816  dyn_cast<SCEVConstant>(GAR->getStepRecurrence(SE))) {
3817  const APInt &StepInt = StepRec->getAPInt();
3818  int64_t Step = StepInt.isNegative() ?
3819  StepInt.getSExtValue() : StepInt.getZExtValue();
3820 
3821  for (int64_t Offset : Worklist) {
3822  Offset -= Step;
3823  GenerateOffset(G, Offset);
3824  }
3825  }
3826  }
3827  }
3828  for (int64_t Offset : Worklist)
3829  GenerateOffset(G, Offset);
3830 
3831  int64_t Imm = ExtractImmediate(G, SE);
3832  if (G->isZero() || Imm == 0)
3833  return;
3834  Formula F = Base;
3835  F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3836  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3837  return;
3838  if (IsScaledReg)
3839  F.ScaledReg = G;
3840  else
3841  F.BaseRegs[Idx] = G;
3842  (void)InsertFormula(LU, LUIdx, F);
3843 }
3844 
3845 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3846 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3847  Formula Base) {
3848  // TODO: For now, just add the min and max offset, because it usually isn't
3849  // worthwhile looking at everything inbetween.
3850  SmallVector<int64_t, 2> Worklist;
3851  Worklist.push_back(LU.MinOffset);
3852  if (LU.MaxOffset != LU.MinOffset)
3853  Worklist.push_back(LU.MaxOffset);
3854 
3855  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3856  GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, i);
3857  if (Base.Scale == 1)
3858  GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, /* Idx */ -1,
3859  /* IsScaledReg */ true);
3860 }
3861 
3862 /// For ICmpZero, check to see if we can scale up the comparison. For example, x
3863 /// == y -> x*c == y*c.
3864 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3865  Formula Base) {
3866  if (LU.Kind != LSRUse::ICmpZero) return;
3867 
3868  // Determine the integer type for the base formula.
3869  Type *IntTy = Base.getType();
3870  if (!IntTy) return;
3871  if (SE.getTypeSizeInBits(IntTy) > 64) return;
3872 
3873  // Don't do this if there is more than one offset.
3874  if (LU.MinOffset != LU.MaxOffset) return;
3875 
3876  // Check if transformation is valid. It is illegal to multiply pointer.
3877  if (Base.ScaledReg && Base.ScaledReg->getType()->isPointerTy())
3878  return;
3879  for (const SCEV *BaseReg : Base.BaseRegs)
3880  if (BaseReg->getType()->isPointerTy())
3881  return;
3882  assert(!Base.BaseGV && "ICmpZero use is not legal!");
3883 
3884  // Check each interesting stride.
3885  for (int64_t Factor : Factors) {
3886  // Check that the multiplication doesn't overflow.
3887  if (Base.BaseOffset == std::numeric_limits<int64_t>::min() && Factor == -1)
3888  continue;
3889  int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3890  if (NewBaseOffset / Factor != Base.BaseOffset)
3891  continue;
3892  // If the offset will be truncated at this use, check that it is in bounds.
3893  if (!IntTy->isPointerTy() &&
3894  !ConstantInt::isValueValidForType(IntTy, NewBaseOffset))
3895  continue;
3896 
3897  // Check that multiplying with the use offset doesn't overflow.
3898  int64_t Offset = LU.MinOffset;
3899  if (Offset == std::numeric_limits<int64_t>::min() && Factor == -1)
3900  continue;
3901  Offset = (uint64_t)Offset * Factor;
3902  if (Offset / Factor != LU.MinOffset)
3903  continue;
3904  // If the offset will be truncated at this use, check that it is in bounds.
3905  if (!IntTy->isPointerTy() &&
3906  !ConstantInt::isValueValidForType(IntTy, Offset))
3907  continue;
3908 
3909  Formula F = Base;
3910  F.BaseOffset = NewBaseOffset;
3911 
3912  // Check that this scale is legal.
3913  if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3914  continue;
3915 
3916  // Compensate for the use having MinOffset built into it.
3917  F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3918 
3919  const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3920 
3921  // Check that multiplying with each base register doesn't overflow.
3922  for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3923  F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3924  if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3925  goto next;
3926  }
3927 
3928  // Check that multiplying with the scaled register doesn't overflow.
3929  if (F.ScaledReg) {
3930  F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3931  if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3932  continue;
3933  }
3934 
3935  // Check that multiplying with the unfolded offset doesn't overflow.
3936  if (F.UnfoldedOffset != 0) {
3937  if (F.UnfoldedOffset == std::numeric_limits<int64_t>::min() &&
3938  Factor == -1)
3939  continue;
3940  F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3941  if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3942  continue;
3943  // If the offset will be truncated, check that it is in bounds.
3944  if (!IntTy->isPointerTy() &&
3945  !ConstantInt::isValueValidForType(IntTy, F.UnfoldedOffset))
3946  continue;
3947  }
3948 
3949  // If we make it here and it's legal, add it.
3950  (void)InsertFormula(LU, LUIdx, F);
3951  next:;
3952  }
3953 }
3954 
3955 /// Generate stride factor reuse formulae by making use of scaled-offset address
3956 /// modes, for example.
3957 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3958  // Determine the integer type for the base formula.
3959  Type *IntTy = Base.getType();
3960  if (!IntTy) return;
3961 
3962  // If this Formula already has a scaled register, we can't add another one.
3963  // Try to unscale the formula to generate a better scale.
3964  if (Base.Scale != 0 && !Base.unscale())
3965  return;
3966 
3967  assert(Base.Scale == 0 && "unscale did not did its job!");
3968 
3969  // Check each interesting stride.
3970  for (int64_t Factor : Factors) {
3971  Base.Scale = Factor;
3972  Base.HasBaseReg = Base.BaseRegs.size() > 1;
3973  // Check whether this scale is going to be legal.
3974  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3975  Base)) {
3976  // As a special-case, handle special out-of-loop Basic users specially.
3977  // TODO: Reconsider this special case.
3978  if (LU.Kind == LSRUse::Basic &&
3979  isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3980  LU.AccessTy, Base) &&
3981  LU.AllFixupsOutsideLoop)
3982  LU.Kind = LSRUse::Special;
3983  else
3984  continue;
3985  }
3986  // For an ICmpZero, negating a solitary base register won't lead to
3987  // new solutions.
3988  if (LU.Kind == LSRUse::ICmpZero &&
3989  !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3990  continue;
3991  // For each addrec base reg, if its loop is current loop, apply the scale.
3992  for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3993  const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i]);
3994  if (AR && (AR->getLoop() == L || LU.AllFixupsOutsideLoop)) {
3995  const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3996  if (FactorS->isZero())
3997  continue;
3998  // Divide out the factor, ignoring high bits, since we'll be
3999  // scaling the value back up in the end.
4000  if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
4001  // TODO: This could be optimized to avoid all the copying.
4002  Formula F = Base;
4003  F.ScaledReg = Quotient;
4004  F.deleteBaseReg(F.BaseRegs[i]);
4005  // The canonical representation of 1*reg is reg, which is already in
4006  // Base. In that case, do not try to insert the formula, it will be
4007  // rejected anyway.
4008  if (F.Scale == 1 && (F.BaseRegs.empty() ||
4009  (AR->getLoop() != L && LU.AllFixupsOutsideLoop)))
4010  continue;
4011  // If AllFixupsOutsideLoop is true and F.Scale is 1, we may generate
4012  // non canonical Formula with ScaledReg's loop not being L.
4013  if (F.Scale == 1 && LU.AllFixupsOutsideLoop)
4014  F.canonicalize(*L);
4015  (void)InsertFormula(LU, LUIdx, F);
4016  }
4017  }
4018  }
4019  }
4020 }
4021 
4022 /// Generate reuse formulae from different IV types.
4023 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
4024  // Don't bother truncating symbolic values.
4025  if (Base.BaseGV) return;
4026 
4027  // Determine the integer type for the base formula.
4028  Type *DstTy = Base.getType();
4029  if (!DstTy) return;
4030  DstTy = SE.getEffectiveSCEVType(DstTy);
4031 
4032  for (Type *SrcTy : Types) {
4033  if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
4034  Formula F = Base;
4035 
4036  // Sometimes SCEV is able to prove zero during ext transform. It may
4037  // happen if SCEV did not do all possible transforms while creating the
4038  // initial node (maybe due to depth limitations), but it can do them while
4039  // taking ext.
4040  if (F.ScaledReg) {
4041  const SCEV *NewScaledReg = SE.getAnyExtendExpr(F.ScaledReg, SrcTy);
4042  if (NewScaledReg->isZero())
4043  continue;
4044  F.ScaledReg = NewScaledReg;
4045  }
4046  bool HasZeroBaseReg = false;
4047  for (const SCEV *&BaseReg : F.BaseRegs) {
4048  const SCEV *NewBaseReg = SE.getAnyExtendExpr(BaseReg, SrcTy);
4049  if (NewBaseReg->isZero()) {
4050  HasZeroBaseReg = true;
4051  break;
4052  }
4053  BaseReg = NewBaseReg;
4054  }
4055  if (HasZeroBaseReg)
4056  continue;
4057 
4058  // TODO: This assumes we've done basic processing on all uses and
4059  // have an idea what the register usage is.
4060  if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
4061  continue;
4062 
4063  F.canonicalize(*L);
4064  (void)InsertFormula(LU, LUIdx, F);
4065  }
4066  }
4067 }
4068 
4069 namespace {
4070 
4071 /// Helper class for GenerateCrossUseConstantOffsets. It's used to defer
4072 /// modifications so that the search phase doesn't have to worry about the data
4073 /// structures moving underneath it.
4074 struct WorkItem {
4075  size_t LUIdx;
4076  int64_t Imm;
4077  const SCEV *OrigReg;
4078 
4079  WorkItem(size_t LI, int64_t I, const SCEV *R)
4080  : LUIdx(LI), Imm(I), OrigReg(R) {}
4081 
4082  void print(raw_ostream &OS) const;
4083  void dump() const;
4084 };
4085 
4086 } // end anonymous namespace
4087 
4088 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
4089 void WorkItem::print(raw_ostream &OS) const {
4090  OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
4091  << " , add offset " << Imm;
4092 }
4093 
4094 LLVM_DUMP_METHOD void WorkItem::dump() const {
4095  print(errs()); errs() << '\n';
4096 }
4097 #endif
4098 
4099 /// Look for registers which are a constant distance apart and try to form reuse
4100 /// opportunities between them.
4101 void LSRInstance::GenerateCrossUseConstantOffsets() {
4102  // Group the registers by their value without any added constant offset.
4103  using ImmMapTy = std::map<int64_t, const SCEV *>;
4104 
4106  DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
4108  for (const SCEV *Use : RegUses) {
4109  const SCEV *Reg = Use; // Make a copy for ExtractImmediate to modify.
4110  int64_t Imm = ExtractImmediate(Reg, SE);
4111  auto Pair = Map.insert(std::make_pair(Reg, ImmMapTy()));
4112  if (Pair.second)
4113  Sequence.push_back(Reg);
4114  Pair.first->second.insert(std::make_pair(Imm, Use));
4115  UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
4116  }
4117 
4118  // Now examine each set of registers with the same base value. Build up
4119  // a list of work to do and do the work in a separate step so that we're
4120  // not adding formulae and register counts while we're searching.
4121  SmallVector<WorkItem, 32> WorkItems;
4122  SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
4123  for (const SCEV *Reg : Sequence) {
4124  const ImmMapTy &Imms = Map.find(Reg)->second;
4125 
4126  // It's not worthwhile looking for reuse if there's only one offset.
4127  if (Imms.size() == 1)
4128  continue;
4129 
4130  LLVM_DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
4131  for (const auto &Entry
4132  : Imms) dbgs()
4133  << ' ' << Entry.first;
4134  dbgs() << '\n');
4135 
4136  // Examine each offset.
4137  for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
4138  J != JE; ++J) {
4139  const SCEV *OrigReg = J->second;
4140 
4141  int64_t JImm = J->first;
4142  const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
4143 
4144  if (!isa<SCEVConstant>(OrigReg) &&
4145  UsedByIndicesMap[Reg].count() == 1) {
4146  LLVM_DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg
4147  << '\n');
4148  continue;
4149  }
4150 
4151  // Conservatively examine offsets between this orig reg a few selected
4152  // other orig regs.
4153  int64_t First = Imms.begin()->first;
4154  int64_t Last = std::prev(Imms.end())->first;
4155  // Compute (First + Last) / 2 without overflow using the fact that
4156  // First + Last = 2 * (First + Last) + (First ^ Last).
4157  int64_t Avg = (First & Last) + ((First ^ Last) >> 1);
4158  // If the result is negative and First is odd and Last even (or vice versa),
4159  // we rounded towards -inf. Add 1 in that case, to round towards 0.
4160  Avg = Avg + ((First ^ Last) & ((uint64_t)Avg >> 63));
4161  ImmMapTy::const_iterator OtherImms[] = {
4162  Imms.begin(), std::prev(Imms.end()),
4163  Imms.lower_bound(Avg)};
4164  for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
4165  ImmMapTy::const_iterator M = OtherImms[i];
4166  if (M == J || M == JE) continue;
4167 
4168  // Compute the difference between the two.
4169  int64_t Imm = (uint64_t)JImm - M->first;
4170  for (unsigned LUIdx : UsedByIndices.set_bits())
4171  // Make a memo of this use, offset, and register tuple.
4172  if (UniqueItems.insert(std::make_pair(LUIdx, Imm)).second)
4173  WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
4174  }
4175  }
4176  }
4177 
4178  Map.clear();
4179  Sequence.clear();
4180  UsedByIndicesMap.clear();
4181  UniqueItems.clear();
4182 
4183  // Now iterate through the worklist and add new formulae.
4184  for (const WorkItem &WI : WorkItems) {
4185  size_t LUIdx = WI.LUIdx;
4186  LSRUse &LU = Uses[LUIdx];
4187  int64_t Imm = WI.Imm;
4188  const SCEV *OrigReg = WI.OrigReg;
4189 
4190  Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
4191  const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
4192  unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
4193 
4194  // TODO: Use a more targeted data structure.
4195  for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
4196  Formula F = LU.Formulae[L];
4197  // FIXME: The code for the scaled and unscaled registers looks
4198  // very similar but slightly different. Investigate if they
4199  // could be merged. That way, we would not have to unscale the
4200  // Formula.
4201  F.unscale();
4202  // Use the immediate in the scaled register.
4203  if (F.ScaledReg == OrigReg) {
4204  int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
4205  // Don't create 50 + reg(-50).
4206  if (F.referencesReg(SE.getSCEV(
4207  ConstantInt::get(IntTy, -(uint64_t)Offset))))
4208  continue;
4209  Formula NewF = F;
4210  NewF.BaseOffset = Offset;
4211  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4212  NewF))
4213  continue;
4214  NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
4215 
4216  // If the new scale is a constant in a register, and adding the constant
4217  // value to the immediate would produce a value closer to zero than the
4218  // immediate itself, then the formula isn't worthwhile.
4219  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
4220  if (C->getValue()->isNegative() != (NewF.BaseOffset < 0) &&
4221  (C->getAPInt().abs() * APInt(BitWidth, F.Scale))
4222  .ule(std::abs(NewF.BaseOffset)))
4223  continue;
4224 
4225  // OK, looks good.
4226  NewF.canonicalize(*this->L);
4227  (void)InsertFormula(LU, LUIdx, NewF);
4228  } else {
4229  // Use the immediate in a base register.
4230  for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
4231  const SCEV *BaseReg = F.BaseRegs[N];
4232  if (BaseReg != OrigReg)
4233  continue;
4234  Formula NewF = F;
4235  NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
4236  if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
4237  LU.Kind, LU.AccessTy, NewF)) {
4238  if (TTI.shouldFavorPostInc() &&
4239  mayUsePostIncMode(TTI, LU, OrigReg, this->L, SE))
4240  continue;
4241  if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
4242  continue;
4243  NewF = F;
4244  NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
4245  }
4246  NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
4247 
4248  // If the new formula has a constant in a register, and adding the
4249  // constant value to the immediate would produce a value closer to
4250  // zero than the immediate itself, then the formula isn't worthwhile.
4251  for (const SCEV *NewReg : NewF.BaseRegs)
4252  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewReg))
4253  if ((C->getAPInt() + NewF.BaseOffset)
4254  .abs()
4255  .slt(std::abs(NewF.BaseOffset)) &&
4256  (C->getAPInt() + NewF.BaseOffset).countTrailingZeros() >=
4257  countTrailingZeros<uint64_t>(NewF.BaseOffset))
4258  goto skip_formula;
4259 
4260  // Ok, looks good.
4261  NewF.canonicalize(*this->L);
4262  (void)InsertFormula(LU, LUIdx, NewF);
4263  break;
4264  skip_formula:;
4265  }
4266  }
4267  }
4268  }
4269 }
4270 
4271 /// Generate formulae for each use.
4272 void
4273 LSRInstance::GenerateAllReuseFormulae() {
4274  // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
4275  // queries are more precise.
4276  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4277  LSRUse &LU = Uses[LUIdx];
4278  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4279  GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
4280  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4281  GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
4282  }
4283  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4284  LSRUse &LU = Uses[LUIdx];
4285  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4286  GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
4287  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4288  GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
4289  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4290  GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
4291  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4292  GenerateScales(LU, LUIdx, LU.Formulae[i]);
4293  }
4294  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4295  LSRUse &LU = Uses[LUIdx];
4296  for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4297  GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
4298  }
4299 
4300  GenerateCrossUseConstantOffsets();
4301 
4302  LLVM_DEBUG(dbgs() << "\n"
4303  "After generating reuse formulae:\n";
4304  print_uses(dbgs()));
4305 }
4306 
4307 /// If there are multiple formulae with the same set of registers used
4308 /// by other uses, pick the best one and delete the others.
4309 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
4310  DenseSet<const SCEV *> VisitedRegs;
4313 #ifndef NDEBUG
4314  bool ChangedFormulae = false;
4315 #endif
4316 
4317  // Collect the best formula for each unique set of shared registers. This
4318  // is reset for each use.
4319  using BestFormulaeTy =
4320  DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>;
4321 
4322  BestFormulaeTy BestFormulae;
4323 
4324  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4325  LSRUse &LU = Uses[LUIdx];
4326  LLVM_DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs());
4327  dbgs() << '\n');
4328 
4329  bool Any = false;
4330  for (size_t FIdx = 0, NumForms = LU.Formulae.size();
4331  FIdx != NumForms; ++FIdx) {
4332  Formula &F = LU.Formulae[FIdx];
4333 
4334  // Some formulas are instant losers. For example, they may depend on
4335  // nonexistent AddRecs from other loops. These need to be filtered
4336  // immediately, otherwise heuristics could choose them over others leading
4337  // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
4338  // avoids the need to recompute this information across formulae using the
4339  // same bad AddRec. Passing LoserRegs is also essential unless we remove
4340  // the corresponding bad register from the Regs set.
4341  Cost CostF(L, SE, TTI);
4342  Regs.clear();
4343  CostF.RateFormula(F, Regs, VisitedRegs, LU, &LoserRegs);
4344  if (CostF.isLoser()) {
4345  // During initial formula generation, undesirable formulae are generated
4346  // by uses within other loops that have some non-trivial address mode or
4347  // use the postinc form of the IV. LSR needs to provide these formulae
4348  // as the basis of rediscovering the desired formula that uses an AddRec
4349  // corresponding to the existing phi. Once all formulae have been
4350  // generated, these initial losers may be pruned.
4351  LLVM_DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
4352  dbgs() << "\n");
4353  }
4354  else {
4356  for (const SCEV *Reg : F.BaseRegs) {
4357  if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
4358  Key.push_back(Reg);
4359  }
4360  if (F.ScaledReg &&
4361  RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
4362  Key.push_back(F.ScaledReg);
4363  // Unstable sort by host order ok, because this is only used for
4364  // uniquifying.
4365  llvm::sort(Key);
4366 
4367  std::pair<BestFormulaeTy::const_iterator, bool> P =
4368  BestFormulae.insert(std::make_pair(Key, FIdx));
4369  if (P.second)
4370  continue;
4371 
4372  Formula &Best = LU.Formulae[P.first->second];
4373 
4374  Cost CostBest(L, SE, TTI);
4375  Regs.clear();
4376  CostBest.RateFormula(Best, Regs, VisitedRegs, LU);
4377  if (CostF.isLess(CostBest))
4378  std::swap(F, Best);
4379  LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4380  dbgs() << "\n"
4381  " in favor of formula ";
4382  Best.print(dbgs()); dbgs() << '\n');
4383  }
4384 #ifndef NDEBUG
4385  ChangedFormulae = true;
4386 #endif
4387  LU.DeleteFormula(F);
4388  --FIdx;
4389  --NumForms;
4390  Any = true;
4391  }
4392 
4393  // Now that we've filtered out some formulae, recompute the Regs set.
4394  if (Any)
4395  LU.RecomputeRegs(LUIdx, RegUses);
4396 
4397  // Reset this to prepare for the next use.
4398  BestFormulae.clear();
4399  }
4400 
4401  LLVM_DEBUG(if (ChangedFormulae) {
4402  dbgs() << "\n"
4403  "After filtering out undesirable candidates:\n";
4404  print_uses(dbgs());
4405  });
4406 }
4407 
4408 /// Estimate the worst-case number of solutions the solver might have to
4409 /// consider. It almost never considers this many solutions because it prune the
4410 /// search space, but the pruning isn't always sufficient.
4411 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
4412  size_t Power = 1;
4413  for (const LSRUse &LU : Uses) {
4414  size_t FSize = LU.Formulae.size();
4415  if (FSize >= ComplexityLimit) {
4416  Power = ComplexityLimit;
4417  break;
4418  }
4419  Power *= FSize;
4420  if (Power >= ComplexityLimit)
4421  break;
4422  }
4423  return Power;
4424 }
4425 
4426 /// When one formula uses a superset of the registers of another formula, it
4427 /// won't help reduce register pressure (though it may not necessarily hurt
4428 /// register pressure); remove it to simplify the system.
4429 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
4430  if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4431  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4432 
4433  LLVM_DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
4434  "which use a superset of registers used by other "
4435  "formulae.\n");
4436 
4437  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4438  LSRUse &LU = Uses[LUIdx];
4439  bool Any = false;
4440  for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4441  Formula &F = LU.Formulae[i];
4442  // Look for a formula with a constant or GV in a register. If the use
4443  // also has a formula with that same value in an immediate field,
4444  // delete the one that uses a register.
4446  I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
4447  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
4448  Formula NewF = F;
4449  //FIXME: Formulas should store bitwidth to do wrapping properly.
4450  // See PR41034.
4451  NewF.BaseOffset += (uint64_t)C->getValue()->getSExtValue();
4452  NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4453  (I - F.BaseRegs.begin()));
4454  if (LU.HasFormulaWithSameRegs(NewF)) {
4455  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4456  dbgs() << '\n');
4457  LU.DeleteFormula(F);
4458  --i;
4459  --e;
4460  Any = true;
4461  break;
4462  }
4463  } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
4464  if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
4465  if (!F.BaseGV) {
4466  Formula NewF = F;
4467  NewF.BaseGV = GV;
4468  NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4469  (I - F.BaseRegs.begin()));
4470  if (LU.HasFormulaWithSameRegs(NewF)) {
4471  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4472  dbgs() << '\n');
4473  LU.DeleteFormula(F);
4474  --i;
4475  --e;
4476  Any = true;
4477  break;
4478  }
4479  }
4480  }
4481  }
4482  }
4483  if (Any)
4484  LU.RecomputeRegs(LUIdx, RegUses);
4485  }
4486 
4487  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4488  }
4489 }
4490 
4491 /// When there are many registers for expressions like A, A+1, A+2, etc.,
4492 /// allocate a single register for them.
4493 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
4494  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4495  return;
4496 
4497  LLVM_DEBUG(
4498  dbgs() << "The search space is too complex.\n"
4499  "Narrowing the search space by assuming that uses separated "
4500  "by a constant offset will use the same registers.\n");
4501 
4502  // This is especially useful for unrolled loops.
4503 
4504  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4505  LSRUse &LU = Uses[LUIdx];
4506  for (const Formula &F : LU.Formulae) {
4507  if (F.BaseOffset == 0 || (F.Scale != 0 && F.Scale != 1))
4508  continue;
4509 
4510  LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
4511  if (!LUThatHas)
4512  continue;
4513 
4514  if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
4515  LU.Kind, LU.AccessTy))
4516  continue;
4517 
4518  LLVM_DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
4519 
4520  LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
4521 
4522  // Transfer the fixups of LU to LUThatHas.
4523  for (LSRFixup &Fixup : LU.Fixups) {
4524  Fixup.Offset += F.BaseOffset;
4525  LUThatHas->pushFixup(Fixup);
4526  LLVM_DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
4527  }
4528 
4529  // Delete formulae from the new use which are no longer legal.
4530  bool Any = false;
4531  for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
4532  Formula &F = LUThatHas->Formulae[i];
4533  if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
4534  LUThatHas->Kind, LUThatHas->AccessTy, F)) {
4535  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4536  LUThatHas->DeleteFormula(F);
4537  --i;
4538  --e;
4539  Any = true;
4540  }
4541  }
4542 
4543  if (Any)
4544  LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4545 
4546  // Delete the old use.
4547  DeleteUse(LU, LUIdx);
4548  --LUIdx;
4549  --NumUses;
4550  break;
4551  }
4552  }
4553 
4554  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4555 }
4556 
4557 /// Call FilterOutUndesirableDedicatedRegisters again, if necessary, now that
4558 /// we've done more filtering, as it may be able to find more formulae to
4559 /// eliminate.
4560 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
4561  if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4562  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4563 
4564  LLVM_DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
4565  "undesirable dedicated registers.\n");
4566 
4567  FilterOutUndesirableDedicatedRegisters();
4568 
4569  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4570  }
4571 }
4572 
4573 /// If a LSRUse has multiple formulae with the same ScaledReg and Scale.
4574 /// Pick the best one and delete the others.
4575 /// This narrowing heuristic is to keep as many formulae with different
4576 /// Scale and ScaledReg pair as possible while narrowing the search space.
4577 /// The benefit is that it is more likely to find out a better solution
4578 /// from a formulae set with more Scale and ScaledReg variations than
4579 /// a formulae set with the same Scale and ScaledReg. The picking winner
4580 /// reg heuristic will often keep the formulae with the same Scale and
4581 /// ScaledReg and filter others, and we want to avoid that if possible.
4582 void LSRInstance::NarrowSearchSpaceByFilterFormulaWithSameScaledReg() {
4583  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4584  return;
4585 
4586  LLVM_DEBUG(
4587  dbgs() << "The search space is too complex.\n"
4588  "Narrowing the search space by choosing the best Formula "
4589  "from the Formulae with the same Scale and ScaledReg.\n");
4590 
4591  // Map the "Scale * ScaledReg" pair to the best formula of current LSRUse.
4592  using BestFormulaeTy = DenseMap<std::pair<const SCEV *, int64_t>, size_t>;
4593 
4594  BestFormulaeTy BestFormulae;
4595 #ifndef NDEBUG
4596  bool ChangedFormulae = false;
4597 #endif
4598  DenseSet<const SCEV *> VisitedRegs;
4600 
4601  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4602  LSRUse &LU = Uses[LUIdx];
4603  LLVM_DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs());
4604  dbgs() << '\n');
4605 
4606  // Return true if Formula FA is better than Formula FB.
4607  auto IsBetterThan = [&](Formula &FA, Formula &FB) {
4608  // First we will try to choose the Formula with fewer new registers.
4609  // For a register used by current Formula, the more the register is
4610  // shared among LSRUses, the less we increase the register number
4611  // counter of the formula.
4612  size_t FARegNum = 0;
4613  for (const SCEV *Reg : FA.BaseRegs) {
4614  const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4615  FARegNum += (NumUses - UsedByIndices.count() + 1);
4616  }
4617  size_t FBRegNum = 0;
4618  for (const SCEV *Reg : FB.BaseRegs) {
4619  const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4620  FBRegNum += (NumUses - UsedByIndices.count() + 1);
4621  }
4622  if (FARegNum != FBRegNum)
4623  return FARegNum < FBRegNum;
4624 
4625  // If the new register numbers are the same, choose the Formula with
4626  // less Cost.
4627  Cost CostFA(L, SE, TTI);
4628  Cost CostFB(L, SE, TTI);
4629  Regs.clear();
4630  CostFA.RateFormula(FA, Regs, VisitedRegs, LU);
4631  Regs.clear();
4632  CostFB.RateFormula(FB, Regs, VisitedRegs, LU);
4633  return CostFA.isLess(CostFB);
4634  };
4635 
4636  bool Any = false;
4637  for (size_t FIdx = 0, NumForms = LU.Formulae.size(); FIdx != NumForms;
4638  ++FIdx) {
4639  Formula &F = LU.Formulae[FIdx];
4640  if (!F.ScaledReg)
4641  continue;
4642  auto P = BestFormulae.insert({{F.ScaledReg, F.Scale}, FIdx});
4643  if (P.second)
4644  continue;
4645 
4646  Formula &Best = LU.Formulae[P.first->second];
4647  if (IsBetterThan(F, Best))
4648  std::swap(F, Best);
4649  LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4650  dbgs() << "\n"
4651  " in favor of formula ";
4652  Best.print(dbgs()); dbgs() << '\n');
4653 #ifndef NDEBUG
4654  ChangedFormulae = true;
4655 #endif
4656  LU.DeleteFormula(F);
4657  --FIdx;
4658  --NumForms;
4659  Any = true;
4660  }
4661  if (Any)
4662  LU.RecomputeRegs(LUIdx, RegUses);
4663 
4664  // Reset this to prepare for the next use.
4665  BestFormulae.clear();
4666  }
4667 
4668  LLVM_DEBUG(if (ChangedFormulae) {
4669  dbgs() << "\n"
4670  "After filtering out undesirable candidates:\n";
4671  print_uses(dbgs());
4672  });
4673 }
4674 
4675 /// The function delete formulas with high registers number expectation.
4676 /// Assuming we don't know the value of each formula (already delete
4677 /// all inefficient), generate probability of not selecting for each
4678 /// register.
4679 /// For example,
4680 /// Use1:
4681 /// reg(a) + reg({0,+,1})
4682 /// reg(a) + reg({-1,+,1}) + 1
4683 /// reg({a,+,1})
4684 /// Use2:
4685 /// reg(b) + reg({0,+,1})
4686 /// reg(b) + reg({-1,+,1}) + 1
4687 /// reg({b,+,1})
4688 /// Use3:
4689 /// reg(c) + reg(b) + reg({0,+,1})
4690 /// reg(c) + reg({b,+,1})
4691 ///
4692 /// Probability of not selecting
4693 /// Use1 Use2 Use3
4694 /// reg(a) (1/3) * 1 * 1
4695 /// reg(b) 1 * (1/3) * (1/2)
4696 /// reg({0,+,1}) (2/3) * (2/3) * (1/2)
4697 /// reg({-1,+,1}) (2/3) * (2/3) * 1
4698 /// reg({a,+,1}) (2/3) * 1 * 1
4699 /// reg({b,+,1}) 1 * (2/3) * (2/3)
4700 /// reg(c) 1 * 1 * 0
4701 ///
4702 /// Now count registers number mathematical expectation for each formula:
4703 /// Note that for each use we exclude probability if not selecting for the use.
4704 /// For example for Use1 probability for reg(a) would be just 1 * 1 (excluding
4705 /// probabilty 1/3 of not selecting for Use1).
4706 /// Use1:
4707 /// reg(a) + reg({0,+,1}) 1 + 1/3 -- to be deleted
4708 /// reg(a) + reg({-1,+,1}) + 1 1 + 4/9 -- to be deleted
4709 /// reg({a,+,1}) 1
4710 /// Use2:
4711 /// reg(b) + reg({0,+,1}) 1/2 + 1/3 -- to be deleted
4712 /// reg(b) + reg({-1,+,1}) + 1 1/2 + 2/3 -- to be deleted
4713 /// reg({b,+,1}) 2/3
4714 /// Use3:
4715 /// reg(c) + reg(b) + reg({0,+,1}) 1 + 1/3 + 4/9 -- to be deleted
4716 /// reg(c) + reg({b,+,1}) 1 + 2/3
4717 void LSRInstance::NarrowSearchSpaceByDeletingCostlyFormulas() {
4718  if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4719  return;
4720  // Ok, we have too many of formulae on our hands to conveniently handle.
4721  // Use a rough heuristic to thin out the list.
4722 
4723  // Set of Regs wich will be 100% used in final solution.
4724  // Used in each formula of a solution (in example above this is reg(c)).
4725  // We can skip them in calculations.
4727  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4728 
4729  // Map each register to probability of not selecting
4731  for (const SCEV *Reg : RegUses) {
4732  if (UniqRegs.count(Reg))
4733  continue;
4734  float PNotSel = 1;
4735  for (const LSRUse &LU : Uses) {
4736  if (!LU.Regs.count(Reg))
4737  continue;
4738  float P = LU.getNotSelectedProbability(Reg);
4739  if (P != 0.0)
4740  PNotSel *= P;
4741  else
4742  UniqRegs.insert(Reg);
4743  }
4744  RegNumMap.insert(std::make_pair(Reg, PNotSel));
4745  }
4746 
4747  LLVM_DEBUG(
4748  dbgs() << "Narrowing the search space by deleting costly formulas\n");
4749 
4750  // Delete formulas where registers number expectation is high.
4751  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4752  LSRUse &LU = Uses[LUIdx];
4753  // If nothing to delete - continue.
4754  if (LU.Formulae.size() < 2)
4755  continue;
4756  // This is temporary solution to test performance. Float should be
4757  // replaced with round independent type (based on integers) to avoid
4758  // different results for different target builds.
4759  float FMinRegNum = LU.Formulae[0].getNumRegs();
4760  float FMinARegNum = LU.Formulae[0].getNumRegs();
4761  size_t MinIdx = 0;
4762  for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4763  Formula &F = LU.Formulae[i];
4764  float FRegNum = 0;
4765  float FARegNum = 0;
4766  for (const SCEV *BaseReg : F.BaseRegs) {
4767  if (UniqRegs.count(BaseReg))
4768  continue;
4769  FRegNum += RegNumMap[BaseReg] / LU.getNotSelectedProbability(BaseReg);
4770  if (isa<SCEVAddRecExpr>(BaseReg))
4771  FARegNum +=
4772  RegNumMap[BaseReg] / LU.getNotSelectedProbability(BaseReg);
4773  }
4774  if (const SCEV *ScaledReg = F.ScaledReg) {
4775  if (!UniqRegs.count(ScaledReg)) {
4776  FRegNum +=
4777  RegNumMap[ScaledReg] / LU.getNotSelectedProbability(ScaledReg);
4778  if (isa<SCEVAddRecExpr>(ScaledReg))
4779  FARegNum +=
4780  RegNumMap[ScaledReg] / LU.getNotSelectedProbability(ScaledReg);
4781  }
4782  }
4783  if (FMinRegNum > FRegNum ||
4784  (FMinRegNum == FRegNum && FMinARegNum > FARegNum)) {
4785  FMinRegNum = FRegNum;
4786  FMinARegNum = FARegNum;
4787  MinIdx = i;
4788  }
4789  }
4790  LLVM_DEBUG(dbgs() << " The formula "; LU.Formulae[MinIdx].print(dbgs());
4791  dbgs() << " with min reg num " << FMinRegNum << '\n');
4792  if (MinIdx != 0)
4793  std::swap(LU.Formulae[MinIdx], LU.Formulae[0]);
4794  while (LU.Formulae.size() != 1) {
4795  LLVM_DEBUG(dbgs() << " Deleting "; LU.Formulae.back().print(dbgs());
4796  dbgs() << '\n');
4797  LU.Formulae.pop_back();
4798  }
4799  LU.RecomputeRegs(LUIdx, RegUses);
4800  assert(LU.Formulae.size() == 1 && "Should be exactly 1 min regs formula");
4801  Formula &F = LU.Formulae[0];
4802  LLVM_DEBUG(dbgs() << " Leaving only "; F.print(dbgs()); dbgs() << '\n');
4803  // When we choose the formula, the regs become unique.
4804  UniqRegs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
4805  if (F.ScaledReg)
4806  UniqRegs.insert(F.ScaledReg);
4807  }
4808  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4809 }
4810 
4811 /// Pick a register which seems likely to be profitable, and then in any use
4812 /// which has any reference to that register, delete all formulae which do not
4813 /// reference that register.
4814 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
4815  // With all other options exhausted, loop until the system is simple
4816  // enough to handle.
4818  while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4819  // Ok, we have too many of formulae on our hands to conveniently handle.
4820  // Use a rough heuristic to thin out the list.
4821  LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4822 
4823  // Pick the register which is used by the most LSRUses, which is likely
4824  // to be a good reuse register candidate.
4825  const SCEV *Best = nullptr;
4826  unsigned BestNum = 0;
4827  for (const SCEV *Reg : RegUses) {
4828  if (Taken.count(Reg))
4829  continue;
4830  if (!Best) {
4831  Best = Reg;
4832  BestNum = RegUses.getUsedByIndices(Reg).count();
4833  } else {
4834  unsigned Count = RegUses.getUsedByIndices(Reg).count();
4835  if (Count > BestNum) {
4836  Best = Reg;
4837  BestNum = Count;
4838  }
4839  }
4840  }
4841  assert(Best && "Failed to find best LSRUse candidate");
4842 
4843  LLVM_DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4844  << " will yield profitable reuse.\n");
4845  Taken.insert(Best);
4846 
4847  // In any use with formulae which references this register, delete formulae
4848  // which don't reference it.
4849  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4850  LSRUse &LU = Uses[LUIdx];
4851  if (!LU.Regs.count(Best)) continue;
4852 
4853  bool Any = false;
4854  for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4855  Formula &F = LU.Formulae[i];
4856  if (!F.referencesReg(Best)) {
4857  LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4858  LU.DeleteFormula(F);
4859  --e;
4860  --i;
4861  Any = true;
4862  assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4863  continue;
4864  }
4865  }
4866 
4867  if (Any)
4868  LU.RecomputeRegs(LUIdx, RegUses);
4869  }
4870 
4871  LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4872  }
4873 }
4874 
4875 /// If there are an extraordinary number of formulae to choose from, use some
4876 /// rough heuristics to prune down the number of formulae. This keeps the main
4877 /// solver from taking an extraordinary amount of time in some worst-case
4878 /// scenarios.
4879 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4880  NarrowSearchSpaceByDetectingSupersets();
4881  NarrowSearchSpaceByCollapsingUnrolledCode();
4882  NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4883  if (FilterSameScaledReg)
4884  NarrowSearchSpaceByFilterFormulaWithSameScaledReg();
4885  if (LSRExpNarrow)
4886  NarrowSearchSpaceByDeletingCostlyFormulas();
4887  else
4888  NarrowSearchSpaceByPickingWinnerRegs();
4889 }
4890 
4891 /// This is the recursive solver.
4892 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4893  Cost &SolutionCost,
4895  const Cost &CurCost,
4896  const SmallPtrSet<const SCEV *, 16> &CurRegs,
4897  DenseSet<const SCEV *> &VisitedRegs) const {
4898  // Some ideas:
4899  // - prune more:
4900  // - use more aggressive filtering
4901  // - sort the formula so that the most profitable solutions are found first
4902  // - sort the uses too
4903  // - search faster:
4904  // - don't compute a cost, and then compare. compare while computing a cost
4905  // and bail early.
4906  // - track register sets with SmallBitVector
4907 
4908  const LSRUse &LU = Uses[Workspace.size()];
4909 
4910  // If this use references any register that's already a part of the
4911  // in-progress solution, consider it a requirement that a formula must
4912  // reference that register in order to be considered. This prunes out
4913  // unprofitable searching.
4915  for (const SCEV *S : CurRegs)
4916  if (LU.Regs.count(S))
4917  ReqRegs.insert(S);
4918 
4920  Cost NewCost(L, SE, TTI);
4921  for (const Formula &F : LU.Formulae) {
4922  // Ignore formulae which may not be ideal in terms of register reuse of
4923  // ReqRegs. The formula should use all required registers before
4924  // introducing new ones.
4925  int NumReqRegsToFind = std::min(F.getNumRegs(), ReqRegs.size());
4926  for (const SCEV *Reg : ReqRegs) {
4927  if ((F.ScaledReg && F.ScaledReg == Reg) ||
4928  is_contained(F.BaseRegs, Reg)) {
4929  --NumReqRegsToFind;
4930  if (NumReqRegsToFind == 0)
4931  break;
4932  }
4933  }
4934  if (NumReqRegsToFind != 0) {
4935  // If none of the formulae satisfied the required registers, then we could
4936  // clear ReqRegs and try again. Currently, we simply give up in this case.
4937  continue;
4938  }
4939 
4940  // Evaluate the cost of the current formula. If it's already worse than
4941  // the current best, prune the search at that point.
4942  NewCost = CurCost;
4943  NewRegs = CurRegs;
4944  NewCost.RateFormula(F, NewRegs, VisitedRegs, LU);
4945  if (NewCost.isLess(SolutionCost)) {
4946  Workspace.push_back(&F);
4947  if (Workspace.size() != Uses.size()) {
4948  SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
4949  NewRegs, VisitedRegs);
4950  if (F.getNumRegs() == 1 && Workspace.size() == 1)
4951  VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
4952  } else {
4953  LLVM_DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
4954  dbgs() << ".\nRegs:\n";
4955  for (const SCEV *S : NewRegs) dbgs()
4956  << "- " << *S << "\n";
4957  dbgs() << '\n');
4958 
4959  SolutionCost = NewCost;
4960  Solution = Workspace;
4961  }
4962  Workspace.pop_back();
4963  }
4964  }
4965 }
4966 
4967 /// Choose one formula from each use. Return the results in the given Solution
4968 /// vector.
4969 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
4971  Cost SolutionCost(L, SE, TTI);
4972  SolutionCost.Lose();
4973  Cost CurCost(L, SE, TTI);
4975  DenseSet<const SCEV *> VisitedRegs;
4976  Workspace.reserve(Uses.size());
4977 
4978  // SolveRecurse does all the work.
4979  SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
4980  CurRegs, VisitedRegs);
4981  if (Solution.empty()) {
4982  LLVM_DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
4983  return;
4984  }
4985 
4986  // Ok, we've now made all our decisions.
4987  LLVM_DEBUG(dbgs() << "\n"
4988  "The chosen solution requires ";
4989  SolutionCost.print(dbgs()); dbgs() << ":\n";
4990  for (size_t i = 0, e = Uses.size(); i != e; ++i) {
4991  dbgs() << " ";
4992  Uses[i].print(dbgs());
4993  dbgs() << "\n"
4994  " ";
4995  Solution[i]->print(dbgs());
4996  dbgs() << '\n';
4997  });
4998 
4999  assert(Solution.size() == Uses.size() && "Malformed solution!");
5000 }
5001 
5002 /// Helper for AdjustInsertPositionForExpand. Climb up the dominator tree far as
5003 /// we can go while still being dominated by the input positions. This helps
5004 /// canonicalize the insert position, which encourages sharing.
5006 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
5007  const SmallVectorImpl<Instruction *> &Inputs)
5008  const {
5009  Instruction *Tentative = &*IP;
5010  while (true) {
5011  bool AllDominate = true;
5012  Instruction *BetterPos = nullptr;
5013  // Don't bother attempting to insert before a catchswitch, their basic block
5014  // cannot have other non-PHI instructions.
5015  if (isa<CatchSwitchInst>(Tentative))
5016  return IP;
5017 
5018  for (Instruction *Inst : Inputs) {
5019  if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
5020  AllDominate = false;
5021  break;
5022  }
5023  // Attempt to find an insert position in the middle of the block,
5024  // instead of at the end, so that it can be used for other expansions.
5025  if (Tentative->getParent() == Inst->getParent() &&
5026  (!BetterPos || !DT.dominates(Inst, BetterPos)))
5027  BetterPos = &*std::next(BasicBlock::iterator(Inst));
5028  }
5029  if (!AllDominate)
5030  break;
5031  if (BetterPos)
5032  IP = BetterPos->getIterator();
5033  else
5034  IP = Tentative->getIterator();
5035 
5036  const Loop *IPLoop = LI.getLoopFor(IP->getParent());
5037  unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
5038 
5039  BasicBlock *IDom;
5040  for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
5041  if (!Rung) return IP;
5042  Rung = Rung->getIDom();
5043  if (!Rung) return IP;
5044  IDom = Rung->getBlock();
5045 
5046  // Don't climb into a loop though.
5047  const Loop *IDomLoop = LI.getLoopFor(IDom);
5048  unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
5049  if (IDomDepth <= IPLoopDepth &&
5050  (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
5051  break;
5052  }
5053 
5054  Tentative = IDom->getTerminator();
5055  }
5056 
5057  return IP;
5058 }
5059 
5060 /// Determine an input position which will be dominated by the operands and
5061 /// which will dominate the result.
5063 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
5064  const LSRFixup &LF,
5065  const LSRUse &LU,
5066  SCEVExpander &Rewriter) const {
5067  // Collect some instructions which must be dominated by the
5068  // expanding replacement. These must be dominated by any operands that
5069  // will be required in the expansion.
5071  if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
5072  Inputs.push_back(I);
5073  if (LU.Kind == LSRUse::ICmpZero)
5074  if (Instruction *I =
5075  dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
5076  Inputs.push_back(I);
5077  if (LF.PostIncLoops.count(L)) {
5078  if (LF.isUseFullyOutsideLoop(L))
5079  Inputs.push_back(L->getLoopLatch()->getTerminator());
5080  else
5081  Inputs.push_back(IVIncInsertPos);
5082  }
5083  // The expansion must also be dominated by the increment positions of any
5084  // loops it for which it is using post-inc mode.
5085  for (const Loop *PIL : LF.PostIncLoops) {
5086  if (PIL == L) continue;
5087 
5088  // Be dominated by the loop exit.
5089  SmallVector<BasicBlock *, 4> ExitingBlocks;
5090  PIL->getExitingBlocks(ExitingBlocks);
5091  if (!ExitingBlocks.empty()) {
5092  BasicBlock *BB = ExitingBlocks[0];
5093  for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
5094  BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
5095  Inputs.push_back(BB->getTerminator());
5096  }
5097  }
5098 
5099  assert(!isa<PHINode>(LowestIP) && !LowestIP->isEHPad()
5100  && !isa<DbgInfoIntrinsic>(LowestIP) &&
5101  "Insertion point must be a normal instruction");
5102 
5103  // Then, climb up the immediate dominator tree as far as we can go while
5104  // still being dominated by the input positions.
5105  BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
5106 
5107  // Don't insert instructions before PHI nodes.
5108  while (isa<PHINode>(IP)) ++IP;
5109 
5110  // Ignore landingpad instructions.
5111  while (IP->isEHPad()) ++IP;
5112 
5113  // Ignore debug intrinsics.
5114  while (isa<DbgInfoIntrinsic>(IP)) ++IP;
5115 
5116  // Set IP below instructions recently inserted by SCEVExpander. This keeps the
5117  // IP consistent across expansions and allows the previously inserted
5118  // instructions to be reused by subsequent expansion.
5119  while (Rewriter.isInsertedInstruction(&*IP) && IP != LowestIP)
5120  ++IP;
5121 
5122  return IP;
5123 }
5124 
5125 /// Emit instructions for the leading candidate expression for this LSRUse (this
5126 /// is called "expanding").
5127 Value *LSRInstance::Expand(const LSRUse &LU, const LSRFixup &LF,
5128  const Formula &F, BasicBlock::iterator IP,
5129  SCEVExpander &Rewriter,
5130  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5131  if (LU.RigidFormula)
5132  return LF.OperandValToReplace;
5133 
5134  // Determine an input position which will be dominated by the operands and
5135  // which will dominate the result.
5136  IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
5137  Rewriter.setInsertPoint(&*IP);
5138 
5139  // Inform the Rewriter if we have a post-increment use, so that it can
5140  // perform an advantageous expansion.
5141  Rewriter.setPostInc(LF.PostIncLoops);
5142 
5143  // This is the type that the user actually needs.
5144  Type *OpTy = LF.OperandValToReplace->getType();
5145  // This will be the type that we'll initially expand to.
5146  Type *Ty = F.getType();
5147  if (!Ty)
5148  // No type known; just expand directly to the ultimate type.
5149  Ty = OpTy;
5150  else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
5151  // Expand directly to the ultimate type if it's the right size.
5152  Ty = OpTy;
5153  // This is the type to do integer arithmetic in.
5154  Type *IntTy = SE.getEffectiveSCEVType(Ty);
5155 
5156  // Build up a list of operands to add together to form the full base.
5158 
5159  // Expand the BaseRegs portion.
5160  for (const SCEV *Reg : F.BaseRegs) {
5161  assert(!Reg->isZero() && "Zero allocated in a base register!");
5162 
5163  // If we're expanding for a post-inc user, make the post-inc adjustment.
5164  Reg = denormalizeForPostIncUse(Reg, LF.PostIncLoops, SE);
5165  Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, nullptr)));
5166  }
5167 
5168  // Expand the ScaledReg portion.
5169  Value *ICmpScaledV = nullptr;
5170  if (F.Scale != 0) {
5171  const SCEV *ScaledS = F.ScaledReg;
5172 
5173  // If we're expanding for a post-inc user, make the post-inc adjustment.
5174  PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
5175  ScaledS = denormalizeForPostIncUse(ScaledS, Loops, SE);
5176 
5177  if (LU.Kind == LSRUse::ICmpZero) {
5178  // Expand ScaleReg as if it was part of the base regs.
5179  if (F.Scale == 1)
5180  Ops.push_back(
5181  SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr)));
5182  else {
5183  // An interesting way of "folding" with an icmp is to use a negated
5184  // scale, which we'll implement by inserting it into the other operand
5185  // of the icmp.
5186  assert(F.Scale == -1 &&
5187  "The only scale supported by ICmpZero uses is -1!");
5188  ICmpScaledV = Rewriter.expandCodeFor(ScaledS, nullptr);
5189  }
5190  } else {
5191  // Otherwise just expand the scaled register and an explicit scale,
5192  // which is expected to be matched as part of the address.
5193 
5194  // Flush the operand list to suppress SCEVExpander hoisting address modes.
5195  // Unless the addressing mode will not be folded.
5196  if (!Ops.empty() && LU.Kind == LSRUse::Address &&
5197  isAMCompletelyFolded(TTI, LU, F)) {
5198  Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), nullptr);
5199  Ops.clear();
5200  Ops.push_back(SE.getUnknown(FullV));
5201  }
5202  ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr));
5203  if (F.Scale != 1)
5204  ScaledS =
5205  SE.getMulExpr(ScaledS, SE.getConstant(ScaledS->getType(), F.Scale));
5206  Ops.push_back(ScaledS);
5207  }
5208  }
5209 
5210  // Expand the GV portion.
5211  if (F.BaseGV) {
5212  // Flush the operand list to suppress SCEVExpander hoisting.
5213  if (!Ops.empty()) {
5214  Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
5215  Ops.clear();
5216  Ops.push_back(SE.getUnknown(FullV));
5217  }
5218  Ops.push_back(SE.getUnknown(F.BaseGV));
5219  }
5220 
5221  // Flush the operand list to suppress SCEVExpander hoisting of both folded and
5222  // unfolded offsets. LSR assumes they both live next to their uses.
5223  if (!Ops.empty()) {
5224  Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
5225  Ops.clear();
5226  Ops.push_back(SE.getUnknown(FullV));
5227  }
5228 
5229  // Expand the immediate portion.
5230  int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
5231  if (Offset != 0) {
5232  if (LU.Kind == LSRUse::ICmpZero) {
5233  // The other interesting way of "folding" with an ICmpZero is to use a
5234  // negated immediate.
5235  if (!ICmpScaledV)
5236  ICmpScaledV = ConstantInt::get(IntTy, -(uint64_t)Offset);
5237  else {
5238  Ops.push_back(SE.getUnknown(ICmpScaledV));
5239  ICmpScaledV = ConstantInt::get(IntTy, Offset);
5240  }
5241  } else {
5242  // Just add the immediate values. These again are expected to be matched
5243  // as part of the address.
5244  Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy, Offset)));
5245  }
5246  }
5247 
5248  // Expand the unfolded offset portion.
5249  int64_t UnfoldedOffset = F.UnfoldedOffset;
5250  if (UnfoldedOffset != 0) {
5251  // Just add the immediate values.
5253  UnfoldedOffset)));
5254  }
5255 
5256  // Emit instructions summing all the operands.
5257  const SCEV *FullS = Ops.empty() ?
5258  SE.getConstant(IntTy, 0) :
5259  SE.getAddExpr(Ops);
5260  Value *FullV = Rewriter.expandCodeFor(FullS, Ty);
5261 
5262  // We're done expanding now, so reset the rewriter.
5263  Rewriter.clearPostInc();
5264 
5265  // An ICmpZero Formula represents an ICmp which we're handling as a
5266  // comparison against zero. Now that we've expanded an expression for that
5267  // form, update the ICmp's other operand.
5268  if (LU.Kind == LSRUse::ICmpZero) {
5269  ICmpInst *CI = cast<ICmpInst>(LF.UserInst);
5270  DeadInsts.emplace_back(CI->getOperand(1));
5271  assert(!F.BaseGV && "ICmp does not support folding a global value and "
5272  "a scale at the same time!");
5273  if (F.Scale == -1) {
5274  if (ICmpScaledV->getType() != OpTy) {
5275  Instruction *Cast =
5276  CastInst::Create(CastInst::getCastOpcode(ICmpScaledV, false,
5277  OpTy, false),
5278  ICmpScaledV, OpTy, "tmp", CI);
5279  ICmpScaledV = Cast;
5280  }
5281  CI->setOperand(1, ICmpScaledV);
5282  } else {
5283  // A scale of 1 means that the scale has been expanded as part of the
5284  // base regs.
5285  assert((F.Scale == 0 || F.Scale == 1) &&
5286  "ICmp does not support folding a global value and "
5287  "a scale at the same time!");
5289  -(uint64_t)Offset);
5290  if (C->getType() != OpTy)
5292  OpTy, false),
5293  C, OpTy);
5294 
5295  CI->setOperand(1, C);
5296  }
5297  }
5298 
5299  return FullV;
5300 }
5301 
5302 /// Helper for Rewrite. PHI nodes are special because the use of their operands
5303 /// effectively happens in their predecessor blocks, so the expression may need
5304 /// to be expanded in multiple places.
5305 void LSRInstance::RewriteForPHI(
5306  PHINode *PN, const LSRUse &LU, const LSRFixup &LF, const Formula &F,
5307  SCEVExpander &Rewriter, SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5309  for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
5310  if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
5311  bool needUpdateFixups = false;
5312  BasicBlock *BB = PN->getIncomingBlock(i);
5313 
5314  // If this is a critical edge, split the edge so that we do not insert
5315  // the code on all predecessor/successor paths. We do this unless this
5316  // is the canonical backedge for this loop, which complicates post-inc
5317  // users.
5318  if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 &&
5319  !isa<IndirectBrInst>(BB->getTerminator()) &&
5320  !isa<CatchSwitchInst>(BB->getTerminator())) {
5321  BasicBlock *Parent = PN->getParent();
5322  Loop *PNLoop = LI.getLoopFor(Parent);
5323  if (!PNLoop || Parent != PNLoop->getHeader()) {
5324  // Split the critical edge.
5325  BasicBlock *NewBB = nullptr;
5326  if (!Parent->isLandingPad()) {
5327  NewBB = SplitCriticalEdge(BB, Parent,
5329  .setMergeIdenticalEdges()
5330  .setKeepOneInputPHIs());
5331  } else {
5333  SplitLandingPadPredecessors(Parent, BB, "", "", NewBBs, &DT, &LI);
5334  NewBB = NewBBs[0];
5335  }
5336  // If NewBB==NULL, then SplitCriticalEdge refused to split because all
5337  // phi predecessors are identical. The simple thing to do is skip
5338  // splitting in this case rather than complicate the API.
5339  if (NewBB) {
5340  // If PN is outside of the loop and BB is in the loop, we want to
5341  // move the block to be immediately before the PHI block, not
5342  // immediately after BB.
5343  if (L->contains(BB) && !L->contains(PN))
5344  NewBB->moveBefore(PN->getParent());
5345 
5346  // Splitting the edge can reduce the number of PHI entries we have.
5347  e = PN->getNumIncomingValues();
5348  BB = NewBB;
5349  i = PN->getBasicBlockIndex(BB);
5350 
5351  needUpdateFixups = true;
5352  }
5353  }
5354  }
5355 
5356  std::pair<DenseMap<BasicBlock *, Value *>::iterator, bool> Pair =
5357  Inserted.insert(std::make_pair(BB, static_cast<Value *>(nullptr)));
5358  if (!Pair.second)
5359  PN->setIncomingValue(i, Pair.first->second);
5360  else {
5361  Value *FullV = Expand(LU, LF, F, BB->getTerminator()->getIterator(),
5362  Rewriter, DeadInsts);
5363 
5364  // If this is reuse-by-noop-cast, insert the noop cast.
5365  Type *OpTy = LF.OperandValToReplace->getType();
5366  if (FullV->getType() != OpTy)
5367  FullV =
5369  OpTy, false),
5370  FullV, LF.OperandValToReplace->getType(),
5371  "tmp", BB->getTerminator());
5372 
5373  PN->setIncomingValue(i, FullV);
5374  Pair.first->second = FullV;
5375  }
5376 
5377  // If LSR splits critical edge and phi node has other pending
5378  // fixup operands, we need to update those pending fixups. Otherwise
5379  // formulae will not be implemented completely and some instructions
5380  // will not be eliminated.
5381  if (needUpdateFixups) {
5382  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx)
5383  for (LSRFixup &Fixup : Uses[LUIdx].Fixups)
5384  // If fixup is supposed to rewrite some operand in the phi
5385  // that was just updated, it may be already moved to
5386  // another phi node. Such fixup requires update.
5387  if (Fixup.UserInst == PN) {
5388  // Check if the operand we try to replace still exists in the
5389  // original phi.
5390  bool foundInOriginalPHI = false;
5391  for (const auto &val : PN->incoming_values())
5392  if (val == Fixup.OperandValToReplace) {
5393  foundInOriginalPHI = true;
5394  break;
5395  }
5396 
5397  // If fixup operand found in original PHI - nothing to do.
5398  if (foundInOriginalPHI)
5399  continue;
5400 
5401  // Otherwise it might be moved to another PHI and requires update.
5402  // If fixup operand not found in any of the incoming blocks that
5403  // means we have already rewritten it - nothing to do.
5404  for (const auto &Block : PN->blocks())
5405  for (BasicBlock::iterator I = Block->begin(); isa<PHINode>(I);
5406  ++I) {
5407  PHINode *NewPN = cast<PHINode>(I);
5408  for (const auto &val : NewPN->incoming_values())
5409  if (val == Fixup.OperandValToReplace)
5410  Fixup.UserInst = NewPN;
5411  }
5412  }
5413  }
5414  }
5415 }
5416 
5417 /// Emit instructions for the leading candidate expression for this LSRUse (this
5418 /// is called "expanding"), and update the UserInst to reference the newly
5419 /// expanded value.
5420 void LSRInstance::Rewrite(const LSRUse &LU, const LSRFixup &LF,
5421  const Formula &F, SCEVExpander &Rewriter,
5422  SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5423  // First, find an insertion point that dominates UserInst. For PHI nodes,
5424  // find the nearest block which dominates all the relevant uses.
5425  if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
5426  RewriteForPHI(PN, LU, LF, F, Rewriter, DeadInsts);
5427  } else {
5428  Value *FullV =
5429  Expand(LU, LF, F, LF.UserInst->getIterator(), Rewriter, DeadInsts);
5430 
5431  // If this is reuse-by-noop-cast, insert the noop cast.
5432  Type *OpTy = LF.OperandValToReplace->getType();
5433  if (FullV->getType() != OpTy) {
5434  Instruction *Cast =
5435  CastInst::Create(CastInst::getCastOpcode(FullV, false, OpTy, false),
5436  FullV, OpTy, "tmp", LF.UserInst);
5437  FullV = Cast;
5438  }
5439 
5440  // Update the user. ICmpZero is handled specially here (for now) because
5441  // Expand may have updated one of the operands of the icmp already, and
5442  // its new value may happen to be equal to LF.OperandValToReplace, in
5443  // which case doing replaceUsesOfWith leads to replacing both operands
5444  // with the same value. TODO: Reorganize this.
5445  if (LU.Kind == LSRUse::ICmpZero)
5446  LF.UserInst->setOperand(0, FullV);
5447  else
5448  LF.UserInst->replaceUsesOfWith(LF.OperandValToReplace, FullV);
5449  }
5450 
5451  DeadInsts.emplace_back(LF.OperandValToReplace);
5452 }
5453 
5454 /// Rewrite all the fixup locations with new values, following the chosen
5455 /// solution.
5456 void LSRInstance::ImplementSolution(
5457  const SmallVectorImpl<const Formula *> &Solution) {
5458  // Keep track of instructions we may have made dead, so that
5459  // we can remove them after we are done working.
5461 
5463  "lsr");
5464 #ifndef NDEBUG
5465  Rewriter.setDebugType(DEBUG_TYPE);
5466 #endif
5467  Rewriter.disableCanonicalMode();
5468  Rewriter.enableLSRMode();
5469  Rewriter.setIVIncInsertPos(L, IVIncInsertPos);
5470 
5471  // Mark phi nodes that terminate chains so the expander tries to reuse them.
5472  for (const IVChain &Chain : IVChainVec) {
5473  if (PHINode *PN = dyn_cast<PHINode>(Chain.tailUserInst()))
5474  Rewriter.setChainedPhi(PN);
5475  }
5476 
5477  // Expand the new value definitions and update the users.
5478  for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx)
5479  for (const LSRFixup &Fixup : Uses[LUIdx].Fixups) {
5480  Rewrite(Uses[LUIdx], Fixup, *Solution[LUIdx], Rewriter, DeadInsts);
5481  Changed = true;
5482  }
5483 
5484  for (const IVChain &Chain : IVChainVec) {
5485  GenerateIVChain(Chain, Rewriter, DeadInsts);
5486  Changed = true;
5487  }
5488  // Clean up after ourselves. This must be done before deleting any
5489  // instructions.
5490  Rewriter.clear();
5491 
5492  Changed |= DeleteTriviallyDeadInstructions(DeadInsts);
5493 }
5494 
5495 LSRInstance::LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE,
5496  DominatorTree &DT, LoopInfo &LI,
5497  const TargetTransformInfo &TTI, AssumptionCache &AC,
5498  TargetLibraryInfo &LibInfo)
5499  : IU(IU), SE(SE), DT(DT), LI(LI), AC(AC), LibInfo(LibInfo), TTI(TTI), L(L),
5500  FavorBackedgeIndex(EnableBackedgeIndexing &&
5501  TTI.shouldFavorBackedgeIndex(L)) {
5502  // If LoopSimplify form is not available, stay out of trouble.
5503  if (!L->isLoopSimplifyForm())
5504  return;
5505 
5506  // If there's no interesting work to be done, bail early.
5507  if (IU.empty()) return;
5508 
5509  // If there's too much analysis to be done, bail early. We won't be able to
5510  // model the problem anyway.
5511  unsigned NumUsers = 0;
5512  for (const IVStrideUse &U : IU) {
5513  if (++NumUsers > MaxIVUsers) {
5514  (void)U;
5515  LLVM_DEBUG(dbgs() << "LSR skipping loop, too many IV Users in " << U
5516  << "\n");
5517  return;
5518  }
5519  // Bail out if we have a PHI on an EHPad that gets a value from a
5520  // CatchSwitchInst. Because the CatchSwitchInst cannot be split, there is
5521  // no good place to stick any instructions.
5522  if (auto *PN = dyn_cast<PHINode>(U.getUser())) {
5523  auto *FirstNonPHI = PN->getParent()->getFirstNonPHI();
5524  if (isa<FuncletPadInst>(FirstNonPHI) ||
5525  isa<CatchSwitchInst>(FirstNonPHI))
5526  for (BasicBlock *PredBB : PN->blocks())
5527  if (isa<CatchSwitchInst>(PredBB->getFirstNonPHI()))
5528  return;
5529  }
5530  }
5531 
5532 #ifndef NDEBUG
5533  // All dominating loops must have preheaders, or SCEVExpander may not be able
5534  // to materialize an AddRecExpr whose Start is an outer AddRecExpr.
5535  //
5536  // IVUsers analysis should only create users that are dominated by simple loop
5537  // headers. Since this loop should dominate all of its users, its user list
5538  // should be empty if this loop itself is not within a simple loop nest.
5539  for (DomTreeNode *Rung = DT.getNode(L->getLoopPreheader());
5540  Rung; Rung = Rung->getIDom()) {
5541  BasicBlock *BB = Rung->getBlock();
5542  const Loop *DomLoop = LI.getLoopFor(BB);
5543  if (DomLoop && DomLoop->getHeader() == BB) {
5544  assert(DomLoop->getLoopPreheader() && "LSR needs a simplified loop nest");
5545  }
5546  }
5547 #endif // DEBUG
5548 
5549  LLVM_DEBUG(dbgs() << "\nLSR on loop ";
5550  L->getHeader()->printAsOperand(dbgs(), /*PrintType=*/false);
5551  dbgs() << ":\n");
5552 
5553  // First, perform some low-level loop optimizations.
5554  OptimizeShadowIV();
5555  OptimizeLoopTermCond();
5556 
5557  // If loop preparation eliminates all interesting IV users, bail.
5558  if (IU.empty()) return;
5559 
5560  // Skip nested loops until we can model them better with formulae.
5561  if (!L->empty()) {
5562  LLVM_DEBUG(dbgs() << "LSR skipping outer loop " << *L << "\n");
5563  return;
5564  }
5565 
5566  // Start collecting data and preparing for the solver.
5567  CollectChains();
5568  CollectInterestingTypesAndFactors();
5569  CollectFixupsAndInitialFormulae();
5570  CollectLoopInvariantFixupsAndFormulae();
5571 
5572  if (Uses.empty())
5573  return;
5574 
5575  LLVM_DEBUG(dbgs() << "LSR found " << Uses.size() << " uses:\n";
5576  print_uses(dbgs()));
5577 
5578  // Now use the reuse data to generate a bunch of interesting ways
5579  // to formulate the values needed for the uses.
5580  GenerateAllReuseFormulae();
5581 
5582  FilterOutUndesirableDedicatedRegisters();
5583  NarrowSearchSpaceUsingHeuristics();
5584 
5586  Solve(Solution);
5587 
5588  // Release memory that is no longer needed.
5589  Factors.clear();
5590  Types.clear();
5591  RegUses.clear();
5592 
5593  if (Solution.empty())
5594  return;
5595 
5596 #ifndef NDEBUG
5597  // Formulae should be legal.
5598  for (const LSRUse &LU : Uses) {
5599  for (const Formula &F : LU.Formulae)
5600  assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
5601  F) && "Illegal formula generated!");
5602  };
5603 #endif
5604 
5605  // Now that we've decided what we want, make it so.
5606  ImplementSolution(Solution);
5607 }
5608 
5609 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
5610 void LSRInstance::print_factors_and_types(raw_ostream &OS) const {
5611  if (Factors.empty() && Types.empty()) return;
5612 
5613  OS << "LSR has identified the following interesting factors and types: ";
5614  bool First = true;
5615 
5616  for (int64_t Factor : Factors) {
5617  if (!First) OS << ", ";
5618  First = false;
5619  OS << '*' << Factor;
5620  }
5621 
5622  for (Type *Ty : Types) {
5623  if (!First) OS << ", ";
5624  First = false;
5625  OS << '(' << *Ty << ')';
5626  }
5627  OS << '\n';
5628 }
5629 
5630 void LSRInstance::print_fixups(raw_ostream &OS) const {
5631  OS << "LSR is examining the following fixup sites:\n";
5632  for (const LSRUse &LU : Uses)
5633  for (const LSRFixup &LF : LU.Fixups) {
5634  dbgs() << " ";
5635  LF.print(OS);
5636  OS << '\n';
5637  }
5638 }
5639 
5640 void LSRInstance::print_uses(raw_ostream &OS) const {
5641  OS << "LSR is examining the following uses:\n";
5642  for (const LSRUse &LU : Uses) {
5643  dbgs() << " ";
5644  LU.print(OS);
5645  OS << '\n';
5646  for (const Formula &F : LU.Formulae) {
5647  OS << " ";
5648  F.print(OS);
5649  OS << '\n';
5650  }
5651  }
5652 }
5653 
5654 void LSRInstance::print(raw_ostream &OS) const {
5655  print_factors_and_types(OS);
5656  print_fixups(OS);
5657  print_uses(OS);
5658 }
5659 
5660 LLVM_DUMP_METHOD void LSRInstance::dump() const {
5661  print(errs()); errs() << '\n';
5662 }
5663 #endif
5664 
5665 namespace {
5666 
5667 class LoopStrengthReduce : public LoopPass {
5668 public:
5669  static char ID; // Pass ID, replacement for typeid
5670 
5671  LoopStrengthReduce();
5672 
5673 private:
5674  bool runOnLoop(Loop *L, LPPassManager &LPM) override;
5675  void getAnalysisUsage(AnalysisUsage &AU) const override;
5676 };
5677 
5678 } // end anonymous namespace
5679 
5680 LoopStrengthReduce::LoopStrengthReduce() : LoopPass(ID) {
5682 }
5683 
5684 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
5685  // We split critical edges, so we change the CFG. However, we do update
5686  // many analyses if they are around.
5688 
5698  // Requiring LoopSimplify a second time here prevents IVUsers from running
5699  // twice, since LoopSimplify was invalidated by running ScalarEvolution.
5704 }
5705 
5707  DominatorTree &DT, LoopInfo &LI,
5708  const TargetTransformInfo &TTI,
5709  AssumptionCache &AC,
5710  TargetLibraryInfo &LibInfo) {
5711 
5712  bool Changed = false;
5713 
5714  // Run the main LSR transformation.
5715  Changed |= LSRInstance(L, IU, SE, DT, LI, TTI, AC, LibInfo).getChanged();
5716 
5717  // Remove any extra phis created by processing inner loops.
5718  Changed |= DeleteDeadPHIs(L->getHeader());
5719  if (EnablePhiElim && L->isLoopSimplifyForm()) {
5721  const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
5722  SCEVExpander Rewriter(SE, DL, "lsr");
5723 #ifndef NDEBUG
5724  Rewriter.setDebugType(DEBUG_TYPE);
5725 #endif
5726  unsigned numFolded = Rewriter.replaceCongruentIVs(L, &DT, DeadInsts, &TTI);
5727  if (numFolded) {
5728  Changed = true;
5730  DeleteDeadPHIs(L->getHeader());
5731  }
5732  }
5733  return Changed;
5734 }
5735 
5736 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager & /*LPM*/) {
5737  if (skipLoop(L))
5738  return false;
5739 
5740  auto &IU = getAnalysis<IVUsersWrapperPass>().getIU();
5741  auto &SE = getAnalysis<ScalarEvolutionWrapperPass>().getSE();
5742  auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
5743  auto &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
5744  const auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
5745  *L->getHeader()->getParent());
5746  auto &AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(
5747  *L->getHeader()->getParent());
5748  auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(
5749  *L->getHeader()->getParent());
5750  return ReduceLoopStrength(L, IU, SE, DT, LI, TTI, AC, LibInfo);
5751 }
5752 
5755  LPMUpdater &) {
5756  if (!ReduceLoopStrength(&L, AM.getResult<IVUsersAnalysis>(L, AR), AR.SE,
5757  AR.DT, AR.LI, AR.TTI, AR.AC, AR.TLI))
5758  return PreservedAnalyses::all();
5759 
5761 }
5762 
5763 char LoopStrengthReduce::ID = 0;
5764 
5765