LLVM  10.0.0svn
Macros | Functions | Variables
SIOptimizeExecMaskingPreRA.cpp File Reference

This pass removes redundant S_OR_B64 instructions enabling lanes in the exec. More...

#include "AMDGPU.h"
#include "AMDGPUSubtarget.h"
#include "SIInstrInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
Include dependency graph for SIOptimizeExecMaskingPreRA.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "si-optimize-exec-masking-pre-ra"
 

Functions

 INITIALIZE_PASS_BEGIN (SIOptimizeExecMaskingPreRA, DEBUG_TYPE, "SI optimize exec mask operations pre-RA", false, false) INITIALIZE_PASS_END(SIOptimizeExecMaskingPreRA
 
static bool isEndCF (const MachineInstr &MI, const SIRegisterInfo *TRI, const GCNSubtarget &ST)
 
static bool isFullExecCopy (const MachineInstr &MI, const GCNSubtarget &ST)
 
static unsigned getOrNonExecReg (const MachineInstr &MI, const SIInstrInfo &TII, const GCNSubtarget &ST)
 
static MachineInstrgetOrExecSource (const MachineInstr &MI, const SIInstrInfo &TII, const MachineRegisterInfo &MRI, const GCNSubtarget &ST)
 
static unsigned optimizeVcndVcmpPair (MachineBasicBlock &MBB, const GCNSubtarget &ST, MachineRegisterInfo &MRI, LiveIntervals *LIS)
 

Variables

 DEBUG_TYPE
 
SI optimize exec mask operations pre RA
 
SI optimize exec mask operations pre false
 

Detailed Description

This pass removes redundant S_OR_B64 instructions enabling lanes in the exec.

If two SI_END_CF (lowered as S_OR_B64) come together without any vector instructions between them we can only keep outer SI_END_CF, given that CFG is structured and exec bits of the outer end statement are always not less than exec bit of the inner one.

This needs to be done before the RA to eliminate saved exec bits registers but after register coalescer to have no vector registers copies in between of different end cf statements.

Definition in file SIOptimizeExecMaskingPreRA.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "si-optimize-exec-masking-pre-ra"

Definition at line 31 of file SIOptimizeExecMaskingPreRA.cpp.

Function Documentation

◆ getOrExecSource()

static MachineInstr* getOrExecSource ( const MachineInstr MI,
const SIInstrInfo TII,
const MachineRegisterInfo MRI,
const GCNSubtarget ST 
)
static

◆ getOrNonExecReg()

static unsigned getOrNonExecReg ( const MachineInstr MI,
const SIInstrInfo TII,
const GCNSubtarget ST 
)
static

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( SIOptimizeExecMaskingPreRA  ,
DEBUG_TYPE  ,
"SI optimize exec mask operations pre-RA ,
false  ,
false   
)

◆ isEndCF()

static bool isEndCF ( const MachineInstr MI,
const SIRegisterInfo TRI,
const GCNSubtarget ST 
)
static

◆ isFullExecCopy()

static bool isFullExecCopy ( const MachineInstr MI,
const GCNSubtarget ST 
)
static

◆ optimizeVcndVcmpPair()

static unsigned optimizeVcndVcmpPair ( MachineBasicBlock MBB,
const GCNSubtarget ST,
MachineRegisterInfo MRI,
LiveIntervals LIS 
)
static

Definition at line 188 of file SIOptimizeExecMaskingPreRA.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::back(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::LiveIntervals::createAndComputeVirtRegInterval(), llvm::dbgs(), E, llvm::MachineBasicBlock::empty(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::find_if(), llvm::SIRegisterInfo::findReachingDef(), llvm::MachineFunction::getFunction(), llvm::MachineOperand::getImm(), llvm::GCNSubtarget::getInstrInfo(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::SIInstrInfo::getNamedOperand(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), getOrExecSource(), getOrNonExecReg(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::GCNSubtarget::getRegisterInfo(), llvm::MachineOperand::getSubReg(), llvm::MachineFunction::getSubtarget(), llvm::SIInstrInfo::hasModifiersSet(), llvm::LiveIntervals::InsertMachineInstrInMaps(), isEndCF(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::Register::isVirtualRegister(), llvm::GCNSubtarget::isWave32(), LLVM_DEBUG, MI, MRI, llvm::none_of(), llvm::SmallVectorImpl< T >::pop_back_val(), Reg, llvm::MachineRegisterInfo::reg_empty(), llvm::LiveIntervals::removeAllRegUnitsForPhysReg(), llvm::LiveIntervals::removeInterval(), llvm::LiveIntervals::RemoveMachineInstrFromMaps(), llvm::MachineRegisterInfo::replaceRegWith(), llvm::skipDebugInstructionsForward(), llvm::ARM_MB::ST, llvm::MachineBasicBlock::succ_empty(), llvm::MachineBasicBlock::succ_size(), std::swap(), llvm::MachineBasicBlock::terminators(), TII, TRI, and llvm::MachineRegisterInfo::use_nodbg_instructions().

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 74 of file SIOptimizeExecMaskingPreRA.cpp.

◆ false

SI optimize exec mask operations pre false

Definition at line 74 of file SIOptimizeExecMaskingPreRA.cpp.

◆ RA

SI optimize exec mask operations pre RA

Definition at line 74 of file SIOptimizeExecMaskingPreRA.cpp.

Referenced by addLiveInRegs(), addSaveRestoreRegs(), llvm::rdf::DataFlowGraph::build(), CheckXWPInstr(), llvm::FunctionComparator::cmpConstants(), llvm::FunctionComparator::cmpMem(), llvm::rdf::DeadCodeElimination::collect(), CompareSCEVComplexity(), CompareValueComplexity(), llvm::SelectionDAG::computeKnownBits(), computeKnownBitsFromOperator(), llvm::rdf::Liveness::computeLiveIns(), ConsecutiveRegisters(), countMCSymbolRefExpr(), createMipsMCRegisterInfo(), createPPCMCRegisterInfo(), createX86MCRegisterInfo(), DecodeRegListOperand(), DecodeRegListOperand16(), llvm::MipsAsmPrinter::EmitStartOfAsmFile(), llvm::rdf::DeadCodeElimination::erase(), llvm::rdf::PhysicalRegisterInfo::getAliasSet(), getExactSDiv(), llvm::rdf::RefNode::getNextRef(), llvm::rdf::DataFlowGraph::getNextRelated(), llvm::rdf::DataFlowGraph::getNextShadow(), getRegisterForMxtrC0(), getRegisterForMxtrFP(), llvm::MipsRegisterInfo::getReservedRegs(), getRetComponentType(), llvm::rdf::PhysicalRegisterInfo::getTRI(), llvm::rdf::DataFlowGraph::id(), INITIALIZE_PASS(), llvm::rdf::CopyPropagation::interpretAsCopy(), llvm::MipsSEInstrInfo::loadImmediate(), lowerFABS64(), nextReg(), DeadCodeElimination::SetQueue< T >::push_back(), RefineErrorLoc(), llvm::object::resolveRISCV(), ShrinkDemandedConstant(), llvm::ScalarEvolution::SimplifyICmpOperands(), llvm::Mips16FrameLowering::spillCalleeSavedRegisters(), llvm::MipsSEFrameLowering::spillCalleeSavedRegisters(), and llvm::rdf::DataFlowGraph::unpack().