LLVM  6.0.0svn
Macros | Enumerations | Functions
X86MCCodeEmitter.cpp File Reference
#include "MCTargetDesc/X86BaseInfo.h"
#include "MCTargetDesc/X86FixupKinds.h"
#include "MCTargetDesc/X86MCTargetDesc.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixup.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <cstdlib>
Include dependency graph for X86MCCodeEmitter.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "mccodeemitter"
 

Enumerations

enum  GlobalOffsetTableExprKind { GOT_None, GOT_Normal, GOT_SymDiff }
 StartsWithGlobalOffsetTable - Check if this expression starts with GLOBAL_OFFSET_TABLE and if it is of the form GLOBAL_OFFSET_TABLE-symbol. More...
 

Functions

static bool isDisp8 (int Value)
 isDisp8 - Return true if this signed displacement fits in a 8-bit sign-extended field. More...
 
static bool isCDisp8 (uint64_t TSFlags, int Value, int &CValue)
 isCDisp8 - Return true if this signed displacement fits in a 8-bit compressed dispacement field. More...
 
static MCFixupKind getImmFixupKind (uint64_t TSFlags)
 getImmFixupKind - Return the appropriate fixup kind to use for an immediate in an instruction with the specified TSFlags. More...
 
static bool Is32BitMemOperand (const MCInst &MI, unsigned Op)
 Is32BitMemOperand - Return true if the specified instruction has a 32-bit memory operand. More...
 
static bool Is64BitMemOperand (const MCInst &MI, unsigned Op)
 Is64BitMemOperand - Return true if the specified instruction has a 64-bit memory operand. More...
 
static GlobalOffsetTableExprKind StartsWithGlobalOffsetTable (const MCExpr *Expr)
 
static bool HasSecRelSymbolRef (const MCExpr *Expr)
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "mccodeemitter"

Definition at line 36 of file X86MCCodeEmitter.cpp.

Enumeration Type Documentation

◆ GlobalOffsetTableExprKind

StartsWithGlobalOffsetTable - Check if this expression starts with GLOBAL_OFFSET_TABLE and if it is of the form GLOBAL_OFFSET_TABLE-symbol.

This is needed to support PIC on ELF i386 as GLOBAL_OFFSET_TABLE is magical. We check only simple case that are know to be used: GLOBAL_OFFSET_TABLE by itself or at the start of a binary expression.

Enumerator
GOT_None 
GOT_Normal 
GOT_SymDiff 

Definition at line 245 of file X86MCCodeEmitter.cpp.

Function Documentation

◆ getImmFixupKind()

static MCFixupKind getImmFixupKind ( uint64_t  TSFlags)
static

getImmFixupKind - Return the appropriate fixup kind to use for an immediate in an instruction with the specified TSFlags.

Definition at line 192 of file X86MCCodeEmitter.cpp.

References llvm::MCFixup::getKindForSize(), llvm::X86II::getSizeOfImm(), llvm::X86II::isImmPCRel(), llvm::X86II::isImmSigned(), isPCRel(), llvm_unreachable, llvm::X86::reloc_signed_4byte, and llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Size.

Referenced by HasSecRelSymbolRef().

◆ HasSecRelSymbolRef()

static bool HasSecRelSymbolRef ( const MCExpr Expr)
static

Definition at line 271 of file X86MCCodeEmitter.cpp.

References llvm::X86::AddrBaseReg, llvm::X86::AddrDisp, llvm::X86II::AddRegFrm, llvm::X86::AddrIndexReg, llvm::X86::AddrNumOperands, llvm::X86::AddrScaleAmt, llvm::X86::AddrSegmentReg, llvm::X86II::AdSize16, llvm::X86II::AdSize32, llvm::X86II::AdSizeMask, assert(), llvm::MCExpr::Binary, llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::MCOperand::createImm(), llvm::SIInstrFlags::DS, llvm::MCInst::dump(), llvm::N86::EBP, llvm::N86::EDI, llvm::X86II::EncodingMask, llvm::errs(), llvm::N86::ESI, llvm::N86::ESP, llvm::X86II::EVEX, llvm::X86II::EVEX_B, llvm::X86II::EVEX_K, llvm::X86II::EVEX_L2, llvm::X86II::EVEX_RC, llvm::X86II::EVEX_Z, llvm::FixupKind(), llvm::FK_Data_1, llvm::FK_Data_2, llvm::FK_Data_4, llvm::FK_Data_8, llvm::FK_PCRel_1, llvm::FK_PCRel_2, llvm::FK_PCRel_4, llvm::FK_SecRel_4, llvm::X86II::FormMask, llvm::X86II::getBaseOpcodeFor(), llvm::MCOperand::getExpr(), llvm::MCInst::getFlags(), llvm::MCOperand::getImm(), getImmFixupKind(), llvm::MCExpr::getKind(), llvm::MCSymbolRefExpr::getKind(), llvm::MCBinaryExpr::getLHS(), llvm::MCInst::getLoc(), llvm::X86II::getMemoryOperandNo(), llvm::MCInst::getNumOperands(), llvm::MCInstrDesc::getNumOperands(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::X86II::getOperandBias(), llvm::MCOperand::getReg(), llvm::MCBinaryExpr::getRHS(), llvm::X86II::getSizeOfImm(), GOT_None, GOT_Normal, llvm::X86II::Has3DNow0F0FOpcode, llvm::X86II::hasImm(), llvm::X86II::Imm8Reg, llvm::X86II::ImmMask, llvm::X86::IP_HAS_LOCK, llvm::X86::IP_HAS_REPEAT, llvm::X86::IP_HAS_REPEAT_NE, Is32BitMemOperand(), Is64BitMemOperand(), isCDisp8(), isDisp8(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), llvm::X86II::isX86_64NonExtLowByteReg(), Kind, llvm_unreachable, llvm::X86II::LOCK, MI, llvm::X86II::MRM0m, llvm::X86II::MRM0r, llvm::X86II::MRM1m, llvm::X86II::MRM1r, llvm::X86II::MRM2m, llvm::X86II::MRM2r, llvm::X86II::MRM3m, llvm::X86II::MRM3r, llvm::X86II::MRM4m, llvm::X86II::MRM4r, llvm::X86II::MRM5m, llvm::X86II::MRM5r, llvm::X86II::MRM6m, llvm::X86II::MRM6r, llvm::X86II::MRM7m, llvm::X86II::MRM7r, llvm::X86II::MRM_C0, llvm::X86II::MRM_C1, llvm::X86II::MRM_C2, llvm::X86II::MRM_C3, llvm::X86II::MRM_C4, llvm::X86II::MRM_C5, llvm::X86II::MRM_C6, llvm::X86II::MRM_C7, llvm::X86II::MRM_C8, llvm::X86II::MRM_C9, llvm::X86II::MRM_CA, llvm::X86II::MRM_CB, llvm::X86II::MRM_CC, llvm::X86II::MRM_CD, llvm::X86II::MRM_CE, llvm::X86II::MRM_CF, llvm::X86II::MRM_D0, llvm::X86II::MRM_D1, llvm::X86II::MRM_D2, llvm::X86II::MRM_D3, llvm::X86II::MRM_D4, llvm::X86II::MRM_D5, llvm::X86II::MRM_D6, llvm::X86II::MRM_D7, llvm::X86II::MRM_D8, llvm::X86II::MRM_D9, llvm::X86II::MRM_DA, llvm::X86II::MRM_DB, llvm::X86II::MRM_DC, llvm::X86II::MRM_DD, llvm::X86II::MRM_DE, llvm::X86II::MRM_DF, llvm::X86II::MRM_E0, llvm::X86II::MRM_E1, llvm::X86II::MRM_E2, llvm::X86II::MRM_E3, llvm::X86II::MRM_E4, llvm::X86II::MRM_E5, llvm::X86II::MRM_E6, llvm::X86II::MRM_E7, llvm::X86II::MRM_E8, llvm::X86II::MRM_E9, llvm::X86II::MRM_EA, llvm::X86II::MRM_EB, llvm::X86II::MRM_EC, llvm::X86II::MRM_ED, llvm::X86II::MRM_EE, llvm::X86II::MRM_EF, llvm::X86II::MRM_F0, llvm::X86II::MRM_F1, llvm::X86II::MRM_F2, llvm::X86II::MRM_F3, llvm::X86II::MRM_F4, llvm::X86II::MRM_F5, llvm::X86II::MRM_F6, llvm::X86II::MRM_F7, llvm::X86II::MRM_F8, llvm::X86II::MRM_F9, llvm::X86II::MRM_FA, llvm::X86II::MRM_FB, llvm::X86II::MRM_FC, llvm::X86II::MRM_FD, llvm::X86II::MRM_FE, llvm::X86II::MRM_FF, llvm::X86II::MRMDestMem, llvm::X86II::MRMDestReg, llvm::X86II::MRMSrcMem, llvm::X86II::MRMSrcMem4VOp3, llvm::X86II::MRMSrcMemOp4, llvm::X86II::MRMSrcReg, llvm::X86II::MRMSrcReg4VOp3, llvm::X86II::MRMSrcRegOp4, llvm::X86II::MRMXm, llvm::X86II::MRMXr, llvm::X86II::OpMapMask, llvm::X86II::OpPrefixMask, llvm::X86II::OpSize16, llvm::X86II::OpSize32, llvm::X86II::OpSizeMask, llvm::X86II::PD, llvm::X86II::PS, llvm::X86II::Pseudo, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::X86II::RawFrm, llvm::X86II::RawFrmDst, llvm::X86II::RawFrmDstSrc, llvm::X86II::RawFrmImm16, llvm::X86II::RawFrmImm8, llvm::X86II::RawFrmMemOffs, llvm::X86II::RawFrmSrc, llvm::X86::reloc_global_offset_table, llvm::X86::reloc_global_offset_table8, llvm::X86::reloc_riprel_4byte, llvm::X86::reloc_riprel_4byte_movq_load, llvm::X86::reloc_riprel_4byte_relax, llvm::X86::reloc_riprel_4byte_relax_rex, llvm::X86::reloc_signed_4byte, llvm::X86::reloc_signed_4byte_relax, llvm::X86II::REP, llvm::report_fatal_error(), llvm::MipsISD::Ret, llvm::X86II::REX_W, SI, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Size, StartsWithGlobalOffsetTable(), llvm::MCExpr::SymbolRef, llvm::X86II::T8, llvm::X86II::TA, llvm::X86II::TB, llvm::MCInstrDesc::TSFlags, llvm::X86II::VEX, llvm::X86II::VEX_4V, llvm::X86II::VEX_L, llvm::X86II::VEX_W, llvm::MCSymbolRefExpr::VK_SECREL, llvm::X86II::XD, llvm::X86II::XOP, llvm::X86II::XOP8, llvm::X86II::XOP9, llvm::X86II::XOPA, and llvm::X86II::XS.

◆ Is32BitMemOperand()

static bool Is32BitMemOperand ( const MCInst MI,
unsigned  Op 
)
static

Is32BitMemOperand - Return true if the specified instruction has a 32-bit memory operand.

Op specifies the operand # of the memoperand.

Definition at line 207 of file X86MCCodeEmitter.cpp.

References llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, assert(), llvm::MCInst::getOperand(), and llvm::MCOperand::getReg().

Referenced by HasSecRelSymbolRef().

◆ Is64BitMemOperand()

static bool Is64BitMemOperand ( const MCInst MI,
unsigned  Op 
)
static

Is64BitMemOperand - Return true if the specified instruction has a 64-bit memory operand.

Op specifies the operand # of the memoperand.

Definition at line 226 of file X86MCCodeEmitter.cpp.

References llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, llvm::MCInst::getOperand(), and llvm::MCOperand::getReg().

Referenced by HasSecRelSymbolRef().

◆ isCDisp8()

static bool isCDisp8 ( uint64_t  TSFlags,
int  Value,
int &  CValue 
)
static

isCDisp8 - Return true if this signed displacement fits in a 8-bit compressed dispacement field.

Definition at line 167 of file X86MCCodeEmitter.cpp.

References assert(), llvm::X86II::CD8_Scale_Mask, llvm::X86II::CD8_Scale_Shift, llvm::X86II::EncodingMask, llvm::X86II::EVEX, isDisp8(), llvm::BitmaskEnumDetail::Mask(), and llvm::MipsISD::Ret.

Referenced by HasSecRelSymbolRef().

◆ isDisp8()

static bool isDisp8 ( int  Value)
static

isDisp8 - Return true if this signed displacement fits in a 8-bit sign-extended field.

Definition at line 161 of file X86MCCodeEmitter.cpp.

Referenced by HasSecRelSymbolRef(), and isCDisp8().

◆ StartsWithGlobalOffsetTable()

static GlobalOffsetTableExprKind StartsWithGlobalOffsetTable ( const MCExpr Expr)
static