38#define DEBUG_TYPE "amdgpu-insert-single-use-vdst"
59 if (!ST.hasVGPRSingleUseHintInsts())
62 SII = ST.getInstrInfo();
64 bool InstructionEmitted =
false;
75 const auto [Unit, Mask] = *Units;
76 if ((Mask & Liveout.LaneMask).any())
77 RegisterUseCount[Unit] = 2;
84 bool AllProducerOperandsAreSingleUse =
true;
91 for (
const auto &Operand :
MI.all_defs()) {
92 const auto Reg = Operand.getReg();
94 const auto RegUnits =
TRI->regunits(Reg);
96 return RegisterUseCount[Unit] > 1;
98 AllProducerOperandsAreSingleUse =
false;
102 RegisterUseCount.
erase(Unit);
105 for (
const auto &Operand :
MI.all_uses()) {
106 const auto Reg = Operand.getReg();
114 for (
const MCRegUnit Unit : RegistersUsed)
115 RegisterUseCount[Unit]++;
118 if (
MI.modifiesRegister(AMDGPU::EXEC,
TRI)) {
119 for (
auto &UsedReg : RegisterUseCount)
125 emitSingleUseVDST(
MI);
126 InstructionEmitted =
true;
130 return InstructionEmitted;
135char AMDGPUInsertSingleUseVDST::ID = 0;
140 "AMDGPU Insert SingleUseVDST",
false,
false)
Provides AMDGPU specific target descriptions.
This file defines the DenseMap class.
AMD GCN specific subclass of TargetSubtarget.
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Interface definition for SIInstrInfo.
bool erase(const KeyT &Val)
MCRegUnitMaskIterator enumerates a list of register units and their associated lane masks for Reg.
bool isValid() const
Returns true if this iterator is not yet at the end.
iterator_range< liveout_iterator > liveouts() const
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Representation of each machine instruction.
const SIRegisterInfo & getRegisterInfo() const
static bool isVALU(const MachineInstr &MI)
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
char & AMDGPUInsertSingleUseVDSTID
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
auto reverse(ContainerTy &&C)
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.