22#define DEBUG_TYPE "codegen-common"
29StackProtectorDescriptor::addSuccessorMBB(
37 MF->
insert(++BBI, SuccMBB);
56 if (!
MI.isCopy() && !
MI.isImplicitDef()) {
61 if (
MI.isDebugInstr())
66 switch (
MI.getOpcode()) {
67 case TargetOpcode::G_TRUNC:
68 case TargetOpcode::G_ZEXT:
69 case TargetOpcode::G_ANYEXT:
70 case TargetOpcode::G_SEXT:
71 case TargetOpcode::G_MERGE_VALUES:
72 case TargetOpcode::G_UNMERGE_VALUES:
73 case TargetOpcode::G_CONCAT_VECTORS:
74 case TargetOpcode::G_BUILD_VECTOR:
75 case TargetOpcode::G_EXTRACT:
95 if (
MI.isImplicitDef())
102 &&
"Should have a copy implying we should have 2 arguments.");
106 if (!OPI2->
isReg() ||
130 if (SplitPoint == BB->
begin())
137 }
while (Previous != Start && Previous->isDebugInstr());
140 Previous->getOpcode() ==
TII.getCallFrameDestroyOpcode()) {
159 if (Previous->isCall())
161 }
while(Previous->getOpcode() !=
TII.getCallFrameSetupOpcode());
167 SplitPoint = Previous;
168 if (Previous == Start)
181 switch (
static_cast<unsigned>(InvertedTest)) {
210 return UseFCmp ? InvertedTest :
fcNone;
220 assert(Copy.getOpcode() == TargetOpcode::COPY &&
"Must be a COPY");
222 return &Copy.getOperand(1);
228 assert(Trunc.
getOpcode() == TargetOpcode::G_TRUNC &&
"Must be a G_TRUNC");
231 const auto ToLLT =
MRI.getType(Trunc.
defs().begin()->getReg());
234 if (!FromLLT.isScalar()) {
239 ToLLT.getSizeInBits(),
false);
240 Ops.
append(ExtOps.begin(), ExtOps.end());
247 switch (
MI.getOpcode()) {
248 case TargetOpcode::G_TRUNC:
250 case TargetOpcode::COPY:
263 const unsigned MaxExpressionSize = 128;
265 for (
auto *DefMO : DbgUsers) {
274 "Must use salvaged instruction as its location");
277 if (DbgMI->
getOpcode() != TargetOpcode::DBG_VALUE) {
279 "Must be either DBG_VALUE or DBG_VALUE_LIST");
291 bool IsValidSalvageExpr =
293 if (IsValidSalvageExpr) {
295 UseMO.
setReg(Op0->getReg());
296 UseMO.setSubReg(Op0->getSubReg());
unsigned const MachineRegisterInfo * MRI
static MachineOperand * getSalvageOpsForTrunc(const MachineRegisterInfo &MRI, MachineInstr &Trunc, SmallVectorImpl< uint64_t > &Ops)
static MachineOperand * getSalvageOpsForCopy(const MachineRegisterInfo &MRI, MachineInstr &Copy)
static bool MIIsInTerminatorSequence(const MachineInstr &MI)
Given that the input MI is before a partial terminator sequence TSeq, return true if M + TSeq also a ...
const HexagonInstrInfo * TII
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM Basic Block Representation.
static BranchProbability getBranchProbStackProtector(bool IsLikely)
unsigned getNumElements() const
static ExtOps getExtOps(unsigned FromSize, unsigned ToSize, bool Signed)
Returns the ops for a zero- or sign-extension in a DIExpression.
static DIExpression * appendOpsToArg(const DIExpression *Expr, ArrayRef< uint64_t > Ops, unsigned ArgNo, bool StackValue=false)
Create a copy of Expr by appending the given list of Ops to each instance of the operand DW_OP_LLVM_a...
bool isTailCall(const MachineInstr &MI) const override
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void insert(iterator MBBI, MachineBasicBlock *MBB)
Representation of each machine instruction.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bool hasDebugOperandForReg(Register Reg) const
Returns whether this debug value has at least one debug operand with the register Reg.
const MachineBasicBlock * getParent() const
const MachineOperand & getDebugExpressionOp() const
Return the operand for the complex address expression referenced by this DBG_VALUE instruction.
int findRegisterUseOperandIdx(Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
Returns the operand index that is a use of the specific register or -1 if it is not found.
iterator_range< mop_iterator > defs()
Returns a range over all explicit operands that are register definitions.
const DIExpression * getDebugExpression() const
Return the complex address expression referenced by this DBG_VALUE instruction.
const MachineOperand & getOperand(unsigned i) const
bool isIndirectDebugValue() const
A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate...
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void setReg(Register Reg)
Change the register this operand corresponds to.
void setMetadata(const MDNode *MD)
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetInstrInfo - Interface to description of machine instruction set.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
FPClassTest invertFPClassTestIfSimpler(FPClassTest Test, bool UseFCmp)
Evaluates if the specified FP class test is better performed as the inverse (i.e.
MachineBasicBlock::iterator findSplitPointForStackProtector(MachineBasicBlock *BB, const TargetInstrInfo &TII)
Find the split point at which to splice the end of BB into its success stack protector check machine ...
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Value * salvageDebugInfoImpl(Instruction &I, uint64_t CurrentLocOps, SmallVectorImpl< uint64_t > &Ops, SmallVectorImpl< Value * > &AdditionalValues)
void salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI, MachineInstr &MI, ArrayRef< MachineOperand * > DbgUsers)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...