31#define DEBUG_TYPE "loongarch"
50 cl::desc(
"Enable the pass that removes dead"
51 " definitons and replaces stores to"
52 " them with stores to r0"),
57 cl::desc(
"Enable the loop data prefetch pass"),
62 cl::desc(
"Enable the merge base offset pass"),
66 std::optional<Reloc::Model> RM) {
72 std::optional<CodeModel::Model> CM) {
81 if (!TT.isArch64Bit())
86 "Only small, medium and large code models are allowed on LoongArch");
105 Attribute CPUAttr =
F.getFnAttribute(
"target-cpu");
106 Attribute TuneAttr =
F.getFnAttribute(
"tune-cpu");
107 Attribute FSAttr =
F.getFnAttribute(
"target-features");
111 std::string TuneCPU =
116 std::string
Key = CPU + TuneCPU + FS;
117 auto &
I = SubtargetMap[
Key];
123 auto ABIName =
Options.MCOptions.getABIName();
125 F.getParent()->getModuleFlag(
"target-abi"))) {
128 ModuleTargetABI->getString() != ABIName) {
131 ABIName = ModuleTargetABI->getString();
133 I = std::make_unique<LoongArchSubtarget>(
TargetTriple, CPU, TuneCPU, FS,
156 void addIRPasses()
override;
157 void addCodeGenPrepare()
override;
158 bool addInstSelector()
override;
159 void addPreEmitPass()
override;
160 void addPreEmitPass2()
override;
161 void addMachineSSAOptimization()
override;
162 void addPreRegAlloc()
override;
163 bool addRegAssignAndRewriteFast()
override;
164 bool addRegAssignAndRewriteOptimized()
override;
170 return new LoongArchPassConfig(*
this, PM);
173void LoongArchPassConfig::addIRPasses() {
185void LoongArchPassConfig::addCodeGenPrepare() {
191bool LoongArchPassConfig::addInstSelector() {
204void LoongArchPassConfig::addPreEmitPass2() {
212void LoongArchPassConfig::addMachineSSAOptimization() {
215 if (
TM->getTargetTriple().isLoongArch64()) {
220void LoongArchPassConfig::addPreRegAlloc() {
226bool LoongArchPassConfig::addRegAssignAndRewriteFast() {
233bool LoongArchPassConfig::addRegAssignAndRewriteOptimized() {
static cl::opt< bool > EnableLoopDataPrefetch("aarch64-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(true))
#define LLVM_EXTERNAL_VISIBILITY
static cl::opt< bool > EnableLoongArchDeadRegisterElimination("loongarch-enable-dead-defs", cl::Hidden, cl::desc("Enable the pass that removes dead" " definitons and replaces stores to" " them with stores to r0"), cl::init(true))
static cl::opt< bool > EnableMergeBaseOffset("loongarch-enable-merge-offset", cl::desc("Enable the merge base offset pass"), cl::init(true), cl::Hidden)
static cl::opt< bool > EnableLoopDataPrefetch("loongarch-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(false))
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchTarget()
static CodeModel::Model getEffectiveLoongArchCodeModel(const Triple &TT, std::optional< CodeModel::Model > CM)
const GCNTargetMachine & getTM(const GCNSubtarget *STI)
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
Target-Independent Code Generator Pass Configuration Options pass.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM_ABI StringRef getValueAsString() const
Return the attribute's value as a string.
bool isValid() const
Return true if the attribute is any kind of attribute.
CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)
LoongArchTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
~LoongArchTargetMachine() override
const LoongArchSubtarget * getSubtargetImpl() const =delete
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
static LLVM_ABI PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
StringRef - Represent a constant reference to a string, i.e.
std::string str() const
str - Get the contents as an std::string.
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
std::unique_ptr< const MCSubtargetInfo > STI
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
Target-Independent Code Generator Pass Configuration Options.
virtual void addCodeGenPrepare()
Add pass to prepare the LLVM IR for code generation.
virtual bool addRegAssignAndRewriteFast()
Add core register allocator passes which do the actual register assignment and rewriting.
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
virtual void addMachineSSAOptimization()
addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.
virtual bool addRegAssignAndRewriteOptimized()
TargetSubtargetInfo - Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
ABI getTargetABI(StringRef ABIName)
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
Target & getTheLoongArch64Target()
FunctionPass * createLoongArchExpandAtomicPseudoPass()
FunctionPass * createLoongArchDeadRegisterDefinitionsPass()
void initializeLoongArchDAGToDAGISelLegacyPass(PassRegistry &)
LLVM_ABI FunctionPass * createTypePromotionLegacyPass()
Create IR Type Promotion pass.
void initializeLoongArchPreRAExpandPseudoPass(PassRegistry &)
auto dyn_cast_or_null(const Y &Val)
void initializeLoongArchMergeBaseOffsetOptPass(PassRegistry &)
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)
void initializeLoongArchExpandAtomicPseudoPass(PassRegistry &)
LLVM_ABI char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
void initializeLoongArchExpandPseudoPass(PassRegistry &)
FunctionPass * createLoongArchOptWInstrsPass()
LLVM_ABI FunctionPass * createLoopDataPrefetchPass()
LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)
BumpPtrAllocatorImpl BumpPtrAllocator
The standard BumpPtrAllocator which just uses the default template parameters.
CodeGenOptLevel
Code generation optimization level.
LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key
Target & getTheLoongArch32Target()
FunctionPass * createLoongArchISelDag(LoongArchTargetMachine &TM, CodeGenOptLevel OptLevel)
FunctionPass * createLoongArchPreRAExpandPseudoPass()
void initializeLoongArchOptWInstrsPass(PassRegistry &)
FunctionPass * createLoongArchExpandPseudoPass()
LLVM_ABI FunctionPass * createAtomicExpandLegacyPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
void initializeLoongArchDeadRegisterDefinitionsPass(PassRegistry &)
FunctionPass * createLoongArchMergeBaseOffsetOptPass()
Returns an instance of the Merge Base Offset Optimization pass.
Implement std::hash so that hash_code can be used in STL containers.
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
static FuncInfoTy * create(BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)
Factory function: default behavior is to call new using the supplied allocator.
RegisterTargetMachine - Helper template for registering a target machine implementation,...