LLVM 19.0.0git
BPFInstrInfo.h
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1//===-- BPFInstrInfo.h - BPF Instruction Information ------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the BPF implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_BPF_BPFINSTRINFO_H
14#define LLVM_LIB_TARGET_BPF_BPFINSTRINFO_H
15
16#include "BPFRegisterInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "BPFGenInstrInfo.inc"
21
22namespace llvm {
23
25 const BPFRegisterInfo RI;
26
27public:
29
30 const BPFRegisterInfo &getRegisterInfo() const { return RI; }
31
33 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
34 bool KillSrc) const override;
35
36 bool expandPostRAPseudo(MachineInstr &MI) const override;
37
40 bool isKill, int FrameIndex,
41 const TargetRegisterClass *RC,
43 Register VReg) const override;
44
47 int FrameIndex, const TargetRegisterClass *RC,
49 Register VReg) const override;
53 bool AllowModify) const override;
54
56 int *BytesRemoved = nullptr) const override;
59 const DebugLoc &DL,
60 int *BytesAdded = nullptr) const override;
61private:
62 void expandMEMCPY(MachineBasicBlock::iterator) const;
63
64};
65}
66
67#endif
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned const TargetRegisterInfo * TRI
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
const BPFRegisterInfo & getRegisterInfo() const
Definition: BPFInstrInfo.h:30
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
bool expandPostRAPseudo(MachineInstr &MI) const override
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
A debug info location.
Definition: DebugLoc.h:33
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Representation of each machine instruction.
Definition: MachineInstr.h:68
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18