LLVM  7.0.0svn
RegUsageInfoCollector.cpp
Go to the documentation of this file.
1 //===-- RegUsageInfoCollector.cpp - Register Usage Information Collector --===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// This pass is required to take advantage of the interprocedural register
11 /// allocation infrastructure.
12 ///
13 /// This pass is simple MachineFunction pass which collects register usage
14 /// details by iterating through each physical registers and checking
15 /// MRI::isPhysRegUsed() then creates a RegMask based on this details.
16 /// The pass then stores this RegMask in PhysicalRegisterUsageInfo.cpp
17 ///
18 //===----------------------------------------------------------------------===//
19 
20 #include "llvm/ADT/Statistic.h"
26 #include "llvm/CodeGen/Passes.h"
28 #include "llvm/Support/Debug.h"
31 
32 using namespace llvm;
33 
34 #define DEBUG_TYPE "ip-regalloc"
35 
36 STATISTIC(NumCSROpt,
37  "Number of functions optimized for callee saved registers");
38 
39 namespace llvm {
41 }
42 
43 namespace {
45 public:
49  }
50 
51  StringRef getPassName() const override {
52  return "Register Usage Information Collector Pass";
53  }
54 
55  void getAnalysisUsage(AnalysisUsage &AU) const override;
56 
57  bool runOnMachineFunction(MachineFunction &MF) override;
58 
59  // Call determineCalleeSaves and then also set the bits for subregs and
60  // fully saved superregs.
61  static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
62 
63  static char ID;
64 };
65 } // end of anonymous namespace
66 
68 
69 INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector",
70  "Register Usage Information Collector", false, false)
72 INITIALIZE_PASS_END(RegUsageInfoCollector, "RegUsageInfoCollector",
73  "Register Usage Information Collector", false, false)
74 
76  return new RegUsageInfoCollector();
77 }
78 
79 void RegUsageInfoCollector::getAnalysisUsage(AnalysisUsage &AU) const {
81  AU.setPreservesAll();
83 }
84 
85 bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
88  const TargetMachine &TM = MF.getTarget();
89 
90  LLVM_DEBUG(dbgs() << " -------------------- " << getPassName()
91  << " -------------------- \n");
92  LLVM_DEBUG(dbgs() << "Function Name : " << MF.getName() << "\n");
93 
94  std::vector<uint32_t> RegMask;
95 
96  // Compute the size of the bit vector to represent all the registers.
97  // The bit vector is broken into 32-bit chunks, thus takes the ceil of
98  // the number of registers divided by 32 for the size.
99  unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
100  RegMask.resize(RegMaskSize, 0xFFFFFFFF);
101 
102  const Function &F = MF.getFunction();
103 
104  PhysicalRegisterUsageInfo *PRUI = &getAnalysis<PhysicalRegisterUsageInfo>();
105 
106  PRUI->setTargetMachine(&TM);
107 
108  LLVM_DEBUG(dbgs() << "Clobbered Registers: ");
109 
110  BitVector SavedRegs;
111  computeCalleeSavedRegs(SavedRegs, MF);
112 
113  const BitVector &UsedPhysRegsMask = MRI->getUsedPhysRegsMask();
114  auto SetRegAsDefined = [&RegMask] (unsigned Reg) {
115  RegMask[Reg / 32] &= ~(1u << Reg % 32);
116  };
117  // Scan all the physical registers. When a register is defined in the current
118  // function set it and all the aliasing registers as defined in the regmask.
119  for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
120  // Don't count registers that are saved and restored.
121  if (SavedRegs.test(PReg))
122  continue;
123  // If a register is defined by an instruction mark it as defined together
124  // with all it's unsaved aliases.
125  if (!MRI->def_empty(PReg)) {
126  for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
127  if (!SavedRegs.test(*AI))
128  SetRegAsDefined(*AI);
129  continue;
130  }
131  // If a register is in the UsedPhysRegsMask set then mark it as defined.
132  // All clobbered aliases will also be in the set, so we can skip setting
133  // as defined all the aliases here.
134  if (UsedPhysRegsMask.test(PReg))
135  SetRegAsDefined(PReg);
136  }
137 
139  ++NumCSROpt;
140  LLVM_DEBUG(dbgs() << MF.getName()
141  << " function optimized for not having CSR.\n");
142  }
143 
144  for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg)
145  if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg))
146  LLVM_DEBUG(dbgs() << printReg(PReg, TRI) << " ");
147 
148  LLVM_DEBUG(dbgs() << " \n----------------------------------------\n");
149 
150  PRUI->storeUpdateRegUsageInfo(&F, std::move(RegMask));
151 
152  return false;
153 }
154 
155 void RegUsageInfoCollector::
156 computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) {
159 
160  // Target will return the set of registers that it saves/restores as needed.
161  SavedRegs.clear();
162  TFI->determineCalleeSaves(MF, SavedRegs);
163 
164  // Insert subregs.
165  const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
166  for (unsigned i = 0; CSRegs[i]; ++i) {
167  unsigned Reg = CSRegs[i];
168  if (SavedRegs.test(Reg))
169  for (MCSubRegIterator SR(Reg, TRI, false); SR.isValid(); ++SR)
170  SavedRegs.set(*SR);
171  }
172 
173  // Insert any register fully saved via subregisters.
174  for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
175  if (SavedRegs.test(PReg))
176  continue;
177 
178  // Check if PReg is fully covered by its subregs.
179  bool CoveredBySubRegs = false;
180  for (const TargetRegisterClass *RC : TRI->regclasses())
181  if (RC->CoveredBySubRegs && RC->contains(PReg)) {
182  CoveredBySubRegs = true;
183  break;
184  }
185  if (!CoveredBySubRegs)
186  continue;
187 
188  // Add PReg to SavedRegs if all subregs are saved.
189  bool AllSubRegsSaved = true;
190  for (MCSubRegIterator SR(PReg, TRI, false); SR.isValid(); ++SR)
191  if (!SavedRegs.test(*SR)) {
192  AllSubRegsSaved = false;
193  break;
194  }
195  if (AllSubRegsSaved)
196  SavedRegs.set(PReg);
197  }
198 }
BitVector & set()
Definition: BitVector.h:398
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
A global registry used in conjunction with static constructors to make pluggable components (like tar...
Definition: Registry.h:45
unsigned Reg
bool test(unsigned Idx) const
Definition: BitVector.h:502
void storeUpdateRegUsageInfo(const Function *FP, std::vector< uint32_t > RegMask)
To store RegMask for given Function *.
void initializeRegUsageInfoCollectorPass(PassRegistry &)
STATISTIC(NumFunctions, "Total number of functions")
unsigned const TargetRegisterInfo * TRI
F(f)
void setTargetMachine(const TargetMachine *TM_)
To set TargetMachine *, which is used to print analysis when command line option -print-regusage is u...
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static bool isSafeForNoCSROpt(const Function &F)
Check if given function is safe for not having callee saved registers.
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:51
void clear()
clear - Removes all bits from the bitvector. Does not change capacity.
Definition: BitVector.h:367
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
iterator_range< regclass_iterator > regclasses() const
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
Return a null-terminated list of all of the callee-saved registers on this target.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
unsigned const MachineRegisterInfo * MRI
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:285
bool def_empty(unsigned RegNo) const
def_empty - Return true if there are no instructions defining the specified register (it may be live-...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector", "Register Usage Information Collector", false, false) INITIALIZE_PASS_END(RegUsageInfoCollector
Information about stack frame layout on the target.
Promote Memory to Register
Definition: Mem2Reg.cpp:110
Natural Loop Information
Definition: LoopInfo.cpp:719
const BitVector & getUsedPhysRegsMask() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
void setPreservesAll()
Set by analyses that do not transform their input at all.
RegUsageInfoCollector
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
virtual const TargetFrameLowering * getFrameLowering() const
This pass is required to take advantage of the interprocedural register allocation infrastructure...
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Definition: PassRegistry.h:39
#define LLVM_DEBUG(X)
Definition: Debug.h:119
Register Usage Information Collector