LLVM 20.0.0git
BPFRegisterInfo.cpp
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1//===-- BPFRegisterInfo.cpp - BPF Register Information ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the BPF implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "BPFRegisterInfo.h"
14#include "BPFSubtarget.h"
24
25#define GET_REGINFO_TARGET_DESC
26#include "BPFGenRegisterInfo.inc"
27using namespace llvm;
28
29static cl::opt<int>
30 BPFStackSizeOption("bpf-stack-size",
31 cl::desc("Specify the BPF stack size limit"),
32 cl::init(512));
33
35 : BPFGenRegisterInfo(BPF::R0) {}
36
37const MCPhysReg *
39 return CSR_SaveList;
40}
41
42const uint32_t *
44 CallingConv::ID CC) const {
45 switch (CC) {
46 default:
47 return CSR_RegMask;
49 return CSR_PreserveAll_RegMask;
50 }
51}
52
54 BitVector Reserved(getNumRegs());
55 markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer
56 markSuperRegs(Reserved, BPF::W11); // [W|R]11 is pseudo stack pointer
57 return Reserved;
58}
59
60static void WarnSize(int Offset, MachineFunction &MF, DebugLoc& DL,
62 if (Offset <= -BPFStackSizeOption) {
63 if (!DL)
64 /* try harder to get some debug loc */
65 for (auto &I : MBB)
66 if (I.getDebugLoc()) {
67 DL = I.getDebugLoc();
68 break;
69 }
70
71 const Function &F = MF.getFunction();
72 DiagnosticInfoUnsupported DiagStackSize(
73 F,
74 "Looks like the BPF stack limit is exceeded. "
75 "Please move large on stack variables into BPF per-cpu array map. For "
76 "non-kernel uses, the stack can be increased using -mllvm "
77 "-bpf-stack-size.\n",
78 DL);
79 F.getContext().diagnose(DiagStackSize);
80 }
81}
82
84 int SPAdj, unsigned FIOperandNum,
85 RegScavenger *RS) const {
86 assert(SPAdj == 0 && "Unexpected");
87
88 unsigned i = 0;
89 MachineInstr &MI = *II;
90 MachineBasicBlock &MBB = *MI.getParent();
92 DebugLoc DL = MI.getDebugLoc();
93
94 while (!MI.getOperand(i).isFI()) {
95 ++i;
96 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
97 }
98
99 Register FrameReg = getFrameRegister(MF);
100 int FrameIndex = MI.getOperand(i).getIndex();
102
103 if (MI.getOpcode() == BPF::MOV_rr) {
104 int Offset = MF.getFrameInfo().getObjectOffset(FrameIndex);
105
106 WarnSize(Offset, MF, DL, MBB);
107 MI.getOperand(i).ChangeToRegister(FrameReg, false);
108 Register reg = MI.getOperand(i - 1).getReg();
109 BuildMI(MBB, ++II, DL, TII.get(BPF::ADD_ri), reg)
110 .addReg(reg)
111 .addImm(Offset);
112 return false;
113 }
114
115 int Offset = MF.getFrameInfo().getObjectOffset(FrameIndex) +
116 MI.getOperand(i + 1).getImm();
117
118 if (!isInt<32>(Offset))
119 llvm_unreachable("bug in frame offset");
120
121 WarnSize(Offset, MF, DL, MBB);
122
123 if (MI.getOpcode() == BPF::FI_ri) {
124 // architecture does not really support FI_ri, replace it with
125 // MOV_rr <target_reg>, frame_reg
126 // ADD_ri <target_reg>, imm
127 Register reg = MI.getOperand(i - 1).getReg();
128
129 BuildMI(MBB, ++II, DL, TII.get(BPF::MOV_rr), reg)
130 .addReg(FrameReg);
131 BuildMI(MBB, II, DL, TII.get(BPF::ADD_ri), reg)
132 .addReg(reg)
133 .addImm(Offset);
134
135 // Remove FI_ri instruction
136 MI.eraseFromParent();
137 } else {
138 MI.getOperand(i).ChangeToRegister(FrameReg, false);
139 MI.getOperand(i + 1).ChangeToImmediate(Offset);
140 }
141 return false;
142}
143
145 return BPF::R10;
146}
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static void WarnSize(int Offset, MachineFunction &MF, DebugLoc &DL, MachineBasicBlock &MBB)
static cl::opt< int > BPFStackSizeOption("bpf-stack-size", cl::desc("Specify the BPF stack size limit"), cl::init(512))
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
uint64_t IntrinsicInst * II
This file declares the machine register scavenger class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
A debug info location.
Definition: DebugLoc.h:33
Diagnostic information for unsupported feature in backend.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
Definition: MachineInstr.h:69
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
TargetInstrInfo - Interface to description of machine instruction set.
virtual const TargetInstrInfo * getInstrInfo() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ PreserveAll
Used for runtime calls that preserves (almost) all registers.
Definition: CallingConv.h:66
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
Register getFrameRegister(const MachineFunction &MF) const override
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override