LLVM 20.0.0git
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#include "HexagonFrameLowering.h"
#include "HexagonBlockRanges.h"
#include "HexagonInstrInfo.h"
#include "HexagonMachineFunctionInfo.h"
#include "HexagonRegisterInfo.h"
#include "HexagonSubtarget.h"
#include "HexagonTargetMachine.h"
#include "MCTargetDesc/HexagonBaseInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <iterator>
#include <limits>
#include <map>
#include <optional>
#include <utility>
#include <vector>
Go to the source code of this file.
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
Macros | |
#define | DEBUG_TYPE "hexagon-pei" |
Enumerations | |
enum | SpillKind { SK_ToMem , SK_FromMem , SK_FromMemTailcall } |
Functions | |
void | llvm::initializeHexagonCallFrameInformationPass (PassRegistry &) |
FunctionPass * | llvm::createHexagonCallFrameInformation () |
INITIALIZE_PASS (HexagonCallFrameInformation, "hexagon-cfi", "Hexagon call frame information", false, false) FunctionPass *llvm | |
static Register | getMax32BitSubRegister (Register Reg, const TargetRegisterInfo &TRI, bool hireg=true) |
Map a register pair Reg to the subregister that has the greater "number", i.e. | |
static Register | getMaxCalleeSavedReg (ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo &TRI) |
Returns the callee saved register with the largest id in the vector. | |
static bool | needsStackFrame (const MachineBasicBlock &MBB, const BitVector &CSR, const HexagonRegisterInfo &HRI) |
Checks if the basic block contains any instruction that needs a stack frame to be already in place. | |
static bool | hasTailCall (const MachineBasicBlock &MBB) |
Returns true if MBB has a machine instructions that indicates a tail call in the block. | |
static bool | hasReturn (const MachineBasicBlock &MBB) |
Returns true if MBB contains an instruction that returns. | |
static MachineInstr * | getReturn (MachineBasicBlock &MBB) |
Returns the "return" instruction from this block, or nullptr if there isn't any. | |
static bool | isRestoreCall (unsigned Opc) |
static bool | isOptNone (const MachineFunction &MF) |
static bool | isOptSize (const MachineFunction &MF) |
static bool | isMinSize (const MachineFunction &MF) |
static bool | enableAllocFrameElim (const MachineFunction &MF) |
static std::optional< MachineBasicBlock::iterator > | findCFILocation (MachineBasicBlock &B) |
static const char * | getSpillFunctionFor (Register MaxReg, SpillKind SpillType, bool Stkchk=false) |
static bool | needToReserveScavengingSpillSlots (MachineFunction &MF, const HexagonRegisterInfo &HRI, const TargetRegisterClass *RC) |
Returns true if there are no caller-saved registers available in class RC. | |
static void | dump_registers (BitVector &Regs, const TargetRegisterInfo &TRI) |
Variables | |
static cl::opt< bool > | DisableDeallocRet ("disable-hexagon-dealloc-ret", cl::Hidden, cl::desc("Disable Dealloc Return for Hexagon target")) |
static cl::opt< unsigned > | NumberScavengerSlots ("number-scavenger-slots", cl::Hidden, cl::desc("Set the number of scavenger slots"), cl::init(2)) |
static cl::opt< int > | SpillFuncThreshold ("spill-func-threshold", cl::Hidden, cl::desc("Specify O2(not Os) spill func threshold"), cl::init(6)) |
static cl::opt< int > | SpillFuncThresholdOs ("spill-func-threshold-Os", cl::Hidden, cl::desc("Specify Os spill func threshold"), cl::init(1)) |
static cl::opt< bool > | EnableStackOVFSanitizer ("enable-stackovf-sanitizer", cl::Hidden, cl::desc("Enable runtime checks for stack overflow."), cl::init(false)) |
static cl::opt< bool > | EnableShrinkWrapping ("hexagon-shrink-frame", cl::init(true), cl::Hidden, cl::desc("Enable stack frame shrink wrapping")) |
static cl::opt< unsigned > | ShrinkLimit ("shrink-frame-limit", cl::init(std::numeric_limits< unsigned >::max()), cl::Hidden, cl::desc("Max count of stack frame shrink-wraps")) |
static cl::opt< bool > | EnableSaveRestoreLong ("enable-save-restore-long", cl::Hidden, cl::desc("Enable long calls for save-restore stubs."), cl::init(false)) |
static cl::opt< bool > | EliminateFramePointer ("hexagon-fp-elim", cl::init(true), cl::Hidden, cl::desc("Refrain from using FP whenever possible")) |
static cl::opt< bool > | OptimizeSpillSlots ("hexagon-opt-spill", cl::Hidden, cl::init(true), cl::desc("Optimize spill slots")) |
static cl::opt< unsigned > | SpillOptMax ("spill-opt-max", cl::Hidden, cl::init(std::numeric_limits< unsigned >::max())) |
static unsigned | SpillOptCount = 0 |
#define DEBUG_TYPE "hexagon-pei" |
Definition at line 65 of file HexagonFrameLowering.cpp.
enum SpillKind |
Enumerator | |
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SK_ToMem | |
SK_FromMem | |
SK_FromMemTailcall |
Definition at line 1185 of file HexagonFrameLowering.cpp.
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Definition at line 1548 of file HexagonFrameLowering.cpp.
References llvm::dbgs(), llvm::BitVector::find_first(), llvm::BitVector::find_next(), llvm::printReg(), and TRI.
Referenced by llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots().
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Definition at line 579 of file HexagonFrameLowering.cpp.
References assert(), F, llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), and llvm::MachineFunction::getSubtarget().
Referenced by llvm::HexagonFrameLowering::hasFP().
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Definition at line 995 of file HexagonFrameLowering.cpp.
References B, End, llvm::MachineInstrBundleIterator< Ty, IsReverse >::getInstrIterator(), and I.
Referenced by llvm::HexagonFrameLowering::insertCFIInstructions().
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Map a register pair Reg to the subregister that has the greater "number", i.e.
D3 (aka R7:6) will be mapped to R7, etc.
Definition at line 248 of file HexagonFrameLowering.cpp.
Referenced by getMaxCalleeSavedReg().
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Returns the callee saved register with the largest id in the vector.
Definition at line 268 of file HexagonFrameLowering.cpp.
References llvm::ArrayRef< T >::empty(), getMax32BitSubRegister(), getReg(), I, llvm::ArrayRef< T >::size(), and TRI.
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Returns the "return" instruction from this block, or nullptr if there isn't any.
Definition at line 360 of file HexagonFrameLowering.cpp.
Referenced by llvm::HexagonFrameLowering::emitPrologue().
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Definition at line 1191 of file HexagonFrameLowering.cpp.
References assert(), llvm_unreachable, SK_FromMem, SK_FromMemTailcall, and SK_ToMem.
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Returns true if MBB contains an instruction that returns.
Definition at line 351 of file HexagonFrameLowering.cpp.
References MBB, MI, and llvm::MachineBasicBlock::terminators().
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Returns true if MBB has a machine instructions that indicates a tail call in the block.
Definition at line 342 of file HexagonFrameLowering.cpp.
References llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getLastNonDebugInstr(), I, and MBB.
INITIALIZE_PASS | ( | HexagonCallFrameInformation | , |
"hexagon-cfi" | , | ||
"Hexagon call frame information" | , | ||
false | , | ||
false | |||
) |
Definition at line 239 of file HexagonFrameLowering.cpp.
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inlinestatic |
Definition at line 392 of file HexagonFrameLowering.cpp.
References llvm::MachineFunction::getFunction(), and llvm::Function::hasMinSize().
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inlinestatic |
Definition at line 382 of file HexagonFrameLowering.cpp.
References llvm::MachineFunction::getFunction(), llvm::TargetMachine::getOptLevel(), llvm::MachineFunction::getTarget(), and llvm::Function::hasOptNone().
Referenced by llvm::HexagonFrameLowering::determineCalleeSaves().
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inlinestatic |
Definition at line 387 of file HexagonFrameLowering.cpp.
References F, and llvm::MachineFunction::getFunction().
Definition at line 367 of file HexagonFrameLowering.cpp.
Referenced by llvm::HexagonFrameLowering::emitPrologue().
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Checks if the basic block contains any instruction that needs a stack frame to be already in place.
Definition at line 286 of file HexagonFrameLowering.cpp.
References llvm::BitVector::find_first(), llvm::BitVector::find_next(), MBB, and MI.
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Returns true if there are no caller-saved registers available in class RC.
Definition at line 1526 of file HexagonFrameLowering.cpp.
References llvm::HexagonRegisterInfo::getCallerSavedRegs(), llvm::MachineFunction::getRegInfo(), llvm::MCRegAliasIterator::isValid(), MRI, and P.
Referenced by llvm::HexagonFrameLowering::determineCalleeSaves().
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Referenced by llvm::HexagonFrameLowering::hasFP().
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Referenced by llvm::HexagonFrameLowering::emitPrologue().
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Referenced by llvm::HexagonFrameLowering::hasFP().
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Referenced by llvm::HexagonFrameLowering::determineCalleeSaves().
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Referenced by llvm::HexagonFrameLowering::determineCalleeSaves().
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Definition at line 196 of file HexagonFrameLowering.cpp.