#include "RISCVTargetTransformInfo.h"
#include "MCTargetDesc/RISCVMatInt.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/BasicTTIImpl.h"
#include "llvm/CodeGen/CostTable.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/IR/PatternMatch.h"
#include <cmath>
#include <optional>

Macros
#define	DEBUG_TYPE "riscvtti"

Functions
static InstructionCost	getIntImmCostImpl (const DataLayout &DL, const RISCVSubtarget ST, const APInt &Imm, Type Ty, TTI::TargetCostKind CostKind, bool FreeZeroes)
static bool	canUseShiftPair (Instruction *Inst, const APInt &Imm)
static bool	canUseShiftCmp (Instruction *Inst, const APInt &Imm)
static bool	isRepeatedConcatMask (ArrayRef< int > Mask, int &SubVectorSize)
static VectorType *	getVRGatherIndexType (MVT DataVT, const RISCVSubtarget &ST, LLVMContext &C)
static InstructionCost	costShuffleViaSplitting (const RISCVTTIImpl &TTI, MVT LegalVT, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind)
	Attempt to approximate the cost of a shuffle which will require splitting during legalization.
static InstructionCost	costShuffleViaVRegSplitting (const RISCVTTIImpl &TTI, MVT LegalVT, std::optional< unsigned > VLen, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind)
	Try to perform better estimation of the permutation.
static unsigned	isM1OrSmaller (MVT VT)

Variables
static cl::opt< unsigned >	RVVRegisterWidthLMUL ("riscv-v-register-bit-width-lmul", cl::desc("The LMUL to use for getRegisterBitWidth queries. Affects LMUL used " "by autovectorized code. Fractional LMULs are not supported."), cl::init(2), cl::Hidden)
static cl::opt< unsigned >	SLPMaxVF ("riscv-v-slp-max-vf", cl::desc("Overrides result used for getMaximumVF query which is used " "exclusively by SLP vectorizer."), cl::Hidden)
static cl::opt< unsigned >	RVVMinTripCount ("riscv-v-min-trip-count", cl::desc("Set the lower bound of a trip count to decide on " "vectorization while tail-folding."), cl::init(5), cl::Hidden)
static const CostTblEntry	VectorIntrinsicCostTable []

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "riscvtti"

Definition at line 25 of file RISCVTargetTransformInfo.cpp.

Function Documentation

◆ canUseShiftCmp()

bool canUseShiftCmp	(	Instruction *	Inst,
		const APInt &	Imm )

static

Definition at line 174 of file RISCVTargetTransformInfo.cpp.

References llvm::CallingConv::C, llvm::countr_zero(), llvm::dyn_cast(), llvm::Value::hasOneUse(), llvm::isPowerOf2_32(), llvm::isUInt(), llvm::SignExtend64(), and llvm::Value::user_begin().

Referenced by llvm::RISCVTTIImpl::getIntImmCostInst().

◆ canUseShiftPair()

bool canUseShiftPair	(	Instruction *	Inst,
		const APInt &	Imm )

static

Definition at line 146 of file RISCVTargetTransformInfo.cpp.

References llvm::cast(), llvm::countr_zero(), llvm::dyn_cast(), llvm::User::getOperand(), llvm::isa(), and llvm::isShiftedMask_64().

Referenced by llvm::RISCVTTIImpl::getIntImmCostInst().

◆ costShuffleViaSplitting()

InstructionCost costShuffleViaSplitting	(	const RISCVTTIImpl &	TTI,
		MVT	LegalVT,
		VectorType *	Tp,
		ArrayRef< int >	Mask,
		TTI::TargetCostKind	CostKind )

static

Attempt to approximate the cost of a shuffle which will require splitting during legalization.

Note that processShuffleMasks is not an exact proxy for the algorithm used in LegalizeVectorTypes, but hopefully it's a reasonably close upperbound.

Definition at line 451 of file RISCVTargetTransformInfo.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::copy(), CostKind, llvm::divideCeil(), llvm::FixedVectorType::get(), llvm::InstructionCost::getInvalid(), llvm::MVT::getSizeInBits(), llvm::MVT::getStoreSize(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), llvm::detail::DenseSetImpl< ValueT, MapTy, ValueInfoT >::insert(), llvm::MVT::isFixedLengthVector(), llvm::ShuffleVectorInst::isIdentityMask(), llvm::PoisonMaskElem, llvm::processShuffleMasks(), llvm::ArrayRef< T >::size(), llvm::TargetTransformInfo::SK_PermuteSingleSrc, and llvm::TargetTransformInfo::SK_PermuteTwoSrc.

Referenced by llvm::RISCVTTIImpl::getShuffleCost().

◆ costShuffleViaVRegSplitting()

InstructionCost costShuffleViaVRegSplitting	(	const RISCVTTIImpl &	TTI,
		MVT	LegalVT,
		std::optional< unsigned >	VLen,
		VectorType *	Tp,
		ArrayRef< int >	Mask,
		TTI::TargetCostKind	CostKind )

static

Try to perform better estimation of the permutation.

Split the source/destination vectors into real registers.
Do the mask analysis to identify which real registers are permuted. If more than 1 source registers are used for the destination register building, the cost for this destination register is (Number_of_source_register - 1) * Cost_PermuteTwoSrc. If only one source register is used, build mask and calculate the cost as a cost of PermuteSingleSrc. Also, for the single register permute we try to identify if the destination register is just a copy of the source register or the copy of the previous destination register (the cost is TTI::TCC_Basic). If the source register is just reused, the cost for this operation is 0.

Definition at line 521 of file RISCVTargetTransformInfo.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::copy(), CostKind, llvm::divideCeil(), E(), llvm::FixedVectorType::get(), llvm::MVT::getFixedSizeInBits(), llvm::InstructionCost::getInvalid(), llvm::MVT::getSizeInBits(), llvm::MVT::getStoreSize(), llvm::InstructionCost::getValue(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), llvm::detail::DenseSetImpl< ValueT, MapTy, ValueInfoT >::insert(), llvm::MVT::isFixedLengthVector(), llvm::ShuffleVectorInst::isIdentityMask(), llvm::PoisonMaskElem, llvm::processShuffleMasks(), llvm::ArrayRef< T >::size(), llvm::TargetTransformInfo::SK_PermuteSingleSrc, and llvm::TargetTransformInfo::SK_PermuteTwoSrc.

Referenced by llvm::RISCVTTIImpl::getShuffleCost().

◆ getIntImmCostImpl()

InstructionCost getIntImmCostImpl	(	const DataLayout &	DL,
		const RISCVSubtarget *	ST,
		const APInt &	Imm,
		Type *	Ty,
		TTI::TargetCostKind	CostKind,
		bool	FreeZeroes )

static

Definition at line 120 of file RISCVTargetTransformInfo.cpp.

References assert(), CostKind, DL, llvm::RISCVMatInt::getIntMatCost(), and llvm::TargetTransformInfo::TCC_Free.

Referenced by llvm::RISCVTTIImpl::getIntImmCost(), and llvm::RISCVTTIImpl::getIntImmCostInst().

◆ getVRGatherIndexType()

VectorType * getVRGatherIndexType	(	MVT	DataVT,
		const RISCVSubtarget &	ST,
		LLVMContext &	C )

static

Definition at line 437 of file RISCVTargetTransformInfo.cpp.

References assert(), llvm::MVT::bitsGT(), llvm::CallingConv::C, llvm::cast(), llvm::MVT::changeTypeToInteger(), llvm::MVT::changeVectorElementType(), llvm::MVT::getScalarSizeInBits(), llvm::MVT::getScalarType(), and llvm::MVT::getVectorNumElements().

Referenced by llvm::RISCVTTIImpl::getShuffleCost().

◆ isM1OrSmaller()

unsigned isM1OrSmaller ( MVT VT )

static

Definition at line 957 of file RISCVTargetTransformInfo.cpp.

References llvm::RISCVTargetLowering::getLMUL(), llvm::RISCVVType::LMUL_1, llvm::RISCVVType::LMUL_F2, llvm::RISCVVType::LMUL_F4, and llvm::RISCVVType::LMUL_F8.

Referenced by llvm::RISCVTTIImpl::getScalarizationOverhead().

◆ isRepeatedConcatMask()

bool isRepeatedConcatMask	(	ArrayRef< int >	Mask,
		int &	SubVectorSize )

static

Definition at line 415 of file RISCVTargetTransformInfo.cpp.

References I, llvm::isPowerOf2_32(), and Size.

Referenced by llvm::RISCVTTIImpl::getShuffleCost().

Variable Documentation

◆ RVVMinTripCount

cl::opt< unsigned > RVVMinTripCount("riscv-v-min-trip-count", cl::desc("Set the lower bound of a trip count to decide on " "vectorization while tail-folding."), cl::init(5), cl::Hidden)	(	"riscv-v-min-trip-count"	,
		cl::desc("Set the lower bound of a trip count to decide on " "vectorization while tail-folding.")	,
		cl::init(5)	,
		cl::Hidden	)

static

Referenced by llvm::RISCVTTIImpl::getMinTripCountTailFoldingThreshold().

◆ RVVRegisterWidthLMUL

cl::opt< unsigned > RVVRegisterWidthLMUL("riscv-v-register-bit-width-lmul", cl::desc( "The LMUL to use for getRegisterBitWidth queries. Affects LMUL used " "by autovectorized code. Fractional LMULs are not supported."), cl::init(2), cl::Hidden)	(	"riscv-v-register-bit-width-lmul"	,
		cl::desc( "The LMUL to use for getRegisterBitWidth queries. Affects LMUL used " "by autovectorized code. Fractional LMULs are not supported.")	,
		cl::init(2)	,
		cl::Hidden	)

static

Referenced by llvm::RISCVTTIImpl::getRegisterBitWidth().

◆ SLPMaxVF

cl::opt< unsigned > SLPMaxVF("riscv-v-slp-max-vf", cl::desc( "Overrides result used for getMaximumVF query which is used " "exclusively by SLP vectorizer."), cl::Hidden)	(	"riscv-v-slp-max-vf"	,
		cl::desc( "Overrides result used for getMaximumVF query which is used " "exclusively by SLP vectorizer.")	,
		cl::Hidden	)

static

Referenced by llvm::RISCVTTIImpl::getMaximumVF().

◆ VectorIntrinsicCostTable

const CostTblEntry VectorIntrinsicCostTable[]

static

Definition at line 1219 of file RISCVTargetTransformInfo.cpp.

Referenced by llvm::RISCVTTIImpl::getIntrinsicInstrCost().

Macros

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

Function Documentation

◆ canUseShiftCmp()

◆ canUseShiftPair()

◆ costShuffleViaSplitting()

◆ costShuffleViaVRegSplitting()

◆ getIntImmCostImpl()

◆ getVRGatherIndexType()

◆ isM1OrSmaller()

◆ isRepeatedConcatMask()

Variable Documentation

◆ RVVMinTripCount

◆ RVVRegisterWidthLMUL

◆ SLPMaxVF

◆ VectorIntrinsicCostTable