LLVM 22.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
54#include <algorithm>
55#include <cassert>
56#include <cstdint>
57#include <limits>
58#include <optional>
59#include <utility>
60
61namespace llvm {
62
63class Function;
64class GlobalValue;
65class LLVMContext;
66class ScalarEvolution;
67class SCEV;
68class TargetMachine;
69
71
72/// Base class which can be used to help build a TTI implementation.
73///
74/// This class provides as much implementation of the TTI interface as is
75/// possible using the target independent parts of the code generator.
76///
77/// In order to subclass it, your class must implement a getST() method to
78/// return the subtarget, and a getTLI() method to return the target lowering.
79/// We need these methods implemented in the derived class so that this class
80/// doesn't have to duplicate storage for them.
81template <typename T>
83private:
85 using TTI = TargetTransformInfo;
86
87 /// Helper function to access this as a T.
88 const T *thisT() const { return static_cast<const T *>(this); }
89
90 /// Estimate a cost of Broadcast as an extract and sequence of insert
91 /// operations.
93 getBroadcastShuffleOverhead(FixedVectorType *VTy,
96 // Broadcast cost is equal to the cost of extracting the zero'th element
97 // plus the cost of inserting it into every element of the result vector.
98 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
99 CostKind, 0, nullptr, nullptr);
100
101 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
102 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
103 CostKind, i, nullptr, nullptr);
104 }
105 return Cost;
106 }
107
108 /// Estimate a cost of shuffle as a sequence of extract and insert
109 /// operations.
111 getPermuteShuffleOverhead(FixedVectorType *VTy,
114 // Shuffle cost is equal to the cost of extracting element from its argument
115 // plus the cost of inserting them onto the result vector.
116
117 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
118 // index 0 of first vector, index 1 of second vector,index 2 of first
119 // vector and finally index 3 of second vector and insert them at index
120 // <0,1,2,3> of result vector.
121 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
122 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
123 CostKind, i, nullptr, nullptr);
124 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
125 CostKind, i, nullptr, nullptr);
126 }
127 return Cost;
128 }
129
130 /// Estimate a cost of subvector extraction as a sequence of extract and
131 /// insert operations.
132 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
134 int Index,
135 FixedVectorType *SubVTy) const {
136 assert(VTy && SubVTy &&
137 "Can only extract subvectors from vectors");
138 int NumSubElts = SubVTy->getNumElements();
140 (Index + NumSubElts) <=
142 "SK_ExtractSubvector index out of range");
143
145 // Subvector extraction cost is equal to the cost of extracting element from
146 // the source type plus the cost of inserting them into the result vector
147 // type.
148 for (int i = 0; i != NumSubElts; ++i) {
149 Cost +=
150 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
151 CostKind, i + Index, nullptr, nullptr);
152 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
153 CostKind, i, nullptr, nullptr);
154 }
155 return Cost;
156 }
157
158 /// Estimate a cost of subvector insertion as a sequence of extract and
159 /// insert operations.
160 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
162 int Index,
163 FixedVectorType *SubVTy) const {
164 assert(VTy && SubVTy &&
165 "Can only insert subvectors into vectors");
166 int NumSubElts = SubVTy->getNumElements();
168 (Index + NumSubElts) <=
170 "SK_InsertSubvector index out of range");
171
173 // Subvector insertion cost is equal to the cost of extracting element from
174 // the source type plus the cost of inserting them into the result vector
175 // type.
176 for (int i = 0; i != NumSubElts; ++i) {
177 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
178 CostKind, i, nullptr, nullptr);
179 Cost +=
180 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
181 i + Index, nullptr, nullptr);
182 }
183 return Cost;
184 }
185
186 /// Local query method delegates up to T which *must* implement this!
187 const TargetSubtargetInfo *getST() const {
188 return static_cast<const T *>(this)->getST();
189 }
190
191 /// Local query method delegates up to T which *must* implement this!
192 const TargetLoweringBase *getTLI() const {
193 return static_cast<const T *>(this)->getTLI();
194 }
195
196 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
197 switch (M) {
199 return ISD::UNINDEXED;
200 case TTI::MIM_PreInc:
201 return ISD::PRE_INC;
202 case TTI::MIM_PreDec:
203 return ISD::PRE_DEC;
204 case TTI::MIM_PostInc:
205 return ISD::POST_INC;
206 case TTI::MIM_PostDec:
207 return ISD::POST_DEC;
208 }
209 llvm_unreachable("Unexpected MemIndexedMode");
210 }
211
212 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
213 Align Alignment,
214 bool VariableMask,
215 bool IsGatherScatter,
217 unsigned AddressSpace = 0) const {
218 // We cannot scalarize scalable vectors, so return Invalid.
219 if (isa<ScalableVectorType>(DataTy))
221
222 auto *VT = cast<FixedVectorType>(DataTy);
223 unsigned VF = VT->getNumElements();
224
225 // Assume the target does not have support for gather/scatter operations
226 // and provide a rough estimate.
227 //
228 // First, compute the cost of the individual memory operations.
229 InstructionCost AddrExtractCost =
230 IsGatherScatter ? getScalarizationOverhead(
232 PointerType::get(VT->getContext(), 0), VF),
233 /*Insert=*/false, /*Extract=*/true, CostKind)
234 : 0;
235
236 // The cost of the scalar loads/stores.
237 InstructionCost MemoryOpCost =
238 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
240
241 // Next, compute the cost of packing the result in a vector.
242 InstructionCost PackingCost =
243 getScalarizationOverhead(VT, Opcode != Instruction::Store,
244 Opcode == Instruction::Store, CostKind);
245
246 InstructionCost ConditionalCost = 0;
247 if (VariableMask) {
248 // Compute the cost of conditionally executing the memory operations with
249 // variable masks. This includes extracting the individual conditions, a
250 // branches and PHIs to combine the results.
251 // NOTE: Estimating the cost of conditionally executing the memory
252 // operations accurately is quite difficult and the current solution
253 // provides a very rough estimate only.
254 ConditionalCost =
257 /*Insert=*/false, /*Extract=*/true, CostKind) +
258 VF * (thisT()->getCFInstrCost(Instruction::Br, CostKind) +
259 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
260 }
261
262 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
263 }
264
265 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
266 /// or same non -1 index value and this index value contained at least twice.
267 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
268 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
269 /// with \p Index=2.
270 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
271 // Check that the broadcast index meets at least twice.
272 bool IsCompared = false;
273 if (int SplatIdx = PoisonMaskElem;
274 all_of(enumerate(Mask), [&](const auto &P) {
275 if (P.value() == PoisonMaskElem)
276 return P.index() != Mask.size() - 1 || IsCompared;
277 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
278 return false;
279 if (SplatIdx == PoisonMaskElem) {
280 SplatIdx = P.value();
281 return P.index() != Mask.size() - 1;
282 }
283 IsCompared = true;
284 return SplatIdx == P.value();
285 })) {
286 Index = SplatIdx;
287 return true;
288 }
289 return false;
290 }
291
292 /// Several intrinsics that return structs (including llvm.sincos[pi] and
293 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
294 /// vector library functions correspond to the scalar calls (e.g. sincos or
295 /// modf), which unlike the intrinsic return values via output pointers. This
296 /// helper checks if a vector call exists for the given intrinsic, and returns
297 /// the cost, which includes the cost of the mask (if required), and the loads
298 /// for values returned via output pointers. \p LC is the scalar libcall and
299 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
300 /// the call return value. If std::nullopt is returned, then no vector library
301 /// call is available, so the intrinsic should be assigned the default cost
302 /// (e.g. scalarization).
303 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
305 std::optional<unsigned> CallRetElementIndex = {}) const {
306 Type *RetTy = ICA.getReturnType();
307 // Vector variants of the intrinsic can be mapped to a vector library call.
308 auto const *LibInfo = ICA.getLibInfo();
309 if (!LibInfo || !isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, {}, CostKind, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
383
384public:
385 /// \name Scalar TTI Implementations
386 /// @{
388 unsigned AddressSpace, Align Alignment,
389 unsigned *Fast) const override {
390 EVT E = EVT::getIntegerVT(Context, BitWidth);
391 return getTLI()->allowsMisalignedMemoryAccesses(
393 }
394
395 bool areInlineCompatible(const Function *Caller,
396 const Function *Callee) const override {
397 const TargetMachine &TM = getTLI()->getTargetMachine();
398
399 const FeatureBitset &CallerBits =
400 TM.getSubtargetImpl(*Caller)->getFeatureBits();
401 const FeatureBitset &CalleeBits =
402 TM.getSubtargetImpl(*Callee)->getFeatureBits();
403
404 // Inline a callee if its target-features are a subset of the callers
405 // target-features.
406 return (CallerBits & CalleeBits) == CalleeBits;
407 }
408
409 bool hasBranchDivergence(const Function *F = nullptr) const override {
410 return false;
411 }
412
413 bool isSourceOfDivergence(const Value *V) const override { return false; }
414
415 bool isAlwaysUniform(const Value *V) const override { return false; }
416
417 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
418 return false;
419 }
420
421 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
422 return true;
423 }
424
425 unsigned getFlatAddressSpace() const override {
426 // Return an invalid address space.
427 return -1;
428 }
429
431 Intrinsic::ID IID) const override {
432 return false;
433 }
434
435 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
436 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
437 }
438
439 unsigned getAssumedAddrSpace(const Value *V) const override {
440 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
441 }
442
443 bool isSingleThreaded() const override {
444 return getTLI()->getTargetMachine().Options.ThreadModel ==
446 }
447
448 std::pair<const Value *, unsigned>
449 getPredicatedAddrSpace(const Value *V) const override {
450 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
451 }
452
454 Value *NewV) const override {
455 return nullptr;
456 }
457
458 bool isLegalAddImmediate(int64_t imm) const override {
459 return getTLI()->isLegalAddImmediate(imm);
460 }
461
462 bool isLegalAddScalableImmediate(int64_t Imm) const override {
463 return getTLI()->isLegalAddScalableImmediate(Imm);
464 }
465
466 bool isLegalICmpImmediate(int64_t imm) const override {
467 return getTLI()->isLegalICmpImmediate(imm);
468 }
469
470 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
471 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
472 Instruction *I = nullptr,
473 int64_t ScalableOffset = 0) const override {
475 AM.BaseGV = BaseGV;
476 AM.BaseOffs = BaseOffset;
477 AM.HasBaseReg = HasBaseReg;
478 AM.Scale = Scale;
479 AM.ScalableOffset = ScalableOffset;
480 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
481 }
482
483 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
484 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
485 }
486
487 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
488 Type *ScalarValTy) const override {
489 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy](unsigned VF) {
490 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
491 EVT VT = getTLI()->getValueType(DL, SrcTy);
492 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
493 getTLI()->isOperationCustom(ISD::STORE, VT))
494 return true;
495
496 EVT ValVT =
497 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
498 EVT LegalizedVT =
499 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
500 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT);
501 };
502 while (VF > 2 && IsSupportedByTarget(VF))
503 VF /= 2;
504 return VF;
505 }
506
507 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
508 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
509 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
510 }
511
512 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
513 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
514 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
515 }
516
518 const TTI::LSRCost &C2) const override {
520 }
521
525
529
533
535 StackOffset BaseOffset, bool HasBaseReg,
536 int64_t Scale,
537 unsigned AddrSpace) const override {
539 AM.BaseGV = BaseGV;
540 AM.BaseOffs = BaseOffset.getFixed();
541 AM.HasBaseReg = HasBaseReg;
542 AM.Scale = Scale;
543 AM.ScalableOffset = BaseOffset.getScalable();
544 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
545 return 0;
547 }
548
549 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
550 return getTLI()->isTruncateFree(Ty1, Ty2);
551 }
552
553 bool isProfitableToHoist(Instruction *I) const override {
554 return getTLI()->isProfitableToHoist(I);
555 }
556
557 bool useAA() const override { return getST()->useAA(); }
558
559 bool isTypeLegal(Type *Ty) const override {
560 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
561 return getTLI()->isTypeLegal(VT);
562 }
563
564 unsigned getRegUsageForType(Type *Ty) const override {
565 EVT ETy = getTLI()->getValueType(DL, Ty);
566 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
567 }
568
569 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
570 ArrayRef<const Value *> Operands, Type *AccessType,
571 TTI::TargetCostKind CostKind) const override {
572 return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
573 }
574
576 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
577 BlockFrequencyInfo *BFI) const override {
578 /// Try to find the estimated number of clusters. Note that the number of
579 /// clusters identified in this function could be different from the actual
580 /// numbers found in lowering. This function ignore switches that are
581 /// lowered with a mix of jump table / bit test / BTree. This function was
582 /// initially intended to be used when estimating the cost of switch in
583 /// inline cost heuristic, but it's a generic cost model to be used in other
584 /// places (e.g., in loop unrolling).
585 unsigned N = SI.getNumCases();
586 const TargetLoweringBase *TLI = getTLI();
587 const DataLayout &DL = this->getDataLayout();
588
589 JumpTableSize = 0;
590 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
591
592 // Early exit if both a jump table and bit test are not allowed.
593 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
594 return N;
595
596 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
597 APInt MinCaseVal = MaxCaseVal;
598 for (auto CI : SI.cases()) {
599 const APInt &CaseVal = CI.getCaseValue()->getValue();
600 if (CaseVal.sgt(MaxCaseVal))
601 MaxCaseVal = CaseVal;
602 if (CaseVal.slt(MinCaseVal))
603 MinCaseVal = CaseVal;
604 }
605
606 // Check if suitable for a bit test
607 if (N <= DL.getIndexSizeInBits(0u)) {
609 for (auto I : SI.cases()) {
610 const BasicBlock *BB = I.getCaseSuccessor();
611 ++DestMap[BB];
612 }
613
614 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
615 return 1;
616 }
617
618 // Check if suitable for a jump table.
619 if (IsJTAllowed) {
620 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
621 return N;
623 (MaxCaseVal - MinCaseVal)
624 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
625 // Check whether a range of clusters is dense enough for a jump table
626 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
627 JumpTableSize = Range;
628 return 1;
629 }
630 }
631 return N;
632 }
633
634 bool shouldBuildLookupTables() const override {
635 const TargetLoweringBase *TLI = getTLI();
636 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
637 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
638 }
639
640 bool shouldBuildRelLookupTables() const override {
641 const TargetMachine &TM = getTLI()->getTargetMachine();
642 // If non-PIC mode, do not generate a relative lookup table.
643 if (!TM.isPositionIndependent())
644 return false;
645
646 /// Relative lookup table entries consist of 32-bit offsets.
647 /// Do not generate relative lookup tables for large code models
648 /// in 64-bit achitectures where 32-bit offsets might not be enough.
649 if (TM.getCodeModel() == CodeModel::Medium ||
651 return false;
652
653 const Triple &TargetTriple = TM.getTargetTriple();
654 if (!TargetTriple.isArch64Bit())
655 return false;
656
657 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
658 // there.
659 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
660 return false;
661
662 return true;
663 }
664
665 bool haveFastSqrt(Type *Ty) const override {
666 const TargetLoweringBase *TLI = getTLI();
667 EVT VT = TLI->getValueType(DL, Ty);
668 return TLI->isTypeLegal(VT) &&
669 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
670 }
671
672 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
673
674 InstructionCost getFPOpCost(Type *Ty) const override {
675 // Check whether FADD is available, as a proxy for floating-point in
676 // general.
677 const TargetLoweringBase *TLI = getTLI();
678 EVT VT = TLI->getValueType(DL, Ty);
682 }
683
685 const Function &Fn) const override {
686 switch (Inst.getOpcode()) {
687 default:
688 break;
689 case Instruction::SDiv:
690 case Instruction::SRem:
691 case Instruction::UDiv:
692 case Instruction::URem: {
693 if (!isa<ConstantInt>(Inst.getOperand(1)))
694 return false;
695 EVT VT = getTLI()->getValueType(DL, Inst.getType());
696 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
697 }
698 };
699
700 return false;
701 }
702
703 unsigned getInliningThresholdMultiplier() const override { return 1; }
704 unsigned adjustInliningThreshold(const CallBase *CB) const override {
705 return 0;
706 }
707 unsigned getCallerAllocaCost(const CallBase *CB,
708 const AllocaInst *AI) const override {
709 return 0;
710 }
711
712 int getInlinerVectorBonusPercent() const override { return 150; }
713
716 OptimizationRemarkEmitter *ORE) const override {
717 // This unrolling functionality is target independent, but to provide some
718 // motivation for its intended use, for x86:
719
720 // According to the Intel 64 and IA-32 Architectures Optimization Reference
721 // Manual, Intel Core models and later have a loop stream detector (and
722 // associated uop queue) that can benefit from partial unrolling.
723 // The relevant requirements are:
724 // - The loop must have no more than 4 (8 for Nehalem and later) branches
725 // taken, and none of them may be calls.
726 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
727
728 // According to the Software Optimization Guide for AMD Family 15h
729 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
730 // and loop buffer which can benefit from partial unrolling.
731 // The relevant requirements are:
732 // - The loop must have fewer than 16 branches
733 // - The loop must have less than 40 uops in all executed loop branches
734
735 // The number of taken branches in a loop is hard to estimate here, and
736 // benchmarking has revealed that it is better not to be conservative when
737 // estimating the branch count. As a result, we'll ignore the branch limits
738 // until someone finds a case where it matters in practice.
739
740 unsigned MaxOps;
741 const TargetSubtargetInfo *ST = getST();
742 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
744 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
745 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
746 else
747 return;
748
749 // Scan the loop: don't unroll loops with calls.
750 for (BasicBlock *BB : L->blocks()) {
751 for (Instruction &I : *BB) {
752 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
753 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
754 if (!thisT()->isLoweredToCall(F))
755 continue;
756 }
757
758 if (ORE) {
759 ORE->emit([&]() {
760 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
761 L->getHeader())
762 << "advising against unrolling the loop because it "
763 "contains a "
764 << ore::NV("Call", &I);
765 });
766 }
767 return;
768 }
769 }
770 }
771
772 // Enable runtime and partial unrolling up to the specified size.
773 // Enable using trip count upper bound to unroll loops.
774 UP.Partial = UP.Runtime = UP.UpperBound = true;
775 UP.PartialThreshold = MaxOps;
776
777 // Avoid unrolling when optimizing for size.
778 UP.OptSizeThreshold = 0;
780
781 // Set number of instructions optimized when "back edge"
782 // becomes "fall through" to default value of 2.
783 UP.BEInsns = 2;
784 }
785
787 TTI::PeelingPreferences &PP) const override {
788 PP.PeelCount = 0;
789 PP.AllowPeeling = true;
790 PP.AllowLoopNestsPeeling = false;
791 PP.PeelProfiledIterations = true;
792 }
793
796 HardwareLoopInfo &HWLoopInfo) const override {
797 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
798 }
799
800 unsigned getEpilogueVectorizationMinVF() const override {
802 }
803
806 }
807
809 getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) const override {
810 return BaseT::getPreferredTailFoldingStyle(IVUpdateMayOverflow);
811 }
812
813 std::optional<Instruction *>
816 }
817
818 std::optional<Value *>
820 APInt DemandedMask, KnownBits &Known,
821 bool &KnownBitsComputed) const override {
822 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
823 KnownBitsComputed);
824 }
825
827 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
828 APInt &UndefElts2, APInt &UndefElts3,
829 std::function<void(Instruction *, unsigned, APInt, APInt &)>
830 SimplifyAndSetOp) const override {
832 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
833 SimplifyAndSetOp);
834 }
835
836 std::optional<unsigned>
838 return std::optional<unsigned>(
839 getST()->getCacheSize(static_cast<unsigned>(Level)));
840 }
841
842 std::optional<unsigned>
844 std::optional<unsigned> TargetResult =
845 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
846
847 if (TargetResult)
848 return TargetResult;
849
850 return BaseT::getCacheAssociativity(Level);
851 }
852
853 unsigned getCacheLineSize() const override {
854 return getST()->getCacheLineSize();
855 }
856
857 unsigned getPrefetchDistance() const override {
858 return getST()->getPrefetchDistance();
859 }
860
861 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
862 unsigned NumStridedMemAccesses,
863 unsigned NumPrefetches,
864 bool HasCall) const override {
865 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
866 NumPrefetches, HasCall);
867 }
868
869 unsigned getMaxPrefetchIterationsAhead() const override {
870 return getST()->getMaxPrefetchIterationsAhead();
871 }
872
873 bool enableWritePrefetching() const override {
874 return getST()->enableWritePrefetching();
875 }
876
877 bool shouldPrefetchAddressSpace(unsigned AS) const override {
878 return getST()->shouldPrefetchAddressSpace(AS);
879 }
880
881 /// @}
882
883 /// \name Vector TTI Implementations
884 /// @{
885
890
891 std::optional<unsigned> getMaxVScale() const override { return std::nullopt; }
892 std::optional<unsigned> getVScaleForTuning() const override {
893 return std::nullopt;
894 }
895 bool isVScaleKnownToBeAPowerOfTwo() const override { return false; }
896
897 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
898 /// are set if the demanded result elements need to be inserted and/or
899 /// extracted from vectors.
901 VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract,
902 TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
903 ArrayRef<Value *> VL = {}) const override {
904 /// FIXME: a bitfield is not a reasonable abstraction for talking about
905 /// which elements are needed from a scalable vector
906 if (isa<ScalableVectorType>(InTy))
908 auto *Ty = cast<FixedVectorType>(InTy);
909
910 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
911 (VL.empty() || VL.size() == Ty->getNumElements()) &&
912 "Vector size mismatch");
913
915
916 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
917 if (!DemandedElts[i])
918 continue;
919 if (Insert) {
920 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
921 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
922 CostKind, i, nullptr, InsertedVal);
923 }
924 if (Extract)
925 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
926 CostKind, i, nullptr, nullptr);
927 }
928
929 return Cost;
930 }
931
933 return false;
934 }
935
936 bool
938 unsigned ScalarOpdIdx) const override {
939 return false;
940 }
941
943 int OpdIdx) const override {
944 return OpdIdx == -1;
945 }
946
947 bool
949 int RetIdx) const override {
950 return RetIdx == 0;
951 }
952
953 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
955 bool Extract,
957 if (isa<ScalableVectorType>(InTy))
959 auto *Ty = cast<FixedVectorType>(InTy);
960
961 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
962 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
963 CostKind);
964 }
965
966 /// Estimate the overhead of scalarizing an instruction's
967 /// operands. The (potentially vector) types to use for each of
968 /// argument are passes via Tys.
970 ArrayRef<Type *> Tys, TTI::TargetCostKind CostKind) const override {
972 for (Type *Ty : Tys) {
973 // Disregard things like metadata arguments.
974 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
975 !Ty->isPtrOrPtrVectorTy())
976 continue;
977
978 if (auto *VecTy = dyn_cast<VectorType>(Ty))
979 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
980 /*Extract*/ true, CostKind);
981 }
982
983 return Cost;
984 }
985
986 /// Estimate the overhead of scalarizing the inputs and outputs of an
987 /// instruction, with return type RetTy and arguments Args of type Tys. If
988 /// Args are unknown (empty), then the cost associated with one argument is
989 /// added as a heuristic.
995 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
996 if (!Args.empty())
998 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
999 else
1000 // When no information on arguments is provided, we add the cost
1001 // associated with one argument as a heuristic.
1002 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1003 /*Extract*/ true, CostKind);
1004
1005 return Cost;
1006 }
1007
1008 /// Estimate the cost of type-legalization and the legalized type.
1009 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1010 LLVMContext &C = Ty->getContext();
1011 EVT MTy = getTLI()->getValueType(DL, Ty);
1012
1014 // We keep legalizing the type until we find a legal kind. We assume that
1015 // the only operation that costs anything is the split. After splitting
1016 // we need to handle two types.
1017 while (true) {
1018 TargetLoweringBase::LegalizeKind LK = getTLI()->getTypeConversion(C, MTy);
1019
1021 // Ensure we return a sensible simple VT here, since many callers of
1022 // this function require it.
1023 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1024 return std::make_pair(InstructionCost::getInvalid(), VT);
1025 }
1026
1027 if (LK.first == TargetLoweringBase::TypeLegal)
1028 return std::make_pair(Cost, MTy.getSimpleVT());
1029
1030 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1032 Cost *= 2;
1033
1034 // Do not loop with f128 type.
1035 if (MTy == LK.second)
1036 return std::make_pair(Cost, MTy.getSimpleVT());
1037
1038 // Keep legalizing the type.
1039 MTy = LK.second;
1040 }
1041 }
1042
1043 unsigned getMaxInterleaveFactor(ElementCount VF) const override { return 1; }
1044
1046 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1049 ArrayRef<const Value *> Args = {},
1050 const Instruction *CxtI = nullptr) const override {
1051 // Check if any of the operands are vector operands.
1052 const TargetLoweringBase *TLI = getTLI();
1053 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1054 assert(ISD && "Invalid opcode");
1055
1056 // TODO: Handle more cost kinds.
1058 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1059 Opd1Info, Opd2Info,
1060 Args, CxtI);
1061
1062 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1063
1064 bool IsFloat = Ty->isFPOrFPVectorTy();
1065 // Assume that floating point arithmetic operations cost twice as much as
1066 // integer operations.
1067 InstructionCost OpCost = (IsFloat ? 2 : 1);
1068
1069 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1070 // The operation is legal. Assume it costs 1.
1071 // TODO: Once we have extract/insert subvector cost we need to use them.
1072 return LT.first * OpCost;
1073 }
1074
1075 if (!TLI->isOperationExpand(ISD, LT.second)) {
1076 // If the operation is custom lowered, then assume that the code is twice
1077 // as expensive.
1078 return LT.first * 2 * OpCost;
1079 }
1080
1081 // An 'Expand' of URem and SRem is special because it may default
1082 // to expanding the operation into a sequence of sub-operations
1083 // i.e. X % Y -> X-(X/Y)*Y.
1084 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1085 bool IsSigned = ISD == ISD::SREM;
1086 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1087 LT.second) ||
1088 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1089 LT.second)) {
1090 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1091 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1092 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1093 InstructionCost MulCost =
1094 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1095 InstructionCost SubCost =
1096 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1097 return DivCost + MulCost + SubCost;
1098 }
1099 }
1100
1101 // We cannot scalarize scalable vectors, so return Invalid.
1104
1105 // Else, assume that we need to scalarize this op.
1106 // TODO: If one of the types get legalized by splitting, handle this
1107 // similarly to what getCastInstrCost() does.
1108 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1109 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1110 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1111 Args, CxtI);
1112 // Return the cost of multiple scalar invocation plus the cost of
1113 // inserting and extracting the values.
1114 SmallVector<Type *> Tys(Args.size(), Ty);
1115 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1116 VTy->getNumElements() * Cost;
1117 }
1118
1119 // We don't know anything about this scalar instruction.
1120 return OpCost;
1121 }
1122
1124 ArrayRef<int> Mask,
1125 VectorType *SrcTy, int &Index,
1126 VectorType *&SubTy) const {
1127 if (Mask.empty())
1128 return Kind;
1129 int NumDstElts = Mask.size();
1130 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1131 switch (Kind) {
1133 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1134 return TTI::SK_Reverse;
1135 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1136 return TTI::SK_Broadcast;
1137 if (isSplatMask(Mask, NumSrcElts, Index))
1138 return TTI::SK_Broadcast;
1139 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1140 (Index + NumDstElts) <= NumSrcElts) {
1141 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1143 }
1144 break;
1145 }
1146 case TTI::SK_PermuteTwoSrc: {
1147 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1149 Index, SubTy);
1150 int NumSubElts;
1151 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1152 Mask, NumSrcElts, NumSubElts, Index)) {
1153 if (Index + NumSubElts > NumSrcElts)
1154 return Kind;
1155 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1157 }
1158 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1159 return TTI::SK_Select;
1160 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1161 return TTI::SK_Transpose;
1162 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1163 return TTI::SK_Splice;
1164 break;
1165 }
1166 case TTI::SK_Select:
1167 case TTI::SK_Reverse:
1168 case TTI::SK_Broadcast:
1169 case TTI::SK_Transpose:
1172 case TTI::SK_Splice:
1173 break;
1174 }
1175 return Kind;
1176 }
1177
1181 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1182 const Instruction *CxtI = nullptr) const override {
1183 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1184 case TTI::SK_Broadcast:
1185 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1186 return getBroadcastShuffleOverhead(FVT, CostKind);
1188 case TTI::SK_Select:
1189 case TTI::SK_Splice:
1190 case TTI::SK_Reverse:
1191 case TTI::SK_Transpose:
1194 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1195 return getPermuteShuffleOverhead(FVT, CostKind);
1198 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1199 cast<FixedVectorType>(SubTp));
1201 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1202 cast<FixedVectorType>(SubTp));
1203 }
1204 llvm_unreachable("Unknown TTI::ShuffleKind");
1205 }
1206
1208 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1210 const Instruction *I = nullptr) const override {
1211 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1212 return 0;
1213
1214 const TargetLoweringBase *TLI = getTLI();
1215 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1216 assert(ISD && "Invalid opcode");
1217 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1218 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1219
1220 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1221 TypeSize DstSize = DstLT.second.getSizeInBits();
1222 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1223 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1224
1225 switch (Opcode) {
1226 default:
1227 break;
1228 case Instruction::Trunc:
1229 // Check for NOOP conversions.
1230 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1231 return 0;
1232 [[fallthrough]];
1233 case Instruction::BitCast:
1234 // Bitcast between types that are legalized to the same type are free and
1235 // assume int to/from ptr of the same size is also free.
1236 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1237 SrcSize == DstSize)
1238 return 0;
1239 break;
1240 case Instruction::FPExt:
1241 if (I && getTLI()->isExtFree(I))
1242 return 0;
1243 break;
1244 case Instruction::ZExt:
1245 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1246 return 0;
1247 [[fallthrough]];
1248 case Instruction::SExt:
1249 if (I && getTLI()->isExtFree(I))
1250 return 0;
1251
1252 // If this is a zext/sext of a load, return 0 if the corresponding
1253 // extending load exists on target and the result type is legal.
1254 if (CCH == TTI::CastContextHint::Normal) {
1255 EVT ExtVT = EVT::getEVT(Dst);
1256 EVT LoadVT = EVT::getEVT(Src);
1257 unsigned LType =
1258 ((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
1259 if (DstLT.first == SrcLT.first &&
1260 TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
1261 return 0;
1262 }
1263 break;
1264 case Instruction::AddrSpaceCast:
1265 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1266 Dst->getPointerAddressSpace()))
1267 return 0;
1268 break;
1269 }
1270
1271 auto *SrcVTy = dyn_cast<VectorType>(Src);
1272 auto *DstVTy = dyn_cast<VectorType>(Dst);
1273
1274 // If the cast is marked as legal (or promote) then assume low cost.
1275 if (SrcLT.first == DstLT.first &&
1276 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1277 return SrcLT.first;
1278
1279 // Handle scalar conversions.
1280 if (!SrcVTy && !DstVTy) {
1281 // Just check the op cost. If the operation is legal then assume it costs
1282 // 1.
1283 if (!TLI->isOperationExpand(ISD, DstLT.second))
1284 return 1;
1285
1286 // Assume that illegal scalar instruction are expensive.
1287 return 4;
1288 }
1289
1290 // Check vector-to-vector casts.
1291 if (DstVTy && SrcVTy) {
1292 // If the cast is between same-sized registers, then the check is simple.
1293 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1294
1295 // Assume that Zext is done using AND.
1296 if (Opcode == Instruction::ZExt)
1297 return SrcLT.first;
1298
1299 // Assume that sext is done using SHL and SRA.
1300 if (Opcode == Instruction::SExt)
1301 return SrcLT.first * 2;
1302
1303 // Just check the op cost. If the operation is legal then assume it
1304 // costs
1305 // 1 and multiply by the type-legalization overhead.
1306 if (!TLI->isOperationExpand(ISD, DstLT.second))
1307 return SrcLT.first * 1;
1308 }
1309
1310 // If we are legalizing by splitting, query the concrete TTI for the cost
1311 // of casting the original vector twice. We also need to factor in the
1312 // cost of the split itself. Count that as 1, to be consistent with
1313 // getTypeLegalizationCost().
1314 bool SplitSrc =
1315 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1317 bool SplitDst =
1318 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1320 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1321 DstVTy->getElementCount().isKnownEven()) {
1322 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1323 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1324 const T *TTI = thisT();
1325 // If both types need to be split then the split is free.
1326 InstructionCost SplitCost =
1327 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1328 return SplitCost +
1329 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1330 CostKind, I));
1331 }
1332
1333 // Scalarization cost is Invalid, can't assume any num elements.
1334 if (isa<ScalableVectorType>(DstVTy))
1336
1337 // In other cases where the source or destination are illegal, assume
1338 // the operation will get scalarized.
1339 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1340 InstructionCost Cost = thisT()->getCastInstrCost(
1341 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1342
1343 // Return the cost of multiple scalar invocation plus the cost of
1344 // inserting and extracting the values.
1345 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1346 CostKind) +
1347 Num * Cost;
1348 }
1349
1350 // We already handled vector-to-vector and scalar-to-scalar conversions.
1351 // This
1352 // is where we handle bitcast between vectors and scalars. We need to assume
1353 // that the conversion is scalarized in one way or another.
1354 if (Opcode == Instruction::BitCast) {
1355 // Illegal bitcasts are done by storing and loading from a stack slot.
1356 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1357 /*Extract*/ true, CostKind)
1358 : 0) +
1359 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1360 /*Extract*/ false, CostKind)
1361 : 0);
1362 }
1363
1364 llvm_unreachable("Unhandled cast");
1365 }
1366
1368 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1369 unsigned Index,
1370 TTI::TargetCostKind CostKind) const override {
1371 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1372 CostKind, Index, nullptr, nullptr) +
1373 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1375 }
1376
1379 const Instruction *I = nullptr) const override {
1380 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1381 }
1382
1384 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1388 const Instruction *I = nullptr) const override {
1389 const TargetLoweringBase *TLI = getTLI();
1390 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1391 assert(ISD && "Invalid opcode");
1392
1393 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1394 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1395 Op1Info, Op2Info, I);
1396
1397 // Selects on vectors are actually vector selects.
1398 if (ISD == ISD::SELECT) {
1399 assert(CondTy && "CondTy must exist");
1400 if (CondTy->isVectorTy())
1401 ISD = ISD::VSELECT;
1402 }
1403 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1404
1405 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1406 !TLI->isOperationExpand(ISD, LT.second)) {
1407 // The operation is legal. Assume it costs 1. Multiply
1408 // by the type-legalization overhead.
1409 return LT.first * 1;
1410 }
1411
1412 // Otherwise, assume that the cast is scalarized.
1413 // TODO: If one of the types get legalized by splitting, handle this
1414 // similarly to what getCastInstrCost() does.
1415 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1416 if (isa<ScalableVectorType>(ValTy))
1418
1419 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1420 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1421 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1422 CostKind, Op1Info, Op2Info, I);
1423
1424 // Return the cost of multiple scalar invocation plus the cost of
1425 // inserting and extracting the values.
1426 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1427 /*Extract*/ false, CostKind) +
1428 Num * Cost;
1429 }
1430
1431 // Unknown scalar opcode.
1432 return 1;
1433 }
1434
1437 unsigned Index, const Value *Op0,
1438 const Value *Op1) const override {
1439 return getRegUsageForType(Val->getScalarType());
1440 }
1441
1442 /// \param ScalarUserAndIdx encodes the information about extracts from a
1443 /// vector with 'Scalar' being the value being extracted,'User' being the user
1444 /// of the extract(nullptr if user is not known before vectorization) and
1445 /// 'Idx' being the extract lane.
1448 unsigned Index, Value *Scalar,
1449 ArrayRef<std::tuple<Value *, User *, int>>
1450 ScalarUserAndIdx) const override {
1451 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr,
1452 nullptr);
1453 }
1454
1457 unsigned Index) const override {
1458 Value *Op0 = nullptr;
1459 Value *Op1 = nullptr;
1460 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1461 Op0 = IE->getOperand(0);
1462 Op1 = IE->getOperand(1);
1463 }
1464 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1465 Op1);
1466 }
1467
1471 unsigned Index) const override {
1472 unsigned NewIndex = -1;
1473 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1474 assert(Index < FVTy->getNumElements() &&
1475 "Unexpected index from end of vector");
1476 NewIndex = FVTy->getNumElements() - 1 - Index;
1477 }
1478 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1479 nullptr);
1480 }
1481
1483 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1484 const APInt &DemandedDstElts,
1485 TTI::TargetCostKind CostKind) const override {
1486 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1487 "Unexpected size of DemandedDstElts.");
1488
1490
1491 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1492 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1493
1494 // The Mask shuffling cost is extract all the elements of the Mask
1495 // and insert each of them Factor times into the wide vector:
1496 //
1497 // E.g. an interleaved group with factor 3:
1498 // %mask = icmp ult <8 x i32> %vec1, %vec2
1499 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1500 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1501 // The cost is estimated as extract all mask elements from the <8xi1> mask
1502 // vector and insert them factor times into the <24xi1> shuffled mask
1503 // vector.
1504 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1505 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1506 /*Insert*/ false,
1507 /*Extract*/ true, CostKind);
1508 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1509 /*Insert*/ true,
1510 /*Extract*/ false, CostKind);
1511
1512 return Cost;
1513 }
1514
1516 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1519 const Instruction *I = nullptr) const override {
1520 assert(!Src->isVoidTy() && "Invalid type");
1521 // Assume types, such as structs, are expensive.
1522 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1523 return 4;
1524 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1525
1526 // Assuming that all loads of legal types cost 1.
1527 InstructionCost Cost = LT.first;
1529 return Cost;
1530
1531 const DataLayout &DL = this->getDataLayout();
1532 if (Src->isVectorTy() &&
1533 // In practice it's not currently possible to have a change in lane
1534 // length for extending loads or truncating stores so both types should
1535 // have the same scalable property.
1536 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1537 LT.second.getSizeInBits())) {
1538 // This is a vector load that legalizes to a larger type than the vector
1539 // itself. Unless the corresponding extending load or truncating store is
1540 // legal, then this will scalarize.
1542 EVT MemVT = getTLI()->getValueType(DL, Src);
1543 if (Opcode == Instruction::Store)
1544 LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
1545 else
1546 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
1547
1548 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1549 // This is a vector load/store for some illegal type that is scalarized.
1550 // We must account for the cost of building or decomposing the vector.
1552 cast<VectorType>(Src), Opcode != Instruction::Store,
1553 Opcode == Instruction::Store, CostKind);
1554 }
1555 }
1556
1557 return Cost;
1558 }
1559
1562 TTI::TargetCostKind CostKind) const override {
1563 Type *DataTy = MICA.getDataType();
1564 Align Alignment = MICA.getAlignment();
1565 unsigned Opcode = MICA.getID() == Intrinsic::masked_load
1566 ? Instruction::Load
1567 : Instruction::Store;
1568 // TODO: Pass on AddressSpace when we have test coverage.
1569 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
1570 CostKind);
1571 }
1572
1574 getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr,
1575 bool VariableMask, Align Alignment,
1577 const Instruction *I = nullptr) const override {
1578 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, VariableMask,
1579 true, CostKind);
1580 }
1581
1584 TTI::TargetCostKind CostKind) const override {
1585 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
1586 ? Instruction::Load
1587 : Instruction::Store;
1588 Type *DataTy = MICA.getDataType();
1589 bool VariableMask = MICA.getVariableMask();
1590 Align Alignment = MICA.getAlignment();
1591 // Treat expand load/compress store as gather/scatter operation.
1592 // TODO: implement more precise cost estimation for these intrinsics.
1593 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, VariableMask,
1594 /*IsGatherScatter*/ true, CostKind);
1595 }
1596
1598 const Value *Ptr, bool VariableMask,
1599 Align Alignment,
1601 const Instruction *I) const override {
1602 // For a target without strided memory operations (or for an illegal
1603 // operation type on one which does), assume we lower to a gather/scatter
1604 // operation. (Which may in turn be scalarized.)
1605 return thisT()->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
1606 Alignment, CostKind, I);
1607 }
1608
1610 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1611 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1612 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1613
1614 // We cannot scalarize scalable vectors, so return Invalid.
1615 if (isa<ScalableVectorType>(VecTy))
1617
1618 auto *VT = cast<FixedVectorType>(VecTy);
1619
1620 unsigned NumElts = VT->getNumElements();
1621 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1622
1623 unsigned NumSubElts = NumElts / Factor;
1624 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1625
1626 // Firstly, the cost of load/store operation.
1628 if (UseMaskForCond || UseMaskForGaps) {
1629 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1630 : Intrinsic::masked_store;
1631 Cost = thisT()->getMemIntrinsicInstrCost(
1632 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1633 CostKind);
1634 } else
1635 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1636 CostKind);
1637
1638 // Legalize the vector type, and get the legalized and unlegalized type
1639 // sizes.
1640 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1641 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1642 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1643
1644 // Scale the cost of the memory operation by the fraction of legalized
1645 // instructions that will actually be used. We shouldn't account for the
1646 // cost of dead instructions since they will be removed.
1647 //
1648 // E.g., An interleaved load of factor 8:
1649 // %vec = load <16 x i64>, <16 x i64>* %ptr
1650 // %v0 = shufflevector %vec, undef, <0, 8>
1651 //
1652 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1653 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1654 // type). The other loads are unused.
1655 //
1656 // TODO: Note that legalization can turn masked loads/stores into unmasked
1657 // (legalized) loads/stores. This can be reflected in the cost.
1658 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1659 // The number of loads of a legal type it will take to represent a load
1660 // of the unlegalized vector type.
1661 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1662
1663 // The number of elements of the unlegalized type that correspond to a
1664 // single legal instruction.
1665 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1666
1667 // Determine which legal instructions will be used.
1668 BitVector UsedInsts(NumLegalInsts, false);
1669 for (unsigned Index : Indices)
1670 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1671 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1672
1673 // Scale the cost of the load by the fraction of legal instructions that
1674 // will be used.
1675 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1676 }
1677
1678 // Then plus the cost of interleave operation.
1679 assert(Indices.size() <= Factor &&
1680 "Interleaved memory op has too many members");
1681
1682 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1683 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1684
1685 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1686 for (unsigned Index : Indices) {
1687 assert(Index < Factor && "Invalid index for interleaved memory op");
1688 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1689 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1690 }
1691
1692 if (Opcode == Instruction::Load) {
1693 // The interleave cost is similar to extract sub vectors' elements
1694 // from the wide vector, and insert them into sub vectors.
1695 //
1696 // E.g. An interleaved load of factor 2 (with one member of index 0):
1697 // %vec = load <8 x i32>, <8 x i32>* %ptr
1698 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1699 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1700 // <8 x i32> vector and insert them into a <4 x i32> vector.
1701 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1702 SubVT, DemandedAllSubElts,
1703 /*Insert*/ true, /*Extract*/ false, CostKind);
1704 Cost += Indices.size() * InsSubCost;
1705 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1706 /*Insert*/ false,
1707 /*Extract*/ true, CostKind);
1708 } else {
1709 // The interleave cost is extract elements from sub vectors, and
1710 // insert them into the wide vector.
1711 //
1712 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1713 // (using VF=4):
1714 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1715 // %gaps.mask = <true, true, false, true, true, false,
1716 // true, true, false, true, true, false>
1717 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1718 // i32 Align, <12 x i1> %gaps.mask
1719 // The cost is estimated as extract all elements (of actual members,
1720 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1721 // i32> vector.
1722 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1723 SubVT, DemandedAllSubElts,
1724 /*Insert*/ false, /*Extract*/ true, CostKind);
1725 Cost += ExtSubCost * Indices.size();
1726 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1727 /*Insert*/ true,
1728 /*Extract*/ false, CostKind);
1729 }
1730
1731 if (!UseMaskForCond)
1732 return Cost;
1733
1734 Type *I8Type = Type::getInt8Ty(VT->getContext());
1735
1736 Cost += thisT()->getReplicationShuffleCost(
1737 I8Type, Factor, NumSubElts,
1738 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1739 CostKind);
1740
1741 // The Gaps mask is invariant and created outside the loop, therefore the
1742 // cost of creating it is not accounted for here. However if we have both
1743 // a MaskForGaps and some other mask that guards the execution of the
1744 // memory access, we need to account for the cost of And-ing the two masks
1745 // inside the loop.
1746 if (UseMaskForGaps) {
1747 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1748 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1749 CostKind);
1750 }
1751
1752 return Cost;
1753 }
1754
1755 /// Get intrinsic cost based on arguments.
1758 TTI::TargetCostKind CostKind) const override {
1759 // Check for generically free intrinsics.
1761 return 0;
1762
1763 // Assume that target intrinsics are cheap.
1764 Intrinsic::ID IID = ICA.getID();
1767
1768 // VP Intrinsics should have the same cost as their non-vp counterpart.
1769 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1770 // counterpart when the vector length argument is smaller than the maximum
1771 // vector length.
1772 // TODO: Support other kinds of VPIntrinsics
1773 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1774 std::optional<unsigned> FOp =
1776 if (FOp) {
1777 if (ICA.getID() == Intrinsic::vp_load) {
1778 Align Alignment;
1779 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1780 Alignment = VPI->getPointerAlignment().valueOrOne();
1781 unsigned AS = 0;
1782 if (ICA.getArgTypes().size() > 1)
1783 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1784 AS = PtrTy->getAddressSpace();
1785 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1786 AS, CostKind);
1787 }
1788 if (ICA.getID() == Intrinsic::vp_store) {
1789 Align Alignment;
1790 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1791 Alignment = VPI->getPointerAlignment().valueOrOne();
1792 unsigned AS = 0;
1793 if (ICA.getArgTypes().size() >= 2)
1794 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1795 AS = PtrTy->getAddressSpace();
1796 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1797 AS, CostKind);
1798 }
1800 ICA.getID() == Intrinsic::vp_fneg) {
1801 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1802 CostKind);
1803 }
1804 if (VPCastIntrinsic::isVPCast(ICA.getID())) {
1805 return thisT()->getCastInstrCost(
1806 *FOp, ICA.getReturnType(), ICA.getArgTypes()[0],
1808 }
1809 if (VPCmpIntrinsic::isVPCmp(ICA.getID())) {
1810 // We can only handle vp_cmp intrinsics with underlying instructions.
1811 if (ICA.getInst()) {
1812 assert(FOp);
1813 auto *UI = cast<VPCmpIntrinsic>(ICA.getInst());
1814 return thisT()->getCmpSelInstrCost(*FOp, ICA.getArgTypes()[0],
1815 ICA.getReturnType(),
1816 UI->getPredicate(), CostKind);
1817 }
1818 }
1819 }
1820
1821 if (ICA.getID() == Intrinsic::vp_scatter) {
1822 if (ICA.isTypeBasedOnly()) {
1823 IntrinsicCostAttributes MaskedScatter(
1826 ICA.getFlags());
1827 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1828 }
1829 Align Alignment;
1830 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1831 Alignment = VPI->getPointerAlignment().valueOrOne();
1832 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1833 return thisT()->getMemIntrinsicInstrCost(
1834 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1835 ICA.getArgTypes()[0], ICA.getArgs()[1],
1836 VarMask, Alignment, nullptr),
1837 CostKind);
1838 }
1839 if (ICA.getID() == Intrinsic::vp_gather) {
1840 if (ICA.isTypeBasedOnly()) {
1841 IntrinsicCostAttributes MaskedGather(
1844 ICA.getFlags());
1845 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1846 }
1847 Align Alignment;
1848 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1849 Alignment = VPI->getPointerAlignment().valueOrOne();
1850 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1851 return thisT()->getMemIntrinsicInstrCost(
1852 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1853 ICA.getReturnType(), ICA.getArgs()[0],
1854 VarMask, Alignment, nullptr),
1855 CostKind);
1856 }
1857
1858 if (ICA.getID() == Intrinsic::vp_select ||
1859 ICA.getID() == Intrinsic::vp_merge) {
1860 TTI::OperandValueInfo OpInfoX, OpInfoY;
1861 if (!ICA.isTypeBasedOnly()) {
1862 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1863 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1864 }
1865 return getCmpSelInstrCost(
1866 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1867 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1868 }
1869
1870 std::optional<Intrinsic::ID> FID =
1872
1873 // Not functionally equivalent but close enough for cost modelling.
1874 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1875 FID = Intrinsic::vector_reverse;
1876
1877 if (FID) {
1878 // Non-vp version will have same arg types except mask and vector
1879 // length.
1880 assert(ICA.getArgTypes().size() >= 2 &&
1881 "Expected VPIntrinsic to have Mask and Vector Length args and "
1882 "types");
1883
1884 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1885 if (!ICA.isTypeBasedOnly())
1886 NewArgs = NewArgs.drop_back(2);
1888
1889 // VPReduction intrinsics have a start value argument that their non-vp
1890 // counterparts do not have, except for the fadd and fmul non-vp
1891 // counterpart.
1893 *FID != Intrinsic::vector_reduce_fadd &&
1894 *FID != Intrinsic::vector_reduce_fmul) {
1895 if (!ICA.isTypeBasedOnly())
1896 NewArgs = NewArgs.drop_front();
1897 NewTys = NewTys.drop_front();
1898 }
1899
1900 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1901 NewTys, ICA.getFlags());
1902 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1903 }
1904 }
1905
1906 if (ICA.isTypeBasedOnly())
1908
1909 Type *RetTy = ICA.getReturnType();
1910
1911 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1913
1914 const IntrinsicInst *I = ICA.getInst();
1915 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1916 FastMathFlags FMF = ICA.getFlags();
1917 switch (IID) {
1918 default:
1919 break;
1920
1921 case Intrinsic::powi:
1922 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1923 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1924 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1925 ShouldOptForSize)) {
1926 // The cost is modeled on the expansion performed by ExpandPowI in
1927 // SelectionDAGBuilder.
1928 APInt Exponent = RHSC->getValue().abs();
1929 unsigned ActiveBits = Exponent.getActiveBits();
1930 unsigned PopCount = Exponent.popcount();
1931 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1932 thisT()->getArithmeticInstrCost(
1933 Instruction::FMul, RetTy, CostKind);
1934 if (RHSC->isNegative())
1935 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1936 CostKind);
1937 return Cost;
1938 }
1939 }
1940 break;
1941 case Intrinsic::cttz:
1942 // FIXME: If necessary, this should go in target-specific overrides.
1943 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1945 break;
1946
1947 case Intrinsic::ctlz:
1948 // FIXME: If necessary, this should go in target-specific overrides.
1949 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1951 break;
1952
1953 case Intrinsic::memcpy:
1954 return thisT()->getMemcpyCost(ICA.getInst());
1955
1956 case Intrinsic::masked_scatter: {
1957 const Value *Mask = Args[2];
1958 bool VarMask = !isa<Constant>(Mask);
1959 Align Alignment = I->getParamAlign(1).valueOrOne();
1960 return thisT()->getMemIntrinsicInstrCost(
1961 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1962 ICA.getArgTypes()[0], Args[1], VarMask,
1963 Alignment, I),
1964 CostKind);
1965 }
1966 case Intrinsic::masked_gather: {
1967 const Value *Mask = Args[1];
1968 bool VarMask = !isa<Constant>(Mask);
1969 Align Alignment = I->getParamAlign(0).valueOrOne();
1970 return thisT()->getMemIntrinsicInstrCost(
1971 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
1972 VarMask, Alignment, I),
1973 CostKind);
1974 }
1975 case Intrinsic::masked_compressstore: {
1976 const Value *Data = Args[0];
1977 const Value *Mask = Args[2];
1978 Align Alignment = I->getParamAlign(1).valueOrOne();
1979 return thisT()->getMemIntrinsicInstrCost(
1980 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
1981 Alignment, I),
1982 CostKind);
1983 }
1984 case Intrinsic::masked_expandload: {
1985 const Value *Mask = Args[1];
1986 Align Alignment = I->getParamAlign(0).valueOrOne();
1987 return thisT()->getMemIntrinsicInstrCost(
1988 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
1989 Alignment, I),
1990 CostKind);
1991 }
1992 case Intrinsic::experimental_vp_strided_store: {
1993 const Value *Data = Args[0];
1994 const Value *Ptr = Args[1];
1995 const Value *Mask = Args[3];
1996 const Value *EVL = Args[4];
1997 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
1998 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
1999 Align Alignment =
2000 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
2001 return thisT()->getMemIntrinsicInstrCost(
2002 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
2003 Alignment, I),
2004 CostKind);
2005 }
2006 case Intrinsic::experimental_vp_strided_load: {
2007 const Value *Ptr = Args[0];
2008 const Value *Mask = Args[2];
2009 const Value *EVL = Args[3];
2010 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2011 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2012 Align Alignment =
2013 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2014 return thisT()->getMemIntrinsicInstrCost(
2015 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2016 CostKind);
2017 }
2018 case Intrinsic::stepvector: {
2019 if (isa<ScalableVectorType>(RetTy))
2021 // The cost of materialising a constant integer vector.
2023 }
2024 case Intrinsic::vector_extract: {
2025 // FIXME: Handle case where a scalable vector is extracted from a scalable
2026 // vector
2027 if (isa<ScalableVectorType>(RetTy))
2029 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2030 return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
2031 cast<VectorType>(RetTy),
2032 cast<VectorType>(Args[0]->getType()), {},
2033 CostKind, Index, cast<VectorType>(RetTy));
2034 }
2035 case Intrinsic::vector_insert: {
2036 // FIXME: Handle case where a scalable vector is inserted into a scalable
2037 // vector
2038 if (isa<ScalableVectorType>(Args[1]->getType()))
2040 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2041 return thisT()->getShuffleCost(
2043 cast<VectorType>(Args[0]->getType()), {}, CostKind, Index,
2044 cast<VectorType>(Args[1]->getType()));
2045 }
2046 case Intrinsic::vector_splice: {
2047 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2048 return thisT()->getShuffleCost(TTI::SK_Splice, cast<VectorType>(RetTy),
2049 cast<VectorType>(Args[0]->getType()), {},
2050 CostKind, Index, cast<VectorType>(RetTy));
2051 }
2052 case Intrinsic::vector_reduce_add:
2053 case Intrinsic::vector_reduce_mul:
2054 case Intrinsic::vector_reduce_and:
2055 case Intrinsic::vector_reduce_or:
2056 case Intrinsic::vector_reduce_xor:
2057 case Intrinsic::vector_reduce_smax:
2058 case Intrinsic::vector_reduce_smin:
2059 case Intrinsic::vector_reduce_fmax:
2060 case Intrinsic::vector_reduce_fmin:
2061 case Intrinsic::vector_reduce_fmaximum:
2062 case Intrinsic::vector_reduce_fminimum:
2063 case Intrinsic::vector_reduce_umax:
2064 case Intrinsic::vector_reduce_umin: {
2065 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2067 }
2068 case Intrinsic::vector_reduce_fadd:
2069 case Intrinsic::vector_reduce_fmul: {
2071 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2073 }
2074 case Intrinsic::fshl:
2075 case Intrinsic::fshr: {
2076 const Value *X = Args[0];
2077 const Value *Y = Args[1];
2078 const Value *Z = Args[2];
2081 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2082
2083 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2084 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2086 Cost +=
2087 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2088 Cost +=
2089 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
2090 Cost += thisT()->getArithmeticInstrCost(
2091 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2092 {OpInfoZ.Kind, TTI::OP_None});
2093 Cost += thisT()->getArithmeticInstrCost(
2094 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2095 {OpInfoZ.Kind, TTI::OP_None});
2096 // Non-constant shift amounts requires a modulo. If the typesize is a
2097 // power-2 then this will be converted to an and, otherwise it will use a
2098 // urem.
2099 if (!OpInfoZ.isConstant())
2100 Cost += thisT()->getArithmeticInstrCost(
2101 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2102 : BinaryOperator::URem,
2103 RetTy, CostKind, OpInfoZ,
2104 {TTI::OK_UniformConstantValue, TTI::OP_None});
2105 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2106 if (X != Y) {
2107 Type *CondTy = RetTy->getWithNewBitWidth(1);
2108 Cost +=
2109 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2111 Cost +=
2112 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2114 }
2115 return Cost;
2116 }
2117 case Intrinsic::experimental_cttz_elts: {
2118 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2119
2120 // If we're not expanding the intrinsic then we assume this is cheap
2121 // to implement.
2122 if (!getTLI()->shouldExpandCttzElements(ArgType))
2123 return getTypeLegalizationCost(RetTy).first;
2124
2125 // TODO: The costs below reflect the expansion code in
2126 // SelectionDAGBuilder, but we may want to sacrifice some accuracy in
2127 // favour of compile time.
2128
2129 // Find the smallest "sensible" element type to use for the expansion.
2130 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2131 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2132 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2133 VScaleRange = getVScaleRange(I->getCaller(), 64);
2134
2135 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2136 RetTy, ArgType.getVectorElementCount(), ZeroIsPoison, &VScaleRange);
2137 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2138
2139 // Create the new vector type & get the vector length
2140 Type *NewVecTy = VectorType::get(
2141 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2142
2143 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2144 FMF);
2146 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2147
2148 Cost +=
2149 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2150 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2151 Args[0]->getType(),
2153 Cost +=
2154 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2155
2156 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2157 NewEltTy, NewVecTy, FMF, I, 1);
2158 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2159 Cost +=
2160 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2161
2162 return Cost;
2163 }
2164 case Intrinsic::get_active_lane_mask:
2165 case Intrinsic::experimental_vector_match:
2166 case Intrinsic::experimental_vector_histogram_add:
2167 case Intrinsic::experimental_vector_histogram_uadd_sat:
2168 case Intrinsic::experimental_vector_histogram_umax:
2169 case Intrinsic::experimental_vector_histogram_umin:
2170 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2171 case Intrinsic::modf:
2172 case Intrinsic::sincos:
2173 case Intrinsic::sincospi: {
2174 std::optional<unsigned> CallRetElementIndex;
2175 // The first element of the modf result is returned by value in the
2176 // libcall.
2177 if (ICA.getID() == Intrinsic::modf)
2178 CallRetElementIndex = 0;
2179
2180 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2181 ICA, CostKind, CallRetElementIndex))
2182 return *Cost;
2183 // Otherwise, fallback to default scalarization cost.
2184 break;
2185 }
2186 }
2187
2188 // Assume that we need to scalarize this intrinsic.)
2189 // Compute the scalarization overhead based on Args for a vector
2190 // intrinsic.
2191 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2192 if (RetVF.isVector() && !RetVF.isScalable()) {
2193 ScalarizationCost = 0;
2194 if (!RetTy->isVoidTy()) {
2195 for (Type *VectorTy : getContainedTypes(RetTy)) {
2196 ScalarizationCost += getScalarizationOverhead(
2197 cast<VectorType>(VectorTy),
2198 /*Insert=*/true, /*Extract=*/false, CostKind);
2199 }
2200 }
2201 ScalarizationCost += getOperandsScalarizationOverhead(
2202 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2203 CostKind);
2204 }
2205
2206 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2207 ScalarizationCost);
2208 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2209 }
2210
2211 /// Get intrinsic cost based on argument types.
2212 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2213 /// cost of scalarizing the arguments and the return value will be computed
2214 /// based on types.
2218 Intrinsic::ID IID = ICA.getID();
2219 Type *RetTy = ICA.getReturnType();
2220 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2221 FastMathFlags FMF = ICA.getFlags();
2222 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2223 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2224
2225 VectorType *VecOpTy = nullptr;
2226 if (!Tys.empty()) {
2227 // The vector reduction operand is operand 0 except for fadd/fmul.
2228 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2229 unsigned VecTyIndex = 0;
2230 if (IID == Intrinsic::vector_reduce_fadd ||
2231 IID == Intrinsic::vector_reduce_fmul)
2232 VecTyIndex = 1;
2233 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2234 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2235 }
2236
2237 // Library call cost - other than size, make it expensive.
2238 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2239 unsigned ISD = 0;
2240 switch (IID) {
2241 default: {
2242 // Scalable vectors cannot be scalarized, so return Invalid.
2243 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2244 return isa<ScalableVectorType>(Ty);
2245 }))
2247
2248 // Assume that we need to scalarize this intrinsic.
2249 InstructionCost ScalarizationCost =
2250 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2251 unsigned ScalarCalls = 1;
2252 Type *ScalarRetTy = RetTy;
2253 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2254 if (!SkipScalarizationCost)
2255 ScalarizationCost = getScalarizationOverhead(
2256 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2257 ScalarCalls = std::max(ScalarCalls,
2259 ScalarRetTy = RetTy->getScalarType();
2260 }
2261 SmallVector<Type *, 4> ScalarTys;
2262 for (Type *Ty : Tys) {
2263 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2264 if (!SkipScalarizationCost)
2265 ScalarizationCost += getScalarizationOverhead(
2266 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2267 ScalarCalls = std::max(ScalarCalls,
2269 Ty = Ty->getScalarType();
2270 }
2271 ScalarTys.push_back(Ty);
2272 }
2273 if (ScalarCalls == 1)
2274 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2275
2276 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2277 InstructionCost ScalarCost =
2278 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2279
2280 return ScalarCalls * ScalarCost + ScalarizationCost;
2281 }
2282 // Look for intrinsics that can be lowered directly or turned into a scalar
2283 // intrinsic call.
2284 case Intrinsic::sqrt:
2285 ISD = ISD::FSQRT;
2286 break;
2287 case Intrinsic::sin:
2288 ISD = ISD::FSIN;
2289 break;
2290 case Intrinsic::cos:
2291 ISD = ISD::FCOS;
2292 break;
2293 case Intrinsic::sincos:
2294 ISD = ISD::FSINCOS;
2295 break;
2296 case Intrinsic::sincospi:
2297 ISD = ISD::FSINCOSPI;
2298 break;
2299 case Intrinsic::modf:
2300 ISD = ISD::FMODF;
2301 break;
2302 case Intrinsic::tan:
2303 ISD = ISD::FTAN;
2304 break;
2305 case Intrinsic::asin:
2306 ISD = ISD::FASIN;
2307 break;
2308 case Intrinsic::acos:
2309 ISD = ISD::FACOS;
2310 break;
2311 case Intrinsic::atan:
2312 ISD = ISD::FATAN;
2313 break;
2314 case Intrinsic::atan2:
2315 ISD = ISD::FATAN2;
2316 break;
2317 case Intrinsic::sinh:
2318 ISD = ISD::FSINH;
2319 break;
2320 case Intrinsic::cosh:
2321 ISD = ISD::FCOSH;
2322 break;
2323 case Intrinsic::tanh:
2324 ISD = ISD::FTANH;
2325 break;
2326 case Intrinsic::exp:
2327 ISD = ISD::FEXP;
2328 break;
2329 case Intrinsic::exp2:
2330 ISD = ISD::FEXP2;
2331 break;
2332 case Intrinsic::exp10:
2333 ISD = ISD::FEXP10;
2334 break;
2335 case Intrinsic::log:
2336 ISD = ISD::FLOG;
2337 break;
2338 case Intrinsic::log10:
2339 ISD = ISD::FLOG10;
2340 break;
2341 case Intrinsic::log2:
2342 ISD = ISD::FLOG2;
2343 break;
2344 case Intrinsic::ldexp:
2345 ISD = ISD::FLDEXP;
2346 break;
2347 case Intrinsic::fabs:
2348 ISD = ISD::FABS;
2349 break;
2350 case Intrinsic::canonicalize:
2352 break;
2353 case Intrinsic::minnum:
2354 ISD = ISD::FMINNUM;
2355 break;
2356 case Intrinsic::maxnum:
2357 ISD = ISD::FMAXNUM;
2358 break;
2359 case Intrinsic::minimum:
2360 ISD = ISD::FMINIMUM;
2361 break;
2362 case Intrinsic::maximum:
2363 ISD = ISD::FMAXIMUM;
2364 break;
2365 case Intrinsic::minimumnum:
2366 ISD = ISD::FMINIMUMNUM;
2367 break;
2368 case Intrinsic::maximumnum:
2369 ISD = ISD::FMAXIMUMNUM;
2370 break;
2371 case Intrinsic::copysign:
2373 break;
2374 case Intrinsic::floor:
2375 ISD = ISD::FFLOOR;
2376 break;
2377 case Intrinsic::ceil:
2378 ISD = ISD::FCEIL;
2379 break;
2380 case Intrinsic::trunc:
2381 ISD = ISD::FTRUNC;
2382 break;
2383 case Intrinsic::nearbyint:
2384 ISD = ISD::FNEARBYINT;
2385 break;
2386 case Intrinsic::rint:
2387 ISD = ISD::FRINT;
2388 break;
2389 case Intrinsic::lrint:
2390 ISD = ISD::LRINT;
2391 break;
2392 case Intrinsic::llrint:
2393 ISD = ISD::LLRINT;
2394 break;
2395 case Intrinsic::round:
2396 ISD = ISD::FROUND;
2397 break;
2398 case Intrinsic::roundeven:
2399 ISD = ISD::FROUNDEVEN;
2400 break;
2401 case Intrinsic::lround:
2402 ISD = ISD::LROUND;
2403 break;
2404 case Intrinsic::llround:
2405 ISD = ISD::LLROUND;
2406 break;
2407 case Intrinsic::pow:
2408 ISD = ISD::FPOW;
2409 break;
2410 case Intrinsic::fma:
2411 ISD = ISD::FMA;
2412 break;
2413 case Intrinsic::fmuladd:
2414 ISD = ISD::FMA;
2415 break;
2416 case Intrinsic::experimental_constrained_fmuladd:
2418 break;
2419 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2420 case Intrinsic::lifetime_start:
2421 case Intrinsic::lifetime_end:
2422 case Intrinsic::sideeffect:
2423 case Intrinsic::pseudoprobe:
2424 case Intrinsic::arithmetic_fence:
2425 return 0;
2426 case Intrinsic::masked_store: {
2427 Type *Ty = Tys[0];
2428 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2429 return thisT()->getMemIntrinsicInstrCost(
2430 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2431 }
2432 case Intrinsic::masked_load: {
2433 Type *Ty = RetTy;
2434 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2435 return thisT()->getMemIntrinsicInstrCost(
2436 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2437 }
2438 case Intrinsic::experimental_vp_strided_store: {
2439 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2440 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2441 return thisT()->getMemIntrinsicInstrCost(
2442 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2443 /*VariableMask=*/true, Alignment,
2444 ICA.getInst()),
2445 CostKind);
2446 }
2447 case Intrinsic::experimental_vp_strided_load: {
2448 auto *Ty = cast<VectorType>(ICA.getReturnType());
2449 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2450 return thisT()->getMemIntrinsicInstrCost(
2451 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2452 /*VariableMask=*/true, Alignment,
2453 ICA.getInst()),
2454 CostKind);
2455 }
2456 case Intrinsic::vector_reduce_add:
2457 case Intrinsic::vector_reduce_mul:
2458 case Intrinsic::vector_reduce_and:
2459 case Intrinsic::vector_reduce_or:
2460 case Intrinsic::vector_reduce_xor:
2461 return thisT()->getArithmeticReductionCost(
2462 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2463 CostKind);
2464 case Intrinsic::vector_reduce_fadd:
2465 case Intrinsic::vector_reduce_fmul:
2466 return thisT()->getArithmeticReductionCost(
2467 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2468 case Intrinsic::vector_reduce_smax:
2469 case Intrinsic::vector_reduce_smin:
2470 case Intrinsic::vector_reduce_umax:
2471 case Intrinsic::vector_reduce_umin:
2472 case Intrinsic::vector_reduce_fmax:
2473 case Intrinsic::vector_reduce_fmin:
2474 case Intrinsic::vector_reduce_fmaximum:
2475 case Intrinsic::vector_reduce_fminimum:
2476 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2477 VecOpTy, ICA.getFlags(), CostKind);
2478 case Intrinsic::experimental_vector_match: {
2479 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2480 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2481 unsigned SearchSize = NeedleTy->getNumElements();
2482
2483 // If we're not expanding the intrinsic then we assume this is cheap to
2484 // implement.
2485 EVT SearchVT = getTLI()->getValueType(DL, SearchTy);
2486 if (!getTLI()->shouldExpandVectorMatch(SearchVT, SearchSize))
2487 return getTypeLegalizationCost(RetTy).first;
2488
2489 // Approximate the cost based on the expansion code in
2490 // SelectionDAGBuilder.
2492 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2493 CostKind, 1, nullptr, nullptr);
2494 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2495 CostKind, 0, nullptr, nullptr);
2496 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy, {},
2497 CostKind, 0, nullptr);
2498 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2500 Cost +=
2501 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2502 Cost *= SearchSize;
2503 Cost +=
2504 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2505 return Cost;
2506 }
2507 case Intrinsic::vector_reverse:
2508 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2509 cast<VectorType>(ICA.getArgTypes()[0]), {},
2510 CostKind, 0, cast<VectorType>(RetTy));
2511 case Intrinsic::experimental_vector_histogram_add:
2512 case Intrinsic::experimental_vector_histogram_uadd_sat:
2513 case Intrinsic::experimental_vector_histogram_umax:
2514 case Intrinsic::experimental_vector_histogram_umin: {
2516 Type *EltTy = ICA.getArgTypes()[1];
2517
2518 // Targets with scalable vectors must handle this on their own.
2519 if (!PtrsTy)
2521
2522 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2524 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2525 CostKind, 1, nullptr, nullptr);
2526 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2527 CostKind);
2528 switch (IID) {
2529 default:
2530 llvm_unreachable("Unhandled histogram update operation.");
2531 case Intrinsic::experimental_vector_histogram_add:
2532 Cost +=
2533 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2534 break;
2535 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2536 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2537 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2538 break;
2539 }
2540 case Intrinsic::experimental_vector_histogram_umax: {
2541 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2542 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2543 break;
2544 }
2545 case Intrinsic::experimental_vector_histogram_umin: {
2546 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2547 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2548 break;
2549 }
2550 }
2551 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2552 CostKind);
2553 Cost *= PtrsTy->getNumElements();
2554 return Cost;
2555 }
2556 case Intrinsic::get_active_lane_mask: {
2557 Type *ArgTy = ICA.getArgTypes()[0];
2558 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2559 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2560
2561 // If we're not expanding the intrinsic then we assume this is cheap
2562 // to implement.
2563 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2564 return getTypeLegalizationCost(RetTy).first;
2565
2566 // Create the expanded types that will be used to calculate the uadd_sat
2567 // operation.
2568 Type *ExpRetTy =
2569 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2570 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2572 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2573 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2575 return Cost;
2576 }
2577 case Intrinsic::experimental_memset_pattern:
2578 // This cost is set to match the cost of the memset_pattern16 libcall.
2579 // It should likely be re-evaluated after migration to this intrinsic
2580 // is complete.
2581 return TTI::TCC_Basic * 4;
2582 case Intrinsic::abs:
2583 ISD = ISD::ABS;
2584 break;
2585 case Intrinsic::fshl:
2586 ISD = ISD::FSHL;
2587 break;
2588 case Intrinsic::fshr:
2589 ISD = ISD::FSHR;
2590 break;
2591 case Intrinsic::smax:
2592 ISD = ISD::SMAX;
2593 break;
2594 case Intrinsic::smin:
2595 ISD = ISD::SMIN;
2596 break;
2597 case Intrinsic::umax:
2598 ISD = ISD::UMAX;
2599 break;
2600 case Intrinsic::umin:
2601 ISD = ISD::UMIN;
2602 break;
2603 case Intrinsic::sadd_sat:
2604 ISD = ISD::SADDSAT;
2605 break;
2606 case Intrinsic::ssub_sat:
2607 ISD = ISD::SSUBSAT;
2608 break;
2609 case Intrinsic::uadd_sat:
2610 ISD = ISD::UADDSAT;
2611 break;
2612 case Intrinsic::usub_sat:
2613 ISD = ISD::USUBSAT;
2614 break;
2615 case Intrinsic::smul_fix:
2616 ISD = ISD::SMULFIX;
2617 break;
2618 case Intrinsic::umul_fix:
2619 ISD = ISD::UMULFIX;
2620 break;
2621 case Intrinsic::sadd_with_overflow:
2622 ISD = ISD::SADDO;
2623 break;
2624 case Intrinsic::ssub_with_overflow:
2625 ISD = ISD::SSUBO;
2626 break;
2627 case Intrinsic::uadd_with_overflow:
2628 ISD = ISD::UADDO;
2629 break;
2630 case Intrinsic::usub_with_overflow:
2631 ISD = ISD::USUBO;
2632 break;
2633 case Intrinsic::smul_with_overflow:
2634 ISD = ISD::SMULO;
2635 break;
2636 case Intrinsic::umul_with_overflow:
2637 ISD = ISD::UMULO;
2638 break;
2639 case Intrinsic::fptosi_sat:
2640 case Intrinsic::fptoui_sat: {
2641 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2642 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2643
2644 // For cast instructions, types are different between source and
2645 // destination. Also need to check if the source type can be legalize.
2646 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2648 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2650 break;
2651 }
2652 case Intrinsic::ctpop:
2653 ISD = ISD::CTPOP;
2654 // In case of legalization use TCC_Expensive. This is cheaper than a
2655 // library call but still not a cheap instruction.
2656 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2657 break;
2658 case Intrinsic::ctlz:
2659 ISD = ISD::CTLZ;
2660 break;
2661 case Intrinsic::cttz:
2662 ISD = ISD::CTTZ;
2663 break;
2664 case Intrinsic::bswap:
2665 ISD = ISD::BSWAP;
2666 break;
2667 case Intrinsic::bitreverse:
2669 break;
2670 case Intrinsic::ucmp:
2671 ISD = ISD::UCMP;
2672 break;
2673 case Intrinsic::scmp:
2674 ISD = ISD::SCMP;
2675 break;
2676 }
2677
2678 auto *ST = dyn_cast<StructType>(RetTy);
2679 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2680 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2681
2682 const TargetLoweringBase *TLI = getTLI();
2683
2684 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2685 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2686 TLI->isFAbsFree(LT.second)) {
2687 return 0;
2688 }
2689
2690 // The operation is legal. Assume it costs 1.
2691 // If the type is split to multiple registers, assume that there is some
2692 // overhead to this.
2693 // TODO: Once we have extract/insert subvector cost we need to use them.
2694 if (LT.first > 1)
2695 return (LT.first * 2);
2696 else
2697 return (LT.first * 1);
2698 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2699 // If the operation is custom lowered then assume
2700 // that the code is twice as expensive.
2701 return (LT.first * 2);
2702 }
2703
2704 switch (IID) {
2705 case Intrinsic::fmuladd: {
2706 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2707 // point mul followed by an add.
2708
2709 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2710 CostKind) +
2711 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2712 CostKind);
2713 }
2714 case Intrinsic::experimental_constrained_fmuladd: {
2715 IntrinsicCostAttributes FMulAttrs(
2716 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2717 IntrinsicCostAttributes FAddAttrs(
2718 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2719 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2720 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2721 }
2722 case Intrinsic::smin:
2723 case Intrinsic::smax:
2724 case Intrinsic::umin:
2725 case Intrinsic::umax: {
2726 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2727 Type *CondTy = RetTy->getWithNewBitWidth(1);
2728 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2729 CmpInst::Predicate Pred =
2730 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2732 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2733 Pred, CostKind);
2734 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2735 Pred, CostKind);
2736 return Cost;
2737 }
2738 case Intrinsic::sadd_with_overflow:
2739 case Intrinsic::ssub_with_overflow: {
2740 Type *SumTy = RetTy->getContainedType(0);
2741 Type *OverflowTy = RetTy->getContainedType(1);
2742 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2743 ? BinaryOperator::Add
2744 : BinaryOperator::Sub;
2745
2746 // Add:
2747 // Overflow -> (Result < LHS) ^ (RHS < 0)
2748 // Sub:
2749 // Overflow -> (Result < LHS) ^ (RHS > 0)
2751 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2752 Cost +=
2753 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2755 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2756 CostKind);
2757 return Cost;
2758 }
2759 case Intrinsic::uadd_with_overflow:
2760 case Intrinsic::usub_with_overflow: {
2761 Type *SumTy = RetTy->getContainedType(0);
2762 Type *OverflowTy = RetTy->getContainedType(1);
2763 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2764 ? BinaryOperator::Add
2765 : BinaryOperator::Sub;
2766 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2769
2771 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2772 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2773 OverflowTy, Pred, CostKind);
2774 return Cost;
2775 }
2776 case Intrinsic::smul_with_overflow:
2777 case Intrinsic::umul_with_overflow: {
2778 Type *MulTy = RetTy->getContainedType(0);
2779 Type *OverflowTy = RetTy->getContainedType(1);
2780 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2781 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2782 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2783
2784 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2786
2788 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2789 Cost +=
2790 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2791 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2792 CCH, CostKind);
2793 Cost += thisT()->getArithmeticInstrCost(
2794 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2796
2797 if (IsSigned)
2798 Cost += thisT()->getArithmeticInstrCost(
2799 Instruction::AShr, MulTy, CostKind,
2802
2803 Cost += thisT()->getCmpSelInstrCost(
2804 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2805 return Cost;
2806 }
2807 case Intrinsic::sadd_sat:
2808 case Intrinsic::ssub_sat: {
2809 // Assume a default expansion.
2810 Type *CondTy = RetTy->getWithNewBitWidth(1);
2811
2812 Type *OpTy = StructType::create({RetTy, CondTy});
2813 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2814 ? Intrinsic::sadd_with_overflow
2815 : Intrinsic::ssub_with_overflow;
2817
2818 // SatMax -> Overflow && SumDiff < 0
2819 // SatMin -> Overflow && SumDiff >= 0
2821 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2822 nullptr, ScalarizationCostPassed);
2823 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2824 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2825 Pred, CostKind);
2826 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2827 CondTy, Pred, CostKind);
2828 return Cost;
2829 }
2830 case Intrinsic::uadd_sat:
2831 case Intrinsic::usub_sat: {
2832 Type *CondTy = RetTy->getWithNewBitWidth(1);
2833
2834 Type *OpTy = StructType::create({RetTy, CondTy});
2835 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2836 ? Intrinsic::uadd_with_overflow
2837 : Intrinsic::usub_with_overflow;
2838
2840 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2841 nullptr, ScalarizationCostPassed);
2842 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2843 Cost +=
2844 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2846 return Cost;
2847 }
2848 case Intrinsic::smul_fix:
2849 case Intrinsic::umul_fix: {
2850 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2851 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2852
2853 unsigned ExtOp =
2854 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2856
2858 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2859 Cost +=
2860 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2861 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2862 CCH, CostKind);
2863 Cost += thisT()->getArithmeticInstrCost(
2864 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2866 Cost += thisT()->getArithmeticInstrCost(
2867 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2869 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2870 return Cost;
2871 }
2872 case Intrinsic::abs: {
2873 // abs(X) = select(icmp(X,0),X,sub(0,X))
2874 Type *CondTy = RetTy->getWithNewBitWidth(1);
2877 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2878 Pred, CostKind);
2879 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2880 Pred, CostKind);
2881 // TODO: Should we add an OperandValueProperties::OP_Zero property?
2882 Cost += thisT()->getArithmeticInstrCost(
2883 BinaryOperator::Sub, RetTy, CostKind,
2885 return Cost;
2886 }
2887 case Intrinsic::fshl:
2888 case Intrinsic::fshr: {
2889 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2890 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2891 Type *CondTy = RetTy->getWithNewBitWidth(1);
2893 Cost +=
2894 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2895 Cost +=
2896 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
2897 Cost +=
2898 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
2899 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
2900 CostKind);
2901 // Non-constant shift amounts requires a modulo. If the typesize is a
2902 // power-2 then this will be converted to an and, otherwise it will use a
2903 // urem.
2904 Cost += thisT()->getArithmeticInstrCost(
2905 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2906 : BinaryOperator::URem,
2907 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2908 {TTI::OK_UniformConstantValue, TTI::OP_None});
2909 // Shift-by-zero handling.
2910 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2912 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2914 return Cost;
2915 }
2916 case Intrinsic::fptosi_sat:
2917 case Intrinsic::fptoui_sat: {
2918 if (Tys.empty())
2919 break;
2920 Type *FromTy = Tys[0];
2921 bool IsSigned = IID == Intrinsic::fptosi_sat;
2922
2924 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
2925 {FromTy, FromTy});
2926 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
2927 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
2928 {FromTy, FromTy});
2929 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
2930 Cost += thisT()->getCastInstrCost(
2931 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
2933 if (IsSigned) {
2934 Type *CondTy = RetTy->getWithNewBitWidth(1);
2935 Cost += thisT()->getCmpSelInstrCost(
2936 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
2937 Cost += thisT()->getCmpSelInstrCost(
2938 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
2939 }
2940 return Cost;
2941 }
2942 case Intrinsic::ucmp:
2943 case Intrinsic::scmp: {
2944 Type *CmpTy = Tys[0];
2945 Type *CondTy = RetTy->getWithNewBitWidth(1);
2947 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
2949 CostKind) +
2950 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
2952 CostKind);
2953
2954 EVT VT = TLI->getValueType(DL, CmpTy, true);
2956 // x < y ? -1 : (x > y ? 1 : 0)
2957 Cost += 2 * thisT()->getCmpSelInstrCost(
2958 BinaryOperator::Select, RetTy, CondTy,
2960 } else {
2961 // zext(x > y) - zext(x < y)
2962 Cost +=
2963 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
2965 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2966 CostKind);
2967 }
2968 return Cost;
2969 }
2970 case Intrinsic::maximumnum:
2971 case Intrinsic::minimumnum: {
2972 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
2973 // maximumnum/minimumnum to
2974 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
2975 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
2976 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
2977 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
2978 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
2979 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
2980 int IeeeISD =
2981 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
2982 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
2983 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
2984 RetTy, Tys[0]);
2985 InstructionCost FCanonicalizeCost =
2986 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
2987 return LT.first + FCanonicalizeCost * 2;
2988 }
2989 break;
2990 }
2991 default:
2992 break;
2993 }
2994
2995 // Else, assume that we need to scalarize this intrinsic. For math builtins
2996 // this will emit a costly libcall, adding call overhead and spills. Make it
2997 // very expensive.
2998 if (isVectorizedTy(RetTy)) {
2999 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3000
3001 // Scalable vectors cannot be scalarized, so return Invalid.
3002 if (any_of(concat<Type *const>(RetVTys, Tys),
3003 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3005
3006 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3007 if (!SkipScalarizationCost) {
3008 ScalarizationCost = 0;
3009 for (Type *RetVTy : RetVTys) {
3010 ScalarizationCost += getScalarizationOverhead(
3011 cast<VectorType>(RetVTy), /*Insert=*/true,
3012 /*Extract=*/false, CostKind);
3013 }
3014 }
3015
3016 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3017 SmallVector<Type *, 4> ScalarTys;
3018 for (Type *Ty : Tys) {
3019 if (Ty->isVectorTy())
3020 Ty = Ty->getScalarType();
3021 ScalarTys.push_back(Ty);
3022 }
3023 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3024 InstructionCost ScalarCost =
3025 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3026 for (Type *Ty : Tys) {
3027 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3028 if (!ICA.skipScalarizationCost())
3029 ScalarizationCost += getScalarizationOverhead(
3030 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3031 ScalarCalls = std::max(ScalarCalls,
3033 }
3034 }
3035 return ScalarCalls * ScalarCost + ScalarizationCost;
3036 }
3037
3038 // This is going to be turned into a library call, make it expensive.
3039 return SingleCallCost;
3040 }
3041
3042 /// Get memory intrinsic cost based on arguments.
3045 TTI::TargetCostKind CostKind) const override {
3046 unsigned Id = MICA.getID();
3047 Type *DataTy = MICA.getDataType();
3048 const Value *Ptr = MICA.getPointer();
3049 const Instruction *I = MICA.getInst();
3050 bool VariableMask = MICA.getVariableMask();
3051 Align Alignment = MICA.getAlignment();
3052
3053 switch (Id) {
3054 case Intrinsic::experimental_vp_strided_load:
3055 case Intrinsic::experimental_vp_strided_store: {
3056 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3057 ? Instruction::Load
3058 : Instruction::Store;
3059 return thisT()->getStridedMemoryOpCost(Opcode, DataTy, Ptr, VariableMask,
3060 Alignment, CostKind, I);
3061 }
3062 case Intrinsic::masked_scatter:
3063 case Intrinsic::masked_gather:
3064 case Intrinsic::vp_scatter:
3065 case Intrinsic::vp_gather: {
3066 unsigned Opcode =
3067 (Id == Intrinsic::masked_gather || Id == Intrinsic::vp_gather)
3068 ? Instruction::Load
3069 : Instruction::Store;
3070 return thisT()->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
3071 Alignment, CostKind, I);
3072 }
3073 case Intrinsic::masked_load:
3074 case Intrinsic::masked_store:
3075 return thisT()->getMaskedMemoryOpCost(MICA, CostKind);
3076 case Intrinsic::masked_compressstore:
3077 case Intrinsic::masked_expandload:
3078 return thisT()->getExpandCompressMemoryOpCost(MICA, CostKind);
3079 default:
3080 llvm_unreachable("unexpected intrinsic");
3081 }
3082 }
3083
3084 /// Compute a cost of the given call instruction.
3085 ///
3086 /// Compute the cost of calling function F with return type RetTy and
3087 /// argument types Tys. F might be nullptr, in this case the cost of an
3088 /// arbitrary call with the specified signature will be returned.
3089 /// This is used, for instance, when we estimate call of a vector
3090 /// counterpart of the given function.
3091 /// \param F Called function, might be nullptr.
3092 /// \param RetTy Return value types.
3093 /// \param Tys Argument types.
3094 /// \returns The cost of Call instruction.
3097 TTI::TargetCostKind CostKind) const override {
3098 return 10;
3099 }
3100
3101 unsigned getNumberOfParts(Type *Tp) const override {
3102 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3103 if (!LT.first.isValid())
3104 return 0;
3105 // Try to find actual number of parts for non-power-of-2 elements as
3106 // ceil(num-of-elements/num-of-subtype-elements).
3107 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3108 Tp && LT.second.isFixedLengthVector() &&
3109 !has_single_bit(FTp->getNumElements())) {
3110 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3111 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3112 SubTp && SubTp->getElementType() == FTp->getElementType())
3113 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3114 }
3115 return LT.first.getValue();
3116 }
3117
3120 TTI::TargetCostKind) const override {
3121 return 0;
3122 }
3123
3124 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3125 /// We're assuming that reduction operation are performing the following way:
3126 ///
3127 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3128 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3129 /// \----------------v-------------/ \----------v------------/
3130 /// n/2 elements n/2 elements
3131 /// %red1 = op <n x t> %val, <n x t> val1
3132 /// After this operation we have a vector %red1 where only the first n/2
3133 /// elements are meaningful, the second n/2 elements are undefined and can be
3134 /// dropped. All other operations are actually working with the vector of
3135 /// length n/2, not n, though the real vector length is still n.
3136 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3137 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3138 /// \----------------v-------------/ \----------v------------/
3139 /// n/4 elements 3*n/4 elements
3140 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3141 /// length n/2, the resulting vector has length n/4 etc.
3142 ///
3143 /// The cost model should take into account that the actual length of the
3144 /// vector is reduced on each iteration.
3147 // Targets must implement a default value for the scalable case, since
3148 // we don't know how many lanes the vector has.
3151
3152 Type *ScalarTy = Ty->getElementType();
3153 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3154 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3155 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3156 NumVecElts >= 2) {
3157 // Or reduction for i1 is represented as:
3158 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3159 // %res = cmp ne iReduxWidth %val, 0
3160 // And reduction for i1 is represented as:
3161 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3162 // %res = cmp eq iReduxWidth %val, 11111
3163 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3164 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3166 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3169 }
3170 unsigned NumReduxLevels = Log2_32(NumVecElts);
3171 InstructionCost ArithCost = 0;
3172 InstructionCost ShuffleCost = 0;
3173 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3174 unsigned LongVectorCount = 0;
3175 unsigned MVTLen =
3176 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3177 while (NumVecElts > MVTLen) {
3178 NumVecElts /= 2;
3179 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3180 ShuffleCost += thisT()->getShuffleCost(
3181 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3182 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3183 Ty = SubTy;
3184 ++LongVectorCount;
3185 }
3186
3187 NumReduxLevels -= LongVectorCount;
3188
3189 // The minimal length of the vector is limited by the real length of vector
3190 // operations performed on the current platform. That's why several final
3191 // reduction operations are performed on the vectors with the same
3192 // architecture-dependent length.
3193
3194 // By default reductions need one shuffle per reduction level.
3195 ShuffleCost +=
3196 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3197 Ty, {}, CostKind, 0, Ty);
3198 ArithCost +=
3199 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3200 return ShuffleCost + ArithCost +
3201 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3202 CostKind, 0, nullptr, nullptr);
3203 }
3204
3205 /// Try to calculate the cost of performing strict (in-order) reductions,
3206 /// which involves doing a sequence of floating point additions in lane
3207 /// order, starting with an initial value. For example, consider a scalar
3208 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3209 ///
3210 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3211 ///
3212 /// %add1 = %InitVal + %v0
3213 /// %add2 = %add1 + %v1
3214 /// %add3 = %add2 + %v2
3215 /// %add4 = %add3 + %v3
3216 ///
3217 /// As a simple estimate we can say the cost of such a reduction is 4 times
3218 /// the cost of a scalar FP addition. We can only estimate the costs for
3219 /// fixed-width vectors here because for scalable vectors we do not know the
3220 /// runtime number of operations.
3223 // Targets must implement a default value for the scalable case, since
3224 // we don't know how many lanes the vector has.
3227
3228 auto *VTy = cast<FixedVectorType>(Ty);
3230 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3231 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3232 Opcode, VTy->getElementType(), CostKind);
3233 ArithCost *= VTy->getNumElements();
3234
3235 return ExtractCost + ArithCost;
3236 }
3237
3240 std::optional<FastMathFlags> FMF,
3241 TTI::TargetCostKind CostKind) const override {
3242 assert(Ty && "Unknown reduction vector type");
3244 return getOrderedReductionCost(Opcode, Ty, CostKind);
3245 return getTreeReductionCost(Opcode, Ty, CostKind);
3246 }
3247
3248 /// Try to calculate op costs for min/max reduction operations.
3249 /// \param CondTy Conditional type for the Select instruction.
3252 TTI::TargetCostKind CostKind) const override {
3253 // Targets must implement a default value for the scalable case, since
3254 // we don't know how many lanes the vector has.
3257
3258 Type *ScalarTy = Ty->getElementType();
3259 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3260 unsigned NumReduxLevels = Log2_32(NumVecElts);
3261 InstructionCost MinMaxCost = 0;
3262 InstructionCost ShuffleCost = 0;
3263 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3264 unsigned LongVectorCount = 0;
3265 unsigned MVTLen =
3266 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3267 while (NumVecElts > MVTLen) {
3268 NumVecElts /= 2;
3269 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3270
3271 ShuffleCost += thisT()->getShuffleCost(
3272 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3273
3274 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3275 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3276 Ty = SubTy;
3277 ++LongVectorCount;
3278 }
3279
3280 NumReduxLevels -= LongVectorCount;
3281
3282 // The minimal length of the vector is limited by the real length of vector
3283 // operations performed on the current platform. That's why several final
3284 // reduction opertions are perfomed on the vectors with the same
3285 // architecture-dependent length.
3286 ShuffleCost +=
3287 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3288 Ty, {}, CostKind, 0, Ty);
3289 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3290 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3291 // The last min/max should be in vector registers and we counted it above.
3292 // So just need a single extractelement.
3293 return ShuffleCost + MinMaxCost +
3294 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3295 CostKind, 0, nullptr, nullptr);
3296 }
3297
3299 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3300 VectorType *Ty, std::optional<FastMathFlags> FMF,
3301 TTI::TargetCostKind CostKind) const override {
3302 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3303 FTy && IsUnsigned && Opcode == Instruction::Add &&
3304 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3305 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3306 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3307 auto *IntTy =
3308 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3309 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3310 FMF ? *FMF : FastMathFlags());
3311 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3313 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3314 }
3315 // Without any native support, this is equivalent to the cost of
3316 // vecreduce.opcode(ext(Ty A)).
3317 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3318 InstructionCost RedCost =
3319 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3320 InstructionCost ExtCost = thisT()->getCastInstrCost(
3321 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3323
3324 return RedCost + ExtCost;
3325 }
3326
3328 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3329 VectorType *Ty,
3330 TTI::TargetCostKind CostKind) const override {
3331 // Without any native support, this is equivalent to the cost of
3332 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3333 // vecreduce.add(mul(A, B)).
3334 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3335 "The reduction opcode is expected to be Add or Sub.");
3336 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3337 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3338 RedOpcode, ExtTy, std::nullopt, CostKind);
3339 InstructionCost ExtCost = thisT()->getCastInstrCost(
3340 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3342
3343 InstructionCost MulCost =
3344 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3345
3346 return RedCost + MulCost + 2 * ExtCost;
3347 }
3348
3350
3351 /// @}
3352};
3353
3354/// Concrete BasicTTIImpl that can be used if no further customization
3355/// is needed.
3356class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3357 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3358
3359 friend class BasicTTIImplBase<BasicTTIImpl>;
3360
3361 const TargetSubtargetInfo *ST;
3362 const TargetLoweringBase *TLI;
3363
3364 const TargetSubtargetInfo *getST() const { return ST; }
3365 const TargetLoweringBase *getTLI() const { return TLI; }
3366
3367public:
3368 explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3369};
3370
3371} // end namespace llvm
3372
3373#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file implements the BitVector class.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
static unsigned getNumElements(Type *Ty)
static Type * getValueType(Value *V)
Returns the type of the given value/instruction V.
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:235
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1331
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1202
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1489
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1131
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:201
an instruction to allocate memory on the stack
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:195
size_t size() const
size - Get the array size.
Definition ArrayRef.h:142
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:201
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}) const override
Estimate the overhead of scalarizing an instruction.
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const override
bool isLegalAddScalableImmediate(int64_t Imm) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
std::optional< unsigned > getMaxVScale() const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const override
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
bool isVScaleKnownToBeAPowerOfTwo() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
unsigned getMaxInterleaveFactor(ElementCount VF) const override
bool isSingleThreaded() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getMaskedMemoryOpCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isSourceOfDivergence(const Value *V) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isAlwaysUniform(const Value *V) const override
bool isLegalICmpImmediate(int64_t imm) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getExpandCompressMemoryOpCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isNumRegsMajorCostOfLSR() const override
BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
count - Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Definition BitVector.h:370
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Definition InstrTypes.h:982
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:676
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:699
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:703
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:701
@ ICMP_NE
not equal
Definition InstrTypes.h:698
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:686
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:63
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:324
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:309
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:320
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:22
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:802
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:352
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:318
const TargetLibraryInfo * getLibInfo() const
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
const Instruction * getInst() const
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(Type *ElementType, unsigned AddressSpace)
This constructs a pointer to an object of the specified type in a numbered address space.
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:619
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, EVT MemVT) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const
Return true if the specified load with extension is legal on this target.
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
MemIndexedMode
The type of load/store indexing.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:47
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:413
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1791
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:627
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:343
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:45
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:273
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:294
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:352
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:128
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:230
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:293
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:300
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:225
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:381
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:139
Value * getOperand(unsigned i) const
Definition User.h:232
static LLVM_ABI bool isVPBinOp(Intrinsic::ID ID)
static LLVM_ABI bool isVPCast(Intrinsic::ID ID)
static LLVM_ABI bool isVPCmp(Intrinsic::ID ID)
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:256
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3009
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:771
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:387
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:511
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:410
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:744
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:275
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:347
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:534
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:369
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:784
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:343
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:351
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:724
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:793
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:732
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:933
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:527
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:360
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
LLVM_ABI Libcall getSINCOSPI(EVT RetVT)
getSINCOSPI - Return the SINCOSPI_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getMODF(EVT RetVT)
getMODF - Return the MODF_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getSINCOS(EVT RetVT)
getSINCOS - Return the SINCOS_* value for the given types, or UNKNOWN_LIBCALL if there is none.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1725
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:839
InstructionCost Cost
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2472
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1150
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:147
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1732
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:331
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:279
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:394
FunctionAddr VTableAddr uintptr_t uintptr_t Data
Definition InstrProf.h:189
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:137
ElementCount getVectorElementCount() const
Definition ValueTypes.h:350
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:316
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:65
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).