LLVM 24.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
55#include <algorithm>
56#include <cassert>
57#include <cstdint>
58#include <limits>
59#include <optional>
60#include <utility>
61
62namespace llvm {
63
64class Function;
65class GlobalValue;
66class LLVMContext;
67class ScalarEvolution;
68class SCEV;
69class TargetMachine;
70
72
73/// Base class which can be used to help build a TTI implementation.
74///
75/// This class provides as much implementation of the TTI interface as is
76/// possible using the target independent parts of the code generator.
77///
78/// In order to subclass it, your class must implement a getST() method to
79/// return the subtarget, and a getTLI() method to return the target lowering.
80/// We need these methods implemented in the derived class so that this class
81/// doesn't have to duplicate storage for them.
82template <typename T>
84private:
86 using TTI = TargetTransformInfo;
87
88 /// Helper function to access this as a T.
89 const T *thisT() const { return static_cast<const T *>(this); }
90
91 /// Estimate a cost of Broadcast as an extract and sequence of insert
92 /// operations.
94 getBroadcastShuffleOverhead(FixedVectorType *VTy,
97 // Broadcast cost is equal to the cost of extracting the zero'th element
98 // plus the cost of inserting it into every element of the result vector.
99 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
100 CostKind, 0, nullptr, nullptr);
101
102 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
103 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
104 CostKind, i, nullptr, nullptr);
105 }
106 return Cost;
107 }
108
109 /// Estimate a cost of shuffle as a sequence of extract and insert
110 /// operations.
112 getPermuteShuffleOverhead(FixedVectorType *VTy,
115 // Shuffle cost is equal to the cost of extracting element from its argument
116 // plus the cost of inserting them onto the result vector.
117
118 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
119 // index 0 of first vector, index 1 of second vector,index 2 of first
120 // vector and finally index 3 of second vector and insert them at index
121 // <0,1,2,3> of result vector.
122 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
123 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
124 CostKind, i, nullptr, nullptr);
125 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
126 CostKind, i, nullptr, nullptr);
127 }
128 return Cost;
129 }
130
131 /// Estimate a cost of subvector extraction as a sequence of extract and
132 /// insert operations.
133 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
135 int Index,
136 FixedVectorType *SubVTy) const {
137 assert(VTy && SubVTy &&
138 "Can only extract subvectors from vectors");
139 int NumSubElts = SubVTy->getNumElements();
141 (Index + NumSubElts) <=
142 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
143 "SK_ExtractSubvector index out of range");
144
146 // Subvector extraction cost is equal to the cost of extracting element from
147 // the source type plus the cost of inserting them into the result vector
148 // type.
149 for (int i = 0; i != NumSubElts; ++i) {
150 Cost +=
151 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
152 CostKind, i + Index, nullptr, nullptr);
153 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
154 CostKind, i, nullptr, nullptr);
155 }
156 return Cost;
157 }
158
159 /// Estimate a cost of subvector insertion as a sequence of extract and
160 /// insert operations.
161 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
163 int Index,
164 FixedVectorType *SubVTy) const {
165 assert(VTy && SubVTy &&
166 "Can only insert subvectors into vectors");
167 int NumSubElts = SubVTy->getNumElements();
169 (Index + NumSubElts) <=
170 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
171 "SK_InsertSubvector index out of range");
172
174 // Subvector insertion cost is equal to the cost of extracting element from
175 // the source type plus the cost of inserting them into the result vector
176 // type.
177 for (int i = 0; i != NumSubElts; ++i) {
178 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
179 CostKind, i, nullptr, nullptr);
180 Cost +=
181 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
182 i + Index, nullptr, nullptr);
183 }
184 return Cost;
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetSubtargetInfo *getST() const {
189 return static_cast<const T *>(this)->getST();
190 }
191
192 /// Local query method delegates up to T which *must* implement this!
193 const TargetLoweringBase *getTLI() const {
194 return static_cast<const T *>(this)->getTLI();
195 }
196
197 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
198 switch (M) {
200 return ISD::UNINDEXED;
201 case TTI::MIM_PreInc:
202 return ISD::PRE_INC;
203 case TTI::MIM_PreDec:
204 return ISD::PRE_DEC;
205 case TTI::MIM_PostInc:
206 return ISD::POST_INC;
207 case TTI::MIM_PostDec:
208 return ISD::POST_DEC;
209 }
210 llvm_unreachable("Unexpected MemIndexedMode");
211 }
212
213 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
214 Align Alignment,
215 bool VariableMask,
216 bool IsGatherScatter,
218 unsigned AddressSpace = 0) const {
219 // We cannot scalarize scalable vectors, so return Invalid.
220 if (isa<ScalableVectorType>(DataTy))
222
223 auto *VT = cast<FixedVectorType>(DataTy);
224 unsigned VF = VT->getNumElements();
225
226 // Assume the target does not have support for gather/scatter operations
227 // and provide a rough estimate.
228 //
229 // First, compute the cost of the individual memory operations.
230 InstructionCost AddrExtractCost =
231 IsGatherScatter ? getScalarizationOverhead(
233 PointerType::get(VT->getContext(), 0), VF),
234 /*Insert=*/false, /*Extract=*/true, CostKind)
235 : 0;
236
237 // The cost of the scalar loads/stores.
238 InstructionCost MemoryOpCost =
239 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
241
242 // Next, compute the cost of packing the result in a vector.
243 InstructionCost PackingCost =
244 getScalarizationOverhead(VT, Opcode != Instruction::Store,
245 Opcode == Instruction::Store, CostKind);
246
247 InstructionCost ConditionalCost = 0;
248 if (VariableMask) {
249 // Compute the cost of conditionally executing the memory operations with
250 // variable masks. This includes extracting the individual conditions, a
251 // branches and PHIs to combine the results.
252 // NOTE: Estimating the cost of conditionally executing the memory
253 // operations accurately is quite difficult and the current solution
254 // provides a very rough estimate only.
255 ConditionalCost =
258 /*Insert=*/false, /*Extract=*/true, CostKind) +
259 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
260 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
261 }
262
263 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
264 }
265
266 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
267 /// or same non -1 index value and this index value contained at least twice.
268 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
269 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
270 /// with \p Index=2.
271 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
272 // Check that the broadcast index meets at least twice.
273 bool IsCompared = false;
274 if (int SplatIdx = PoisonMaskElem;
275 all_of(enumerate(Mask), [&](const auto &P) {
276 if (P.value() == PoisonMaskElem)
277 return P.index() != Mask.size() - 1 || IsCompared;
278 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
279 return false;
280 if (SplatIdx == PoisonMaskElem) {
281 SplatIdx = P.value();
282 return P.index() != Mask.size() - 1;
283 }
284 IsCompared = true;
285 return SplatIdx == P.value();
286 })) {
287 Index = SplatIdx;
288 return true;
289 }
290 return false;
291 }
292
293 /// Several intrinsics that return structs (including llvm.sincos[pi] and
294 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
295 /// vector library functions correspond to the scalar calls (e.g. sincos or
296 /// modf), which unlike the intrinsic return values via output pointers. This
297 /// helper checks if a vector call exists for the given intrinsic, and returns
298 /// the cost, which includes the cost of the mask (if required), and the loads
299 /// for values returned via output pointers. \p LC is the scalar libcall and
300 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
301 /// the call return value. If std::nullopt is returned, then no vector library
302 /// call is available, so the intrinsic should be assigned the default cost
303 /// (e.g. scalarization).
304 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
306 std::optional<unsigned> CallRetElementIndex = {}) const {
307 Type *RetTy = ICA.getReturnType();
308 // Vector variants of the intrinsic can be mapped to a vector library call.
309 if (!isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, CostKind, {}, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
384
385public:
386 /// \name Scalar TTI Implementations
387 /// @{
389 unsigned AddressSpace, Align Alignment,
390 unsigned *Fast) const override {
391 EVT E = EVT::getIntegerVT(Context, BitWidth);
392 return getTLI()->allowsMisalignedMemoryAccesses(
394 }
395
396 bool areInlineCompatible(const Function *Caller,
397 const Function *Callee) const override {
398 const TargetMachine &TM = getTLI()->getTargetMachine();
399
400 const TargetSubtargetInfo *CallerSTI = TM.getSubtargetImpl(*Caller);
401 const TargetSubtargetInfo *CalleeSTI = TM.getSubtargetImpl(*Callee);
402 FeatureBitset InlineIgnoreFeatures = CallerSTI->getInlineIgnoreFeatures();
403 FeatureBitset InlineInverseFeatures = CallerSTI->getInlineInverseFeatures();
404 FeatureBitset InlineMustMatchFeatures =
405 CallerSTI->getInlineMustMatchFeatures();
406
407 FeatureBitset CallerBits =
408 (CallerSTI->getFeatureBits() ^ InlineInverseFeatures) &
409 ~InlineIgnoreFeatures;
410 FeatureBitset CalleeBits =
411 (CalleeSTI->getFeatureBits() ^ InlineInverseFeatures) &
412 ~InlineIgnoreFeatures;
413
414 if ((CallerBits & InlineMustMatchFeatures) !=
415 (CalleeBits & InlineMustMatchFeatures))
416 return false;
417
418 // Inline a callee if its target-features are a subset of the callers
419 // target-features.
420 return (CallerBits & CalleeBits) == CalleeBits;
421 }
422
423 bool hasBranchDivergence(const Function *F = nullptr) const override {
424 return false;
425 }
426
427 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
428 return false;
429 }
430
431 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
432 return true;
433 }
434
435 unsigned getFlatAddressSpace() const override {
436 // Return an invalid address space.
437 return -1;
438 }
439
441 Intrinsic::ID IID) const override {
442 return false;
443 }
444
445 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
446 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
447 }
448
449 unsigned getAssumedAddrSpace(const Value *V) const override {
450 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
451 }
452
453 std::pair<const Value *, unsigned>
454 getPredicatedAddrSpace(const Value *V) const override {
455 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
456 }
457
459 Value *NewV) const override {
460 return nullptr;
461 }
462
463 bool isLegalAddImmediate(int64_t imm) const override {
464 return getTLI()->isLegalAddImmediate(imm);
465 }
466
467 bool isLegalAddScalableImmediate(int64_t Imm) const override {
468 return getTLI()->isLegalAddScalableImmediate(Imm);
469 }
470
471 bool isLegalICmpImmediate(int64_t imm) const override {
472 return getTLI()->isLegalICmpImmediate(imm);
473 }
474
475 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
476 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
477 Instruction *I = nullptr,
478 int64_t ScalableOffset = 0) const override {
480 AM.BaseGV = BaseGV;
481 AM.BaseOffs = BaseOffset;
482 AM.HasBaseReg = HasBaseReg;
483 AM.Scale = Scale;
484 AM.ScalableOffset = ScalableOffset;
485 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
486 }
487
488 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
489 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
490 }
491
492 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy,
493 Align Alignment,
494 unsigned AddrSpace) const override {
495 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy, Alignment,
496 AddrSpace](unsigned VF) {
497 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
498 EVT VT = getTLI()->getValueType(DL, SrcTy);
499 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
500 getTLI()->isOperationCustom(ISD::STORE, VT))
501 return true;
502
503 EVT ValVT =
504 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
505 EVT LegalizedVT =
506 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
507 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT, Alignment,
508 AddrSpace);
509 };
510 while (VF > 2 && IsSupportedByTarget(VF))
511 VF /= 2;
512 return VF;
513 }
514
515 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
516 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
517 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
518 }
519
520 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
521 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
522 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
523 }
524
526 const TTI::LSRCost &C2) const override {
528 }
529
533
537
541
543 StackOffset BaseOffset, bool HasBaseReg,
544 int64_t Scale,
545 unsigned AddrSpace) const override {
547 AM.BaseGV = BaseGV;
548 AM.BaseOffs = BaseOffset.getFixed();
549 AM.HasBaseReg = HasBaseReg;
550 AM.Scale = Scale;
551 AM.ScalableOffset = BaseOffset.getScalable();
552 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
553 return 0;
555 }
556
557 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
558 return getTLI()->isTruncateFree(Ty1, Ty2);
559 }
560
561 bool isProfitableToHoist(Instruction *I) const override {
562 return getTLI()->isProfitableToHoist(I);
563 }
564
565 bool useAA() const override { return getST()->useAA(); }
566
567 bool isTypeLegal(Type *Ty) const override {
568 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
569 return getTLI()->isTypeLegal(VT);
570 }
571
572 unsigned getRegUsageForType(Type *Ty) const override {
573 EVT ETy = getTLI()->getValueType(DL, Ty);
574 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
575 }
576
577 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
580 Type *AccessType) const override {
581 return BaseT::getGEPCost(PointeeType, Ptr, Operands, CostKind, AccessType);
582 }
583
585 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
586 BlockFrequencyInfo *BFI) const override {
587 /// Try to find the estimated number of clusters. Note that the number of
588 /// clusters identified in this function could be different from the actual
589 /// numbers found in lowering. This function ignore switches that are
590 /// lowered with a mix of jump table / bit test / BTree. This function was
591 /// initially intended to be used when estimating the cost of switch in
592 /// inline cost heuristic, but it's a generic cost model to be used in other
593 /// places (e.g., in loop unrolling).
594 unsigned N = SI.getNumCases();
595 const TargetLoweringBase *TLI = getTLI();
596 const DataLayout &DL = this->getDataLayout();
597
598 JumpTableSize = 0;
599 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
600
601 // Early exit if both a jump table and bit test are not allowed.
602 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
603 return N;
604
605 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
606 APInt MinCaseVal = MaxCaseVal;
607 for (auto CI : SI.cases()) {
608 const APInt &CaseVal = CI.getCaseValue()->getValue();
609 if (CaseVal.sgt(MaxCaseVal))
610 MaxCaseVal = CaseVal;
611 if (CaseVal.slt(MinCaseVal))
612 MinCaseVal = CaseVal;
613 }
614
615 // Check if suitable for a bit test
616 if (N <= DL.getIndexSizeInBits(0u)) {
618 for (auto I : SI.cases()) {
619 const BasicBlock *BB = I.getCaseSuccessor();
620 ++DestMap[BB];
621 }
622
623 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
624 return 1;
625 }
626
627 // Check if suitable for a jump table.
628 if (IsJTAllowed) {
629 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
630 return N;
632 (MaxCaseVal - MinCaseVal)
633 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
634 // Check whether a range of clusters is dense enough for a jump table
635 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
636 JumpTableSize = Range;
637 return 1;
638 }
639 }
640 return N;
641 }
642
643 bool shouldBuildLookupTables() const override {
644 const TargetLoweringBase *TLI = getTLI();
645 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
646 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
647 }
648
649 bool shouldBuildRelLookupTables() const override {
650 const TargetMachine &TM = getTLI()->getTargetMachine();
651 // If non-PIC mode, do not generate a relative lookup table.
652 if (!TM.isPositionIndependent())
653 return false;
654
655 /// Relative lookup table entries consist of 32-bit offsets.
656 /// Do not generate relative lookup tables for large code models
657 /// in 64-bit achitectures where 32-bit offsets might not be enough.
658 if (TM.getCodeModel() == CodeModel::Medium ||
660 return false;
661
662 const Triple &TargetTriple = TM.getTargetTriple();
663 if (!TargetTriple.isArch64Bit())
664 return false;
665
666 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
667 // there.
668 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
669 return false;
670
671 return true;
672 }
673
674 bool haveFastSqrt(Type *Ty) const override {
675 const TargetLoweringBase *TLI = getTLI();
676 EVT VT = TLI->getValueType(DL, Ty);
677 return TLI->isTypeLegal(VT) &&
679 }
680
681 bool haveFastClmul(IntegerType *Ty) const override {
682 // FIXME: clmul should really be Promote for any bitwidth under the largest
683 // legal bitwidth for clmul. Using IndexTy instead of Ty is a hack to get
684 // around that shortcoming.
685 const DataLayout &DL = thisT()->DL;
686 IntegerType *IndexTy =
687 DL.getIndexType(Ty->getContext(), DL.getAllocaAddrSpace());
688 if (Ty->getBitWidth() > IndexTy->getBitWidth())
689 return false;
690
691 const TargetLoweringBase *TLI = getTLI();
692 EVT VT = TLI->getValueType(DL, IndexTy);
693 return TLI->isOperationLegalOrCustom(ISD::CLMUL, VT);
694 }
695
696 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
697
698 InstructionCost getFPOpCost(Type *Ty) const override {
699 // Check whether FADD is available, as a proxy for floating-point in
700 // general.
701 const TargetLoweringBase *TLI = getTLI();
702 EVT VT = TLI->getValueType(DL, Ty);
706 }
707
709 const Function &Fn) const override {
710 switch (Inst.getOpcode()) {
711 default:
712 break;
713 case Instruction::SDiv:
714 case Instruction::SRem:
715 case Instruction::UDiv:
716 case Instruction::URem: {
717 if (!isa<ConstantInt>(Inst.getOperand(1)))
718 return false;
719 EVT VT = getTLI()->getValueType(DL, Inst.getType());
720 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
721 }
722 };
723
724 return false;
725 }
726
727 unsigned getInliningThresholdMultiplier() const override { return 1; }
728 unsigned adjustInliningThreshold(const CallBase *CB) const override {
729 return 0;
730 }
731 unsigned getCallerAllocaCost(const CallBase *CB,
732 const AllocaInst *AI) const override {
733 return 0;
734 }
735
736 int getInlinerVectorBonusPercent() const override { return 150; }
737
740 OptimizationRemarkEmitter *ORE) const override {
741 // This unrolling functionality is target independent, but to provide some
742 // motivation for its intended use, for x86:
743
744 // According to the Intel 64 and IA-32 Architectures Optimization Reference
745 // Manual, Intel Core models and later have a loop stream detector (and
746 // associated uop queue) that can benefit from partial unrolling.
747 // The relevant requirements are:
748 // - The loop must have no more than 4 (8 for Nehalem and later) branches
749 // taken, and none of them may be calls.
750 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
751
752 // According to the Software Optimization Guide for AMD Family 15h
753 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
754 // and loop buffer which can benefit from partial unrolling.
755 // The relevant requirements are:
756 // - The loop must have fewer than 16 branches
757 // - The loop must have less than 40 uops in all executed loop branches
758
759 // The number of taken branches in a loop is hard to estimate here, and
760 // benchmarking has revealed that it is better not to be conservative when
761 // estimating the branch count. As a result, we'll ignore the branch limits
762 // until someone finds a case where it matters in practice.
763
764 unsigned MaxOps;
765 const TargetSubtargetInfo *ST = getST();
766 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
768 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
769 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
770 else
771 return;
772
773 // Scan the loop: don't unroll loops with calls.
774 for (BasicBlock *BB : L->blocks()) {
775 for (Instruction &I : *BB) {
776 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
777 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
778 if (!thisT()->isLoweredToCall(F))
779 continue;
780 }
781
782 if (ORE) {
783 ORE->emit([&]() {
784 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
785 L->getHeader())
786 << "advising against unrolling the loop because it "
787 "contains a "
788 << ore::NV("Call", &I);
789 });
790 }
791 return;
792 }
793 }
794 }
795
796 // Enable runtime and partial unrolling up to the specified size.
797 // Enable using trip count upper bound to unroll loops.
798 UP.Partial = UP.Runtime = UP.UpperBound = true;
799 UP.PartialThreshold = MaxOps;
800
801 // Avoid unrolling when optimizing for size.
802 UP.OptSizeThreshold = 0;
804
805 // Set number of instructions optimized when "back edge"
806 // becomes "fall through" to default value of 2.
807 UP.BEInsns = 2;
808 }
809
811 TTI::PeelingPreferences &PP) const override {
812 PP.PeelCount = 0;
813 PP.AllowPeeling = true;
814 PP.AllowLoopNestsPeeling = false;
815 PP.PeelProfiledIterations = true;
816 }
817
820 HardwareLoopInfo &HWLoopInfo) const override {
821 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
822 }
823
824 unsigned getEpilogueVectorizationMinVF() const override {
826 }
827
831
835
836 std::optional<Instruction *>
839 }
840
841 std::optional<Value *>
843 APInt DemandedMask, KnownBits &Known,
844 bool &KnownBitsComputed) const override {
845 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
846 KnownBitsComputed);
847 }
848
850 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
851 APInt &UndefElts2, APInt &UndefElts3,
852 std::function<void(Instruction *, unsigned, APInt, APInt &)>
853 SimplifyAndSetOp) const override {
855 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
856 SimplifyAndSetOp);
857 }
858
860 return getST()->getMispredictionPenalty();
861 }
862
863 std::optional<unsigned>
865 return std::optional<unsigned>(
866 getST()->getCacheSize(static_cast<unsigned>(Level)));
867 }
868
869 std::optional<unsigned>
871 std::optional<unsigned> TargetResult =
872 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
873
874 if (TargetResult)
875 return TargetResult;
876
877 return BaseT::getCacheAssociativity(Level);
878 }
879
880 unsigned getCacheLineSize() const override {
881 return getST()->getCacheLineSize();
882 }
883
884 unsigned getPrefetchDistance() const override {
885 return getST()->getPrefetchDistance();
886 }
887
888 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
889 unsigned NumStridedMemAccesses,
890 unsigned NumPrefetches,
891 bool HasCall) const override {
892 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
893 NumPrefetches, HasCall);
894 }
895
896 unsigned getMaxPrefetchIterationsAhead() const override {
897 return getST()->getMaxPrefetchIterationsAhead();
898 }
899
900 bool enableWritePrefetching() const override {
901 return getST()->enableWritePrefetching();
902 }
903
904 bool shouldPrefetchAddressSpace(unsigned AS) const override {
905 return getST()->shouldPrefetchAddressSpace(AS);
906 }
907
908 /// @}
909
910 /// \name Vector TTI Implementations
911 /// @{
912
917
918 std::optional<unsigned> getVScaleForTuning() const override {
919 return std::nullopt;
920 }
921
922 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
923 /// are set if the demanded result elements need to be inserted and/or
924 /// extracted from vectors.
926 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
927 bool Insert, bool Extract,
929 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
931 TTI::VectorInstrContext::None) const override {
932 /// FIXME: a bitfield is not a reasonable abstraction for talking about
933 /// which elements are needed from a scalable vector
934 if (isa<ScalableVectorType>(InTy))
936 auto *Ty = cast<FixedVectorType>(InTy);
937
938 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
939 (VL.empty() || VL.size() == Ty->getNumElements()) &&
940 "Vector size mismatch");
941
943
944 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
945 if (!DemandedElts[i])
946 continue;
947 if (Insert) {
948 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
949 Cost +=
950 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
951 CostKind, i, nullptr, InsertedVal, VIC);
952 }
953 if (Extract)
954 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
955 CostKind, i, nullptr, nullptr, VIC);
956 }
957
958 return Cost;
959 }
960
961 bool
963 unsigned ScalarOpdIdx) const override {
964 return false;
965 }
966
968 int OpdIdx) const override {
969 return OpdIdx == -1;
970 }
971
972 bool
974 int RetIdx) const override {
975 return RetIdx == 0;
976 }
977
978 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
980 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
981 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
983 if (isa<ScalableVectorType>(InTy))
985 auto *Ty = cast<FixedVectorType>(InTy);
986
987 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
988 // Use CRTP to allow target overrides
989 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
990 CostKind, ForPoisonSrc, VL, VIC);
991 }
992
993 /// Estimate the overhead of scalarizing an instruction's
994 /// operands. The (potentially vector) types to use for each of
995 /// argument are passes via Tys.
999 TTI::VectorInstrContext::None) const override {
1001 for (Type *Ty : Tys) {
1002 // Disregard things like metadata arguments.
1003 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
1004 !Ty->isPtrOrPtrVectorTy())
1005 continue;
1006
1007 if (auto *VecTy = dyn_cast<VectorType>(Ty))
1008 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
1009 /*Extract*/ true, CostKind,
1010 /*ForPoisonSrc=*/true, {}, VIC);
1011 }
1012
1013 return Cost;
1014 }
1015
1016 /// Estimate the overhead of scalarizing the inputs and outputs of an
1017 /// instruction, with return type RetTy and arguments Args of type Tys. If
1018 /// Args are unknown (empty), then the cost associated with one argument is
1019 /// added as a heuristic.
1022 ArrayRef<Type *> Tys,
1025 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
1026 if (!Args.empty())
1028 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1029 else
1030 // When no information on arguments is provided, we add the cost
1031 // associated with one argument as a heuristic.
1032 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1033 /*Extract*/ true, CostKind);
1034
1035 return Cost;
1036 }
1037
1038 /// Estimate the cost of type-legalization and the legalized type.
1039 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1040 auto [It, Inserted] = TypeLegalizationCostCache.try_emplace(Ty);
1041 if (Inserted)
1042 It->second = computeTypeLegalizationCost(Ty);
1043 return It->second;
1044 }
1045
1046private:
1047 std::pair<InstructionCost, MVT> computeTypeLegalizationCost(Type *Ty) const {
1048 LLVMContext &C = Ty->getContext();
1049 EVT MTy = getTLI()->getValueType(DL, Ty);
1050
1052 // We keep legalizing the type until we find a legal kind. We assume that
1053 // the only operation that costs anything is the split. After splitting
1054 // we need to handle two types.
1055 while (true) {
1057
1059 // Ensure we return a sensible simple VT here, since many callers of
1060 // this function require it.
1061 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1062 return std::make_pair(InstructionCost::getInvalid(), VT);
1063 }
1064
1065 if (LK.first == TargetLoweringBase::TypeLegal)
1066 return std::make_pair(Cost, MTy.getSimpleVT());
1067
1068 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1070 Cost *= 2;
1071
1072 // Do not loop with f128 type.
1073 if (MTy == LK.second)
1074 return std::make_pair(Cost, MTy.getSimpleVT());
1075
1076 // Keep legalizing the type.
1077 MTy = LK.second;
1078 }
1079 }
1080
1081 /// Memoizes type legalization cost. The mapping does not depend on the IR, so
1082 /// entries stay valid for the lifetime of this object.
1083 mutable DenseMap<Type *, std::pair<InstructionCost, MVT>>
1084 TypeLegalizationCostCache;
1085
1086public:
1088 bool HasUnorderedReductions) const override {
1089 return 1;
1090 }
1091
1093 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1096 ArrayRef<const Value *> Args = {},
1097 const Instruction *CxtI = nullptr) const override {
1098 // Check if any of the operands are vector operands.
1099 const TargetLoweringBase *TLI = getTLI();
1100 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1101 assert(ISD && "Invalid opcode");
1102
1103 // TODO: Handle more cost kinds.
1105 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1106 Opd1Info, Opd2Info,
1107 Args, CxtI);
1108
1109 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1110
1111 bool IsFloat = Ty->isFPOrFPVectorTy();
1112 // Assume that floating point arithmetic operations cost twice as much as
1113 // integer operations.
1114 InstructionCost OpCost = (IsFloat ? 2 : 1);
1115
1116 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1117 // The operation is legal. Assume it costs 1.
1118 // TODO: Once we have extract/insert subvector cost we need to use them.
1119 return LT.first * OpCost;
1120 }
1121
1122 if (!TLI->isOperationExpand(ISD, LT.second)) {
1123 // If the operation is custom lowered, then assume that the code is twice
1124 // as expensive.
1125 return LT.first * 2 * OpCost;
1126 }
1127
1128 // An 'Expand' of URem and SRem is special because it may default
1129 // to expanding the operation into a sequence of sub-operations
1130 // i.e. X % Y -> X-(X/Y)*Y.
1131 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1132 bool IsSigned = ISD == ISD::SREM;
1133 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1134 LT.second) ||
1135 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1136 LT.second)) {
1137 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1138 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1139 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1140 InstructionCost MulCost =
1141 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1142 InstructionCost SubCost =
1143 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1144 return DivCost + MulCost + SubCost;
1145 }
1146 }
1147
1148 // We cannot scalarize scalable vectors, so return Invalid.
1151
1152 // Else, assume that we need to scalarize this op.
1153 // TODO: If one of the types get legalized by splitting, handle this
1154 // similarly to what getCastInstrCost() does.
1155 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1156 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1157 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1158 Args, CxtI);
1159 // Return the cost of multiple scalar invocation plus the cost of
1160 // inserting and extracting the values.
1161 SmallVector<Type *> Tys(Args.size(), Ty);
1162 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1163 VTy->getNumElements() * Cost;
1164 }
1165
1166 // We don't know anything about this scalar instruction.
1167 return OpCost;
1168 }
1169
1171 ArrayRef<int> Mask,
1172 VectorType *SrcTy, int &Index,
1173 VectorType *&SubTy) const {
1174 if (Mask.empty())
1175 return Kind;
1176 int NumDstElts = Mask.size();
1177 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1178 switch (Kind) {
1180 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1181 return TTI::SK_Reverse;
1182 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1183 return TTI::SK_Broadcast;
1184 if (isSplatMask(Mask, NumSrcElts, Index))
1185 return TTI::SK_Broadcast;
1186 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1187 (Index + NumDstElts) <= NumSrcElts) {
1188 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1190 }
1191 break;
1192 }
1193 case TTI::SK_PermuteTwoSrc: {
1194 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1196 Index, SubTy);
1197 int NumSubElts;
1198 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1199 Mask, NumSrcElts, NumSubElts, Index)) {
1200 if (Index + NumSubElts > NumSrcElts)
1201 return Kind;
1202 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1204 }
1205 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1206 return TTI::SK_Select;
1207 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1208 return TTI::SK_Transpose;
1209 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1210 return TTI::SK_Splice;
1211 break;
1212 }
1213 case TTI::SK_Select:
1214 case TTI::SK_Reverse:
1215 case TTI::SK_Broadcast:
1216 case TTI::SK_Transpose:
1219 case TTI::SK_Splice:
1220 break;
1221 }
1222 return Kind;
1223 }
1224
1228 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1229 const Instruction *CxtI = nullptr,
1231 TTI::VectorInstrContext::None) const override {
1232 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1233 case TTI::SK_Broadcast:
1234 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1235 return getBroadcastShuffleOverhead(FVT, CostKind);
1237 case TTI::SK_Select:
1238 case TTI::SK_Splice:
1239 case TTI::SK_Reverse:
1240 case TTI::SK_Transpose:
1243 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1244 return getPermuteShuffleOverhead(FVT, CostKind);
1247 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1248 cast<FixedVectorType>(SubTp));
1250 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1251 cast<FixedVectorType>(SubTp));
1252 }
1253 llvm_unreachable("Unknown TTI::ShuffleKind");
1254 }
1255
1257 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1259 const Instruction *I = nullptr) const override {
1260 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1261 return 0;
1262
1263 const TargetLoweringBase *TLI = getTLI();
1264 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1265 assert(ISD && "Invalid opcode");
1266 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1267 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1268
1269 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1270 TypeSize DstSize = DstLT.second.getSizeInBits();
1271 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1272 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1273
1274 switch (Opcode) {
1275 default:
1276 break;
1277 case Instruction::Trunc:
1278 // Check for NOOP conversions.
1279 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1280 return 0;
1281 [[fallthrough]];
1282 case Instruction::BitCast:
1283 // Bitcast between types that are legalized to the same type are free and
1284 // assume int to/from ptr of the same size is also free.
1285 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1286 SrcSize == DstSize)
1287 return 0;
1288 break;
1289 case Instruction::FPExt:
1290 if (I && getTLI()->isExtFree(I))
1291 return 0;
1292 break;
1293 case Instruction::ZExt:
1294 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1295 return 0;
1296 [[fallthrough]];
1297 case Instruction::SExt:
1298 if (I && getTLI()->isExtFree(I))
1299 return 0;
1300
1301 // If this is a zext/sext of a load, return 0 if the corresponding
1302 // extending load exists on target and the result type is legal.
1303 if (CCH == TTI::CastContextHint::Normal) {
1304 EVT ExtVT = EVT::getEVT(Dst);
1305 EVT LoadVT = EVT::getEVT(Src);
1306 unsigned LType =
1307 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1308 if (I) {
1309 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1310 if (DstLT.first == SrcLT.first &&
1311 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1312 LI->getPointerAddressSpace(), LType, false))
1313 return 0;
1314 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1315 switch (II->getIntrinsicID()) {
1316 case Intrinsic::masked_load: {
1317 Type *PtrType = II->getArgOperand(0)->getType();
1318 assert(PtrType->isPointerTy());
1319
1320 if (DstLT.first == SrcLT.first &&
1321 TLI->isLoadLegal(
1322 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1323 PtrType->getPointerAddressSpace(), LType, false))
1324 return 0;
1325
1326 break;
1327 }
1328 default:
1329 break;
1330 }
1331 }
1332 }
1333 }
1334 break;
1335 case Instruction::AddrSpaceCast:
1336 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1337 Dst->getPointerAddressSpace()))
1338 return 0;
1339 break;
1340 }
1341
1342 auto *SrcVTy = dyn_cast<VectorType>(Src);
1343 auto *DstVTy = dyn_cast<VectorType>(Dst);
1344
1345 // If the cast is marked as legal (or promote) then assume low cost.
1346 if (SrcLT.first == DstLT.first &&
1347 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1348 return SrcLT.first;
1349
1350 // Handle scalar conversions.
1351 if (!SrcVTy && !DstVTy) {
1352 // Just check the op cost. If the operation is legal then assume it costs
1353 // 1.
1354 if (!TLI->isOperationExpand(ISD, DstLT.second))
1355 return 1;
1356
1357 // Assume that illegal scalar instruction are expensive.
1358 return 4;
1359 }
1360
1361 // Check vector-to-vector casts.
1362 if (DstVTy && SrcVTy) {
1363 // If the cast is between same-sized registers, then the check is simple.
1364 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1365
1366 // Assume that Zext is done using AND.
1367 if (Opcode == Instruction::ZExt)
1368 return SrcLT.first;
1369
1370 // Assume that sext is done using SHL and SRA.
1371 if (Opcode == Instruction::SExt)
1372 return SrcLT.first * 2;
1373
1374 // Just check the op cost. If the operation is legal then assume it
1375 // costs
1376 // 1 and multiply by the type-legalization overhead.
1377 if (!TLI->isOperationExpand(ISD, DstLT.second))
1378 return SrcLT.first * 1;
1379 }
1380
1381 // If we are legalizing by splitting, query the concrete TTI for the cost
1382 // of casting the original vector twice. We also need to factor in the
1383 // cost of the split itself. Count that as 1, to be consistent with
1384 // getTypeLegalizationCost().
1385 bool SplitSrc =
1386 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1388 bool SplitDst =
1389 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1391 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1392 DstVTy->getElementCount().isKnownEven()) {
1393 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1394 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1395 const T *TTI = thisT();
1396 // If both types need to be split then the split is free.
1397 InstructionCost SplitCost =
1398 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1399 return SplitCost +
1400 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1401 CostKind, I));
1402 }
1403
1404 // Scalarization cost is Invalid, can't assume any num elements.
1405 if (isa<ScalableVectorType>(DstVTy))
1407
1408 // In other cases where the source or destination are illegal, assume
1409 // the operation will get scalarized.
1410 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1411 InstructionCost Cost = thisT()->getCastInstrCost(
1412 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1413
1414 // Return the cost of multiple scalar invocation plus the cost of
1415 // inserting and extracting the values.
1416 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1417 CostKind) +
1418 Num * Cost;
1419 }
1420
1421 // We already handled vector-to-vector and scalar-to-scalar conversions.
1422 // This
1423 // is where we handle bitcast between vectors and scalars. We need to assume
1424 // that the conversion is scalarized in one way or another.
1425 if (Opcode == Instruction::BitCast) {
1426 // Illegal bitcasts are done by storing and loading from a stack slot.
1427 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1428 /*Extract*/ true, CostKind)
1429 : 0) +
1430 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1431 /*Extract*/ false, CostKind)
1432 : 0);
1433 }
1434
1435 llvm_unreachable("Unhandled cast");
1436 }
1437
1439 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1440 unsigned Index,
1441 TTI::TargetCostKind CostKind) const override {
1442 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1443 CostKind, Index, nullptr, nullptr) +
1444 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1446 }
1447
1450 const Instruction *I = nullptr) const override {
1451 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1452 }
1453
1455 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1459 const Instruction *I = nullptr) const override {
1460 const TargetLoweringBase *TLI = getTLI();
1461 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1462 assert(ISD && "Invalid opcode");
1463
1464 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1465 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1466 Op1Info, Op2Info, I);
1467
1468 // Selects on vectors are actually vector selects.
1469 if (ISD == ISD::SELECT) {
1470 assert(CondTy && "CondTy must exist");
1471 if (CondTy->isVectorTy())
1472 ISD = ISD::VSELECT;
1473 }
1474 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1475
1476 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1477 !TLI->isOperationExpand(ISD, LT.second)) {
1478 // The operation is legal. Assume it costs 1. Multiply
1479 // by the type-legalization overhead.
1480 return LT.first * 1;
1481 }
1482
1483 // Otherwise, assume that the cast is scalarized.
1484 // TODO: If one of the types get legalized by splitting, handle this
1485 // similarly to what getCastInstrCost() does.
1486 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1487 if (isa<ScalableVectorType>(ValTy))
1489
1490 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1491 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1492 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1493 CostKind, Op1Info, Op2Info, I);
1494
1495 // Return the cost of multiple scalar invocation plus the cost of
1496 // inserting and extracting the values.
1497 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1498 /*Extract*/ false, CostKind) +
1499 Num * Cost;
1500 }
1501
1502 // Unknown scalar opcode.
1503 return 1;
1504 }
1505
1508 unsigned Index, const Value *Op0, const Value *Op1,
1510 TTI::VectorInstrContext::None) const override {
1511 return getRegUsageForType(Val->getScalarType());
1512 }
1513
1514 /// \param ScalarUserAndIdx encodes the information about extracts from a
1515 /// vector with 'Scalar' being the value being extracted,'User' being the user
1516 /// of the extract(nullptr if user is not known before vectorization) and
1517 /// 'Idx' being the extract lane.
1519 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1520 Value *Scalar,
1521 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1523 TTI::VectorInstrContext::None) const override {
1524 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1525 VIC);
1526 }
1527
1530 TTI::TargetCostKind CostKind, unsigned Index,
1532 TTI::VectorInstrContext::None) const override {
1533 Value *Op0 = nullptr;
1534 Value *Op1 = nullptr;
1535 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1536 Op0 = IE->getOperand(0);
1537 Op1 = IE->getOperand(1);
1538 }
1539 // If VIC is None, compute it from the instruction
1542 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1543 Op1, VIC);
1544 }
1545
1549 unsigned Index) const override {
1550 unsigned NewIndex = -1;
1551 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1552 assert(Index < FVTy->getNumElements() &&
1553 "Unexpected index from end of vector");
1554 NewIndex = FVTy->getNumElements() - 1 - Index;
1555 }
1556 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1557 nullptr);
1558 }
1559
1561 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1562 const APInt &DemandedDstElts,
1563 TTI::TargetCostKind CostKind) const override {
1564 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1565 "Unexpected size of DemandedDstElts.");
1566
1568
1569 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1570 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1571
1572 // The Mask shuffling cost is extract all the elements of the Mask
1573 // and insert each of them Factor times into the wide vector:
1574 //
1575 // E.g. an interleaved group with factor 3:
1576 // %mask = icmp ult <8 x i32> %vec1, %vec2
1577 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1578 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1579 // The cost is estimated as extract all mask elements from the <8xi1> mask
1580 // vector and insert them factor times into the <24xi1> shuffled mask
1581 // vector.
1582 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1583 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1584 /*Insert*/ false,
1585 /*Extract*/ true, CostKind);
1586 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1587 /*Insert*/ true,
1588 /*Extract*/ false, CostKind);
1589
1590 return Cost;
1591 }
1592
1594 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1597 const Instruction *I = nullptr) const override {
1598 assert(!Src->isVoidTy() && "Invalid type");
1599 // Assume types, such as structs, are expensive.
1600 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1601 return 4;
1602 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1603
1604 // FIXME: Arbitrary cost
1605 if (Opcode == Instruction::Load && CostKind == TTI::TCK_Latency)
1606 return 4;
1607
1608 // Assuming that all loads of legal types cost 1.
1609 InstructionCost Cost = LT.first;
1611 return Cost;
1612
1613 const DataLayout &DL = this->getDataLayout();
1614 if (Src->isVectorTy() &&
1615 // In practice it's not currently possible to have a change in lane
1616 // length for extending loads or truncating stores so both types should
1617 // have the same scalable property.
1618 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1619 LT.second.getSizeInBits())) {
1620 // This is a vector load that legalizes to a larger type than the vector
1621 // itself. Unless the corresponding extending load or truncating store is
1622 // legal, then this will scalarize.
1624 EVT MemVT = getTLI()->getValueType(DL, Src);
1625 if (Opcode == Instruction::Store)
1626 LA = getTLI()->getTruncStoreAction(LT.second, MemVT, Alignment,
1627 AddressSpace);
1628 else
1629 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1630 ISD::EXTLOAD, false);
1631
1632 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1633 // This is a vector load/store for some illegal type that is scalarized.
1634 // We must account for the cost of building or decomposing the vector.
1636 cast<VectorType>(Src), Opcode != Instruction::Store,
1637 Opcode == Instruction::Store, CostKind);
1638 }
1639 }
1640
1641 return Cost;
1642 }
1643
1645 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1646 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1647 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1648
1649 // We cannot scalarize scalable vectors, so return Invalid.
1650 if (isa<ScalableVectorType>(VecTy))
1652
1653 auto *VT = cast<FixedVectorType>(VecTy);
1654
1655 unsigned NumElts = VT->getNumElements();
1656 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1657
1658 unsigned NumSubElts = NumElts / Factor;
1659 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1660
1661 // Firstly, the cost of load/store operation.
1663 if (UseMaskForCond || UseMaskForGaps) {
1664 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1665 : Intrinsic::masked_store;
1666 Cost = thisT()->getMemIntrinsicInstrCost(
1667 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1668 CostKind);
1669 } else
1670 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1671 CostKind);
1672
1673 // Legalize the vector type, and get the legalized and unlegalized type
1674 // sizes.
1675 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1676 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1677 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1678
1679 // Scale the cost of the memory operation by the fraction of legalized
1680 // instructions that will actually be used. We shouldn't account for the
1681 // cost of dead instructions since they will be removed.
1682 //
1683 // E.g., An interleaved load of factor 8:
1684 // %vec = load <16 x i64>, <16 x i64>* %ptr
1685 // %v0 = shufflevector %vec, undef, <0, 8>
1686 //
1687 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1688 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1689 // type). The other loads are unused.
1690 //
1691 // TODO: Note that legalization can turn masked loads/stores into unmasked
1692 // (legalized) loads/stores. This can be reflected in the cost.
1693 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1694 // The number of loads of a legal type it will take to represent a load
1695 // of the unlegalized vector type.
1696 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1697
1698 // The number of elements of the unlegalized type that correspond to a
1699 // single legal instruction.
1700 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1701
1702 // Determine which legal instructions will be used.
1703 BitVector UsedInsts(NumLegalInsts, false);
1704 for (unsigned Index : Indices)
1705 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1706 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1707
1708 // Scale the cost of the load by the fraction of legal instructions that
1709 // will be used.
1710 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1711 }
1712
1713 // Then plus the cost of interleave operation.
1714 assert(Indices.size() <= Factor &&
1715 "Interleaved memory op has too many members");
1716
1717 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1718 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1719
1720 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1721 for (unsigned Index : Indices) {
1722 assert(Index < Factor && "Invalid index for interleaved memory op");
1723 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1724 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1725 }
1726
1727 if (Opcode == Instruction::Load) {
1728 // The interleave cost is similar to extract sub vectors' elements
1729 // from the wide vector, and insert them into sub vectors.
1730 //
1731 // E.g. An interleaved load of factor 2 (with one member of index 0):
1732 // %vec = load <8 x i32>, <8 x i32>* %ptr
1733 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1734 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1735 // <8 x i32> vector and insert them into a <4 x i32> vector.
1736 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1737 SubVT, DemandedAllSubElts,
1738 /*Insert*/ true, /*Extract*/ false, CostKind);
1739 Cost += Indices.size() * InsSubCost;
1740 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1741 /*Insert*/ false,
1742 /*Extract*/ true, CostKind);
1743 } else {
1744 // The interleave cost is extract elements from sub vectors, and
1745 // insert them into the wide vector.
1746 //
1747 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1748 // (using VF=4):
1749 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1750 // %gaps.mask = <true, true, false, true, true, false,
1751 // true, true, false, true, true, false>
1752 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1753 // i32 Align, <12 x i1> %gaps.mask
1754 // The cost is estimated as extract all elements (of actual members,
1755 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1756 // i32> vector.
1757 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1758 SubVT, DemandedAllSubElts,
1759 /*Insert*/ false, /*Extract*/ true, CostKind);
1760 Cost += ExtSubCost * Indices.size();
1761 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1762 /*Insert*/ true,
1763 /*Extract*/ false, CostKind);
1764 }
1765
1766 if (!UseMaskForCond)
1767 return Cost;
1768
1769 Type *I8Type = Type::getInt8Ty(VT->getContext());
1770
1771 Cost += thisT()->getReplicationShuffleCost(
1772 I8Type, Factor, NumSubElts,
1773 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1774 CostKind);
1775
1776 // The Gaps mask is invariant and created outside the loop, therefore the
1777 // cost of creating it is not accounted for here. However if we have both
1778 // a MaskForGaps and some other mask that guards the execution of the
1779 // memory access, we need to account for the cost of And-ing the two masks
1780 // inside the loop.
1781 if (UseMaskForGaps) {
1782 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1783 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1784 CostKind);
1785 }
1786
1787 return Cost;
1788 }
1789
1790 /// Get intrinsic cost based on arguments.
1793 TTI::TargetCostKind CostKind) const override {
1794 // Check for generically free intrinsics.
1796 return 0;
1797
1798 // Assume that target intrinsics are cheap.
1799 Intrinsic::ID IID = ICA.getID();
1802
1803 // VP Intrinsics should have the same cost as their non-vp counterpart.
1804 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1805 // counterpart when the vector length argument is smaller than the maximum
1806 // vector length.
1807 // TODO: Support other kinds of VPIntrinsics
1808 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1809 std::optional<unsigned> FOp =
1811 if (FOp) {
1812 if (ICA.getID() == Intrinsic::vp_load) {
1813 Align Alignment;
1814 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1815 Alignment = VPI->getPointerAlignment().valueOrOne();
1816 unsigned AS = 0;
1817 if (ICA.getArgTypes().size() > 1)
1818 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1819 AS = PtrTy->getAddressSpace();
1820 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1821 AS, CostKind);
1822 }
1823 if (ICA.getID() == Intrinsic::vp_store) {
1824 Align Alignment;
1825 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1826 Alignment = VPI->getPointerAlignment().valueOrOne();
1827 unsigned AS = 0;
1828 if (ICA.getArgTypes().size() >= 2)
1829 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1830 AS = PtrTy->getAddressSpace();
1831 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1832 AS, CostKind);
1833 }
1834 if (ICA.getID() == Intrinsic::vp_udiv ||
1835 ICA.getID() == Intrinsic::vp_sdiv ||
1836 ICA.getID() == Intrinsic::vp_urem ||
1837 ICA.getID() == Intrinsic::vp_srem) {
1838 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1839 CostKind);
1840 }
1841 }
1842 if (ICA.getID() == Intrinsic::vp_load_ff) {
1843 Type *RetTy = ICA.getReturnType();
1844 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1845 Align Alignment;
1846 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1847 Alignment = VPI->getPointerAlignment().valueOrOne();
1848 return thisT()->getMemIntrinsicInstrCost(
1849 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1850 CostKind);
1851 }
1852 if (ICA.getID() == Intrinsic::vp_scatter) {
1853 if (ICA.isTypeBasedOnly()) {
1854 IntrinsicCostAttributes MaskedScatter(
1857 ICA.getFlags());
1858 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1859 }
1860 Align Alignment;
1861 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1862 Alignment = VPI->getPointerAlignment().valueOrOne();
1863 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1864 return thisT()->getMemIntrinsicInstrCost(
1865 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1866 ICA.getArgTypes()[0], ICA.getArgs()[1],
1867 VarMask, Alignment, nullptr),
1868 CostKind);
1869 }
1870 if (ICA.getID() == Intrinsic::vp_gather) {
1871 if (ICA.isTypeBasedOnly()) {
1872 IntrinsicCostAttributes MaskedGather(
1875 ICA.getFlags());
1876 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1877 }
1878 Align Alignment;
1879 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1880 Alignment = VPI->getPointerAlignment().valueOrOne();
1881 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1882 return thisT()->getMemIntrinsicInstrCost(
1883 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1884 ICA.getReturnType(), ICA.getArgs()[0],
1885 VarMask, Alignment, nullptr),
1886 CostKind);
1887 }
1888
1889 if (ICA.getID() == Intrinsic::vp_merge) {
1890 TTI::OperandValueInfo OpInfoX, OpInfoY;
1891 if (!ICA.isTypeBasedOnly()) {
1892 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1893 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1894 }
1895 return getCmpSelInstrCost(
1896 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1897 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1898 }
1899
1900 std::optional<Intrinsic::ID> FID =
1902
1903 // Not functionally equivalent but close enough for cost modelling.
1904 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1905 FID = Intrinsic::vector_reverse;
1906
1907 if (FID) {
1908 // Non-vp version will have same arg types except mask and vector
1909 // length.
1910 assert(ICA.getArgTypes().size() >= 2 &&
1911 "Expected VPIntrinsic to have Mask and Vector Length args and "
1912 "types");
1913
1914 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1915 if (!ICA.isTypeBasedOnly())
1916 NewArgs = NewArgs.drop_back(2);
1918
1919 // VPReduction intrinsics have a start value argument that their non-vp
1920 // counterparts do not have, except for the fadd and fmul non-vp
1921 // counterpart.
1923 *FID != Intrinsic::vector_reduce_fadd &&
1924 *FID != Intrinsic::vector_reduce_fmul) {
1925 if (!ICA.isTypeBasedOnly())
1926 NewArgs = NewArgs.drop_front();
1927 NewTys = NewTys.drop_front();
1928 }
1929
1930 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1931 NewTys, ICA.getFlags());
1932 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1933 }
1934 }
1935
1936 if (ICA.isTypeBasedOnly())
1938
1939 Type *RetTy = ICA.getReturnType();
1940
1941 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1943
1944 const IntrinsicInst *I = ICA.getInst();
1945 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1946 FastMathFlags FMF = ICA.getFlags();
1947 switch (IID) {
1948 default:
1949 break;
1950
1951 case Intrinsic::powi:
1952 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1953 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1954 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1955 ShouldOptForSize)) {
1956 // The cost is modeled on the expansion performed by ExpandPowI in
1957 // SelectionDAGBuilder.
1958 APInt Exponent = RHSC->getValue().abs();
1959 unsigned ActiveBits = Exponent.getActiveBits();
1960 unsigned PopCount = Exponent.popcount();
1961 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1962 thisT()->getArithmeticInstrCost(
1963 Instruction::FMul, RetTy, CostKind);
1964 if (RHSC->isNegative())
1965 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1966 CostKind);
1967 return Cost;
1968 }
1969 }
1970 break;
1971 case Intrinsic::cttz:
1972 // FIXME: If necessary, this should go in target-specific overrides.
1973 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1975 break;
1976
1977 case Intrinsic::ctlz:
1978 // FIXME: If necessary, this should go in target-specific overrides.
1979 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1981 break;
1982
1983 case Intrinsic::memcpy:
1984 return thisT()->getMemcpyCost(ICA.getInst());
1985
1986 case Intrinsic::masked_scatter: {
1987 const Value *Mask = Args[2];
1988 bool VarMask = !isa<Constant>(Mask);
1989 Align Alignment = I->getParamAlign(1).valueOrOne();
1990 return thisT()->getMemIntrinsicInstrCost(
1991 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1992 ICA.getArgTypes()[0], Args[1], VarMask,
1993 Alignment, I),
1994 CostKind);
1995 }
1996 case Intrinsic::masked_gather: {
1997 const Value *Mask = Args[1];
1998 bool VarMask = !isa<Constant>(Mask);
1999 Align Alignment = I->getParamAlign(0).valueOrOne();
2000 return thisT()->getMemIntrinsicInstrCost(
2001 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
2002 VarMask, Alignment, I),
2003 CostKind);
2004 }
2005 case Intrinsic::masked_compressstore: {
2006 const Value *Data = Args[0];
2007 const Value *Mask = Args[2];
2008 Align Alignment = I->getParamAlign(1).valueOrOne();
2009 return thisT()->getMemIntrinsicInstrCost(
2010 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
2011 Alignment, I),
2012 CostKind);
2013 }
2014 case Intrinsic::masked_expandload: {
2015 const Value *Mask = Args[1];
2016 Align Alignment = I->getParamAlign(0).valueOrOne();
2017 return thisT()->getMemIntrinsicInstrCost(
2018 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
2019 Alignment, I),
2020 CostKind);
2021 }
2022 case Intrinsic::experimental_vp_strided_store: {
2023 const Value *Data = Args[0];
2024 const Value *Ptr = Args[1];
2025 const Value *Mask = Args[3];
2026 const Value *EVL = Args[4];
2027 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2028 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
2029 Align Alignment =
2030 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
2031 return thisT()->getMemIntrinsicInstrCost(
2032 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
2033 Alignment, I),
2034 CostKind);
2035 }
2036 case Intrinsic::experimental_vp_strided_load: {
2037 const Value *Ptr = Args[0];
2038 const Value *Mask = Args[2];
2039 const Value *EVL = Args[3];
2040 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2041 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2042 Align Alignment =
2043 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2044 return thisT()->getMemIntrinsicInstrCost(
2045 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2046 CostKind);
2047 }
2048 case Intrinsic::stepvector: {
2049 if (isa<ScalableVectorType>(RetTy))
2051 // The cost of materialising a constant integer vector.
2053 }
2054 case Intrinsic::vector_extract: {
2055 // FIXME: Handle case where a scalable vector is extracted from a scalable
2056 // vector
2057 if (isa<ScalableVectorType>(RetTy))
2059 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2060 return thisT()->getShuffleCost(
2062 cast<VectorType>(Args[0]->getType()), CostKind, {}, Index,
2063 cast<VectorType>(RetTy));
2064 }
2065 case Intrinsic::vector_insert: {
2066 // FIXME: Handle case where a scalable vector is inserted into a scalable
2067 // vector
2068 if (isa<ScalableVectorType>(Args[1]->getType()))
2070 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2071 return thisT()->getShuffleCost(
2073 cast<VectorType>(Args[0]->getType()), CostKind, {}, Index,
2074 cast<VectorType>(Args[1]->getType()));
2075 }
2076 case Intrinsic::vector_splice_left:
2077 case Intrinsic::vector_splice_right: {
2078 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2079 if (!COffset)
2080 break;
2081 unsigned Index = COffset->getZExtValue();
2082 return thisT()->getShuffleCost(
2084 cast<VectorType>(Args[0]->getType()), CostKind, {},
2085 IID == Intrinsic::vector_splice_left ? Index : -Index,
2086 cast<VectorType>(RetTy));
2087 }
2088 case Intrinsic::vector_reduce_add:
2089 case Intrinsic::vector_reduce_mul:
2090 case Intrinsic::vector_reduce_and:
2091 case Intrinsic::vector_reduce_or:
2092 case Intrinsic::vector_reduce_xor:
2093 case Intrinsic::vector_reduce_smax:
2094 case Intrinsic::vector_reduce_smin:
2095 case Intrinsic::vector_reduce_fmax:
2096 case Intrinsic::vector_reduce_fmin:
2097 case Intrinsic::vector_reduce_fmaximum:
2098 case Intrinsic::vector_reduce_fminimum:
2099 case Intrinsic::vector_reduce_fmaximumnum:
2100 case Intrinsic::vector_reduce_fminimumnum:
2101 case Intrinsic::vector_reduce_umax:
2102 case Intrinsic::vector_reduce_umin: {
2103 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2105 }
2106 case Intrinsic::vector_reduce_fadd:
2107 case Intrinsic::vector_reduce_fmul: {
2109 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2111 }
2112 case Intrinsic::fshl:
2113 case Intrinsic::fshr: {
2114 const Value *X = Args[0];
2115 const Value *Y = Args[1];
2116 const Value *Z = Args[2];
2119 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2120
2121 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2122 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2124 Cost +=
2125 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2126 Cost += thisT()->getArithmeticInstrCost(
2127 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2128 {OpInfoZ.Kind, TTI::OP_None});
2129 Cost += thisT()->getArithmeticInstrCost(
2130 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2131 {OpInfoZ.Kind, TTI::OP_None});
2132
2133 if (!OpInfoZ.isConstant()) {
2134 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2135 CostKind);
2136 // Non-constant shift amounts requires a modulo. If the typesize is a
2137 // power-2 then this will be converted to an and, otherwise it will use
2138 // a urem.
2139 Cost += thisT()->getArithmeticInstrCost(
2140 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2141 : BinaryOperator::URem,
2142 RetTy, CostKind, OpInfoZ,
2143 {TTI::OK_UniformConstantValue, TTI::OP_None});
2144 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2145 if (X != Y) {
2146 Type *CondTy = RetTy->getWithNewBitWidth(1);
2147 Cost += thisT()->getCmpSelInstrCost(
2148 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2149 Cost +=
2150 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2152 }
2153 }
2154 return Cost;
2155 }
2156 case Intrinsic::experimental_cttz_elts: {
2157 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2158
2159 // TODO: The costs below reflect the expansion code in
2160 // TargetLowering::expandCttzElts, but we may want to sacrifice some
2161 // accuracy in favour of compile time.
2162
2163 // Find the smallest "sensible" element type to use for the expansion.
2164 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2165 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2166 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2167 VScaleRange = getVScaleRange(I->getCaller(), 64);
2168
2169 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2170 getTLI()->getValueType(DL, RetTy), ArgType.getVectorElementCount(),
2171 ZeroIsPoison, &VScaleRange);
2172 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2173
2174 // Create the new vector type & get the vector length
2175 Type *NewVecTy = VectorType::get(
2176 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2177
2178 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2179 FMF);
2181 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2182
2183 Cost +=
2184 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2185 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2186 Args[0]->getType(),
2188 Cost +=
2189 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2190
2191 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2192 NewEltTy, NewVecTy, FMF, I, 1);
2193 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2194 Cost +=
2195 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2196
2197 return Cost;
2198 }
2199 case Intrinsic::get_active_lane_mask:
2200 case Intrinsic::experimental_vector_match:
2201 case Intrinsic::experimental_vector_histogram_add:
2202 case Intrinsic::experimental_vector_histogram_uadd_sat:
2203 case Intrinsic::experimental_vector_histogram_umax:
2204 case Intrinsic::experimental_vector_histogram_umin:
2205 case Intrinsic::masked_udiv:
2206 case Intrinsic::masked_sdiv:
2207 case Intrinsic::masked_urem:
2208 case Intrinsic::masked_srem:
2209 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2210 case Intrinsic::modf:
2211 case Intrinsic::sincos:
2212 case Intrinsic::sincospi: {
2213 std::optional<unsigned> CallRetElementIndex;
2214 // The first element of the modf result is returned by value in the
2215 // libcall.
2216 if (ICA.getID() == Intrinsic::modf)
2217 CallRetElementIndex = 0;
2218
2219 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2220 ICA, CostKind, CallRetElementIndex))
2221 return *Cost;
2222 // Otherwise, fallback to default scalarization cost.
2223 break;
2224 }
2225 case Intrinsic::loop_dependence_war_mask:
2226 case Intrinsic::loop_dependence_raw_mask: {
2227 // Compute the cost of the expanded version of these intrinsics:
2228 //
2229 // The possible expansions are...
2230 //
2231 // loop_dependence_war_mask:
2232 // diff = (addrB - addrA) / eltSize
2233 // cmp = icmp sle diff, 0
2234 // upper_bound = select cmp, -1, diff
2235 // mask = get_active_lane_mask 0, upper_bound
2236 //
2237 // loop_dependence_raw_mask:
2238 // diff = (abs(addrB - addrA)) / eltSize
2239 // cmp = icmp eq diff, 0
2240 // upper_bound = select cmp, -1, diff
2241 // mask = get_active_lane_mask 0, upper_bound
2242 //
2243 Type *AddrTy = ICA.getArgTypes()[0];
2244 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2245
2247 thisT()->getArithmeticInstrCost(Instruction::Sub, AddrTy, CostKind);
2248 if (IsReadAfterWrite) {
2249 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, AddrTy, {AddrTy}, {});
2250 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2251 }
2252
2253 TTI::OperandValueInfo EltSizeOpInfo =
2254 TTI::getOperandInfo(ICA.getArgs()[2]);
2255 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, AddrTy,
2256 CostKind, {}, EltSizeOpInfo);
2257
2258 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2259 CmpInst::Predicate Pred =
2260 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2261 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy, AddrTy,
2262 Pred, CostKind);
2263 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, AddrTy,
2264 CondTy, Pred, CostKind);
2265
2266 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2267 {AddrTy, AddrTy}, FMF);
2268 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2269 return Cost;
2270 }
2271 }
2272
2273 // Assume that we need to scalarize this intrinsic.)
2274 // Compute the scalarization overhead based on Args for a vector
2275 // intrinsic.
2276 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2277 if (RetVF.isVector() && !RetVF.isScalable()) {
2278 ScalarizationCost = 0;
2279 if (!RetTy->isVoidTy()) {
2280 for (Type *VectorTy : getContainedTypes(RetTy)) {
2281 ScalarizationCost += getScalarizationOverhead(
2282 cast<VectorType>(VectorTy),
2283 /*Insert=*/true, /*Extract=*/false, CostKind);
2284 }
2285 }
2286 ScalarizationCost += getOperandsScalarizationOverhead(
2287 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2288 CostKind);
2289 }
2290
2291 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2292 ScalarizationCost);
2293 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2294 }
2295
2296 /// Get intrinsic cost based on argument types.
2297 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2298 /// cost of scalarizing the arguments and the return value will be computed
2299 /// based on types.
2303 Intrinsic::ID IID = ICA.getID();
2304 Type *RetTy = ICA.getReturnType();
2305 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2306 FastMathFlags FMF = ICA.getFlags();
2307 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2308 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2309
2310 VectorType *VecOpTy = nullptr;
2311 if (!Tys.empty()) {
2312 // The vector reduction operand is operand 0 except for fadd/fmul.
2313 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2314 unsigned VecTyIndex = 0;
2315 if (IID == Intrinsic::vector_reduce_fadd ||
2316 IID == Intrinsic::vector_reduce_fmul)
2317 VecTyIndex = 1;
2318 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2319 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2320 }
2321
2322 // Library call cost - other than size, make it expensive.
2323 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2324 unsigned ISD = 0;
2325 switch (IID) {
2326 default: {
2327 // Scalable vectors cannot be scalarized, so return Invalid.
2328 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2329 return isa<ScalableVectorType>(Ty);
2330 }))
2332
2333 // Assume that we need to scalarize this intrinsic.
2334 InstructionCost ScalarizationCost =
2335 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2336 unsigned ScalarCalls = 1;
2337 Type *ScalarRetTy = RetTy;
2338 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2339 if (!SkipScalarizationCost)
2340 ScalarizationCost = getScalarizationOverhead(
2341 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2342 ScalarCalls = std::max(ScalarCalls,
2343 cast<FixedVectorType>(RetVTy)->getNumElements());
2344 ScalarRetTy = RetTy->getScalarType();
2345 }
2346 SmallVector<Type *, 4> ScalarTys;
2347 for (Type *Ty : Tys) {
2348 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2349 if (!SkipScalarizationCost)
2350 ScalarizationCost += getScalarizationOverhead(
2351 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2352 ScalarCalls = std::max(ScalarCalls,
2353 cast<FixedVectorType>(VTy)->getNumElements());
2354 Ty = Ty->getScalarType();
2355 }
2356 ScalarTys.push_back(Ty);
2357 }
2358 if (ScalarCalls == 1)
2359 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2360
2361 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2362 InstructionCost ScalarCost =
2363 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2364
2365 return ScalarCalls * ScalarCost + ScalarizationCost;
2366 }
2367 // Look for intrinsics that can be lowered directly or turned into a scalar
2368 // intrinsic call.
2369 case Intrinsic::sqrt:
2370 ISD = ISD::FSQRT;
2371 break;
2372 case Intrinsic::sin:
2373 ISD = ISD::FSIN;
2374 break;
2375 case Intrinsic::cos:
2376 ISD = ISD::FCOS;
2377 break;
2378 case Intrinsic::sincos:
2379 ISD = ISD::FSINCOS;
2380 break;
2381 case Intrinsic::sincospi:
2383 break;
2384 case Intrinsic::modf:
2385 ISD = ISD::FMODF;
2386 break;
2387 case Intrinsic::tan:
2388 ISD = ISD::FTAN;
2389 break;
2390 case Intrinsic::asin:
2391 ISD = ISD::FASIN;
2392 break;
2393 case Intrinsic::acos:
2394 ISD = ISD::FACOS;
2395 break;
2396 case Intrinsic::atan:
2397 ISD = ISD::FATAN;
2398 break;
2399 case Intrinsic::atan2:
2400 ISD = ISD::FATAN2;
2401 break;
2402 case Intrinsic::sinh:
2403 ISD = ISD::FSINH;
2404 break;
2405 case Intrinsic::cosh:
2406 ISD = ISD::FCOSH;
2407 break;
2408 case Intrinsic::tanh:
2409 ISD = ISD::FTANH;
2410 break;
2411 case Intrinsic::exp:
2412 ISD = ISD::FEXP;
2413 break;
2414 case Intrinsic::exp2:
2415 ISD = ISD::FEXP2;
2416 break;
2417 case Intrinsic::exp10:
2418 ISD = ISD::FEXP10;
2419 break;
2420 case Intrinsic::log:
2421 ISD = ISD::FLOG;
2422 break;
2423 case Intrinsic::log10:
2424 ISD = ISD::FLOG10;
2425 break;
2426 case Intrinsic::log2:
2427 ISD = ISD::FLOG2;
2428 break;
2429 case Intrinsic::ldexp:
2430 ISD = ISD::FLDEXP;
2431 break;
2432 case Intrinsic::fabs:
2433 ISD = ISD::FABS;
2434 break;
2435 case Intrinsic::canonicalize:
2437 break;
2438 case Intrinsic::minnum:
2439 ISD = ISD::FMINNUM;
2440 break;
2441 case Intrinsic::maxnum:
2442 ISD = ISD::FMAXNUM;
2443 break;
2444 case Intrinsic::minimum:
2446 break;
2447 case Intrinsic::maximum:
2449 break;
2450 case Intrinsic::minimumnum:
2452 break;
2453 case Intrinsic::maximumnum:
2455 break;
2456 case Intrinsic::copysign:
2458 break;
2459 case Intrinsic::floor:
2460 ISD = ISD::FFLOOR;
2461 break;
2462 case Intrinsic::ceil:
2463 ISD = ISD::FCEIL;
2464 break;
2465 case Intrinsic::trunc:
2466 ISD = ISD::FTRUNC;
2467 break;
2468 case Intrinsic::nearbyint:
2470 break;
2471 case Intrinsic::rint:
2472 ISD = ISD::FRINT;
2473 break;
2474 case Intrinsic::lrint:
2475 ISD = ISD::LRINT;
2476 break;
2477 case Intrinsic::llrint:
2478 ISD = ISD::LLRINT;
2479 break;
2480 case Intrinsic::round:
2481 ISD = ISD::FROUND;
2482 break;
2483 case Intrinsic::roundeven:
2485 break;
2486 case Intrinsic::lround:
2487 ISD = ISD::LROUND;
2488 break;
2489 case Intrinsic::llround:
2490 ISD = ISD::LLROUND;
2491 break;
2492 case Intrinsic::pow:
2493 ISD = ISD::FPOW;
2494 break;
2495 case Intrinsic::fma:
2496 ISD = ISD::FMA;
2497 break;
2498 case Intrinsic::fmuladd:
2499 ISD = ISD::FMA;
2500 break;
2501 case Intrinsic::experimental_constrained_fmuladd:
2503 break;
2504 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2505 case Intrinsic::lifetime_start:
2506 case Intrinsic::lifetime_end:
2507 case Intrinsic::sideeffect:
2508 case Intrinsic::pseudoprobe:
2509 case Intrinsic::arithmetic_fence:
2510 return 0;
2511 case Intrinsic::masked_store: {
2512 Type *Ty = Tys[0];
2513 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2514 return thisT()->getMemIntrinsicInstrCost(
2515 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2516 }
2517 case Intrinsic::masked_load: {
2518 Type *Ty = RetTy;
2519 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2520 return thisT()->getMemIntrinsicInstrCost(
2521 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2522 }
2523 case Intrinsic::experimental_vp_strided_store: {
2524 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2525 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2526 return thisT()->getMemIntrinsicInstrCost(
2527 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2528 /*VariableMask=*/true, Alignment,
2529 ICA.getInst()),
2530 CostKind);
2531 }
2532 case Intrinsic::experimental_vp_strided_load: {
2533 auto *Ty = cast<VectorType>(ICA.getReturnType());
2534 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2535 return thisT()->getMemIntrinsicInstrCost(
2536 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2537 /*VariableMask=*/true, Alignment,
2538 ICA.getInst()),
2539 CostKind);
2540 }
2541 case Intrinsic::vector_reduce_add:
2542 case Intrinsic::vector_reduce_mul:
2543 case Intrinsic::vector_reduce_and:
2544 case Intrinsic::vector_reduce_or:
2545 case Intrinsic::vector_reduce_xor:
2546 return thisT()->getArithmeticReductionCost(
2547 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2548 CostKind);
2549 case Intrinsic::vector_reduce_fadd:
2550 case Intrinsic::vector_reduce_fmul:
2551 return thisT()->getArithmeticReductionCost(
2552 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2553 case Intrinsic::vector_reduce_smax:
2554 case Intrinsic::vector_reduce_smin:
2555 case Intrinsic::vector_reduce_umax:
2556 case Intrinsic::vector_reduce_umin:
2557 case Intrinsic::vector_reduce_fmax:
2558 case Intrinsic::vector_reduce_fmin:
2559 case Intrinsic::vector_reduce_fmaximum:
2560 case Intrinsic::vector_reduce_fminimum:
2561 case Intrinsic::vector_reduce_fmaximumnum:
2562 case Intrinsic::vector_reduce_fminimumnum:
2563 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2564 VecOpTy, ICA.getFlags(), CostKind);
2565 case Intrinsic::experimental_vector_match: {
2566 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2567 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2568 unsigned SearchSize = NeedleTy->getNumElements();
2569
2570 // Approximate the cost based on the expansion code in
2571 // TargetLowering::expandVectorMatch.
2573 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2574 CostKind, 1, nullptr, nullptr);
2575 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2576 CostKind, 0, nullptr, nullptr);
2577 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy,
2578 CostKind, {}, 0, nullptr);
2579 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2581 Cost +=
2582 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2583 Cost *= SearchSize;
2584 Cost +=
2585 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2586 return Cost;
2587 }
2588 case Intrinsic::vector_reverse:
2589 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2590 cast<VectorType>(ICA.getArgTypes()[0]),
2591 CostKind, {}, 0, cast<VectorType>(RetTy));
2592 case Intrinsic::experimental_vector_histogram_add:
2593 case Intrinsic::experimental_vector_histogram_uadd_sat:
2594 case Intrinsic::experimental_vector_histogram_umax:
2595 case Intrinsic::experimental_vector_histogram_umin: {
2597 Type *EltTy = ICA.getArgTypes()[1];
2598
2599 // Targets with scalable vectors must handle this on their own.
2600 if (!PtrsTy)
2602
2603 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2605 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2606 CostKind, 1, nullptr, nullptr);
2607 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2608 CostKind);
2609 switch (IID) {
2610 default:
2611 llvm_unreachable("Unhandled histogram update operation.");
2612 case Intrinsic::experimental_vector_histogram_add:
2613 Cost +=
2614 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2615 break;
2616 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2617 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2618 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2619 break;
2620 }
2621 case Intrinsic::experimental_vector_histogram_umax: {
2622 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2623 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2624 break;
2625 }
2626 case Intrinsic::experimental_vector_histogram_umin: {
2627 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2628 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2629 break;
2630 }
2631 }
2632 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2633 CostKind);
2634 Cost *= PtrsTy->getNumElements();
2635 return Cost;
2636 }
2637 case Intrinsic::get_active_lane_mask: {
2638 Type *ArgTy = ICA.getArgTypes()[0];
2639 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2640 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2641
2642 // If we're not expanding the intrinsic then we assume this is cheap
2643 // to implement.
2644 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2645 return getTypeLegalizationCost(RetTy).first;
2646
2647 // Create the expanded types that will be used to calculate the uadd_sat
2648 // operation.
2649 Type *ExpRetTy =
2650 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2651 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2653 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2654 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2656 return Cost;
2657 }
2658 case Intrinsic::experimental_memset_pattern:
2659 // This cost is set to match the cost of the memset_pattern16 libcall.
2660 // It should likely be re-evaluated after migration to this intrinsic
2661 // is complete.
2662 return TTI::TCC_Basic * 4;
2663 case Intrinsic::abs:
2664 ISD = ISD::ABS;
2665 break;
2666 case Intrinsic::fshl:
2667 ISD = ISD::FSHL;
2668 break;
2669 case Intrinsic::fshr:
2670 ISD = ISD::FSHR;
2671 break;
2672 case Intrinsic::smax:
2673 ISD = ISD::SMAX;
2674 break;
2675 case Intrinsic::smin:
2676 ISD = ISD::SMIN;
2677 break;
2678 case Intrinsic::umax:
2679 ISD = ISD::UMAX;
2680 break;
2681 case Intrinsic::umin:
2682 ISD = ISD::UMIN;
2683 break;
2684 case Intrinsic::sadd_sat:
2685 ISD = ISD::SADDSAT;
2686 break;
2687 case Intrinsic::ssub_sat:
2688 ISD = ISD::SSUBSAT;
2689 break;
2690 case Intrinsic::uadd_sat:
2691 ISD = ISD::UADDSAT;
2692 break;
2693 case Intrinsic::usub_sat:
2694 ISD = ISD::USUBSAT;
2695 break;
2696 case Intrinsic::smul_fix:
2697 ISD = ISD::SMULFIX;
2698 break;
2699 case Intrinsic::umul_fix:
2700 ISD = ISD::UMULFIX;
2701 break;
2702 case Intrinsic::sadd_with_overflow:
2703 ISD = ISD::SADDO;
2704 break;
2705 case Intrinsic::ssub_with_overflow:
2706 ISD = ISD::SSUBO;
2707 break;
2708 case Intrinsic::uadd_with_overflow:
2709 ISD = ISD::UADDO;
2710 break;
2711 case Intrinsic::usub_with_overflow:
2712 ISD = ISD::USUBO;
2713 break;
2714 case Intrinsic::smul_with_overflow:
2715 ISD = ISD::SMULO;
2716 break;
2717 case Intrinsic::umul_with_overflow:
2718 ISD = ISD::UMULO;
2719 break;
2720 case Intrinsic::fptosi_sat:
2721 case Intrinsic::fptoui_sat: {
2722 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2723 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2724
2725 // For cast instructions, types are different between source and
2726 // destination. Also need to check if the source type can be legalize.
2727 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2729 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2731 break;
2732 }
2733 case Intrinsic::ctpop:
2734 ISD = ISD::CTPOP;
2735 // In case of legalization use TCC_Expensive. This is cheaper than a
2736 // library call but still not a cheap instruction.
2737 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2738 break;
2739 case Intrinsic::ctlz:
2740 ISD = ISD::CTLZ;
2741 break;
2742 case Intrinsic::cttz:
2743 ISD = ISD::CTTZ;
2744 break;
2745 case Intrinsic::bswap:
2746 ISD = ISD::BSWAP;
2747 break;
2748 case Intrinsic::bitreverse:
2750 break;
2751 case Intrinsic::ucmp:
2752 ISD = ISD::UCMP;
2753 break;
2754 case Intrinsic::scmp:
2755 ISD = ISD::SCMP;
2756 break;
2757 case Intrinsic::clmul:
2758 ISD = ISD::CLMUL;
2759 break;
2760 case Intrinsic::smulh:
2761 ISD = ISD::MULHS;
2762 break;
2763 case Intrinsic::umulh:
2764 ISD = ISD::MULHU;
2765 break;
2766 case Intrinsic::masked_udiv:
2767 case Intrinsic::masked_sdiv:
2768 case Intrinsic::masked_urem:
2769 case Intrinsic::masked_srem: {
2770 unsigned UnmaskedOpc;
2771 switch (IID) {
2772 case Intrinsic::masked_udiv:
2774 UnmaskedOpc = Instruction::UDiv;
2775 break;
2776 case Intrinsic::masked_sdiv:
2778 UnmaskedOpc = Instruction::SDiv;
2779 break;
2780 case Intrinsic::masked_urem:
2782 UnmaskedOpc = Instruction::URem;
2783 break;
2784 case Intrinsic::masked_srem:
2786 UnmaskedOpc = Instruction::SRem;
2787 break;
2788 default:
2789 llvm_unreachable("Unexpected intrinsic ID");
2790 }
2792 thisT()->getArithmeticInstrCost(UnmaskedOpc, RetTy, CostKind);
2793
2794 // Expansion generates a (select %mask, %rhs, 1) for the divisor.
2795 MVT LT = getTypeLegalizationCost(RetTy).second;
2796 if (!getTLI()->isOperationLegalOrCustom(ISD, LT)) {
2797 Type *CondTy = cast<VectorType>(RetTy)->getWithNewType(
2799 Cost += thisT()->getCmpSelInstrCost(
2800 BinaryOperator::Select, RetTy, CondTy, CmpInst::BAD_ICMP_PREDICATE,
2802 }
2803
2804 return Cost;
2805 }
2806 }
2807
2808 auto *ST = dyn_cast<StructType>(RetTy);
2809 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2810 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2811
2812 const TargetLoweringBase *TLI = getTLI();
2813
2814 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2815 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2816 TLI->isFAbsFree(LT.second)) {
2817 return 0;
2818 }
2819
2820 // The operation is legal. Assume it costs 1.
2821 // If the type is split to multiple registers, assume that there is some
2822 // overhead to this.
2823 // TODO: Once we have extract/insert subvector cost we need to use them.
2824 if (LT.first > 1)
2825 return (LT.first * 2);
2826 else
2827 return (LT.first * 1);
2828 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2829 // If the operation is custom lowered then assume
2830 // that the code is twice as expensive.
2831 return (LT.first * 2);
2832 }
2833
2834 switch (IID) {
2835 case Intrinsic::fmuladd: {
2836 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2837 // point mul followed by an add.
2838
2839 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2840 CostKind) +
2841 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2842 CostKind);
2843 }
2844 case Intrinsic::experimental_constrained_fmuladd: {
2845 IntrinsicCostAttributes FMulAttrs(
2846 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2847 IntrinsicCostAttributes FAddAttrs(
2848 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2849 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2850 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2851 }
2852 case Intrinsic::smin:
2853 case Intrinsic::smax:
2854 case Intrinsic::umin:
2855 case Intrinsic::umax: {
2856 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2857 Type *CondTy = RetTy->getWithNewBitWidth(1);
2858 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2859 CmpInst::Predicate Pred =
2860 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2862 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2863 Pred, CostKind);
2864 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2865 Pred, CostKind);
2866 return Cost;
2867 }
2868 case Intrinsic::sadd_with_overflow:
2869 case Intrinsic::ssub_with_overflow: {
2870 Type *SumTy = RetTy->getContainedType(0);
2871 Type *OverflowTy = RetTy->getContainedType(1);
2872 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2873 ? BinaryOperator::Add
2874 : BinaryOperator::Sub;
2875
2876 // Add:
2877 // Overflow -> (Result < LHS) ^ (RHS < 0)
2878 // Sub:
2879 // Overflow -> (Result < LHS) ^ (RHS > 0)
2881 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2882 Cost +=
2883 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2885 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2886 CostKind);
2887 return Cost;
2888 }
2889 case Intrinsic::uadd_with_overflow:
2890 case Intrinsic::usub_with_overflow: {
2891 Type *SumTy = RetTy->getContainedType(0);
2892 Type *OverflowTy = RetTy->getContainedType(1);
2893 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2894 ? BinaryOperator::Add
2895 : BinaryOperator::Sub;
2896 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2899
2901 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2902 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2903 OverflowTy, Pred, CostKind);
2904 return Cost;
2905 }
2906 case Intrinsic::smul_with_overflow:
2907 case Intrinsic::umul_with_overflow: {
2908 Type *MulTy = RetTy->getContainedType(0);
2909 Type *OverflowTy = RetTy->getContainedType(1);
2910 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2911 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2912 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2913
2914 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2916
2918 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2919 Cost +=
2920 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2921 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2922 CCH, CostKind);
2923 Cost += thisT()->getArithmeticInstrCost(
2924 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2926
2927 if (IsSigned)
2928 Cost += thisT()->getArithmeticInstrCost(
2929 Instruction::AShr, MulTy, CostKind,
2932
2933 Cost += thisT()->getCmpSelInstrCost(
2934 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2935 return Cost;
2936 }
2937 case Intrinsic::sadd_sat:
2938 case Intrinsic::ssub_sat: {
2939 // Assume a default expansion.
2940 Type *CondTy = RetTy->getWithNewBitWidth(1);
2941
2942 Type *OpTy = StructType::create({RetTy, CondTy});
2943 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2944 ? Intrinsic::sadd_with_overflow
2945 : Intrinsic::ssub_with_overflow;
2947
2948 // SatMax -> Overflow && SumDiff < 0
2949 // SatMin -> Overflow && SumDiff >= 0
2951 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2952 nullptr, ScalarizationCostPassed);
2953 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2954 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2955 Pred, CostKind);
2956 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2957 CondTy, Pred, CostKind);
2958 return Cost;
2959 }
2960 case Intrinsic::uadd_sat:
2961 case Intrinsic::usub_sat: {
2962 Type *CondTy = RetTy->getWithNewBitWidth(1);
2963
2964 Type *OpTy = StructType::create({RetTy, CondTy});
2965 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2966 ? Intrinsic::uadd_with_overflow
2967 : Intrinsic::usub_with_overflow;
2968
2970 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2971 nullptr, ScalarizationCostPassed);
2972 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2973 Cost +=
2974 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2976 return Cost;
2977 }
2978 case Intrinsic::smul_fix:
2979 case Intrinsic::umul_fix: {
2980 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2981 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2982
2983 unsigned ExtOp =
2984 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2986
2988 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2989 Cost +=
2990 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2991 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2992 CCH, CostKind);
2993 Cost += thisT()->getArithmeticInstrCost(
2994 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2996 Cost += thisT()->getArithmeticInstrCost(
2997 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2999 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
3000 return Cost;
3001 }
3002 case Intrinsic::abs: {
3003 // abs(X) = select(icmp(X,0),X,sub(0,X))
3004 Type *CondTy = RetTy->getWithNewBitWidth(1);
3007 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3008 Pred, CostKind);
3009 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3010 Pred, CostKind);
3011 // TODO: Should we add an OperandValueProperties::OP_Zero property?
3012 Cost += thisT()->getArithmeticInstrCost(
3013 BinaryOperator::Sub, RetTy, CostKind,
3015 return Cost;
3016 }
3017 case Intrinsic::fshl:
3018 case Intrinsic::fshr: {
3019 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
3020 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
3021 Type *CondTy = RetTy->getWithNewBitWidth(1);
3023 Cost +=
3024 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
3025 Cost +=
3026 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
3027 Cost +=
3028 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
3029 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
3030 CostKind);
3031 // Non-constant shift amounts requires a modulo. If the typesize is a
3032 // power-2 then this will be converted to an and, otherwise it will use a
3033 // urem.
3034 Cost += thisT()->getArithmeticInstrCost(
3035 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
3036 : BinaryOperator::URem,
3037 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3038 {TTI::OK_UniformConstantValue, TTI::OP_None});
3039 // Shift-by-zero handling.
3040 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3042 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3044 return Cost;
3045 }
3046 case Intrinsic::fptosi_sat:
3047 case Intrinsic::fptoui_sat: {
3048 if (Tys.empty())
3049 break;
3050 Type *FromTy = Tys[0];
3051 bool IsSigned = IID == Intrinsic::fptosi_sat;
3052
3054 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
3055 {FromTy, FromTy});
3056 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
3057 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
3058 {FromTy, FromTy});
3059 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
3060 Cost += thisT()->getCastInstrCost(
3061 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
3063 if (IsSigned) {
3064 Type *CondTy = RetTy->getWithNewBitWidth(1);
3065 Cost += thisT()->getCmpSelInstrCost(
3066 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3067 Cost += thisT()->getCmpSelInstrCost(
3068 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3069 }
3070 return Cost;
3071 }
3072 case Intrinsic::ucmp:
3073 case Intrinsic::scmp: {
3074 Type *CmpTy = Tys[0];
3075 Type *CondTy = RetTy->getWithNewBitWidth(1);
3077 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3079 CostKind) +
3080 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3082 CostKind);
3083
3084 EVT VT = TLI->getValueType(DL, CmpTy, true);
3086 // x < y ? -1 : (x > y ? 1 : 0)
3087 Cost += 2 * thisT()->getCmpSelInstrCost(
3088 BinaryOperator::Select, RetTy, CondTy,
3090 } else {
3091 // zext(x > y) - zext(x < y)
3092 Cost +=
3093 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3095 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3096 CostKind);
3097 }
3098 return Cost;
3099 }
3100 case Intrinsic::maximumnum:
3101 case Intrinsic::minimumnum: {
3102 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3103 // maximumnum/minimumnum to
3104 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3105 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3106 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3107 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3108 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3109 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3110 int IeeeISD =
3111 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3112 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3113 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3114 RetTy, Tys[0]);
3115 InstructionCost FCanonicalizeCost =
3116 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3117 return LT.first + FCanonicalizeCost * 2;
3118 }
3119 break;
3120 }
3121 case Intrinsic::clmul: {
3122 // This cost model should match the expansion in
3123 // TargetLowering::expandCLMUL.
3124 unsigned BW = RetTy->getScalarSizeInBits();
3125 InstructionCost AndCost =
3126 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind);
3127 InstructionCost OrCost =
3128 thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
3129 InstructionCost XorCost =
3130 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3131 InstructionCost MulCost =
3132 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind);
3133
3134 // When the multiplication with holes approach is used, that emits 16
3135 // MULs, 8 + 4 ANDs, 12 XORs and 3 ORs.
3136 if (BW >= 32 && BW <= 64 &&
3138 TLI->getValueType(DL, RetTy))) {
3139 return 16 * MulCost + 12 * AndCost + 12 * XorCost + 3 * OrCost;
3140 }
3141
3142 InstructionCost PerBitCostMul = AndCost + MulCost + XorCost;
3143 InstructionCost PerBitCostBittest =
3144 AndCost +
3145 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3147 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3149 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3150 return BW * PerBitCost;
3151 }
3152 case Intrinsic::smulh:
3153 case Intrinsic::umulh: {
3154 unsigned BW = RetTy->getScalarSizeInBits();
3155 Type *WideTy = RetTy->getWithNewBitWidth(BW * 2);
3156 bool IsSigned = IID == Intrinsic::smulh;
3157 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
3159 Cost +=
3160 2 * thisT()->getCastInstrCost(ExtOp, WideTy, RetTy,
3162 Cost +=
3163 thisT()->getArithmeticInstrCost(Instruction::Mul, WideTy, CostKind);
3164 Cost += thisT()->getArithmeticInstrCost(
3165 Instruction::LShr, WideTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3167 Cost += thisT()->getCastInstrCost(Instruction::Trunc, RetTy, WideTy,
3169 return Cost;
3170 }
3171 default:
3172 break;
3173 }
3174
3175 // Else, assume that we need to scalarize this intrinsic. For math builtins
3176 // this will emit a costly libcall, adding call overhead and spills. Make it
3177 // very expensive.
3178 if (isVectorizedTy(RetTy)) {
3179 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3180
3181 // Scalable vectors cannot be scalarized, so return Invalid.
3182 if (any_of(concat<Type *const>(RetVTys, Tys),
3183 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3185
3186 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3187 if (!SkipScalarizationCost) {
3188 ScalarizationCost = 0;
3189 for (Type *RetVTy : RetVTys) {
3190 ScalarizationCost += getScalarizationOverhead(
3191 cast<VectorType>(RetVTy), /*Insert=*/true,
3192 /*Extract=*/false, CostKind);
3193 }
3194 }
3195
3196 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3197 SmallVector<Type *, 4> ScalarTys;
3198 for (Type *Ty : Tys) {
3199 if (Ty->isVectorTy())
3200 Ty = Ty->getScalarType();
3201 ScalarTys.push_back(Ty);
3202 }
3203 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3204 InstructionCost ScalarCost =
3205 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3206 for (Type *Ty : Tys) {
3207 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3208 if (!ICA.skipScalarizationCost())
3209 ScalarizationCost += getScalarizationOverhead(
3210 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3211 ScalarCalls = std::max(ScalarCalls,
3212 cast<FixedVectorType>(VTy)->getNumElements());
3213 }
3214 }
3215 return ScalarCalls * ScalarCost + ScalarizationCost;
3216 }
3217
3218 // This is going to be turned into a library call, make it expensive.
3219 return SingleCallCost;
3220 }
3221
3222 /// Get memory intrinsic cost based on arguments.
3225 TTI::TargetCostKind CostKind) const override {
3226 unsigned Id = MICA.getID();
3227 Type *DataTy = MICA.getDataType();
3228 bool VariableMask = MICA.getVariableMask();
3229 Align Alignment = MICA.getAlignment();
3230
3231 switch (Id) {
3232 case Intrinsic::experimental_vp_strided_load:
3233 case Intrinsic::experimental_vp_strided_store: {
3234 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3235 ? Instruction::Load
3236 : Instruction::Store;
3237 // For a target without strided memory operations (or for an illegal
3238 // operation type on one which does), assume we lower to a gather/scatter
3239 // operation. (Which may in turn be scalarized.)
3240 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3241 VariableMask, true, CostKind);
3242 }
3243 case Intrinsic::masked_scatter:
3244 case Intrinsic::masked_gather:
3245 case Intrinsic::vp_scatter:
3246 case Intrinsic::vp_gather: {
3247 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3248 MICA.getID() == Intrinsic::vp_gather)
3249 ? Instruction::Load
3250 : Instruction::Store;
3251
3252 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3253 VariableMask, true, CostKind);
3254 }
3255 case Intrinsic::vp_load:
3256 case Intrinsic::vp_store:
3258 case Intrinsic::masked_load:
3259 case Intrinsic::masked_store: {
3260 unsigned Opcode =
3261 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3262 // TODO: Pass on AddressSpace when we have test coverage.
3263 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3264 CostKind);
3265 }
3266 case Intrinsic::masked_compressstore:
3267 case Intrinsic::masked_expandload: {
3268 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3269 ? Instruction::Load
3270 : Instruction::Store;
3271 // Treat expand load/compress store as gather/scatter operation.
3272 // TODO: implement more precise cost estimation for these intrinsics.
3273 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3274 VariableMask,
3275 /*IsGatherScatter*/ true, CostKind);
3276 }
3277 case Intrinsic::vp_load_ff:
3279 default:
3280 llvm_unreachable("unexpected intrinsic");
3281 }
3282 }
3283
3284 /// Compute a cost of the given call instruction.
3285 ///
3286 /// Compute the cost of calling function F with return type RetTy and
3287 /// argument types Tys. F might be nullptr, in this case the cost of an
3288 /// arbitrary call with the specified signature will be returned.
3289 /// This is used, for instance, when we estimate call of a vector
3290 /// counterpart of the given function.
3291 /// \param F Called function, might be nullptr.
3292 /// \param RetTy Return value types.
3293 /// \param Tys Argument types.
3294 /// \returns The cost of Call instruction.
3297 TTI::TargetCostKind CostKind) const override {
3298 return 10;
3299 }
3300
3301 unsigned getNumberOfParts(Type *Tp) const override {
3302 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3303 if (!LT.first.isValid())
3304 return 0;
3305 // Try to find actual number of parts for non-power-of-2 elements as
3306 // ceil(num-of-elements/num-of-subtype-elements).
3307 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3308 FTp && LT.second.isFixedLengthVector() &&
3309 !has_single_bit(FTp->getNumElements())) {
3310 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3311 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3312 SubTp && SubTp->getElementType() == FTp->getElementType())
3313 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3314 }
3315 return LT.first.getValue();
3316 }
3317
3320 TTI::TargetCostKind) const override {
3321 return 0;
3322 }
3323
3324 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3325 /// We're assuming that reduction operation are performing the following way:
3326 ///
3327 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3328 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3329 /// \----------------v-------------/ \----------v------------/
3330 /// n/2 elements n/2 elements
3331 /// %red1 = op <n x t> %val, <n x t> val1
3332 /// After this operation we have a vector %red1 where only the first n/2
3333 /// elements are meaningful, the second n/2 elements are undefined and can be
3334 /// dropped. All other operations are actually working with the vector of
3335 /// length n/2, not n, though the real vector length is still n.
3336 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3337 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3338 /// \----------------v-------------/ \----------v------------/
3339 /// n/4 elements 3*n/4 elements
3340 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3341 /// length n/2, the resulting vector has length n/4 etc.
3342 ///
3343 /// The cost model should take into account that the actual length of the
3344 /// vector is reduced on each iteration.
3347 // Targets must implement a default value for the scalable case, since
3348 // we don't know how many lanes the vector has.
3351
3352 Type *ScalarTy = Ty->getElementType();
3353 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3354 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3355 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3356 NumVecElts >= 2) {
3357 // Or reduction for i1 is represented as:
3358 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3359 // %res = cmp ne iReduxWidth %val, 0
3360 // And reduction for i1 is represented as:
3361 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3362 // %res = cmp eq iReduxWidth %val, 11111
3363 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3364 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3366 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3369 }
3370 unsigned NumReduxLevels = Log2_32(NumVecElts);
3371 InstructionCost ArithCost = 0;
3372 InstructionCost ShuffleCost = 0;
3373 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3374 unsigned LongVectorCount = 0;
3375 unsigned MVTLen =
3376 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3377 while (NumVecElts > MVTLen) {
3378 NumVecElts /= 2;
3379 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3380 ShuffleCost += thisT()->getShuffleCost(
3381 TTI::SK_ExtractSubvector, SubTy, Ty, CostKind, {}, NumVecElts, SubTy);
3382 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3383 Ty = SubTy;
3384 ++LongVectorCount;
3385 }
3386
3387 NumReduxLevels -= LongVectorCount;
3388
3389 // The minimal length of the vector is limited by the real length of vector
3390 // operations performed on the current platform. That's why several final
3391 // reduction operations are performed on the vectors with the same
3392 // architecture-dependent length.
3393
3394 // By default reductions need one shuffle per reduction level.
3395 ShuffleCost +=
3396 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3397 Ty, CostKind, {}, 0, Ty);
3398 ArithCost +=
3399 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3400 return ShuffleCost + ArithCost +
3401 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3402 CostKind, 0, nullptr, nullptr);
3403 }
3404
3405 /// Try to calculate the cost of performing strict (in-order) reductions,
3406 /// which involves doing a sequence of floating point additions in lane
3407 /// order, starting with an initial value. For example, consider a scalar
3408 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3409 ///
3410 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3411 ///
3412 /// %add1 = %InitVal + %v0
3413 /// %add2 = %add1 + %v1
3414 /// %add3 = %add2 + %v2
3415 /// %add4 = %add3 + %v3
3416 ///
3417 /// As a simple estimate we can say the cost of such a reduction is 4 times
3418 /// the cost of a scalar FP addition. We can only estimate the costs for
3419 /// fixed-width vectors here because for scalable vectors we do not know the
3420 /// runtime number of operations.
3423 // Targets must implement a default value for the scalable case, since
3424 // we don't know how many lanes the vector has.
3427
3428 auto *VTy = cast<FixedVectorType>(Ty);
3430 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3431 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3432 Opcode, VTy->getElementType(), CostKind);
3433 ArithCost *= VTy->getNumElements();
3434
3435 return ExtractCost + ArithCost;
3436 }
3437
3440 std::optional<FastMathFlags> FMF,
3441 TTI::TargetCostKind CostKind) const override {
3442 assert(Ty && "Unknown reduction vector type");
3444 return getOrderedReductionCost(Opcode, Ty, CostKind);
3445 return getTreeReductionCost(Opcode, Ty, CostKind);
3446 }
3447
3448 /// Try to calculate op costs for min/max reduction operations.
3449 /// \param CondTy Conditional type for the Select instruction.
3452 TTI::TargetCostKind CostKind) const override {
3453 // Targets must implement a default value for the scalable case, since
3454 // we don't know how many lanes the vector has.
3457
3458 Type *ScalarTy = Ty->getElementType();
3459 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3460 unsigned NumReduxLevels = Log2_32(NumVecElts);
3461 InstructionCost MinMaxCost = 0;
3462 InstructionCost ShuffleCost = 0;
3463 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3464 unsigned LongVectorCount = 0;
3465 unsigned MVTLen =
3466 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3467 while (NumVecElts > MVTLen) {
3468 NumVecElts /= 2;
3469 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3470
3471 ShuffleCost += thisT()->getShuffleCost(
3472 TTI::SK_ExtractSubvector, SubTy, Ty, CostKind, {}, NumVecElts, SubTy);
3473
3474 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3475 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3476 Ty = SubTy;
3477 ++LongVectorCount;
3478 }
3479
3480 NumReduxLevels -= LongVectorCount;
3481
3482 // The minimal length of the vector is limited by the real length of vector
3483 // operations performed on the current platform. That's why several final
3484 // reduction opertions are perfomed on the vectors with the same
3485 // architecture-dependent length.
3486 ShuffleCost +=
3487 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3488 Ty, CostKind, {}, 0, Ty);
3489 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3490 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3491 // The last min/max should be in vector registers and we counted it above.
3492 // So just need a single extractelement.
3493 return ShuffleCost + MinMaxCost +
3494 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3495 CostKind, 0, nullptr, nullptr);
3496 }
3497
3499 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3500 VectorType *Ty, std::optional<FastMathFlags> FMF,
3501 TTI::TargetCostKind CostKind) const override {
3502 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3503 FTy && IsUnsigned && Opcode == Instruction::Add &&
3504 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3505 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3506 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3507 auto *IntTy =
3508 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3509 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3510 FMF ? *FMF : FastMathFlags());
3511 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3513 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3514 }
3515 // Without any native support, this is equivalent to the cost of
3516 // vecreduce.opcode(ext(Ty A)).
3517 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3518 InstructionCost RedCost =
3519 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3520 InstructionCost ExtCost = thisT()->getCastInstrCost(
3521 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3523
3524 return RedCost + ExtCost;
3525 }
3526
3528 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3529 VectorType *Ty,
3530 TTI::TargetCostKind CostKind) const override {
3531 // Without any native support, this is equivalent to the cost of
3532 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3533 // vecreduce.add(mul(A, B)).
3534 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3535 "The reduction opcode is expected to be Add or Sub.");
3536 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3537 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3538 RedOpcode, ExtTy, std::nullopt, CostKind);
3539 InstructionCost ExtCost = thisT()->getCastInstrCost(
3540 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3542
3543 InstructionCost MulCost =
3544 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3545
3546 return RedCost + MulCost + 2 * ExtCost;
3547 }
3548
3550 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
3552 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
3554 std::optional<FastMathFlags> FMF) const override {
3555 unsigned EltSizeAcc = AccumType->getScalarSizeInBits();
3556 unsigned EltSizeInA = InputTypeA->getScalarSizeInBits();
3557 unsigned Ratio = EltSizeAcc / EltSizeInA;
3558 if (VF.getKnownMinValue() <= Ratio || VF.getKnownMinValue() % Ratio != 0 ||
3559 EltSizeAcc % EltSizeInA != 0 || (BinOp && InputTypeA != InputTypeB))
3561
3562 Type *InputVectorType = VectorType::get(InputTypeA, VF);
3563 Type *ExtInputVectorType = VectorType::get(AccumType, VF);
3564 Type *AccumVectorType =
3565 VectorType::get(AccumType, VF.divideCoefficientBy(Ratio));
3566
3567 InstructionCost ExtendCostA = 0;
3569 ExtendCostA = getCastInstrCost(
3571 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3572 CostKind);
3573
3574 // TODO: add cost of extracting subvectors from the source vector that
3575 // is to be partially reduced.
3576 InstructionCost ReductionOpCost =
3577 Ratio * getArithmeticInstrCost(Opcode, AccumVectorType, CostKind);
3578
3579 if (!BinOp)
3580 return ExtendCostA + ReductionOpCost;
3581
3582 InstructionCost ExtendCostB = 0;
3584 ExtendCostB = getCastInstrCost(
3586 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3587 CostKind);
3588 return ExtendCostA + ExtendCostB + ReductionOpCost +
3589 getArithmeticInstrCost(*BinOp, ExtInputVectorType, CostKind);
3590 }
3591
3593
3594 /// @}
3595};
3596
3597/// Concrete BasicTTIImpl that can be used if no further customization
3598/// is needed.
3599class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3600 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3601
3602 friend class BasicTTIImplBase<BasicTTIImpl>;
3603
3604 const TargetSubtargetInfo *ST;
3605 const TargetLoweringBase *TLI;
3606
3607 const TargetSubtargetInfo *getST() const { return ST; }
3608 const TargetLoweringBase *getTLI() const { return TLI; }
3609
3610public:
3611 LLVM_ABI explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3612};
3613
3614} // end namespace llvm
3615
3616#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
unsigned Imm
unsigned uint64_t
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:857
This file implements the BitVector class.
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_ABI
Definition Compiler.h:215
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
SI Fold Operands
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:230
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1350
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1205
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1508
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1134
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:196
an instruction to allocate memory on the stack
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:194
size_t size() const
Get the array size.
Definition ArrayRef.h:141
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:200
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, TTI::TargetCostKind CostKind, ArrayRef< int > Mask, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
bool haveFastClmul(IntegerType *Ty) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy, Align Alignment, unsigned AddrSpace) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
unsigned getMaxInterleaveFactor(ElementCount VF, bool HasUnorderedReductions) const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const override
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind, Type *AccessType) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getBranchMispredictPenalty() const override
bool isNumRegsMajorCostOfLSR() const override
LLVM_ABI BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Set all bits in the bitvector.
Definition BitVector.h:366
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:740
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:770
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:763
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:767
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:765
@ ICMP_NE
not equal
Definition InstrTypes.h:762
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:750
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:320
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:305
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:316
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:843
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:329
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Class to represent integer types.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:338
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(LLVMContext &C, unsigned AddressSpace)
This constructs an opaque pointer to an object in a numbered address space.
Definition Type.cpp:887
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:662
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeKind getTypeConversion(LLVMContext &Context, EVT VT) const
Return pair that represents the legalization kind (first) that needs to happen to EVT (second) in ord...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const FeatureBitset & getInlineMustMatchFeatures() const =0
Target features where all mismatches prevent inlining.
virtual const FeatureBitset & getInlineInverseFeatures() const =0
Target features where the callee may have an additional feature, instead of the caller.
virtual const FeatureBitset & getInlineIgnoreFeatures() const =0
Target features to ignore for inline compatibility check.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual bool preferTailFoldingOverEpilogue(TailFoldingInfo *TFI) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind, Type *AccessType) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
@ TCK_Latency
The latency of instruction.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
llvm::VectorInstrContext VectorInstrContext
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
static LLVM_ABI Instruction::CastOps getOpcodeForPartialReductionExtendKind(PartialReductionExtendKind Kind)
Get the cast opcode for an extension kind.
MemIndexedMode
The type of load/store indexing.
static LLVM_ABI VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:514
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1827
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:723
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:339
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:283
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:277
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:297
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:363
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVM_ABI Type * getWithNewType(Type *EltTy) const
Given vector type, change the element type, whilst keeping the old number of elements.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:222
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:296
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:303
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:222
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:392
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:257
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition TypeSize.h:252
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3043
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:790
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:395
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:521
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:418
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:750
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:781
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:353
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:544
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:375
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:807
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:349
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:707
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:357
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:730
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:816
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:738
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:956
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:537
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:366
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1755
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:856
InstructionCost Cost
@ Known
Known to have no common set bits.
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2570
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1167
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:149
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1762
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:326
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:280
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:389
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
@ Fast
Assign the register banks as fast as possible (default).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
LLVM_ABI cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:373
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:339
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static LLVM_ABI bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).