LLVM 23.0.0git
BasicTTIImpl.h
Go to the documentation of this file.
1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
54#include <algorithm>
55#include <cassert>
56#include <cstdint>
57#include <limits>
58#include <optional>
59#include <utility>
60
61namespace llvm {
62
63class Function;
64class GlobalValue;
65class LLVMContext;
66class ScalarEvolution;
67class SCEV;
68class TargetMachine;
69
71
72/// Base class which can be used to help build a TTI implementation.
73///
74/// This class provides as much implementation of the TTI interface as is
75/// possible using the target independent parts of the code generator.
76///
77/// In order to subclass it, your class must implement a getST() method to
78/// return the subtarget, and a getTLI() method to return the target lowering.
79/// We need these methods implemented in the derived class so that this class
80/// doesn't have to duplicate storage for them.
81template <typename T>
83private:
85 using TTI = TargetTransformInfo;
86
87 /// Helper function to access this as a T.
88 const T *thisT() const { return static_cast<const T *>(this); }
89
90 /// Estimate a cost of Broadcast as an extract and sequence of insert
91 /// operations.
93 getBroadcastShuffleOverhead(FixedVectorType *VTy,
96 // Broadcast cost is equal to the cost of extracting the zero'th element
97 // plus the cost of inserting it into every element of the result vector.
98 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
99 CostKind, 0, nullptr, nullptr);
100
101 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
102 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
103 CostKind, i, nullptr, nullptr);
104 }
105 return Cost;
106 }
107
108 /// Estimate a cost of shuffle as a sequence of extract and insert
109 /// operations.
111 getPermuteShuffleOverhead(FixedVectorType *VTy,
114 // Shuffle cost is equal to the cost of extracting element from its argument
115 // plus the cost of inserting them onto the result vector.
116
117 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
118 // index 0 of first vector, index 1 of second vector,index 2 of first
119 // vector and finally index 3 of second vector and insert them at index
120 // <0,1,2,3> of result vector.
121 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
122 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
123 CostKind, i, nullptr, nullptr);
124 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
125 CostKind, i, nullptr, nullptr);
126 }
127 return Cost;
128 }
129
130 /// Estimate a cost of subvector extraction as a sequence of extract and
131 /// insert operations.
132 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
134 int Index,
135 FixedVectorType *SubVTy) const {
136 assert(VTy && SubVTy &&
137 "Can only extract subvectors from vectors");
138 int NumSubElts = SubVTy->getNumElements();
140 (Index + NumSubElts) <=
142 "SK_ExtractSubvector index out of range");
143
145 // Subvector extraction cost is equal to the cost of extracting element from
146 // the source type plus the cost of inserting them into the result vector
147 // type.
148 for (int i = 0; i != NumSubElts; ++i) {
149 Cost +=
150 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
151 CostKind, i + Index, nullptr, nullptr);
152 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
153 CostKind, i, nullptr, nullptr);
154 }
155 return Cost;
156 }
157
158 /// Estimate a cost of subvector insertion as a sequence of extract and
159 /// insert operations.
160 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
162 int Index,
163 FixedVectorType *SubVTy) const {
164 assert(VTy && SubVTy &&
165 "Can only insert subvectors into vectors");
166 int NumSubElts = SubVTy->getNumElements();
168 (Index + NumSubElts) <=
170 "SK_InsertSubvector index out of range");
171
173 // Subvector insertion cost is equal to the cost of extracting element from
174 // the source type plus the cost of inserting them into the result vector
175 // type.
176 for (int i = 0; i != NumSubElts; ++i) {
177 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
178 CostKind, i, nullptr, nullptr);
179 Cost +=
180 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
181 i + Index, nullptr, nullptr);
182 }
183 return Cost;
184 }
185
186 /// Local query method delegates up to T which *must* implement this!
187 const TargetSubtargetInfo *getST() const {
188 return static_cast<const T *>(this)->getST();
189 }
190
191 /// Local query method delegates up to T which *must* implement this!
192 const TargetLoweringBase *getTLI() const {
193 return static_cast<const T *>(this)->getTLI();
194 }
195
196 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
197 switch (M) {
199 return ISD::UNINDEXED;
200 case TTI::MIM_PreInc:
201 return ISD::PRE_INC;
202 case TTI::MIM_PreDec:
203 return ISD::PRE_DEC;
204 case TTI::MIM_PostInc:
205 return ISD::POST_INC;
206 case TTI::MIM_PostDec:
207 return ISD::POST_DEC;
208 }
209 llvm_unreachable("Unexpected MemIndexedMode");
210 }
211
212 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
213 Align Alignment,
214 bool VariableMask,
215 bool IsGatherScatter,
217 unsigned AddressSpace = 0) const {
218 // We cannot scalarize scalable vectors, so return Invalid.
219 if (isa<ScalableVectorType>(DataTy))
221
222 auto *VT = cast<FixedVectorType>(DataTy);
223 unsigned VF = VT->getNumElements();
224
225 // Assume the target does not have support for gather/scatter operations
226 // and provide a rough estimate.
227 //
228 // First, compute the cost of the individual memory operations.
229 InstructionCost AddrExtractCost =
230 IsGatherScatter ? getScalarizationOverhead(
232 PointerType::get(VT->getContext(), 0), VF),
233 /*Insert=*/false, /*Extract=*/true, CostKind)
234 : 0;
235
236 // The cost of the scalar loads/stores.
237 InstructionCost MemoryOpCost =
238 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
240
241 // Next, compute the cost of packing the result in a vector.
242 InstructionCost PackingCost =
243 getScalarizationOverhead(VT, Opcode != Instruction::Store,
244 Opcode == Instruction::Store, CostKind);
245
246 InstructionCost ConditionalCost = 0;
247 if (VariableMask) {
248 // Compute the cost of conditionally executing the memory operations with
249 // variable masks. This includes extracting the individual conditions, a
250 // branches and PHIs to combine the results.
251 // NOTE: Estimating the cost of conditionally executing the memory
252 // operations accurately is quite difficult and the current solution
253 // provides a very rough estimate only.
254 ConditionalCost =
257 /*Insert=*/false, /*Extract=*/true, CostKind) +
258 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
259 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
260 }
261
262 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
263 }
264
265 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
266 /// or same non -1 index value and this index value contained at least twice.
267 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
268 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
269 /// with \p Index=2.
270 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
271 // Check that the broadcast index meets at least twice.
272 bool IsCompared = false;
273 if (int SplatIdx = PoisonMaskElem;
274 all_of(enumerate(Mask), [&](const auto &P) {
275 if (P.value() == PoisonMaskElem)
276 return P.index() != Mask.size() - 1 || IsCompared;
277 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
278 return false;
279 if (SplatIdx == PoisonMaskElem) {
280 SplatIdx = P.value();
281 return P.index() != Mask.size() - 1;
282 }
283 IsCompared = true;
284 return SplatIdx == P.value();
285 })) {
286 Index = SplatIdx;
287 return true;
288 }
289 return false;
290 }
291
292 /// Several intrinsics that return structs (including llvm.sincos[pi] and
293 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
294 /// vector library functions correspond to the scalar calls (e.g. sincos or
295 /// modf), which unlike the intrinsic return values via output pointers. This
296 /// helper checks if a vector call exists for the given intrinsic, and returns
297 /// the cost, which includes the cost of the mask (if required), and the loads
298 /// for values returned via output pointers. \p LC is the scalar libcall and
299 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
300 /// the call return value. If std::nullopt is returned, then no vector library
301 /// call is available, so the intrinsic should be assigned the default cost
302 /// (e.g. scalarization).
303 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
305 std::optional<unsigned> CallRetElementIndex = {}) const {
306 Type *RetTy = ICA.getReturnType();
307 // Vector variants of the intrinsic can be mapped to a vector library call.
308 if (!isa<StructType>(RetTy) ||
310 return std::nullopt;
311
312 Type *Ty = getContainedTypes(RetTy).front();
313 EVT VT = getTLI()->getValueType(DL, Ty);
314
315 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
316
317 switch (ICA.getID()) {
318 case Intrinsic::modf:
319 LC = RTLIB::getMODF(VT);
320 break;
321 case Intrinsic::sincospi:
322 LC = RTLIB::getSINCOSPI(VT);
323 break;
324 case Intrinsic::sincos:
325 LC = RTLIB::getSINCOS(VT);
326 break;
327 default:
328 return std::nullopt;
329 }
330
331 // Find associated libcall.
332 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
333 if (LibcallImpl == RTLIB::Unsupported)
334 return std::nullopt;
335
336 LLVMContext &Ctx = RetTy->getContext();
337
338 // Cost the call + mask.
339 auto Cost =
340 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
341
344 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
345 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
346 VecTy, {}, CostKind, 0, nullptr, {});
347 }
348
349 // Lowering to a library call (with output pointers) may require us to emit
350 // reloads for the results.
351 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
352 if (Idx == CallRetElementIndex)
353 continue;
354 Cost += thisT()->getMemoryOpCost(
355 Instruction::Load, VectorTy,
356 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
357 }
358 return Cost;
359 }
360
361 /// Filter out constant and duplicated entries in \p Ops and return a vector
362 /// containing the types from \p Tys corresponding to the remaining operands.
364 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
365 ArrayRef<Type *> Tys) {
366 SmallPtrSet<const Value *, 4> UniqueOperands;
367 SmallVector<Type *, 4> FilteredTys;
368 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
369 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
370 continue;
371 FilteredTys.push_back(Ty);
372 }
373 return FilteredTys;
374 }
375
376protected:
377 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
378 : BaseT(DL) {}
379 ~BasicTTIImplBase() override = default;
380
383
384public:
385 /// \name Scalar TTI Implementations
386 /// @{
388 unsigned AddressSpace, Align Alignment,
389 unsigned *Fast) const override {
390 EVT E = EVT::getIntegerVT(Context, BitWidth);
391 return getTLI()->allowsMisalignedMemoryAccesses(
393 }
394
395 bool areInlineCompatible(const Function *Caller,
396 const Function *Callee) const override {
397 const TargetMachine &TM = getTLI()->getTargetMachine();
398
399 const FeatureBitset &CallerBits =
400 TM.getSubtargetImpl(*Caller)->getFeatureBits();
401 const FeatureBitset &CalleeBits =
402 TM.getSubtargetImpl(*Callee)->getFeatureBits();
403
404 // Inline a callee if its target-features are a subset of the callers
405 // target-features.
406 return (CallerBits & CalleeBits) == CalleeBits;
407 }
408
409 bool hasBranchDivergence(const Function *F = nullptr) const override {
410 return false;
411 }
412
413 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
414 return false;
415 }
416
417 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
418 return true;
419 }
420
421 unsigned getFlatAddressSpace() const override {
422 // Return an invalid address space.
423 return -1;
424 }
425
427 Intrinsic::ID IID) const override {
428 return false;
429 }
430
431 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
432 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
433 }
434
435 unsigned getAssumedAddrSpace(const Value *V) const override {
436 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
437 }
438
439 bool isSingleThreaded() const override {
440 return getTLI()->getTargetMachine().Options.ThreadModel ==
442 }
443
444 std::pair<const Value *, unsigned>
445 getPredicatedAddrSpace(const Value *V) const override {
446 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
447 }
448
450 Value *NewV) const override {
451 return nullptr;
452 }
453
454 bool isLegalAddImmediate(int64_t imm) const override {
455 return getTLI()->isLegalAddImmediate(imm);
456 }
457
458 bool isLegalAddScalableImmediate(int64_t Imm) const override {
459 return getTLI()->isLegalAddScalableImmediate(Imm);
460 }
461
462 bool isLegalICmpImmediate(int64_t imm) const override {
463 return getTLI()->isLegalICmpImmediate(imm);
464 }
465
466 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
467 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
468 Instruction *I = nullptr,
469 int64_t ScalableOffset = 0) const override {
471 AM.BaseGV = BaseGV;
472 AM.BaseOffs = BaseOffset;
473 AM.HasBaseReg = HasBaseReg;
474 AM.Scale = Scale;
475 AM.ScalableOffset = ScalableOffset;
476 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
477 }
478
479 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
480 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
481 }
482
483 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
484 Type *ScalarValTy) const override {
485 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy](unsigned VF) {
486 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
487 EVT VT = getTLI()->getValueType(DL, SrcTy);
488 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
489 getTLI()->isOperationCustom(ISD::STORE, VT))
490 return true;
491
492 EVT ValVT =
493 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
494 EVT LegalizedVT =
495 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
496 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT);
497 };
498 while (VF > 2 && IsSupportedByTarget(VF))
499 VF /= 2;
500 return VF;
501 }
502
503 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
504 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
505 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
506 }
507
508 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
509 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
510 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
511 }
512
514 const TTI::LSRCost &C2) const override {
516 }
517
521
525
529
531 StackOffset BaseOffset, bool HasBaseReg,
532 int64_t Scale,
533 unsigned AddrSpace) const override {
535 AM.BaseGV = BaseGV;
536 AM.BaseOffs = BaseOffset.getFixed();
537 AM.HasBaseReg = HasBaseReg;
538 AM.Scale = Scale;
539 AM.ScalableOffset = BaseOffset.getScalable();
540 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
541 return 0;
543 }
544
545 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
546 return getTLI()->isTruncateFree(Ty1, Ty2);
547 }
548
549 bool isProfitableToHoist(Instruction *I) const override {
550 return getTLI()->isProfitableToHoist(I);
551 }
552
553 bool useAA() const override { return getST()->useAA(); }
554
555 bool isTypeLegal(Type *Ty) const override {
556 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
557 return getTLI()->isTypeLegal(VT);
558 }
559
560 unsigned getRegUsageForType(Type *Ty) const override {
561 EVT ETy = getTLI()->getValueType(DL, Ty);
562 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
563 }
564
565 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
566 ArrayRef<const Value *> Operands, Type *AccessType,
567 TTI::TargetCostKind CostKind) const override {
568 return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
569 }
570
572 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
573 BlockFrequencyInfo *BFI) const override {
574 /// Try to find the estimated number of clusters. Note that the number of
575 /// clusters identified in this function could be different from the actual
576 /// numbers found in lowering. This function ignore switches that are
577 /// lowered with a mix of jump table / bit test / BTree. This function was
578 /// initially intended to be used when estimating the cost of switch in
579 /// inline cost heuristic, but it's a generic cost model to be used in other
580 /// places (e.g., in loop unrolling).
581 unsigned N = SI.getNumCases();
582 const TargetLoweringBase *TLI = getTLI();
583 const DataLayout &DL = this->getDataLayout();
584
585 JumpTableSize = 0;
586 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
587
588 // Early exit if both a jump table and bit test are not allowed.
589 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
590 return N;
591
592 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
593 APInt MinCaseVal = MaxCaseVal;
594 for (auto CI : SI.cases()) {
595 const APInt &CaseVal = CI.getCaseValue()->getValue();
596 if (CaseVal.sgt(MaxCaseVal))
597 MaxCaseVal = CaseVal;
598 if (CaseVal.slt(MinCaseVal))
599 MinCaseVal = CaseVal;
600 }
601
602 // Check if suitable for a bit test
603 if (N <= DL.getIndexSizeInBits(0u)) {
605 for (auto I : SI.cases()) {
606 const BasicBlock *BB = I.getCaseSuccessor();
607 ++DestMap[BB];
608 }
609
610 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
611 return 1;
612 }
613
614 // Check if suitable for a jump table.
615 if (IsJTAllowed) {
616 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
617 return N;
619 (MaxCaseVal - MinCaseVal)
620 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
621 // Check whether a range of clusters is dense enough for a jump table
622 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
623 JumpTableSize = Range;
624 return 1;
625 }
626 }
627 return N;
628 }
629
630 bool shouldBuildLookupTables() const override {
631 const TargetLoweringBase *TLI = getTLI();
632 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
633 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
634 }
635
636 bool shouldBuildRelLookupTables() const override {
637 const TargetMachine &TM = getTLI()->getTargetMachine();
638 // If non-PIC mode, do not generate a relative lookup table.
639 if (!TM.isPositionIndependent())
640 return false;
641
642 /// Relative lookup table entries consist of 32-bit offsets.
643 /// Do not generate relative lookup tables for large code models
644 /// in 64-bit achitectures where 32-bit offsets might not be enough.
645 if (TM.getCodeModel() == CodeModel::Medium ||
647 return false;
648
649 const Triple &TargetTriple = TM.getTargetTriple();
650 if (!TargetTriple.isArch64Bit())
651 return false;
652
653 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
654 // there.
655 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
656 return false;
657
658 return true;
659 }
660
661 bool haveFastSqrt(Type *Ty) const override {
662 const TargetLoweringBase *TLI = getTLI();
663 EVT VT = TLI->getValueType(DL, Ty);
664 return TLI->isTypeLegal(VT) &&
666 }
667
668 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
669
670 InstructionCost getFPOpCost(Type *Ty) const override {
671 // Check whether FADD is available, as a proxy for floating-point in
672 // general.
673 const TargetLoweringBase *TLI = getTLI();
674 EVT VT = TLI->getValueType(DL, Ty);
678 }
679
681 const Function &Fn) const override {
682 switch (Inst.getOpcode()) {
683 default:
684 break;
685 case Instruction::SDiv:
686 case Instruction::SRem:
687 case Instruction::UDiv:
688 case Instruction::URem: {
689 if (!isa<ConstantInt>(Inst.getOperand(1)))
690 return false;
691 EVT VT = getTLI()->getValueType(DL, Inst.getType());
692 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
693 }
694 };
695
696 return false;
697 }
698
699 unsigned getInliningThresholdMultiplier() const override { return 1; }
700 unsigned adjustInliningThreshold(const CallBase *CB) const override {
701 return 0;
702 }
703 unsigned getCallerAllocaCost(const CallBase *CB,
704 const AllocaInst *AI) const override {
705 return 0;
706 }
707
708 int getInlinerVectorBonusPercent() const override { return 150; }
709
712 OptimizationRemarkEmitter *ORE) const override {
713 // This unrolling functionality is target independent, but to provide some
714 // motivation for its intended use, for x86:
715
716 // According to the Intel 64 and IA-32 Architectures Optimization Reference
717 // Manual, Intel Core models and later have a loop stream detector (and
718 // associated uop queue) that can benefit from partial unrolling.
719 // The relevant requirements are:
720 // - The loop must have no more than 4 (8 for Nehalem and later) branches
721 // taken, and none of them may be calls.
722 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
723
724 // According to the Software Optimization Guide for AMD Family 15h
725 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
726 // and loop buffer which can benefit from partial unrolling.
727 // The relevant requirements are:
728 // - The loop must have fewer than 16 branches
729 // - The loop must have less than 40 uops in all executed loop branches
730
731 // The number of taken branches in a loop is hard to estimate here, and
732 // benchmarking has revealed that it is better not to be conservative when
733 // estimating the branch count. As a result, we'll ignore the branch limits
734 // until someone finds a case where it matters in practice.
735
736 unsigned MaxOps;
737 const TargetSubtargetInfo *ST = getST();
738 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
740 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
741 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
742 else
743 return;
744
745 // Scan the loop: don't unroll loops with calls.
746 for (BasicBlock *BB : L->blocks()) {
747 for (Instruction &I : *BB) {
748 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
749 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
750 if (!thisT()->isLoweredToCall(F))
751 continue;
752 }
753
754 if (ORE) {
755 ORE->emit([&]() {
756 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
757 L->getHeader())
758 << "advising against unrolling the loop because it "
759 "contains a "
760 << ore::NV("Call", &I);
761 });
762 }
763 return;
764 }
765 }
766 }
767
768 // Enable runtime and partial unrolling up to the specified size.
769 // Enable using trip count upper bound to unroll loops.
770 UP.Partial = UP.Runtime = UP.UpperBound = true;
771 UP.PartialThreshold = MaxOps;
772
773 // Avoid unrolling when optimizing for size.
774 UP.OptSizeThreshold = 0;
776
777 // Set number of instructions optimized when "back edge"
778 // becomes "fall through" to default value of 2.
779 UP.BEInsns = 2;
780 }
781
783 TTI::PeelingPreferences &PP) const override {
784 PP.PeelCount = 0;
785 PP.AllowPeeling = true;
786 PP.AllowLoopNestsPeeling = false;
787 PP.PeelProfiledIterations = true;
788 }
789
792 HardwareLoopInfo &HWLoopInfo) const override {
793 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
794 }
795
796 unsigned getEpilogueVectorizationMinVF() const override {
798 }
799
802 }
803
807
808 std::optional<Instruction *>
811 }
812
813 std::optional<Value *>
815 APInt DemandedMask, KnownBits &Known,
816 bool &KnownBitsComputed) const override {
817 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
818 KnownBitsComputed);
819 }
820
822 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
823 APInt &UndefElts2, APInt &UndefElts3,
824 std::function<void(Instruction *, unsigned, APInt, APInt &)>
825 SimplifyAndSetOp) const override {
827 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
828 SimplifyAndSetOp);
829 }
830
831 std::optional<unsigned>
833 return std::optional<unsigned>(
834 getST()->getCacheSize(static_cast<unsigned>(Level)));
835 }
836
837 std::optional<unsigned>
839 std::optional<unsigned> TargetResult =
840 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
841
842 if (TargetResult)
843 return TargetResult;
844
845 return BaseT::getCacheAssociativity(Level);
846 }
847
848 unsigned getCacheLineSize() const override {
849 return getST()->getCacheLineSize();
850 }
851
852 unsigned getPrefetchDistance() const override {
853 return getST()->getPrefetchDistance();
854 }
855
856 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
857 unsigned NumStridedMemAccesses,
858 unsigned NumPrefetches,
859 bool HasCall) const override {
860 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
861 NumPrefetches, HasCall);
862 }
863
864 unsigned getMaxPrefetchIterationsAhead() const override {
865 return getST()->getMaxPrefetchIterationsAhead();
866 }
867
868 bool enableWritePrefetching() const override {
869 return getST()->enableWritePrefetching();
870 }
871
872 bool shouldPrefetchAddressSpace(unsigned AS) const override {
873 return getST()->shouldPrefetchAddressSpace(AS);
874 }
875
876 /// @}
877
878 /// \name Vector TTI Implementations
879 /// @{
880
885
886 std::optional<unsigned> getMaxVScale() const override { return std::nullopt; }
887 std::optional<unsigned> getVScaleForTuning() const override {
888 return std::nullopt;
889 }
890
891 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
892 /// are set if the demanded result elements need to be inserted and/or
893 /// extracted from vectors.
895 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
896 bool Insert, bool Extract,
898 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
900 TTI::VectorInstrContext::None) const override {
901 /// FIXME: a bitfield is not a reasonable abstraction for talking about
902 /// which elements are needed from a scalable vector
903 if (isa<ScalableVectorType>(InTy))
905 auto *Ty = cast<FixedVectorType>(InTy);
906
907 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
908 (VL.empty() || VL.size() == Ty->getNumElements()) &&
909 "Vector size mismatch");
910
912
913 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
914 if (!DemandedElts[i])
915 continue;
916 if (Insert) {
917 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
918 Cost +=
919 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
920 CostKind, i, nullptr, InsertedVal, VIC);
921 }
922 if (Extract)
923 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
924 CostKind, i, nullptr, nullptr, VIC);
925 }
926
927 return Cost;
928 }
929
931 return false;
932 }
933
934 bool
936 unsigned ScalarOpdIdx) const override {
937 return false;
938 }
939
941 int OpdIdx) const override {
942 return OpdIdx == -1;
943 }
944
945 bool
947 int RetIdx) const override {
948 return RetIdx == 0;
949 }
950
951 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
953 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
954 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
956 if (isa<ScalableVectorType>(InTy))
958 auto *Ty = cast<FixedVectorType>(InTy);
959
960 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
961 // Use CRTP to allow target overrides
962 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
963 CostKind, ForPoisonSrc, VL, VIC);
964 }
965
966 /// Estimate the overhead of scalarizing an instruction's
967 /// operands. The (potentially vector) types to use for each of
968 /// argument are passes via Tys.
972 TTI::VectorInstrContext::None) const override {
974 for (Type *Ty : Tys) {
975 // Disregard things like metadata arguments.
976 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
977 !Ty->isPtrOrPtrVectorTy())
978 continue;
979
980 if (auto *VecTy = dyn_cast<VectorType>(Ty))
981 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
982 /*Extract*/ true, CostKind,
983 /*ForPoisonSrc=*/true, {}, VIC);
984 }
985
986 return Cost;
987 }
988
989 /// Estimate the overhead of scalarizing the inputs and outputs of an
990 /// instruction, with return type RetTy and arguments Args of type Tys. If
991 /// Args are unknown (empty), then the cost associated with one argument is
992 /// added as a heuristic.
998 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
999 if (!Args.empty())
1001 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1002 else
1003 // When no information on arguments is provided, we add the cost
1004 // associated with one argument as a heuristic.
1005 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1006 /*Extract*/ true, CostKind);
1007
1008 return Cost;
1009 }
1010
1011 /// Estimate the cost of type-legalization and the legalized type.
1012 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1013 LLVMContext &C = Ty->getContext();
1014 EVT MTy = getTLI()->getValueType(DL, Ty);
1015
1017 // We keep legalizing the type until we find a legal kind. We assume that
1018 // the only operation that costs anything is the split. After splitting
1019 // we need to handle two types.
1020 while (true) {
1021 TargetLoweringBase::LegalizeKind LK = getTLI()->getTypeConversion(C, MTy);
1022
1024 // Ensure we return a sensible simple VT here, since many callers of
1025 // this function require it.
1026 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1027 return std::make_pair(InstructionCost::getInvalid(), VT);
1028 }
1029
1030 if (LK.first == TargetLoweringBase::TypeLegal)
1031 return std::make_pair(Cost, MTy.getSimpleVT());
1032
1033 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1035 Cost *= 2;
1036
1037 // Do not loop with f128 type.
1038 if (MTy == LK.second)
1039 return std::make_pair(Cost, MTy.getSimpleVT());
1040
1041 // Keep legalizing the type.
1042 MTy = LK.second;
1043 }
1044 }
1045
1046 unsigned getMaxInterleaveFactor(ElementCount VF) const override { return 1; }
1047
1049 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1052 ArrayRef<const Value *> Args = {},
1053 const Instruction *CxtI = nullptr) const override {
1054 // Check if any of the operands are vector operands.
1055 const TargetLoweringBase *TLI = getTLI();
1056 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1057 assert(ISD && "Invalid opcode");
1058
1059 // TODO: Handle more cost kinds.
1061 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1062 Opd1Info, Opd2Info,
1063 Args, CxtI);
1064
1065 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1066
1067 bool IsFloat = Ty->isFPOrFPVectorTy();
1068 // Assume that floating point arithmetic operations cost twice as much as
1069 // integer operations.
1070 InstructionCost OpCost = (IsFloat ? 2 : 1);
1071
1072 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1073 // The operation is legal. Assume it costs 1.
1074 // TODO: Once we have extract/insert subvector cost we need to use them.
1075 return LT.first * OpCost;
1076 }
1077
1078 if (!TLI->isOperationExpand(ISD, LT.second)) {
1079 // If the operation is custom lowered, then assume that the code is twice
1080 // as expensive.
1081 return LT.first * 2 * OpCost;
1082 }
1083
1084 // An 'Expand' of URem and SRem is special because it may default
1085 // to expanding the operation into a sequence of sub-operations
1086 // i.e. X % Y -> X-(X/Y)*Y.
1087 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1088 bool IsSigned = ISD == ISD::SREM;
1089 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1090 LT.second) ||
1091 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1092 LT.second)) {
1093 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1094 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1095 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1096 InstructionCost MulCost =
1097 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1098 InstructionCost SubCost =
1099 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1100 return DivCost + MulCost + SubCost;
1101 }
1102 }
1103
1104 // We cannot scalarize scalable vectors, so return Invalid.
1107
1108 // Else, assume that we need to scalarize this op.
1109 // TODO: If one of the types get legalized by splitting, handle this
1110 // similarly to what getCastInstrCost() does.
1111 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1112 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1113 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1114 Args, CxtI);
1115 // Return the cost of multiple scalar invocation plus the cost of
1116 // inserting and extracting the values.
1117 SmallVector<Type *> Tys(Args.size(), Ty);
1118 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1119 VTy->getNumElements() * Cost;
1120 }
1121
1122 // We don't know anything about this scalar instruction.
1123 return OpCost;
1124 }
1125
1127 ArrayRef<int> Mask,
1128 VectorType *SrcTy, int &Index,
1129 VectorType *&SubTy) const {
1130 if (Mask.empty())
1131 return Kind;
1132 int NumDstElts = Mask.size();
1133 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1134 switch (Kind) {
1136 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1137 return TTI::SK_Reverse;
1138 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1139 return TTI::SK_Broadcast;
1140 if (isSplatMask(Mask, NumSrcElts, Index))
1141 return TTI::SK_Broadcast;
1142 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1143 (Index + NumDstElts) <= NumSrcElts) {
1144 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1146 }
1147 break;
1148 }
1149 case TTI::SK_PermuteTwoSrc: {
1150 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1152 Index, SubTy);
1153 int NumSubElts;
1154 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1155 Mask, NumSrcElts, NumSubElts, Index)) {
1156 if (Index + NumSubElts > NumSrcElts)
1157 return Kind;
1158 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1160 }
1161 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1162 return TTI::SK_Select;
1163 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1164 return TTI::SK_Transpose;
1165 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1166 return TTI::SK_Splice;
1167 break;
1168 }
1169 case TTI::SK_Select:
1170 case TTI::SK_Reverse:
1171 case TTI::SK_Broadcast:
1172 case TTI::SK_Transpose:
1175 case TTI::SK_Splice:
1176 break;
1177 }
1178 return Kind;
1179 }
1180
1184 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1185 const Instruction *CxtI = nullptr) const override {
1186 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1187 case TTI::SK_Broadcast:
1188 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1189 return getBroadcastShuffleOverhead(FVT, CostKind);
1191 case TTI::SK_Select:
1192 case TTI::SK_Splice:
1193 case TTI::SK_Reverse:
1194 case TTI::SK_Transpose:
1197 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1198 return getPermuteShuffleOverhead(FVT, CostKind);
1201 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1202 cast<FixedVectorType>(SubTp));
1204 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1205 cast<FixedVectorType>(SubTp));
1206 }
1207 llvm_unreachable("Unknown TTI::ShuffleKind");
1208 }
1209
1211 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1213 const Instruction *I = nullptr) const override {
1214 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1215 return 0;
1216
1217 const TargetLoweringBase *TLI = getTLI();
1218 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1219 assert(ISD && "Invalid opcode");
1220 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1221 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1222
1223 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1224 TypeSize DstSize = DstLT.second.getSizeInBits();
1225 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1226 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1227
1228 switch (Opcode) {
1229 default:
1230 break;
1231 case Instruction::Trunc:
1232 // Check for NOOP conversions.
1233 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1234 return 0;
1235 [[fallthrough]];
1236 case Instruction::BitCast:
1237 // Bitcast between types that are legalized to the same type are free and
1238 // assume int to/from ptr of the same size is also free.
1239 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1240 SrcSize == DstSize)
1241 return 0;
1242 break;
1243 case Instruction::FPExt:
1244 if (I && getTLI()->isExtFree(I))
1245 return 0;
1246 break;
1247 case Instruction::ZExt:
1248 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1249 return 0;
1250 [[fallthrough]];
1251 case Instruction::SExt:
1252 if (I && getTLI()->isExtFree(I))
1253 return 0;
1254
1255 // If this is a zext/sext of a load, return 0 if the corresponding
1256 // extending load exists on target and the result type is legal.
1257 if (CCH == TTI::CastContextHint::Normal) {
1258 EVT ExtVT = EVT::getEVT(Dst);
1259 EVT LoadVT = EVT::getEVT(Src);
1260 unsigned LType =
1261 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1262 if (I) {
1263 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1264 if (DstLT.first == SrcLT.first &&
1265 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1266 LI->getPointerAddressSpace(), LType, false))
1267 return 0;
1268 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1269 switch (II->getIntrinsicID()) {
1270 case Intrinsic::masked_load: {
1271 Type *PtrType = II->getArgOperand(0)->getType();
1272 assert(PtrType->isPointerTy());
1273
1274 if (DstLT.first == SrcLT.first &&
1275 TLI->isLoadLegal(
1276 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1277 PtrType->getPointerAddressSpace(), LType, false))
1278 return 0;
1279
1280 break;
1281 }
1282 default:
1283 break;
1284 }
1285 }
1286 }
1287 }
1288 break;
1289 case Instruction::AddrSpaceCast:
1290 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1291 Dst->getPointerAddressSpace()))
1292 return 0;
1293 break;
1294 }
1295
1296 auto *SrcVTy = dyn_cast<VectorType>(Src);
1297 auto *DstVTy = dyn_cast<VectorType>(Dst);
1298
1299 // If the cast is marked as legal (or promote) then assume low cost.
1300 if (SrcLT.first == DstLT.first &&
1301 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1302 return SrcLT.first;
1303
1304 // Handle scalar conversions.
1305 if (!SrcVTy && !DstVTy) {
1306 // Just check the op cost. If the operation is legal then assume it costs
1307 // 1.
1308 if (!TLI->isOperationExpand(ISD, DstLT.second))
1309 return 1;
1310
1311 // Assume that illegal scalar instruction are expensive.
1312 return 4;
1313 }
1314
1315 // Check vector-to-vector casts.
1316 if (DstVTy && SrcVTy) {
1317 // If the cast is between same-sized registers, then the check is simple.
1318 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1319
1320 // Assume that Zext is done using AND.
1321 if (Opcode == Instruction::ZExt)
1322 return SrcLT.first;
1323
1324 // Assume that sext is done using SHL and SRA.
1325 if (Opcode == Instruction::SExt)
1326 return SrcLT.first * 2;
1327
1328 // Just check the op cost. If the operation is legal then assume it
1329 // costs
1330 // 1 and multiply by the type-legalization overhead.
1331 if (!TLI->isOperationExpand(ISD, DstLT.second))
1332 return SrcLT.first * 1;
1333 }
1334
1335 // If we are legalizing by splitting, query the concrete TTI for the cost
1336 // of casting the original vector twice. We also need to factor in the
1337 // cost of the split itself. Count that as 1, to be consistent with
1338 // getTypeLegalizationCost().
1339 bool SplitSrc =
1340 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1342 bool SplitDst =
1343 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1345 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1346 DstVTy->getElementCount().isKnownEven()) {
1347 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1348 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1349 const T *TTI = thisT();
1350 // If both types need to be split then the split is free.
1351 InstructionCost SplitCost =
1352 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1353 return SplitCost +
1354 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1355 CostKind, I));
1356 }
1357
1358 // Scalarization cost is Invalid, can't assume any num elements.
1359 if (isa<ScalableVectorType>(DstVTy))
1361
1362 // In other cases where the source or destination are illegal, assume
1363 // the operation will get scalarized.
1364 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1365 InstructionCost Cost = thisT()->getCastInstrCost(
1366 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1367
1368 // Return the cost of multiple scalar invocation plus the cost of
1369 // inserting and extracting the values.
1370 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1371 CostKind) +
1372 Num * Cost;
1373 }
1374
1375 // We already handled vector-to-vector and scalar-to-scalar conversions.
1376 // This
1377 // is where we handle bitcast between vectors and scalars. We need to assume
1378 // that the conversion is scalarized in one way or another.
1379 if (Opcode == Instruction::BitCast) {
1380 // Illegal bitcasts are done by storing and loading from a stack slot.
1381 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1382 /*Extract*/ true, CostKind)
1383 : 0) +
1384 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1385 /*Extract*/ false, CostKind)
1386 : 0);
1387 }
1388
1389 llvm_unreachable("Unhandled cast");
1390 }
1391
1393 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1394 unsigned Index,
1395 TTI::TargetCostKind CostKind) const override {
1396 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1397 CostKind, Index, nullptr, nullptr) +
1398 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1400 }
1401
1404 const Instruction *I = nullptr) const override {
1405 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1406 }
1407
1409 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1413 const Instruction *I = nullptr) const override {
1414 const TargetLoweringBase *TLI = getTLI();
1415 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1416 assert(ISD && "Invalid opcode");
1417
1418 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1419 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1420 Op1Info, Op2Info, I);
1421
1422 // Selects on vectors are actually vector selects.
1423 if (ISD == ISD::SELECT) {
1424 assert(CondTy && "CondTy must exist");
1425 if (CondTy->isVectorTy())
1426 ISD = ISD::VSELECT;
1427 }
1428 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1429
1430 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1431 !TLI->isOperationExpand(ISD, LT.second)) {
1432 // The operation is legal. Assume it costs 1. Multiply
1433 // by the type-legalization overhead.
1434 return LT.first * 1;
1435 }
1436
1437 // Otherwise, assume that the cast is scalarized.
1438 // TODO: If one of the types get legalized by splitting, handle this
1439 // similarly to what getCastInstrCost() does.
1440 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1441 if (isa<ScalableVectorType>(ValTy))
1443
1444 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1445 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1446 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1447 CostKind, Op1Info, Op2Info, I);
1448
1449 // Return the cost of multiple scalar invocation plus the cost of
1450 // inserting and extracting the values.
1451 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1452 /*Extract*/ false, CostKind) +
1453 Num * Cost;
1454 }
1455
1456 // Unknown scalar opcode.
1457 return 1;
1458 }
1459
1462 unsigned Index, const Value *Op0, const Value *Op1,
1464 TTI::VectorInstrContext::None) const override {
1465 return getRegUsageForType(Val->getScalarType());
1466 }
1467
1468 /// \param ScalarUserAndIdx encodes the information about extracts from a
1469 /// vector with 'Scalar' being the value being extracted,'User' being the user
1470 /// of the extract(nullptr if user is not known before vectorization) and
1471 /// 'Idx' being the extract lane.
1473 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1474 Value *Scalar,
1475 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1477 TTI::VectorInstrContext::None) const override {
1478 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1479 VIC);
1480 }
1481
1484 TTI::TargetCostKind CostKind, unsigned Index,
1486 TTI::VectorInstrContext::None) const override {
1487 Value *Op0 = nullptr;
1488 Value *Op1 = nullptr;
1489 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1490 Op0 = IE->getOperand(0);
1491 Op1 = IE->getOperand(1);
1492 }
1493 // If VIC is None, compute it from the instruction
1496 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1497 Op1, VIC);
1498 }
1499
1503 unsigned Index) const override {
1504 unsigned NewIndex = -1;
1505 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1506 assert(Index < FVTy->getNumElements() &&
1507 "Unexpected index from end of vector");
1508 NewIndex = FVTy->getNumElements() - 1 - Index;
1509 }
1510 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1511 nullptr);
1512 }
1513
1515 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1516 const APInt &DemandedDstElts,
1517 TTI::TargetCostKind CostKind) const override {
1518 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1519 "Unexpected size of DemandedDstElts.");
1520
1522
1523 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1524 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1525
1526 // The Mask shuffling cost is extract all the elements of the Mask
1527 // and insert each of them Factor times into the wide vector:
1528 //
1529 // E.g. an interleaved group with factor 3:
1530 // %mask = icmp ult <8 x i32> %vec1, %vec2
1531 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1532 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1533 // The cost is estimated as extract all mask elements from the <8xi1> mask
1534 // vector and insert them factor times into the <24xi1> shuffled mask
1535 // vector.
1536 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1537 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1538 /*Insert*/ false,
1539 /*Extract*/ true, CostKind);
1540 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1541 /*Insert*/ true,
1542 /*Extract*/ false, CostKind);
1543
1544 return Cost;
1545 }
1546
1548 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1551 const Instruction *I = nullptr) const override {
1552 assert(!Src->isVoidTy() && "Invalid type");
1553 // Assume types, such as structs, are expensive.
1554 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1555 return 4;
1556 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1557
1558 // Assuming that all loads of legal types cost 1.
1559 InstructionCost Cost = LT.first;
1561 return Cost;
1562
1563 const DataLayout &DL = this->getDataLayout();
1564 if (Src->isVectorTy() &&
1565 // In practice it's not currently possible to have a change in lane
1566 // length for extending loads or truncating stores so both types should
1567 // have the same scalable property.
1568 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1569 LT.second.getSizeInBits())) {
1570 // This is a vector load that legalizes to a larger type than the vector
1571 // itself. Unless the corresponding extending load or truncating store is
1572 // legal, then this will scalarize.
1574 EVT MemVT = getTLI()->getValueType(DL, Src);
1575 if (Opcode == Instruction::Store)
1576 LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
1577 else
1578 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1579 ISD::EXTLOAD, false);
1580
1581 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1582 // This is a vector load/store for some illegal type that is scalarized.
1583 // We must account for the cost of building or decomposing the vector.
1585 cast<VectorType>(Src), Opcode != Instruction::Store,
1586 Opcode == Instruction::Store, CostKind);
1587 }
1588 }
1589
1590 return Cost;
1591 }
1592
1594 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1595 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1596 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1597
1598 // We cannot scalarize scalable vectors, so return Invalid.
1599 if (isa<ScalableVectorType>(VecTy))
1601
1602 auto *VT = cast<FixedVectorType>(VecTy);
1603
1604 unsigned NumElts = VT->getNumElements();
1605 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1606
1607 unsigned NumSubElts = NumElts / Factor;
1608 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1609
1610 // Firstly, the cost of load/store operation.
1612 if (UseMaskForCond || UseMaskForGaps) {
1613 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1614 : Intrinsic::masked_store;
1615 Cost = thisT()->getMemIntrinsicInstrCost(
1616 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1617 CostKind);
1618 } else
1619 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1620 CostKind);
1621
1622 // Legalize the vector type, and get the legalized and unlegalized type
1623 // sizes.
1624 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1625 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1626 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1627
1628 // Scale the cost of the memory operation by the fraction of legalized
1629 // instructions that will actually be used. We shouldn't account for the
1630 // cost of dead instructions since they will be removed.
1631 //
1632 // E.g., An interleaved load of factor 8:
1633 // %vec = load <16 x i64>, <16 x i64>* %ptr
1634 // %v0 = shufflevector %vec, undef, <0, 8>
1635 //
1636 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1637 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1638 // type). The other loads are unused.
1639 //
1640 // TODO: Note that legalization can turn masked loads/stores into unmasked
1641 // (legalized) loads/stores. This can be reflected in the cost.
1642 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1643 // The number of loads of a legal type it will take to represent a load
1644 // of the unlegalized vector type.
1645 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1646
1647 // The number of elements of the unlegalized type that correspond to a
1648 // single legal instruction.
1649 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1650
1651 // Determine which legal instructions will be used.
1652 BitVector UsedInsts(NumLegalInsts, false);
1653 for (unsigned Index : Indices)
1654 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1655 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1656
1657 // Scale the cost of the load by the fraction of legal instructions that
1658 // will be used.
1659 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1660 }
1661
1662 // Then plus the cost of interleave operation.
1663 assert(Indices.size() <= Factor &&
1664 "Interleaved memory op has too many members");
1665
1666 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1667 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1668
1669 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1670 for (unsigned Index : Indices) {
1671 assert(Index < Factor && "Invalid index for interleaved memory op");
1672 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1673 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1674 }
1675
1676 if (Opcode == Instruction::Load) {
1677 // The interleave cost is similar to extract sub vectors' elements
1678 // from the wide vector, and insert them into sub vectors.
1679 //
1680 // E.g. An interleaved load of factor 2 (with one member of index 0):
1681 // %vec = load <8 x i32>, <8 x i32>* %ptr
1682 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1683 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1684 // <8 x i32> vector and insert them into a <4 x i32> vector.
1685 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1686 SubVT, DemandedAllSubElts,
1687 /*Insert*/ true, /*Extract*/ false, CostKind);
1688 Cost += Indices.size() * InsSubCost;
1689 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1690 /*Insert*/ false,
1691 /*Extract*/ true, CostKind);
1692 } else {
1693 // The interleave cost is extract elements from sub vectors, and
1694 // insert them into the wide vector.
1695 //
1696 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1697 // (using VF=4):
1698 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1699 // %gaps.mask = <true, true, false, true, true, false,
1700 // true, true, false, true, true, false>
1701 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1702 // i32 Align, <12 x i1> %gaps.mask
1703 // The cost is estimated as extract all elements (of actual members,
1704 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1705 // i32> vector.
1706 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1707 SubVT, DemandedAllSubElts,
1708 /*Insert*/ false, /*Extract*/ true, CostKind);
1709 Cost += ExtSubCost * Indices.size();
1710 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1711 /*Insert*/ true,
1712 /*Extract*/ false, CostKind);
1713 }
1714
1715 if (!UseMaskForCond)
1716 return Cost;
1717
1718 Type *I8Type = Type::getInt8Ty(VT->getContext());
1719
1720 Cost += thisT()->getReplicationShuffleCost(
1721 I8Type, Factor, NumSubElts,
1722 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1723 CostKind);
1724
1725 // The Gaps mask is invariant and created outside the loop, therefore the
1726 // cost of creating it is not accounted for here. However if we have both
1727 // a MaskForGaps and some other mask that guards the execution of the
1728 // memory access, we need to account for the cost of And-ing the two masks
1729 // inside the loop.
1730 if (UseMaskForGaps) {
1731 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1732 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1733 CostKind);
1734 }
1735
1736 return Cost;
1737 }
1738
1739 /// Get intrinsic cost based on arguments.
1742 TTI::TargetCostKind CostKind) const override {
1743 // Check for generically free intrinsics.
1745 return 0;
1746
1747 // Assume that target intrinsics are cheap.
1748 Intrinsic::ID IID = ICA.getID();
1751
1752 // VP Intrinsics should have the same cost as their non-vp counterpart.
1753 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1754 // counterpart when the vector length argument is smaller than the maximum
1755 // vector length.
1756 // TODO: Support other kinds of VPIntrinsics
1757 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1758 std::optional<unsigned> FOp =
1760 if (FOp) {
1761 if (ICA.getID() == Intrinsic::vp_load) {
1762 Align Alignment;
1763 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1764 Alignment = VPI->getPointerAlignment().valueOrOne();
1765 unsigned AS = 0;
1766 if (ICA.getArgTypes().size() > 1)
1767 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1768 AS = PtrTy->getAddressSpace();
1769 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1770 AS, CostKind);
1771 }
1772 if (ICA.getID() == Intrinsic::vp_store) {
1773 Align Alignment;
1774 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1775 Alignment = VPI->getPointerAlignment().valueOrOne();
1776 unsigned AS = 0;
1777 if (ICA.getArgTypes().size() >= 2)
1778 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1779 AS = PtrTy->getAddressSpace();
1780 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1781 AS, CostKind);
1782 }
1784 ICA.getID() == Intrinsic::vp_fneg) {
1785 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1786 CostKind);
1787 }
1788 if (VPCastIntrinsic::isVPCast(ICA.getID())) {
1789 return thisT()->getCastInstrCost(
1790 *FOp, ICA.getReturnType(), ICA.getArgTypes()[0],
1792 }
1793 if (VPCmpIntrinsic::isVPCmp(ICA.getID())) {
1794 // We can only handle vp_cmp intrinsics with underlying instructions.
1795 if (ICA.getInst()) {
1796 assert(FOp);
1797 auto *UI = cast<VPCmpIntrinsic>(ICA.getInst());
1798 return thisT()->getCmpSelInstrCost(*FOp, ICA.getArgTypes()[0],
1799 ICA.getReturnType(),
1800 UI->getPredicate(), CostKind);
1801 }
1802 }
1803 }
1804 if (ICA.getID() == Intrinsic::vp_load_ff) {
1805 Type *RetTy = ICA.getReturnType();
1806 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1807 Align Alignment;
1808 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1809 Alignment = VPI->getPointerAlignment().valueOrOne();
1810 return thisT()->getMemIntrinsicInstrCost(
1811 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1812 CostKind);
1813 }
1814 if (ICA.getID() == Intrinsic::vp_scatter) {
1815 if (ICA.isTypeBasedOnly()) {
1816 IntrinsicCostAttributes MaskedScatter(
1819 ICA.getFlags());
1820 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1821 }
1822 Align Alignment;
1823 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1824 Alignment = VPI->getPointerAlignment().valueOrOne();
1825 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1826 return thisT()->getMemIntrinsicInstrCost(
1827 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1828 ICA.getArgTypes()[0], ICA.getArgs()[1],
1829 VarMask, Alignment, nullptr),
1830 CostKind);
1831 }
1832 if (ICA.getID() == Intrinsic::vp_gather) {
1833 if (ICA.isTypeBasedOnly()) {
1834 IntrinsicCostAttributes MaskedGather(
1837 ICA.getFlags());
1838 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1839 }
1840 Align Alignment;
1841 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1842 Alignment = VPI->getPointerAlignment().valueOrOne();
1843 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1844 return thisT()->getMemIntrinsicInstrCost(
1845 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1846 ICA.getReturnType(), ICA.getArgs()[0],
1847 VarMask, Alignment, nullptr),
1848 CostKind);
1849 }
1850
1851 if (ICA.getID() == Intrinsic::vp_select ||
1852 ICA.getID() == Intrinsic::vp_merge) {
1853 TTI::OperandValueInfo OpInfoX, OpInfoY;
1854 if (!ICA.isTypeBasedOnly()) {
1855 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1856 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1857 }
1858 return getCmpSelInstrCost(
1859 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1860 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1861 }
1862
1863 std::optional<Intrinsic::ID> FID =
1865
1866 // Not functionally equivalent but close enough for cost modelling.
1867 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1868 FID = Intrinsic::vector_reverse;
1869
1870 if (FID) {
1871 // Non-vp version will have same arg types except mask and vector
1872 // length.
1873 assert(ICA.getArgTypes().size() >= 2 &&
1874 "Expected VPIntrinsic to have Mask and Vector Length args and "
1875 "types");
1876
1877 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1878 if (!ICA.isTypeBasedOnly())
1879 NewArgs = NewArgs.drop_back(2);
1881
1882 // VPReduction intrinsics have a start value argument that their non-vp
1883 // counterparts do not have, except for the fadd and fmul non-vp
1884 // counterpart.
1886 *FID != Intrinsic::vector_reduce_fadd &&
1887 *FID != Intrinsic::vector_reduce_fmul) {
1888 if (!ICA.isTypeBasedOnly())
1889 NewArgs = NewArgs.drop_front();
1890 NewTys = NewTys.drop_front();
1891 }
1892
1893 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1894 NewTys, ICA.getFlags());
1895 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1896 }
1897 }
1898
1899 if (ICA.isTypeBasedOnly())
1901
1902 Type *RetTy = ICA.getReturnType();
1903
1904 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1906
1907 const IntrinsicInst *I = ICA.getInst();
1908 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1909 FastMathFlags FMF = ICA.getFlags();
1910 switch (IID) {
1911 default:
1912 break;
1913
1914 case Intrinsic::powi:
1915 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1916 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1917 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1918 ShouldOptForSize)) {
1919 // The cost is modeled on the expansion performed by ExpandPowI in
1920 // SelectionDAGBuilder.
1921 APInt Exponent = RHSC->getValue().abs();
1922 unsigned ActiveBits = Exponent.getActiveBits();
1923 unsigned PopCount = Exponent.popcount();
1924 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1925 thisT()->getArithmeticInstrCost(
1926 Instruction::FMul, RetTy, CostKind);
1927 if (RHSC->isNegative())
1928 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1929 CostKind);
1930 return Cost;
1931 }
1932 }
1933 break;
1934 case Intrinsic::cttz:
1935 // FIXME: If necessary, this should go in target-specific overrides.
1936 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1938 break;
1939
1940 case Intrinsic::ctlz:
1941 // FIXME: If necessary, this should go in target-specific overrides.
1942 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1944 break;
1945
1946 case Intrinsic::memcpy:
1947 return thisT()->getMemcpyCost(ICA.getInst());
1948
1949 case Intrinsic::masked_scatter: {
1950 const Value *Mask = Args[2];
1951 bool VarMask = !isa<Constant>(Mask);
1952 Align Alignment = I->getParamAlign(1).valueOrOne();
1953 return thisT()->getMemIntrinsicInstrCost(
1954 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1955 ICA.getArgTypes()[0], Args[1], VarMask,
1956 Alignment, I),
1957 CostKind);
1958 }
1959 case Intrinsic::masked_gather: {
1960 const Value *Mask = Args[1];
1961 bool VarMask = !isa<Constant>(Mask);
1962 Align Alignment = I->getParamAlign(0).valueOrOne();
1963 return thisT()->getMemIntrinsicInstrCost(
1964 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
1965 VarMask, Alignment, I),
1966 CostKind);
1967 }
1968 case Intrinsic::masked_compressstore: {
1969 const Value *Data = Args[0];
1970 const Value *Mask = Args[2];
1971 Align Alignment = I->getParamAlign(1).valueOrOne();
1972 return thisT()->getMemIntrinsicInstrCost(
1973 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
1974 Alignment, I),
1975 CostKind);
1976 }
1977 case Intrinsic::masked_expandload: {
1978 const Value *Mask = Args[1];
1979 Align Alignment = I->getParamAlign(0).valueOrOne();
1980 return thisT()->getMemIntrinsicInstrCost(
1981 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
1982 Alignment, I),
1983 CostKind);
1984 }
1985 case Intrinsic::experimental_vp_strided_store: {
1986 const Value *Data = Args[0];
1987 const Value *Ptr = Args[1];
1988 const Value *Mask = Args[3];
1989 const Value *EVL = Args[4];
1990 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
1991 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
1992 Align Alignment =
1993 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
1994 return thisT()->getMemIntrinsicInstrCost(
1995 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
1996 Alignment, I),
1997 CostKind);
1998 }
1999 case Intrinsic::experimental_vp_strided_load: {
2000 const Value *Ptr = Args[0];
2001 const Value *Mask = Args[2];
2002 const Value *EVL = Args[3];
2003 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2004 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2005 Align Alignment =
2006 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2007 return thisT()->getMemIntrinsicInstrCost(
2008 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2009 CostKind);
2010 }
2011 case Intrinsic::stepvector: {
2012 if (isa<ScalableVectorType>(RetTy))
2014 // The cost of materialising a constant integer vector.
2016 }
2017 case Intrinsic::vector_extract: {
2018 // FIXME: Handle case where a scalable vector is extracted from a scalable
2019 // vector
2020 if (isa<ScalableVectorType>(RetTy))
2022 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2023 return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
2024 cast<VectorType>(RetTy),
2025 cast<VectorType>(Args[0]->getType()), {},
2026 CostKind, Index, cast<VectorType>(RetTy));
2027 }
2028 case Intrinsic::vector_insert: {
2029 // FIXME: Handle case where a scalable vector is inserted into a scalable
2030 // vector
2031 if (isa<ScalableVectorType>(Args[1]->getType()))
2033 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2034 return thisT()->getShuffleCost(
2036 cast<VectorType>(Args[0]->getType()), {}, CostKind, Index,
2037 cast<VectorType>(Args[1]->getType()));
2038 }
2039 case Intrinsic::vector_splice_left:
2040 case Intrinsic::vector_splice_right: {
2041 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2042 if (!COffset)
2043 break;
2044 unsigned Index = COffset->getZExtValue();
2045 return thisT()->getShuffleCost(
2047 cast<VectorType>(Args[0]->getType()), {}, CostKind,
2048 IID == Intrinsic::vector_splice_left ? Index : -Index,
2049 cast<VectorType>(RetTy));
2050 }
2051 case Intrinsic::vector_reduce_add:
2052 case Intrinsic::vector_reduce_mul:
2053 case Intrinsic::vector_reduce_and:
2054 case Intrinsic::vector_reduce_or:
2055 case Intrinsic::vector_reduce_xor:
2056 case Intrinsic::vector_reduce_smax:
2057 case Intrinsic::vector_reduce_smin:
2058 case Intrinsic::vector_reduce_fmax:
2059 case Intrinsic::vector_reduce_fmin:
2060 case Intrinsic::vector_reduce_fmaximum:
2061 case Intrinsic::vector_reduce_fminimum:
2062 case Intrinsic::vector_reduce_umax:
2063 case Intrinsic::vector_reduce_umin: {
2064 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2066 }
2067 case Intrinsic::vector_reduce_fadd:
2068 case Intrinsic::vector_reduce_fmul: {
2070 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2072 }
2073 case Intrinsic::fshl:
2074 case Intrinsic::fshr: {
2075 const Value *X = Args[0];
2076 const Value *Y = Args[1];
2077 const Value *Z = Args[2];
2080 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2081
2082 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2083 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2085 Cost +=
2086 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2087 Cost += thisT()->getArithmeticInstrCost(
2088 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2089 {OpInfoZ.Kind, TTI::OP_None});
2090 Cost += thisT()->getArithmeticInstrCost(
2091 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2092 {OpInfoZ.Kind, TTI::OP_None});
2093
2094 if (!OpInfoZ.isConstant()) {
2095 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2096 CostKind);
2097 // Non-constant shift amounts requires a modulo. If the typesize is a
2098 // power-2 then this will be converted to an and, otherwise it will use
2099 // a urem.
2100 Cost += thisT()->getArithmeticInstrCost(
2101 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2102 : BinaryOperator::URem,
2103 RetTy, CostKind, OpInfoZ,
2104 {TTI::OK_UniformConstantValue, TTI::OP_None});
2105 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2106 if (X != Y) {
2107 Type *CondTy = RetTy->getWithNewBitWidth(1);
2108 Cost += thisT()->getCmpSelInstrCost(
2109 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2110 Cost +=
2111 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2113 }
2114 }
2115 return Cost;
2116 }
2117 case Intrinsic::experimental_cttz_elts: {
2118 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2119
2120 // If we're not expanding the intrinsic then we assume this is cheap
2121 // to implement.
2122 if (!getTLI()->shouldExpandCttzElements(ArgType))
2123 return getTypeLegalizationCost(RetTy).first;
2124
2125 // TODO: The costs below reflect the expansion code in
2126 // SelectionDAGBuilder, but we may want to sacrifice some accuracy in
2127 // favour of compile time.
2128
2129 // Find the smallest "sensible" element type to use for the expansion.
2130 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2131 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2132 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2133 VScaleRange = getVScaleRange(I->getCaller(), 64);
2134
2135 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2136 RetTy, ArgType.getVectorElementCount(), ZeroIsPoison, &VScaleRange);
2137 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2138
2139 // Create the new vector type & get the vector length
2140 Type *NewVecTy = VectorType::get(
2141 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2142
2143 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2144 FMF);
2146 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2147
2148 Cost +=
2149 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2150 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2151 Args[0]->getType(),
2153 Cost +=
2154 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2155
2156 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2157 NewEltTy, NewVecTy, FMF, I, 1);
2158 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2159 Cost +=
2160 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2161
2162 return Cost;
2163 }
2164 case Intrinsic::get_active_lane_mask:
2165 case Intrinsic::experimental_vector_match:
2166 case Intrinsic::experimental_vector_histogram_add:
2167 case Intrinsic::experimental_vector_histogram_uadd_sat:
2168 case Intrinsic::experimental_vector_histogram_umax:
2169 case Intrinsic::experimental_vector_histogram_umin:
2170 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2171 case Intrinsic::modf:
2172 case Intrinsic::sincos:
2173 case Intrinsic::sincospi: {
2174 std::optional<unsigned> CallRetElementIndex;
2175 // The first element of the modf result is returned by value in the
2176 // libcall.
2177 if (ICA.getID() == Intrinsic::modf)
2178 CallRetElementIndex = 0;
2179
2180 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2181 ICA, CostKind, CallRetElementIndex))
2182 return *Cost;
2183 // Otherwise, fallback to default scalarization cost.
2184 break;
2185 }
2186 case Intrinsic::loop_dependence_war_mask:
2187 case Intrinsic::loop_dependence_raw_mask: {
2188 // Compute the cost of the expanded version of these intrinsics:
2189 //
2190 // The possible expansions are...
2191 //
2192 // loop_dependence_war_mask:
2193 // diff = (ptrB - ptrA) / eltSize
2194 // cmp = icmp sle diff, 0
2195 // upper_bound = select cmp, -1, diff
2196 // mask = get_active_lane_mask 0, upper_bound
2197 //
2198 // loop_dependence_raw_mask:
2199 // diff = (abs(ptrB - ptrA)) / eltSize
2200 // cmp = icmp eq diff, 0
2201 // upper_bound = select cmp, -1, diff
2202 // mask = get_active_lane_mask 0, upper_bound
2203 //
2204 auto *PtrTy = cast<PointerType>(ICA.getArgTypes()[0]);
2205 Type *IntPtrTy = IntegerType::getIntNTy(
2206 RetTy->getContext(), thisT()->getDataLayout().getPointerSizeInBits(
2207 PtrTy->getAddressSpace()));
2208 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2209
2211 thisT()->getArithmeticInstrCost(Instruction::Sub, IntPtrTy, CostKind);
2212 if (IsReadAfterWrite) {
2213 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, IntPtrTy, {IntPtrTy},
2214 {});
2215 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2216 }
2217
2218 TTI::OperandValueInfo EltSizeOpInfo =
2219 TTI::getOperandInfo(ICA.getArgs()[2]);
2220 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, IntPtrTy,
2221 CostKind, {}, EltSizeOpInfo);
2222
2223 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2224 CmpInst::Predicate Pred =
2225 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2226 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy,
2227 IntPtrTy, Pred, CostKind);
2228 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, IntPtrTy,
2229 CondTy, Pred, CostKind);
2230
2231 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2232 {IntPtrTy, IntPtrTy}, FMF);
2233 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2234 return Cost;
2235 }
2236 }
2237
2238 // Assume that we need to scalarize this intrinsic.)
2239 // Compute the scalarization overhead based on Args for a vector
2240 // intrinsic.
2241 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2242 if (RetVF.isVector() && !RetVF.isScalable()) {
2243 ScalarizationCost = 0;
2244 if (!RetTy->isVoidTy()) {
2245 for (Type *VectorTy : getContainedTypes(RetTy)) {
2246 ScalarizationCost += getScalarizationOverhead(
2247 cast<VectorType>(VectorTy),
2248 /*Insert=*/true, /*Extract=*/false, CostKind);
2249 }
2250 }
2251 ScalarizationCost += getOperandsScalarizationOverhead(
2252 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2253 CostKind);
2254 }
2255
2256 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2257 ScalarizationCost);
2258 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2259 }
2260
2261 /// Get intrinsic cost based on argument types.
2262 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2263 /// cost of scalarizing the arguments and the return value will be computed
2264 /// based on types.
2268 Intrinsic::ID IID = ICA.getID();
2269 Type *RetTy = ICA.getReturnType();
2270 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2271 FastMathFlags FMF = ICA.getFlags();
2272 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2273 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2274
2275 VectorType *VecOpTy = nullptr;
2276 if (!Tys.empty()) {
2277 // The vector reduction operand is operand 0 except for fadd/fmul.
2278 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2279 unsigned VecTyIndex = 0;
2280 if (IID == Intrinsic::vector_reduce_fadd ||
2281 IID == Intrinsic::vector_reduce_fmul)
2282 VecTyIndex = 1;
2283 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2284 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2285 }
2286
2287 // Library call cost - other than size, make it expensive.
2288 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2289 unsigned ISD = 0;
2290 switch (IID) {
2291 default: {
2292 // Scalable vectors cannot be scalarized, so return Invalid.
2293 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2294 return isa<ScalableVectorType>(Ty);
2295 }))
2297
2298 // Assume that we need to scalarize this intrinsic.
2299 InstructionCost ScalarizationCost =
2300 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2301 unsigned ScalarCalls = 1;
2302 Type *ScalarRetTy = RetTy;
2303 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2304 if (!SkipScalarizationCost)
2305 ScalarizationCost = getScalarizationOverhead(
2306 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2307 ScalarCalls = std::max(ScalarCalls,
2309 ScalarRetTy = RetTy->getScalarType();
2310 }
2311 SmallVector<Type *, 4> ScalarTys;
2312 for (Type *Ty : Tys) {
2313 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2314 if (!SkipScalarizationCost)
2315 ScalarizationCost += getScalarizationOverhead(
2316 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2317 ScalarCalls = std::max(ScalarCalls,
2319 Ty = Ty->getScalarType();
2320 }
2321 ScalarTys.push_back(Ty);
2322 }
2323 if (ScalarCalls == 1)
2324 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2325
2326 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2327 InstructionCost ScalarCost =
2328 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2329
2330 return ScalarCalls * ScalarCost + ScalarizationCost;
2331 }
2332 // Look for intrinsics that can be lowered directly or turned into a scalar
2333 // intrinsic call.
2334 case Intrinsic::sqrt:
2335 ISD = ISD::FSQRT;
2336 break;
2337 case Intrinsic::sin:
2338 ISD = ISD::FSIN;
2339 break;
2340 case Intrinsic::cos:
2341 ISD = ISD::FCOS;
2342 break;
2343 case Intrinsic::sincos:
2344 ISD = ISD::FSINCOS;
2345 break;
2346 case Intrinsic::sincospi:
2348 break;
2349 case Intrinsic::modf:
2350 ISD = ISD::FMODF;
2351 break;
2352 case Intrinsic::tan:
2353 ISD = ISD::FTAN;
2354 break;
2355 case Intrinsic::asin:
2356 ISD = ISD::FASIN;
2357 break;
2358 case Intrinsic::acos:
2359 ISD = ISD::FACOS;
2360 break;
2361 case Intrinsic::atan:
2362 ISD = ISD::FATAN;
2363 break;
2364 case Intrinsic::atan2:
2365 ISD = ISD::FATAN2;
2366 break;
2367 case Intrinsic::sinh:
2368 ISD = ISD::FSINH;
2369 break;
2370 case Intrinsic::cosh:
2371 ISD = ISD::FCOSH;
2372 break;
2373 case Intrinsic::tanh:
2374 ISD = ISD::FTANH;
2375 break;
2376 case Intrinsic::exp:
2377 ISD = ISD::FEXP;
2378 break;
2379 case Intrinsic::exp2:
2380 ISD = ISD::FEXP2;
2381 break;
2382 case Intrinsic::exp10:
2383 ISD = ISD::FEXP10;
2384 break;
2385 case Intrinsic::log:
2386 ISD = ISD::FLOG;
2387 break;
2388 case Intrinsic::log10:
2389 ISD = ISD::FLOG10;
2390 break;
2391 case Intrinsic::log2:
2392 ISD = ISD::FLOG2;
2393 break;
2394 case Intrinsic::ldexp:
2395 ISD = ISD::FLDEXP;
2396 break;
2397 case Intrinsic::fabs:
2398 ISD = ISD::FABS;
2399 break;
2400 case Intrinsic::canonicalize:
2402 break;
2403 case Intrinsic::minnum:
2404 ISD = ISD::FMINNUM;
2405 break;
2406 case Intrinsic::maxnum:
2407 ISD = ISD::FMAXNUM;
2408 break;
2409 case Intrinsic::minimum:
2411 break;
2412 case Intrinsic::maximum:
2414 break;
2415 case Intrinsic::minimumnum:
2417 break;
2418 case Intrinsic::maximumnum:
2420 break;
2421 case Intrinsic::copysign:
2423 break;
2424 case Intrinsic::floor:
2425 ISD = ISD::FFLOOR;
2426 break;
2427 case Intrinsic::ceil:
2428 ISD = ISD::FCEIL;
2429 break;
2430 case Intrinsic::trunc:
2431 ISD = ISD::FTRUNC;
2432 break;
2433 case Intrinsic::nearbyint:
2435 break;
2436 case Intrinsic::rint:
2437 ISD = ISD::FRINT;
2438 break;
2439 case Intrinsic::lrint:
2440 ISD = ISD::LRINT;
2441 break;
2442 case Intrinsic::llrint:
2443 ISD = ISD::LLRINT;
2444 break;
2445 case Intrinsic::round:
2446 ISD = ISD::FROUND;
2447 break;
2448 case Intrinsic::roundeven:
2450 break;
2451 case Intrinsic::lround:
2452 ISD = ISD::LROUND;
2453 break;
2454 case Intrinsic::llround:
2455 ISD = ISD::LLROUND;
2456 break;
2457 case Intrinsic::pow:
2458 ISD = ISD::FPOW;
2459 break;
2460 case Intrinsic::fma:
2461 ISD = ISD::FMA;
2462 break;
2463 case Intrinsic::fmuladd:
2464 ISD = ISD::FMA;
2465 break;
2466 case Intrinsic::experimental_constrained_fmuladd:
2468 break;
2469 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2470 case Intrinsic::lifetime_start:
2471 case Intrinsic::lifetime_end:
2472 case Intrinsic::sideeffect:
2473 case Intrinsic::pseudoprobe:
2474 case Intrinsic::arithmetic_fence:
2475 return 0;
2476 case Intrinsic::masked_store: {
2477 Type *Ty = Tys[0];
2478 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2479 return thisT()->getMemIntrinsicInstrCost(
2480 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2481 }
2482 case Intrinsic::masked_load: {
2483 Type *Ty = RetTy;
2484 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2485 return thisT()->getMemIntrinsicInstrCost(
2486 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2487 }
2488 case Intrinsic::experimental_vp_strided_store: {
2489 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2490 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2491 return thisT()->getMemIntrinsicInstrCost(
2492 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2493 /*VariableMask=*/true, Alignment,
2494 ICA.getInst()),
2495 CostKind);
2496 }
2497 case Intrinsic::experimental_vp_strided_load: {
2498 auto *Ty = cast<VectorType>(ICA.getReturnType());
2499 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2500 return thisT()->getMemIntrinsicInstrCost(
2501 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2502 /*VariableMask=*/true, Alignment,
2503 ICA.getInst()),
2504 CostKind);
2505 }
2506 case Intrinsic::vector_reduce_add:
2507 case Intrinsic::vector_reduce_mul:
2508 case Intrinsic::vector_reduce_and:
2509 case Intrinsic::vector_reduce_or:
2510 case Intrinsic::vector_reduce_xor:
2511 return thisT()->getArithmeticReductionCost(
2512 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2513 CostKind);
2514 case Intrinsic::vector_reduce_fadd:
2515 case Intrinsic::vector_reduce_fmul:
2516 return thisT()->getArithmeticReductionCost(
2517 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2518 case Intrinsic::vector_reduce_smax:
2519 case Intrinsic::vector_reduce_smin:
2520 case Intrinsic::vector_reduce_umax:
2521 case Intrinsic::vector_reduce_umin:
2522 case Intrinsic::vector_reduce_fmax:
2523 case Intrinsic::vector_reduce_fmin:
2524 case Intrinsic::vector_reduce_fmaximum:
2525 case Intrinsic::vector_reduce_fminimum:
2526 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2527 VecOpTy, ICA.getFlags(), CostKind);
2528 case Intrinsic::experimental_vector_match: {
2529 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2530 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2531 unsigned SearchSize = NeedleTy->getNumElements();
2532
2533 // If we're not expanding the intrinsic then we assume this is cheap to
2534 // implement.
2535 EVT SearchVT = getTLI()->getValueType(DL, SearchTy);
2536 if (!getTLI()->shouldExpandVectorMatch(SearchVT, SearchSize))
2537 return getTypeLegalizationCost(RetTy).first;
2538
2539 // Approximate the cost based on the expansion code in
2540 // SelectionDAGBuilder.
2542 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2543 CostKind, 1, nullptr, nullptr);
2544 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2545 CostKind, 0, nullptr, nullptr);
2546 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy, {},
2547 CostKind, 0, nullptr);
2548 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2550 Cost +=
2551 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2552 Cost *= SearchSize;
2553 Cost +=
2554 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2555 return Cost;
2556 }
2557 case Intrinsic::vector_reverse:
2558 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2559 cast<VectorType>(ICA.getArgTypes()[0]), {},
2560 CostKind, 0, cast<VectorType>(RetTy));
2561 case Intrinsic::experimental_vector_histogram_add:
2562 case Intrinsic::experimental_vector_histogram_uadd_sat:
2563 case Intrinsic::experimental_vector_histogram_umax:
2564 case Intrinsic::experimental_vector_histogram_umin: {
2566 Type *EltTy = ICA.getArgTypes()[1];
2567
2568 // Targets with scalable vectors must handle this on their own.
2569 if (!PtrsTy)
2571
2572 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2574 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2575 CostKind, 1, nullptr, nullptr);
2576 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2577 CostKind);
2578 switch (IID) {
2579 default:
2580 llvm_unreachable("Unhandled histogram update operation.");
2581 case Intrinsic::experimental_vector_histogram_add:
2582 Cost +=
2583 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2584 break;
2585 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2586 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2587 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2588 break;
2589 }
2590 case Intrinsic::experimental_vector_histogram_umax: {
2591 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2592 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2593 break;
2594 }
2595 case Intrinsic::experimental_vector_histogram_umin: {
2596 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2597 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2598 break;
2599 }
2600 }
2601 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2602 CostKind);
2603 Cost *= PtrsTy->getNumElements();
2604 return Cost;
2605 }
2606 case Intrinsic::get_active_lane_mask: {
2607 Type *ArgTy = ICA.getArgTypes()[0];
2608 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2609 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2610
2611 // If we're not expanding the intrinsic then we assume this is cheap
2612 // to implement.
2613 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2614 return getTypeLegalizationCost(RetTy).first;
2615
2616 // Create the expanded types that will be used to calculate the uadd_sat
2617 // operation.
2618 Type *ExpRetTy =
2619 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2620 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2622 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2623 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2625 return Cost;
2626 }
2627 case Intrinsic::experimental_memset_pattern:
2628 // This cost is set to match the cost of the memset_pattern16 libcall.
2629 // It should likely be re-evaluated after migration to this intrinsic
2630 // is complete.
2631 return TTI::TCC_Basic * 4;
2632 case Intrinsic::abs:
2633 ISD = ISD::ABS;
2634 break;
2635 case Intrinsic::fshl:
2636 ISD = ISD::FSHL;
2637 break;
2638 case Intrinsic::fshr:
2639 ISD = ISD::FSHR;
2640 break;
2641 case Intrinsic::smax:
2642 ISD = ISD::SMAX;
2643 break;
2644 case Intrinsic::smin:
2645 ISD = ISD::SMIN;
2646 break;
2647 case Intrinsic::umax:
2648 ISD = ISD::UMAX;
2649 break;
2650 case Intrinsic::umin:
2651 ISD = ISD::UMIN;
2652 break;
2653 case Intrinsic::sadd_sat:
2654 ISD = ISD::SADDSAT;
2655 break;
2656 case Intrinsic::ssub_sat:
2657 ISD = ISD::SSUBSAT;
2658 break;
2659 case Intrinsic::uadd_sat:
2660 ISD = ISD::UADDSAT;
2661 break;
2662 case Intrinsic::usub_sat:
2663 ISD = ISD::USUBSAT;
2664 break;
2665 case Intrinsic::smul_fix:
2666 ISD = ISD::SMULFIX;
2667 break;
2668 case Intrinsic::umul_fix:
2669 ISD = ISD::UMULFIX;
2670 break;
2671 case Intrinsic::sadd_with_overflow:
2672 ISD = ISD::SADDO;
2673 break;
2674 case Intrinsic::ssub_with_overflow:
2675 ISD = ISD::SSUBO;
2676 break;
2677 case Intrinsic::uadd_with_overflow:
2678 ISD = ISD::UADDO;
2679 break;
2680 case Intrinsic::usub_with_overflow:
2681 ISD = ISD::USUBO;
2682 break;
2683 case Intrinsic::smul_with_overflow:
2684 ISD = ISD::SMULO;
2685 break;
2686 case Intrinsic::umul_with_overflow:
2687 ISD = ISD::UMULO;
2688 break;
2689 case Intrinsic::fptosi_sat:
2690 case Intrinsic::fptoui_sat: {
2691 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2692 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2693
2694 // For cast instructions, types are different between source and
2695 // destination. Also need to check if the source type can be legalize.
2696 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2698 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2700 break;
2701 }
2702 case Intrinsic::ctpop:
2703 ISD = ISD::CTPOP;
2704 // In case of legalization use TCC_Expensive. This is cheaper than a
2705 // library call but still not a cheap instruction.
2706 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2707 break;
2708 case Intrinsic::ctlz:
2709 ISD = ISD::CTLZ;
2710 break;
2711 case Intrinsic::cttz:
2712 ISD = ISD::CTTZ;
2713 break;
2714 case Intrinsic::bswap:
2715 ISD = ISD::BSWAP;
2716 break;
2717 case Intrinsic::bitreverse:
2719 break;
2720 case Intrinsic::ucmp:
2721 ISD = ISD::UCMP;
2722 break;
2723 case Intrinsic::scmp:
2724 ISD = ISD::SCMP;
2725 break;
2726 case Intrinsic::clmul:
2727 ISD = ISD::CLMUL;
2728 break;
2729 }
2730
2731 auto *ST = dyn_cast<StructType>(RetTy);
2732 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2733 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2734
2735 const TargetLoweringBase *TLI = getTLI();
2736
2737 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2738 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2739 TLI->isFAbsFree(LT.second)) {
2740 return 0;
2741 }
2742
2743 // The operation is legal. Assume it costs 1.
2744 // If the type is split to multiple registers, assume that there is some
2745 // overhead to this.
2746 // TODO: Once we have extract/insert subvector cost we need to use them.
2747 if (LT.first > 1)
2748 return (LT.first * 2);
2749 else
2750 return (LT.first * 1);
2751 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2752 // If the operation is custom lowered then assume
2753 // that the code is twice as expensive.
2754 return (LT.first * 2);
2755 }
2756
2757 switch (IID) {
2758 case Intrinsic::fmuladd: {
2759 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2760 // point mul followed by an add.
2761
2762 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2763 CostKind) +
2764 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2765 CostKind);
2766 }
2767 case Intrinsic::experimental_constrained_fmuladd: {
2768 IntrinsicCostAttributes FMulAttrs(
2769 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2770 IntrinsicCostAttributes FAddAttrs(
2771 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2772 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2773 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2774 }
2775 case Intrinsic::smin:
2776 case Intrinsic::smax:
2777 case Intrinsic::umin:
2778 case Intrinsic::umax: {
2779 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2780 Type *CondTy = RetTy->getWithNewBitWidth(1);
2781 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2782 CmpInst::Predicate Pred =
2783 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2785 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2786 Pred, CostKind);
2787 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2788 Pred, CostKind);
2789 return Cost;
2790 }
2791 case Intrinsic::sadd_with_overflow:
2792 case Intrinsic::ssub_with_overflow: {
2793 Type *SumTy = RetTy->getContainedType(0);
2794 Type *OverflowTy = RetTy->getContainedType(1);
2795 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2796 ? BinaryOperator::Add
2797 : BinaryOperator::Sub;
2798
2799 // Add:
2800 // Overflow -> (Result < LHS) ^ (RHS < 0)
2801 // Sub:
2802 // Overflow -> (Result < LHS) ^ (RHS > 0)
2804 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2805 Cost +=
2806 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2808 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2809 CostKind);
2810 return Cost;
2811 }
2812 case Intrinsic::uadd_with_overflow:
2813 case Intrinsic::usub_with_overflow: {
2814 Type *SumTy = RetTy->getContainedType(0);
2815 Type *OverflowTy = RetTy->getContainedType(1);
2816 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2817 ? BinaryOperator::Add
2818 : BinaryOperator::Sub;
2819 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2822
2824 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2825 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2826 OverflowTy, Pred, CostKind);
2827 return Cost;
2828 }
2829 case Intrinsic::smul_with_overflow:
2830 case Intrinsic::umul_with_overflow: {
2831 Type *MulTy = RetTy->getContainedType(0);
2832 Type *OverflowTy = RetTy->getContainedType(1);
2833 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2834 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2835 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2836
2837 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2839
2841 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2842 Cost +=
2843 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2844 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2845 CCH, CostKind);
2846 Cost += thisT()->getArithmeticInstrCost(
2847 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2849
2850 if (IsSigned)
2851 Cost += thisT()->getArithmeticInstrCost(
2852 Instruction::AShr, MulTy, CostKind,
2855
2856 Cost += thisT()->getCmpSelInstrCost(
2857 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2858 return Cost;
2859 }
2860 case Intrinsic::sadd_sat:
2861 case Intrinsic::ssub_sat: {
2862 // Assume a default expansion.
2863 Type *CondTy = RetTy->getWithNewBitWidth(1);
2864
2865 Type *OpTy = StructType::create({RetTy, CondTy});
2866 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2867 ? Intrinsic::sadd_with_overflow
2868 : Intrinsic::ssub_with_overflow;
2870
2871 // SatMax -> Overflow && SumDiff < 0
2872 // SatMin -> Overflow && SumDiff >= 0
2874 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2875 nullptr, ScalarizationCostPassed);
2876 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2877 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2878 Pred, CostKind);
2879 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2880 CondTy, Pred, CostKind);
2881 return Cost;
2882 }
2883 case Intrinsic::uadd_sat:
2884 case Intrinsic::usub_sat: {
2885 Type *CondTy = RetTy->getWithNewBitWidth(1);
2886
2887 Type *OpTy = StructType::create({RetTy, CondTy});
2888 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2889 ? Intrinsic::uadd_with_overflow
2890 : Intrinsic::usub_with_overflow;
2891
2893 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2894 nullptr, ScalarizationCostPassed);
2895 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2896 Cost +=
2897 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2899 return Cost;
2900 }
2901 case Intrinsic::smul_fix:
2902 case Intrinsic::umul_fix: {
2903 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2904 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2905
2906 unsigned ExtOp =
2907 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2909
2911 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2912 Cost +=
2913 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2914 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2915 CCH, CostKind);
2916 Cost += thisT()->getArithmeticInstrCost(
2917 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2919 Cost += thisT()->getArithmeticInstrCost(
2920 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2922 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2923 return Cost;
2924 }
2925 case Intrinsic::abs: {
2926 // abs(X) = select(icmp(X,0),X,sub(0,X))
2927 Type *CondTy = RetTy->getWithNewBitWidth(1);
2930 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2931 Pred, CostKind);
2932 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2933 Pred, CostKind);
2934 // TODO: Should we add an OperandValueProperties::OP_Zero property?
2935 Cost += thisT()->getArithmeticInstrCost(
2936 BinaryOperator::Sub, RetTy, CostKind,
2938 return Cost;
2939 }
2940 case Intrinsic::fshl:
2941 case Intrinsic::fshr: {
2942 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2943 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2944 Type *CondTy = RetTy->getWithNewBitWidth(1);
2946 Cost +=
2947 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2948 Cost +=
2949 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
2950 Cost +=
2951 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
2952 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
2953 CostKind);
2954 // Non-constant shift amounts requires a modulo. If the typesize is a
2955 // power-2 then this will be converted to an and, otherwise it will use a
2956 // urem.
2957 Cost += thisT()->getArithmeticInstrCost(
2958 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2959 : BinaryOperator::URem,
2960 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2961 {TTI::OK_UniformConstantValue, TTI::OP_None});
2962 // Shift-by-zero handling.
2963 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2965 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2967 return Cost;
2968 }
2969 case Intrinsic::fptosi_sat:
2970 case Intrinsic::fptoui_sat: {
2971 if (Tys.empty())
2972 break;
2973 Type *FromTy = Tys[0];
2974 bool IsSigned = IID == Intrinsic::fptosi_sat;
2975
2977 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
2978 {FromTy, FromTy});
2979 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
2980 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
2981 {FromTy, FromTy});
2982 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
2983 Cost += thisT()->getCastInstrCost(
2984 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
2986 if (IsSigned) {
2987 Type *CondTy = RetTy->getWithNewBitWidth(1);
2988 Cost += thisT()->getCmpSelInstrCost(
2989 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
2990 Cost += thisT()->getCmpSelInstrCost(
2991 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
2992 }
2993 return Cost;
2994 }
2995 case Intrinsic::ucmp:
2996 case Intrinsic::scmp: {
2997 Type *CmpTy = Tys[0];
2998 Type *CondTy = RetTy->getWithNewBitWidth(1);
3000 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3002 CostKind) +
3003 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3005 CostKind);
3006
3007 EVT VT = TLI->getValueType(DL, CmpTy, true);
3009 // x < y ? -1 : (x > y ? 1 : 0)
3010 Cost += 2 * thisT()->getCmpSelInstrCost(
3011 BinaryOperator::Select, RetTy, CondTy,
3013 } else {
3014 // zext(x > y) - zext(x < y)
3015 Cost +=
3016 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3018 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3019 CostKind);
3020 }
3021 return Cost;
3022 }
3023 case Intrinsic::maximumnum:
3024 case Intrinsic::minimumnum: {
3025 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3026 // maximumnum/minimumnum to
3027 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3028 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3029 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3030 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3031 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3032 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3033 int IeeeISD =
3034 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3035 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3036 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3037 RetTy, Tys[0]);
3038 InstructionCost FCanonicalizeCost =
3039 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3040 return LT.first + FCanonicalizeCost * 2;
3041 }
3042 break;
3043 }
3044 case Intrinsic::clmul: {
3045 // This cost model should match the expansion in
3046 // TargetLowering::expandCLMUL.
3047 InstructionCost PerBitCostMul =
3048 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind) +
3049 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind) +
3050 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3051 InstructionCost PerBitCostBittest =
3052 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind) +
3053 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3055 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3057 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3058 return RetTy->getScalarSizeInBits() * PerBitCost;
3059 }
3060 default:
3061 break;
3062 }
3063
3064 // Else, assume that we need to scalarize this intrinsic. For math builtins
3065 // this will emit a costly libcall, adding call overhead and spills. Make it
3066 // very expensive.
3067 if (isVectorizedTy(RetTy)) {
3068 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3069
3070 // Scalable vectors cannot be scalarized, so return Invalid.
3071 if (any_of(concat<Type *const>(RetVTys, Tys),
3072 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3074
3075 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3076 if (!SkipScalarizationCost) {
3077 ScalarizationCost = 0;
3078 for (Type *RetVTy : RetVTys) {
3079 ScalarizationCost += getScalarizationOverhead(
3080 cast<VectorType>(RetVTy), /*Insert=*/true,
3081 /*Extract=*/false, CostKind);
3082 }
3083 }
3084
3085 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3086 SmallVector<Type *, 4> ScalarTys;
3087 for (Type *Ty : Tys) {
3088 if (Ty->isVectorTy())
3089 Ty = Ty->getScalarType();
3090 ScalarTys.push_back(Ty);
3091 }
3092 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3093 InstructionCost ScalarCost =
3094 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3095 for (Type *Ty : Tys) {
3096 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3097 if (!ICA.skipScalarizationCost())
3098 ScalarizationCost += getScalarizationOverhead(
3099 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3100 ScalarCalls = std::max(ScalarCalls,
3102 }
3103 }
3104 return ScalarCalls * ScalarCost + ScalarizationCost;
3105 }
3106
3107 // This is going to be turned into a library call, make it expensive.
3108 return SingleCallCost;
3109 }
3110
3111 /// Get memory intrinsic cost based on arguments.
3114 TTI::TargetCostKind CostKind) const override {
3115 unsigned Id = MICA.getID();
3116 Type *DataTy = MICA.getDataType();
3117 bool VariableMask = MICA.getVariableMask();
3118 Align Alignment = MICA.getAlignment();
3119
3120 switch (Id) {
3121 case Intrinsic::experimental_vp_strided_load:
3122 case Intrinsic::experimental_vp_strided_store: {
3123 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3124 ? Instruction::Load
3125 : Instruction::Store;
3126 // For a target without strided memory operations (or for an illegal
3127 // operation type on one which does), assume we lower to a gather/scatter
3128 // operation. (Which may in turn be scalarized.)
3129 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3130 VariableMask, true, CostKind);
3131 }
3132 case Intrinsic::masked_scatter:
3133 case Intrinsic::masked_gather:
3134 case Intrinsic::vp_scatter:
3135 case Intrinsic::vp_gather: {
3136 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3137 MICA.getID() == Intrinsic::vp_gather)
3138 ? Instruction::Load
3139 : Instruction::Store;
3140
3141 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3142 VariableMask, true, CostKind);
3143 }
3144 case Intrinsic::vp_load:
3145 case Intrinsic::vp_store:
3147 case Intrinsic::masked_load:
3148 case Intrinsic::masked_store: {
3149 unsigned Opcode =
3150 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3151 // TODO: Pass on AddressSpace when we have test coverage.
3152 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3153 CostKind);
3154 }
3155 case Intrinsic::masked_compressstore:
3156 case Intrinsic::masked_expandload: {
3157 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3158 ? Instruction::Load
3159 : Instruction::Store;
3160 // Treat expand load/compress store as gather/scatter operation.
3161 // TODO: implement more precise cost estimation for these intrinsics.
3162 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3163 VariableMask,
3164 /*IsGatherScatter*/ true, CostKind);
3165 }
3166 case Intrinsic::vp_load_ff:
3168 default:
3169 llvm_unreachable("unexpected intrinsic");
3170 }
3171 }
3172
3173 /// Compute a cost of the given call instruction.
3174 ///
3175 /// Compute the cost of calling function F with return type RetTy and
3176 /// argument types Tys. F might be nullptr, in this case the cost of an
3177 /// arbitrary call with the specified signature will be returned.
3178 /// This is used, for instance, when we estimate call of a vector
3179 /// counterpart of the given function.
3180 /// \param F Called function, might be nullptr.
3181 /// \param RetTy Return value types.
3182 /// \param Tys Argument types.
3183 /// \returns The cost of Call instruction.
3186 TTI::TargetCostKind CostKind) const override {
3187 return 10;
3188 }
3189
3190 unsigned getNumberOfParts(Type *Tp) const override {
3191 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3192 if (!LT.first.isValid())
3193 return 0;
3194 // Try to find actual number of parts for non-power-of-2 elements as
3195 // ceil(num-of-elements/num-of-subtype-elements).
3196 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3197 Tp && LT.second.isFixedLengthVector() &&
3198 !has_single_bit(FTp->getNumElements())) {
3199 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3200 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3201 SubTp && SubTp->getElementType() == FTp->getElementType())
3202 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3203 }
3204 return LT.first.getValue();
3205 }
3206
3209 TTI::TargetCostKind) const override {
3210 return 0;
3211 }
3212
3213 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3214 /// We're assuming that reduction operation are performing the following way:
3215 ///
3216 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3217 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3218 /// \----------------v-------------/ \----------v------------/
3219 /// n/2 elements n/2 elements
3220 /// %red1 = op <n x t> %val, <n x t> val1
3221 /// After this operation we have a vector %red1 where only the first n/2
3222 /// elements are meaningful, the second n/2 elements are undefined and can be
3223 /// dropped. All other operations are actually working with the vector of
3224 /// length n/2, not n, though the real vector length is still n.
3225 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3226 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3227 /// \----------------v-------------/ \----------v------------/
3228 /// n/4 elements 3*n/4 elements
3229 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3230 /// length n/2, the resulting vector has length n/4 etc.
3231 ///
3232 /// The cost model should take into account that the actual length of the
3233 /// vector is reduced on each iteration.
3236 // Targets must implement a default value for the scalable case, since
3237 // we don't know how many lanes the vector has.
3240
3241 Type *ScalarTy = Ty->getElementType();
3242 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3243 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3244 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3245 NumVecElts >= 2) {
3246 // Or reduction for i1 is represented as:
3247 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3248 // %res = cmp ne iReduxWidth %val, 0
3249 // And reduction for i1 is represented as:
3250 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3251 // %res = cmp eq iReduxWidth %val, 11111
3252 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3253 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3255 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3258 }
3259 unsigned NumReduxLevels = Log2_32(NumVecElts);
3260 InstructionCost ArithCost = 0;
3261 InstructionCost ShuffleCost = 0;
3262 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3263 unsigned LongVectorCount = 0;
3264 unsigned MVTLen =
3265 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3266 while (NumVecElts > MVTLen) {
3267 NumVecElts /= 2;
3268 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3269 ShuffleCost += thisT()->getShuffleCost(
3270 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3271 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3272 Ty = SubTy;
3273 ++LongVectorCount;
3274 }
3275
3276 NumReduxLevels -= LongVectorCount;
3277
3278 // The minimal length of the vector is limited by the real length of vector
3279 // operations performed on the current platform. That's why several final
3280 // reduction operations are performed on the vectors with the same
3281 // architecture-dependent length.
3282
3283 // By default reductions need one shuffle per reduction level.
3284 ShuffleCost +=
3285 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3286 Ty, {}, CostKind, 0, Ty);
3287 ArithCost +=
3288 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3289 return ShuffleCost + ArithCost +
3290 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3291 CostKind, 0, nullptr, nullptr);
3292 }
3293
3294 /// Try to calculate the cost of performing strict (in-order) reductions,
3295 /// which involves doing a sequence of floating point additions in lane
3296 /// order, starting with an initial value. For example, consider a scalar
3297 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3298 ///
3299 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3300 ///
3301 /// %add1 = %InitVal + %v0
3302 /// %add2 = %add1 + %v1
3303 /// %add3 = %add2 + %v2
3304 /// %add4 = %add3 + %v3
3305 ///
3306 /// As a simple estimate we can say the cost of such a reduction is 4 times
3307 /// the cost of a scalar FP addition. We can only estimate the costs for
3308 /// fixed-width vectors here because for scalable vectors we do not know the
3309 /// runtime number of operations.
3312 // Targets must implement a default value for the scalable case, since
3313 // we don't know how many lanes the vector has.
3316
3317 auto *VTy = cast<FixedVectorType>(Ty);
3319 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3320 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3321 Opcode, VTy->getElementType(), CostKind);
3322 ArithCost *= VTy->getNumElements();
3323
3324 return ExtractCost + ArithCost;
3325 }
3326
3329 std::optional<FastMathFlags> FMF,
3330 TTI::TargetCostKind CostKind) const override {
3331 assert(Ty && "Unknown reduction vector type");
3333 return getOrderedReductionCost(Opcode, Ty, CostKind);
3334 return getTreeReductionCost(Opcode, Ty, CostKind);
3335 }
3336
3337 /// Try to calculate op costs for min/max reduction operations.
3338 /// \param CondTy Conditional type for the Select instruction.
3341 TTI::TargetCostKind CostKind) const override {
3342 // Targets must implement a default value for the scalable case, since
3343 // we don't know how many lanes the vector has.
3346
3347 Type *ScalarTy = Ty->getElementType();
3348 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3349 unsigned NumReduxLevels = Log2_32(NumVecElts);
3350 InstructionCost MinMaxCost = 0;
3351 InstructionCost ShuffleCost = 0;
3352 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3353 unsigned LongVectorCount = 0;
3354 unsigned MVTLen =
3355 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3356 while (NumVecElts > MVTLen) {
3357 NumVecElts /= 2;
3358 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3359
3360 ShuffleCost += thisT()->getShuffleCost(
3361 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3362
3363 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3364 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3365 Ty = SubTy;
3366 ++LongVectorCount;
3367 }
3368
3369 NumReduxLevels -= LongVectorCount;
3370
3371 // The minimal length of the vector is limited by the real length of vector
3372 // operations performed on the current platform. That's why several final
3373 // reduction opertions are perfomed on the vectors with the same
3374 // architecture-dependent length.
3375 ShuffleCost +=
3376 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3377 Ty, {}, CostKind, 0, Ty);
3378 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3379 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3380 // The last min/max should be in vector registers and we counted it above.
3381 // So just need a single extractelement.
3382 return ShuffleCost + MinMaxCost +
3383 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3384 CostKind, 0, nullptr, nullptr);
3385 }
3386
3388 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3389 VectorType *Ty, std::optional<FastMathFlags> FMF,
3390 TTI::TargetCostKind CostKind) const override {
3391 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3392 FTy && IsUnsigned && Opcode == Instruction::Add &&
3393 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3394 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3395 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3396 auto *IntTy =
3397 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3398 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3399 FMF ? *FMF : FastMathFlags());
3400 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3402 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3403 }
3404 // Without any native support, this is equivalent to the cost of
3405 // vecreduce.opcode(ext(Ty A)).
3406 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3407 InstructionCost RedCost =
3408 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3409 InstructionCost ExtCost = thisT()->getCastInstrCost(
3410 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3412
3413 return RedCost + ExtCost;
3414 }
3415
3417 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3418 VectorType *Ty,
3419 TTI::TargetCostKind CostKind) const override {
3420 // Without any native support, this is equivalent to the cost of
3421 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3422 // vecreduce.add(mul(A, B)).
3423 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3424 "The reduction opcode is expected to be Add or Sub.");
3425 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3426 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3427 RedOpcode, ExtTy, std::nullopt, CostKind);
3428 InstructionCost ExtCost = thisT()->getCastInstrCost(
3429 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3431
3432 InstructionCost MulCost =
3433 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3434
3435 return RedCost + MulCost + 2 * ExtCost;
3436 }
3437
3439
3440 /// @}
3441};
3442
3443/// Concrete BasicTTIImpl that can be used if no further customization
3444/// is needed.
3445class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3446 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3447
3448 friend class BasicTTIImplBase<BasicTTIImpl>;
3449
3450 const TargetSubtargetInfo *ST;
3451 const TargetLoweringBase *TLI;
3452
3453 const TargetSubtargetInfo *getST() const { return ST; }
3454 const TargetLoweringBase *getTLI() const { return TLI; }
3455
3456public:
3457 explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3458};
3459
3460} // end namespace llvm
3461
3462#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:849
This file implements the BitVector class.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
static unsigned getNumElements(Type *Ty)
static Type * getValueType(Value *V)
Returns the type of the given value/instruction V.
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:235
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1345
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1208
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1503
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1137
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:201
an instruction to allocate memory on the stack
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:195
size_t size() const
size - Get the array size.
Definition ArrayRef.h:142
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:201
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const override
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
std::optional< unsigned > getMaxVScale() const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const override
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
unsigned getMaxInterleaveFactor(ElementCount VF) const override
bool isSingleThreaded() const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
bool isNumRegsMajorCostOfLSR() const override
BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
count - Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Definition BitVector.h:370
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Definition InstrTypes.h:986
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:676
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:706
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:699
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:703
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:701
@ ICMP_NE
not equal
Definition InstrTypes.h:698
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:686
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:324
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:309
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:320
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:873
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:354
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:354
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(Type *ElementType, unsigned AddressSpace)
This constructs a pointer to an object of the specified type in a numbered address space.
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:689
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
VectorInstrContext
Represents a hint about the context in which an insert/extract is used.
@ None
The insert/extract is not used with a load/store.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
MemIndexedMode
The type of load/store indexing.
static VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:47
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:420
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1827
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:639
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:343
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:290
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:284
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:311
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:370
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:236
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:310
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:317
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:227
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:399
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI bool isVPBinOp(Intrinsic::ID ID)
static LLVM_ABI bool isVPCast(Intrinsic::ID ID)
static LLVM_ABI bool isVPCmp(Intrinsic::ID ID)
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:256
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3020
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:779
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:518
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:747
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:774
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:541
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:796
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:727
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:805
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:735
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:945
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:534
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
LLVM_ABI Libcall getSINCOSPI(EVT RetVT)
getSINCOSPI - Return the SINCOSPI_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getMODF(EVT VT)
getMODF - Return the MODF_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getSINCOS(EVT RetVT)
getSINCOS - Return the SINCOS_* value for the given types, or UNKNOWN_LIBCALL if there is none.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1739
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:841
InstructionCost Cost
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2554
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1152
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:147
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1746
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:331
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:279
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:394
FunctionAddr VTableAddr uintptr_t uintptr_t Data
Definition InstrProf.h:189
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:358
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:324
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).