LLVM 23.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constant.h"
37#include "llvm/IR/Constants.h"
38#include "llvm/IR/DataLayout.h"
40#include "llvm/IR/InstrTypes.h"
41#include "llvm/IR/Instruction.h"
43#include "llvm/IR/Intrinsics.h"
44#include "llvm/IR/Operator.h"
45#include "llvm/IR/Type.h"
46#include "llvm/IR/Value.h"
55#include <algorithm>
56#include <cassert>
57#include <cstdint>
58#include <limits>
59#include <optional>
60#include <utility>
61
62namespace llvm {
63
64class Function;
65class GlobalValue;
66class LLVMContext;
67class ScalarEvolution;
68class SCEV;
69class TargetMachine;
70
72
73/// Base class which can be used to help build a TTI implementation.
74///
75/// This class provides as much implementation of the TTI interface as is
76/// possible using the target independent parts of the code generator.
77///
78/// In order to subclass it, your class must implement a getST() method to
79/// return the subtarget, and a getTLI() method to return the target lowering.
80/// We need these methods implemented in the derived class so that this class
81/// doesn't have to duplicate storage for them.
82template <typename T>
84private:
86 using TTI = TargetTransformInfo;
87
88 /// Helper function to access this as a T.
89 const T *thisT() const { return static_cast<const T *>(this); }
90
91 /// Estimate a cost of Broadcast as an extract and sequence of insert
92 /// operations.
94 getBroadcastShuffleOverhead(FixedVectorType *VTy,
97 // Broadcast cost is equal to the cost of extracting the zero'th element
98 // plus the cost of inserting it into every element of the result vector.
99 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
100 CostKind, 0, nullptr, nullptr);
101
102 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
103 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
104 CostKind, i, nullptr, nullptr);
105 }
106 return Cost;
107 }
108
109 /// Estimate a cost of shuffle as a sequence of extract and insert
110 /// operations.
112 getPermuteShuffleOverhead(FixedVectorType *VTy,
115 // Shuffle cost is equal to the cost of extracting element from its argument
116 // plus the cost of inserting them onto the result vector.
117
118 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
119 // index 0 of first vector, index 1 of second vector,index 2 of first
120 // vector and finally index 3 of second vector and insert them at index
121 // <0,1,2,3> of result vector.
122 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
123 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
124 CostKind, i, nullptr, nullptr);
125 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
126 CostKind, i, nullptr, nullptr);
127 }
128 return Cost;
129 }
130
131 /// Estimate a cost of subvector extraction as a sequence of extract and
132 /// insert operations.
133 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
135 int Index,
136 FixedVectorType *SubVTy) const {
137 assert(VTy && SubVTy &&
138 "Can only extract subvectors from vectors");
139 int NumSubElts = SubVTy->getNumElements();
141 (Index + NumSubElts) <=
143 "SK_ExtractSubvector index out of range");
144
146 // Subvector extraction cost is equal to the cost of extracting element from
147 // the source type plus the cost of inserting them into the result vector
148 // type.
149 for (int i = 0; i != NumSubElts; ++i) {
150 Cost +=
151 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
152 CostKind, i + Index, nullptr, nullptr);
153 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
154 CostKind, i, nullptr, nullptr);
155 }
156 return Cost;
157 }
158
159 /// Estimate a cost of subvector insertion as a sequence of extract and
160 /// insert operations.
161 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
163 int Index,
164 FixedVectorType *SubVTy) const {
165 assert(VTy && SubVTy &&
166 "Can only insert subvectors into vectors");
167 int NumSubElts = SubVTy->getNumElements();
169 (Index + NumSubElts) <=
171 "SK_InsertSubvector index out of range");
172
174 // Subvector insertion cost is equal to the cost of extracting element from
175 // the source type plus the cost of inserting them into the result vector
176 // type.
177 for (int i = 0; i != NumSubElts; ++i) {
178 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
179 CostKind, i, nullptr, nullptr);
180 Cost +=
181 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
182 i + Index, nullptr, nullptr);
183 }
184 return Cost;
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetSubtargetInfo *getST() const {
189 return static_cast<const T *>(this)->getST();
190 }
191
192 /// Local query method delegates up to T which *must* implement this!
193 const TargetLoweringBase *getTLI() const {
194 return static_cast<const T *>(this)->getTLI();
195 }
196
197 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
198 switch (M) {
200 return ISD::UNINDEXED;
201 case TTI::MIM_PreInc:
202 return ISD::PRE_INC;
203 case TTI::MIM_PreDec:
204 return ISD::PRE_DEC;
205 case TTI::MIM_PostInc:
206 return ISD::POST_INC;
207 case TTI::MIM_PostDec:
208 return ISD::POST_DEC;
209 }
210 llvm_unreachable("Unexpected MemIndexedMode");
211 }
212
213 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
214 Align Alignment,
215 bool VariableMask,
216 bool IsGatherScatter,
218 unsigned AddressSpace = 0) const {
219 // We cannot scalarize scalable vectors, so return Invalid.
220 if (isa<ScalableVectorType>(DataTy))
222
223 auto *VT = cast<FixedVectorType>(DataTy);
224 unsigned VF = VT->getNumElements();
225
226 // Assume the target does not have support for gather/scatter operations
227 // and provide a rough estimate.
228 //
229 // First, compute the cost of the individual memory operations.
230 InstructionCost AddrExtractCost =
231 IsGatherScatter ? getScalarizationOverhead(
233 PointerType::get(VT->getContext(), 0), VF),
234 /*Insert=*/false, /*Extract=*/true, CostKind)
235 : 0;
236
237 // The cost of the scalar loads/stores.
238 InstructionCost MemoryOpCost =
239 VF * thisT()->getMemoryOpCost(Opcode, VT->getElementType(), Alignment,
241
242 // Next, compute the cost of packing the result in a vector.
243 InstructionCost PackingCost =
244 getScalarizationOverhead(VT, Opcode != Instruction::Store,
245 Opcode == Instruction::Store, CostKind);
246
247 InstructionCost ConditionalCost = 0;
248 if (VariableMask) {
249 // Compute the cost of conditionally executing the memory operations with
250 // variable masks. This includes extracting the individual conditions, a
251 // branches and PHIs to combine the results.
252 // NOTE: Estimating the cost of conditionally executing the memory
253 // operations accurately is quite difficult and the current solution
254 // provides a very rough estimate only.
255 ConditionalCost =
258 /*Insert=*/false, /*Extract=*/true, CostKind) +
259 VF * (thisT()->getCFInstrCost(Instruction::CondBr, CostKind) +
260 thisT()->getCFInstrCost(Instruction::PHI, CostKind));
261 }
262
263 return AddrExtractCost + MemoryOpCost + PackingCost + ConditionalCost;
264 }
265
266 /// Checks if the provided mask \p is a splat mask, i.e. it contains only -1
267 /// or same non -1 index value and this index value contained at least twice.
268 /// So, mask <0, -1,-1, -1> is not considered splat (it is just identity),
269 /// same for <-1, 0, -1, -1> (just a slide), while <2, -1, 2, -1> is a splat
270 /// with \p Index=2.
271 static bool isSplatMask(ArrayRef<int> Mask, unsigned NumSrcElts, int &Index) {
272 // Check that the broadcast index meets at least twice.
273 bool IsCompared = false;
274 if (int SplatIdx = PoisonMaskElem;
275 all_of(enumerate(Mask), [&](const auto &P) {
276 if (P.value() == PoisonMaskElem)
277 return P.index() != Mask.size() - 1 || IsCompared;
278 if (static_cast<unsigned>(P.value()) >= NumSrcElts * 2)
279 return false;
280 if (SplatIdx == PoisonMaskElem) {
281 SplatIdx = P.value();
282 return P.index() != Mask.size() - 1;
283 }
284 IsCompared = true;
285 return SplatIdx == P.value();
286 })) {
287 Index = SplatIdx;
288 return true;
289 }
290 return false;
291 }
292
293 /// Several intrinsics that return structs (including llvm.sincos[pi] and
294 /// llvm.modf) can be lowered to a vector library call (for certain VFs). The
295 /// vector library functions correspond to the scalar calls (e.g. sincos or
296 /// modf), which unlike the intrinsic return values via output pointers. This
297 /// helper checks if a vector call exists for the given intrinsic, and returns
298 /// the cost, which includes the cost of the mask (if required), and the loads
299 /// for values returned via output pointers. \p LC is the scalar libcall and
300 /// \p CallRetElementIndex (optional) is the struct element which is mapped to
301 /// the call return value. If std::nullopt is returned, then no vector library
302 /// call is available, so the intrinsic should be assigned the default cost
303 /// (e.g. scalarization).
304 std::optional<InstructionCost> getMultipleResultIntrinsicVectorLibCallCost(
306 std::optional<unsigned> CallRetElementIndex = {}) const {
307 Type *RetTy = ICA.getReturnType();
308 // Vector variants of the intrinsic can be mapped to a vector library call.
309 if (!isa<StructType>(RetTy) ||
311 return std::nullopt;
312
313 Type *Ty = getContainedTypes(RetTy).front();
314 EVT VT = getTLI()->getValueType(DL, Ty);
315
316 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
317
318 switch (ICA.getID()) {
319 case Intrinsic::modf:
320 LC = RTLIB::getMODF(VT);
321 break;
322 case Intrinsic::sincospi:
323 LC = RTLIB::getSINCOSPI(VT);
324 break;
325 case Intrinsic::sincos:
326 LC = RTLIB::getSINCOS(VT);
327 break;
328 default:
329 return std::nullopt;
330 }
331
332 // Find associated libcall.
333 RTLIB::LibcallImpl LibcallImpl = getTLI()->getLibcallImpl(LC);
334 if (LibcallImpl == RTLIB::Unsupported)
335 return std::nullopt;
336
337 LLVMContext &Ctx = RetTy->getContext();
338
339 // Cost the call + mask.
340 auto Cost =
341 thisT()->getCallInstrCost(nullptr, RetTy, ICA.getArgTypes(), CostKind);
342
345 auto VecTy = VectorType::get(IntegerType::getInt1Ty(Ctx), VF);
346 Cost += thisT()->getShuffleCost(TargetTransformInfo::SK_Broadcast, VecTy,
347 VecTy, {}, CostKind, 0, nullptr, {});
348 }
349
350 // Lowering to a library call (with output pointers) may require us to emit
351 // reloads for the results.
352 for (auto [Idx, VectorTy] : enumerate(getContainedTypes(RetTy))) {
353 if (Idx == CallRetElementIndex)
354 continue;
355 Cost += thisT()->getMemoryOpCost(
356 Instruction::Load, VectorTy,
357 thisT()->getDataLayout().getABITypeAlign(VectorTy), 0, CostKind);
358 }
359 return Cost;
360 }
361
362 /// Filter out constant and duplicated entries in \p Ops and return a vector
363 /// containing the types from \p Tys corresponding to the remaining operands.
365 filterConstantAndDuplicatedOperands(ArrayRef<const Value *> Ops,
366 ArrayRef<Type *> Tys) {
367 SmallPtrSet<const Value *, 4> UniqueOperands;
368 SmallVector<Type *, 4> FilteredTys;
369 for (const auto &[Op, Ty] : zip_equal(Ops, Tys)) {
370 if (isa<Constant>(Op) || !UniqueOperands.insert(Op).second)
371 continue;
372 FilteredTys.push_back(Ty);
373 }
374 return FilteredTys;
375 }
376
377protected:
378 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
379 : BaseT(DL) {}
380 ~BasicTTIImplBase() override = default;
381
384
385public:
386 /// \name Scalar TTI Implementations
387 /// @{
389 unsigned AddressSpace, Align Alignment,
390 unsigned *Fast) const override {
391 EVT E = EVT::getIntegerVT(Context, BitWidth);
392 return getTLI()->allowsMisalignedMemoryAccesses(
394 }
395
396 bool areInlineCompatible(const Function *Caller,
397 const Function *Callee) const override {
398 const TargetMachine &TM = getTLI()->getTargetMachine();
399
400 const FeatureBitset &CallerBits =
401 TM.getSubtargetImpl(*Caller)->getFeatureBits();
402 const FeatureBitset &CalleeBits =
403 TM.getSubtargetImpl(*Callee)->getFeatureBits();
404
405 // Inline a callee if its target-features are a subset of the callers
406 // target-features.
407 return (CallerBits & CalleeBits) == CalleeBits;
408 }
409
410 bool hasBranchDivergence(const Function *F = nullptr) const override {
411 return false;
412 }
413
414 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
415 return false;
416 }
417
418 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
419 return true;
420 }
421
422 unsigned getFlatAddressSpace() const override {
423 // Return an invalid address space.
424 return -1;
425 }
426
428 Intrinsic::ID IID) const override {
429 return false;
430 }
431
432 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
433 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
434 }
435
436 unsigned getAssumedAddrSpace(const Value *V) const override {
437 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
438 }
439
440 bool isSingleThreaded() const override {
441 return getTLI()->getTargetMachine().Options.ThreadModel ==
443 }
444
445 std::pair<const Value *, unsigned>
446 getPredicatedAddrSpace(const Value *V) const override {
447 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
448 }
449
451 Value *NewV) const override {
452 return nullptr;
453 }
454
455 bool isLegalAddImmediate(int64_t imm) const override {
456 return getTLI()->isLegalAddImmediate(imm);
457 }
458
459 bool isLegalAddScalableImmediate(int64_t Imm) const override {
460 return getTLI()->isLegalAddScalableImmediate(Imm);
461 }
462
463 bool isLegalICmpImmediate(int64_t imm) const override {
464 return getTLI()->isLegalICmpImmediate(imm);
465 }
466
467 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
468 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
469 Instruction *I = nullptr,
470 int64_t ScalableOffset = 0) const override {
472 AM.BaseGV = BaseGV;
473 AM.BaseOffs = BaseOffset;
474 AM.HasBaseReg = HasBaseReg;
475 AM.Scale = Scale;
476 AM.ScalableOffset = ScalableOffset;
477 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
478 }
479
480 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
481 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
482 }
483
484 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy,
485 Align Alignment,
486 unsigned AddrSpace) const override {
487 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy, Alignment,
488 AddrSpace](unsigned VF) {
489 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
490 EVT VT = getTLI()->getValueType(DL, SrcTy);
491 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
492 getTLI()->isOperationCustom(ISD::STORE, VT))
493 return true;
494
495 EVT ValVT =
496 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
497 EVT LegalizedVT =
498 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
499 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT, Alignment,
500 AddrSpace);
501 };
502 while (VF > 2 && IsSupportedByTarget(VF))
503 VF /= 2;
504 return VF;
505 }
506
507 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override {
508 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
509 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
510 }
511
512 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override {
513 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
514 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
515 }
516
518 const TTI::LSRCost &C2) const override {
520 }
521
525
529
533
535 StackOffset BaseOffset, bool HasBaseReg,
536 int64_t Scale,
537 unsigned AddrSpace) const override {
539 AM.BaseGV = BaseGV;
540 AM.BaseOffs = BaseOffset.getFixed();
541 AM.HasBaseReg = HasBaseReg;
542 AM.Scale = Scale;
543 AM.ScalableOffset = BaseOffset.getScalable();
544 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
545 return 0;
547 }
548
549 bool isTruncateFree(Type *Ty1, Type *Ty2) const override {
550 return getTLI()->isTruncateFree(Ty1, Ty2);
551 }
552
553 bool isProfitableToHoist(Instruction *I) const override {
554 return getTLI()->isProfitableToHoist(I);
555 }
556
557 bool useAA() const override { return getST()->useAA(); }
558
559 bool isTypeLegal(Type *Ty) const override {
560 EVT VT = getTLI()->getValueType(DL, Ty, /*AllowUnknown=*/true);
561 return getTLI()->isTypeLegal(VT);
562 }
563
564 unsigned getRegUsageForType(Type *Ty) const override {
565 EVT ETy = getTLI()->getValueType(DL, Ty);
566 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
567 }
568
569 InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
570 ArrayRef<const Value *> Operands, Type *AccessType,
571 TTI::TargetCostKind CostKind) const override {
572 return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
573 }
574
576 const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI,
577 BlockFrequencyInfo *BFI) const override {
578 /// Try to find the estimated number of clusters. Note that the number of
579 /// clusters identified in this function could be different from the actual
580 /// numbers found in lowering. This function ignore switches that are
581 /// lowered with a mix of jump table / bit test / BTree. This function was
582 /// initially intended to be used when estimating the cost of switch in
583 /// inline cost heuristic, but it's a generic cost model to be used in other
584 /// places (e.g., in loop unrolling).
585 unsigned N = SI.getNumCases();
586 const TargetLoweringBase *TLI = getTLI();
587 const DataLayout &DL = this->getDataLayout();
588
589 JumpTableSize = 0;
590 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
591
592 // Early exit if both a jump table and bit test are not allowed.
593 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
594 return N;
595
596 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
597 APInt MinCaseVal = MaxCaseVal;
598 for (auto CI : SI.cases()) {
599 const APInt &CaseVal = CI.getCaseValue()->getValue();
600 if (CaseVal.sgt(MaxCaseVal))
601 MaxCaseVal = CaseVal;
602 if (CaseVal.slt(MinCaseVal))
603 MinCaseVal = CaseVal;
604 }
605
606 // Check if suitable for a bit test
607 if (N <= DL.getIndexSizeInBits(0u)) {
609 for (auto I : SI.cases()) {
610 const BasicBlock *BB = I.getCaseSuccessor();
611 ++DestMap[BB];
612 }
613
614 if (TLI->isSuitableForBitTests(DestMap, MinCaseVal, MaxCaseVal, DL))
615 return 1;
616 }
617
618 // Check if suitable for a jump table.
619 if (IsJTAllowed) {
620 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
621 return N;
623 (MaxCaseVal - MinCaseVal)
624 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
625 // Check whether a range of clusters is dense enough for a jump table
626 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
627 JumpTableSize = Range;
628 return 1;
629 }
630 }
631 return N;
632 }
633
634 bool shouldBuildLookupTables() const override {
635 const TargetLoweringBase *TLI = getTLI();
636 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
637 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
638 }
639
640 bool shouldBuildRelLookupTables() const override {
641 const TargetMachine &TM = getTLI()->getTargetMachine();
642 // If non-PIC mode, do not generate a relative lookup table.
643 if (!TM.isPositionIndependent())
644 return false;
645
646 /// Relative lookup table entries consist of 32-bit offsets.
647 /// Do not generate relative lookup tables for large code models
648 /// in 64-bit achitectures where 32-bit offsets might not be enough.
649 if (TM.getCodeModel() == CodeModel::Medium ||
651 return false;
652
653 const Triple &TargetTriple = TM.getTargetTriple();
654 if (!TargetTriple.isArch64Bit())
655 return false;
656
657 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
658 // there.
659 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
660 return false;
661
662 return true;
663 }
664
665 bool haveFastSqrt(Type *Ty) const override {
666 const TargetLoweringBase *TLI = getTLI();
667 EVT VT = TLI->getValueType(DL, Ty);
668 return TLI->isTypeLegal(VT) &&
670 }
671
672 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override { return true; }
673
674 InstructionCost getFPOpCost(Type *Ty) const override {
675 // Check whether FADD is available, as a proxy for floating-point in
676 // general.
677 const TargetLoweringBase *TLI = getTLI();
678 EVT VT = TLI->getValueType(DL, Ty);
682 }
683
685 const Function &Fn) const override {
686 switch (Inst.getOpcode()) {
687 default:
688 break;
689 case Instruction::SDiv:
690 case Instruction::SRem:
691 case Instruction::UDiv:
692 case Instruction::URem: {
693 if (!isa<ConstantInt>(Inst.getOperand(1)))
694 return false;
695 EVT VT = getTLI()->getValueType(DL, Inst.getType());
696 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
697 }
698 };
699
700 return false;
701 }
702
703 unsigned getInliningThresholdMultiplier() const override { return 1; }
704 unsigned adjustInliningThreshold(const CallBase *CB) const override {
705 return 0;
706 }
707 unsigned getCallerAllocaCost(const CallBase *CB,
708 const AllocaInst *AI) const override {
709 return 0;
710 }
711
712 int getInlinerVectorBonusPercent() const override { return 150; }
713
716 OptimizationRemarkEmitter *ORE) const override {
717 // This unrolling functionality is target independent, but to provide some
718 // motivation for its intended use, for x86:
719
720 // According to the Intel 64 and IA-32 Architectures Optimization Reference
721 // Manual, Intel Core models and later have a loop stream detector (and
722 // associated uop queue) that can benefit from partial unrolling.
723 // The relevant requirements are:
724 // - The loop must have no more than 4 (8 for Nehalem and later) branches
725 // taken, and none of them may be calls.
726 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
727
728 // According to the Software Optimization Guide for AMD Family 15h
729 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
730 // and loop buffer which can benefit from partial unrolling.
731 // The relevant requirements are:
732 // - The loop must have fewer than 16 branches
733 // - The loop must have less than 40 uops in all executed loop branches
734
735 // The number of taken branches in a loop is hard to estimate here, and
736 // benchmarking has revealed that it is better not to be conservative when
737 // estimating the branch count. As a result, we'll ignore the branch limits
738 // until someone finds a case where it matters in practice.
739
740 unsigned MaxOps;
741 const TargetSubtargetInfo *ST = getST();
742 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
744 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
745 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
746 else
747 return;
748
749 // Scan the loop: don't unroll loops with calls.
750 for (BasicBlock *BB : L->blocks()) {
751 for (Instruction &I : *BB) {
752 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
753 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
754 if (!thisT()->isLoweredToCall(F))
755 continue;
756 }
757
758 if (ORE) {
759 ORE->emit([&]() {
760 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
761 L->getHeader())
762 << "advising against unrolling the loop because it "
763 "contains a "
764 << ore::NV("Call", &I);
765 });
766 }
767 return;
768 }
769 }
770 }
771
772 // Enable runtime and partial unrolling up to the specified size.
773 // Enable using trip count upper bound to unroll loops.
774 UP.Partial = UP.Runtime = UP.UpperBound = true;
775 UP.PartialThreshold = MaxOps;
776
777 // Avoid unrolling when optimizing for size.
778 UP.OptSizeThreshold = 0;
780
781 // Set number of instructions optimized when "back edge"
782 // becomes "fall through" to default value of 2.
783 UP.BEInsns = 2;
784 }
785
787 TTI::PeelingPreferences &PP) const override {
788 PP.PeelCount = 0;
789 PP.AllowPeeling = true;
790 PP.AllowLoopNestsPeeling = false;
791 PP.PeelProfiledIterations = true;
792 }
793
796 HardwareLoopInfo &HWLoopInfo) const override {
797 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
798 }
799
800 unsigned getEpilogueVectorizationMinVF() const override {
802 }
803
806 }
807
811
812 std::optional<Instruction *>
815 }
816
817 std::optional<Value *>
819 APInt DemandedMask, KnownBits &Known,
820 bool &KnownBitsComputed) const override {
821 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
822 KnownBitsComputed);
823 }
824
826 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
827 APInt &UndefElts2, APInt &UndefElts3,
828 std::function<void(Instruction *, unsigned, APInt, APInt &)>
829 SimplifyAndSetOp) const override {
831 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
832 SimplifyAndSetOp);
833 }
834
835 std::optional<unsigned>
837 return std::optional<unsigned>(
838 getST()->getCacheSize(static_cast<unsigned>(Level)));
839 }
840
841 std::optional<unsigned>
843 std::optional<unsigned> TargetResult =
844 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
845
846 if (TargetResult)
847 return TargetResult;
848
849 return BaseT::getCacheAssociativity(Level);
850 }
851
852 unsigned getCacheLineSize() const override {
853 return getST()->getCacheLineSize();
854 }
855
856 unsigned getPrefetchDistance() const override {
857 return getST()->getPrefetchDistance();
858 }
859
860 unsigned getMinPrefetchStride(unsigned NumMemAccesses,
861 unsigned NumStridedMemAccesses,
862 unsigned NumPrefetches,
863 bool HasCall) const override {
864 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
865 NumPrefetches, HasCall);
866 }
867
868 unsigned getMaxPrefetchIterationsAhead() const override {
869 return getST()->getMaxPrefetchIterationsAhead();
870 }
871
872 bool enableWritePrefetching() const override {
873 return getST()->enableWritePrefetching();
874 }
875
876 bool shouldPrefetchAddressSpace(unsigned AS) const override {
877 return getST()->shouldPrefetchAddressSpace(AS);
878 }
879
880 /// @}
881
882 /// \name Vector TTI Implementations
883 /// @{
884
889
890 std::optional<unsigned> getMaxVScale() const override { return std::nullopt; }
891 std::optional<unsigned> getVScaleForTuning() const override {
892 return std::nullopt;
893 }
894
895 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
896 /// are set if the demanded result elements need to be inserted and/or
897 /// extracted from vectors.
899 getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts,
900 bool Insert, bool Extract,
902 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
904 TTI::VectorInstrContext::None) const override {
905 /// FIXME: a bitfield is not a reasonable abstraction for talking about
906 /// which elements are needed from a scalable vector
907 if (isa<ScalableVectorType>(InTy))
909 auto *Ty = cast<FixedVectorType>(InTy);
910
911 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
912 (VL.empty() || VL.size() == Ty->getNumElements()) &&
913 "Vector size mismatch");
914
916
917 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
918 if (!DemandedElts[i])
919 continue;
920 if (Insert) {
921 Value *InsertedVal = VL.empty() ? nullptr : VL[i];
922 Cost +=
923 thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
924 CostKind, i, nullptr, InsertedVal, VIC);
925 }
926 if (Extract)
927 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
928 CostKind, i, nullptr, nullptr, VIC);
929 }
930
931 return Cost;
932 }
933
935 return false;
936 }
937
938 bool
940 unsigned ScalarOpdIdx) const override {
941 return false;
942 }
943
945 int OpdIdx) const override {
946 return OpdIdx == -1;
947 }
948
949 bool
951 int RetIdx) const override {
952 return RetIdx == 0;
953 }
954
955 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
957 VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind,
958 bool ForPoisonSrc = true, ArrayRef<Value *> VL = {},
960 if (isa<ScalableVectorType>(InTy))
962 auto *Ty = cast<FixedVectorType>(InTy);
963
964 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
965 // Use CRTP to allow target overrides
966 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
967 CostKind, ForPoisonSrc, VL, VIC);
968 }
969
970 /// Estimate the overhead of scalarizing an instruction's
971 /// operands. The (potentially vector) types to use for each of
972 /// argument are passes via Tys.
976 TTI::VectorInstrContext::None) const override {
978 for (Type *Ty : Tys) {
979 // Disregard things like metadata arguments.
980 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
981 !Ty->isPtrOrPtrVectorTy())
982 continue;
983
984 if (auto *VecTy = dyn_cast<VectorType>(Ty))
985 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
986 /*Extract*/ true, CostKind,
987 /*ForPoisonSrc=*/true, {}, VIC);
988 }
989
990 return Cost;
991 }
992
993 /// Estimate the overhead of scalarizing the inputs and outputs of an
994 /// instruction, with return type RetTy and arguments Args of type Tys. If
995 /// Args are unknown (empty), then the cost associated with one argument is
996 /// added as a heuristic.
1002 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
1003 if (!Args.empty())
1005 filterConstantAndDuplicatedOperands(Args, Tys), CostKind);
1006 else
1007 // When no information on arguments is provided, we add the cost
1008 // associated with one argument as a heuristic.
1009 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
1010 /*Extract*/ true, CostKind);
1011
1012 return Cost;
1013 }
1014
1015 /// Estimate the cost of type-legalization and the legalized type.
1016 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
1017 LLVMContext &C = Ty->getContext();
1018 EVT MTy = getTLI()->getValueType(DL, Ty);
1019
1021 // We keep legalizing the type until we find a legal kind. We assume that
1022 // the only operation that costs anything is the split. After splitting
1023 // we need to handle two types.
1024 while (true) {
1025 TargetLoweringBase::LegalizeKind LK = getTLI()->getTypeConversion(C, MTy);
1026
1028 // Ensure we return a sensible simple VT here, since many callers of
1029 // this function require it.
1030 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
1031 return std::make_pair(InstructionCost::getInvalid(), VT);
1032 }
1033
1034 if (LK.first == TargetLoweringBase::TypeLegal)
1035 return std::make_pair(Cost, MTy.getSimpleVT());
1036
1037 if (LK.first == TargetLoweringBase::TypeSplitVector ||
1039 Cost *= 2;
1040
1041 // Do not loop with f128 type.
1042 if (MTy == LK.second)
1043 return std::make_pair(Cost, MTy.getSimpleVT());
1044
1045 // Keep legalizing the type.
1046 MTy = LK.second;
1047 }
1048 }
1049
1050 unsigned getMaxInterleaveFactor(ElementCount VF) const override { return 1; }
1051
1053 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
1056 ArrayRef<const Value *> Args = {},
1057 const Instruction *CxtI = nullptr) const override {
1058 // Check if any of the operands are vector operands.
1059 const TargetLoweringBase *TLI = getTLI();
1060 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1061 assert(ISD && "Invalid opcode");
1062
1063 // TODO: Handle more cost kinds.
1065 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
1066 Opd1Info, Opd2Info,
1067 Args, CxtI);
1068
1069 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
1070
1071 bool IsFloat = Ty->isFPOrFPVectorTy();
1072 // Assume that floating point arithmetic operations cost twice as much as
1073 // integer operations.
1074 InstructionCost OpCost = (IsFloat ? 2 : 1);
1075
1076 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1077 // The operation is legal. Assume it costs 1.
1078 // TODO: Once we have extract/insert subvector cost we need to use them.
1079 return LT.first * OpCost;
1080 }
1081
1082 if (!TLI->isOperationExpand(ISD, LT.second)) {
1083 // If the operation is custom lowered, then assume that the code is twice
1084 // as expensive.
1085 return LT.first * 2 * OpCost;
1086 }
1087
1088 // An 'Expand' of URem and SRem is special because it may default
1089 // to expanding the operation into a sequence of sub-operations
1090 // i.e. X % Y -> X-(X/Y)*Y.
1091 if (ISD == ISD::UREM || ISD == ISD::SREM) {
1092 bool IsSigned = ISD == ISD::SREM;
1093 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
1094 LT.second) ||
1095 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
1096 LT.second)) {
1097 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
1098 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
1099 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
1100 InstructionCost MulCost =
1101 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
1102 InstructionCost SubCost =
1103 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
1104 return DivCost + MulCost + SubCost;
1105 }
1106 }
1107
1108 // We cannot scalarize scalable vectors, so return Invalid.
1111
1112 // Else, assume that we need to scalarize this op.
1113 // TODO: If one of the types get legalized by splitting, handle this
1114 // similarly to what getCastInstrCost() does.
1115 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
1116 InstructionCost Cost = thisT()->getArithmeticInstrCost(
1117 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
1118 Args, CxtI);
1119 // Return the cost of multiple scalar invocation plus the cost of
1120 // inserting and extracting the values.
1121 SmallVector<Type *> Tys(Args.size(), Ty);
1122 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
1123 VTy->getNumElements() * Cost;
1124 }
1125
1126 // We don't know anything about this scalar instruction.
1127 return OpCost;
1128 }
1129
1131 ArrayRef<int> Mask,
1132 VectorType *SrcTy, int &Index,
1133 VectorType *&SubTy) const {
1134 if (Mask.empty())
1135 return Kind;
1136 int NumDstElts = Mask.size();
1137 int NumSrcElts = SrcTy->getElementCount().getKnownMinValue();
1138 switch (Kind) {
1140 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
1141 return TTI::SK_Reverse;
1142 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
1143 return TTI::SK_Broadcast;
1144 if (isSplatMask(Mask, NumSrcElts, Index))
1145 return TTI::SK_Broadcast;
1146 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
1147 (Index + NumDstElts) <= NumSrcElts) {
1148 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumDstElts);
1150 }
1151 break;
1152 }
1153 case TTI::SK_PermuteTwoSrc: {
1154 if (all_of(Mask, [NumSrcElts](int M) { return M < NumSrcElts; }))
1156 Index, SubTy);
1157 int NumSubElts;
1158 if (NumDstElts > 2 && ShuffleVectorInst::isInsertSubvectorMask(
1159 Mask, NumSrcElts, NumSubElts, Index)) {
1160 if (Index + NumSubElts > NumSrcElts)
1161 return Kind;
1162 SubTy = FixedVectorType::get(SrcTy->getElementType(), NumSubElts);
1164 }
1165 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
1166 return TTI::SK_Select;
1167 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1168 return TTI::SK_Transpose;
1169 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1170 return TTI::SK_Splice;
1171 break;
1172 }
1173 case TTI::SK_Select:
1174 case TTI::SK_Reverse:
1175 case TTI::SK_Broadcast:
1176 case TTI::SK_Transpose:
1179 case TTI::SK_Splice:
1180 break;
1181 }
1182 return Kind;
1183 }
1184
1188 VectorType *SubTp, ArrayRef<const Value *> Args = {},
1189 const Instruction *CxtI = nullptr) const override {
1190 switch (improveShuffleKindFromMask(Kind, Mask, SrcTy, Index, SubTp)) {
1191 case TTI::SK_Broadcast:
1192 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1193 return getBroadcastShuffleOverhead(FVT, CostKind);
1195 case TTI::SK_Select:
1196 case TTI::SK_Splice:
1197 case TTI::SK_Reverse:
1198 case TTI::SK_Transpose:
1201 if (auto *FVT = dyn_cast<FixedVectorType>(SrcTy))
1202 return getPermuteShuffleOverhead(FVT, CostKind);
1205 return getExtractSubvectorOverhead(SrcTy, CostKind, Index,
1206 cast<FixedVectorType>(SubTp));
1208 return getInsertSubvectorOverhead(DstTy, CostKind, Index,
1209 cast<FixedVectorType>(SubTp));
1210 }
1211 llvm_unreachable("Unknown TTI::ShuffleKind");
1212 }
1213
1215 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1217 const Instruction *I = nullptr) const override {
1218 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1219 return 0;
1220
1221 const TargetLoweringBase *TLI = getTLI();
1222 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1223 assert(ISD && "Invalid opcode");
1224 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1225 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1226
1227 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1228 TypeSize DstSize = DstLT.second.getSizeInBits();
1229 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1230 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1231
1232 switch (Opcode) {
1233 default:
1234 break;
1235 case Instruction::Trunc:
1236 // Check for NOOP conversions.
1237 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1238 return 0;
1239 [[fallthrough]];
1240 case Instruction::BitCast:
1241 // Bitcast between types that are legalized to the same type are free and
1242 // assume int to/from ptr of the same size is also free.
1243 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1244 SrcSize == DstSize)
1245 return 0;
1246 break;
1247 case Instruction::FPExt:
1248 if (I && getTLI()->isExtFree(I))
1249 return 0;
1250 break;
1251 case Instruction::ZExt:
1252 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1253 return 0;
1254 [[fallthrough]];
1255 case Instruction::SExt:
1256 if (I && getTLI()->isExtFree(I))
1257 return 0;
1258
1259 // If this is a zext/sext of a load, return 0 if the corresponding
1260 // extending load exists on target and the result type is legal.
1261 if (CCH == TTI::CastContextHint::Normal) {
1262 EVT ExtVT = EVT::getEVT(Dst);
1263 EVT LoadVT = EVT::getEVT(Src);
1264 unsigned LType =
1265 Opcode == Instruction::ZExt ? ISD::ZEXTLOAD : ISD::SEXTLOAD;
1266 if (I) {
1267 if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
1268 if (DstLT.first == SrcLT.first &&
1269 TLI->isLoadLegal(ExtVT, LoadVT, LI->getAlign(),
1270 LI->getPointerAddressSpace(), LType, false))
1271 return 0;
1272 } else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
1273 switch (II->getIntrinsicID()) {
1274 case Intrinsic::masked_load: {
1275 Type *PtrType = II->getArgOperand(0)->getType();
1276 assert(PtrType->isPointerTy());
1277
1278 if (DstLT.first == SrcLT.first &&
1279 TLI->isLoadLegal(
1280 ExtVT, LoadVT, II->getParamAlign(0).valueOrOne(),
1281 PtrType->getPointerAddressSpace(), LType, false))
1282 return 0;
1283
1284 break;
1285 }
1286 default:
1287 break;
1288 }
1289 }
1290 }
1291 }
1292 break;
1293 case Instruction::AddrSpaceCast:
1294 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1295 Dst->getPointerAddressSpace()))
1296 return 0;
1297 break;
1298 }
1299
1300 auto *SrcVTy = dyn_cast<VectorType>(Src);
1301 auto *DstVTy = dyn_cast<VectorType>(Dst);
1302
1303 // If the cast is marked as legal (or promote) then assume low cost.
1304 if (SrcLT.first == DstLT.first &&
1305 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1306 return SrcLT.first;
1307
1308 // Handle scalar conversions.
1309 if (!SrcVTy && !DstVTy) {
1310 // Just check the op cost. If the operation is legal then assume it costs
1311 // 1.
1312 if (!TLI->isOperationExpand(ISD, DstLT.second))
1313 return 1;
1314
1315 // Assume that illegal scalar instruction are expensive.
1316 return 4;
1317 }
1318
1319 // Check vector-to-vector casts.
1320 if (DstVTy && SrcVTy) {
1321 // If the cast is between same-sized registers, then the check is simple.
1322 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1323
1324 // Assume that Zext is done using AND.
1325 if (Opcode == Instruction::ZExt)
1326 return SrcLT.first;
1327
1328 // Assume that sext is done using SHL and SRA.
1329 if (Opcode == Instruction::SExt)
1330 return SrcLT.first * 2;
1331
1332 // Just check the op cost. If the operation is legal then assume it
1333 // costs
1334 // 1 and multiply by the type-legalization overhead.
1335 if (!TLI->isOperationExpand(ISD, DstLT.second))
1336 return SrcLT.first * 1;
1337 }
1338
1339 // If we are legalizing by splitting, query the concrete TTI for the cost
1340 // of casting the original vector twice. We also need to factor in the
1341 // cost of the split itself. Count that as 1, to be consistent with
1342 // getTypeLegalizationCost().
1343 bool SplitSrc =
1344 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1346 bool SplitDst =
1347 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1349 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isKnownEven() &&
1350 DstVTy->getElementCount().isKnownEven()) {
1351 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1352 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1353 const T *TTI = thisT();
1354 // If both types need to be split then the split is free.
1355 InstructionCost SplitCost =
1356 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1357 return SplitCost +
1358 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1359 CostKind, I));
1360 }
1361
1362 // Scalarization cost is Invalid, can't assume any num elements.
1363 if (isa<ScalableVectorType>(DstVTy))
1365
1366 // In other cases where the source or destination are illegal, assume
1367 // the operation will get scalarized.
1368 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1369 InstructionCost Cost = thisT()->getCastInstrCost(
1370 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1371
1372 // Return the cost of multiple scalar invocation plus the cost of
1373 // inserting and extracting the values.
1374 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1375 CostKind) +
1376 Num * Cost;
1377 }
1378
1379 // We already handled vector-to-vector and scalar-to-scalar conversions.
1380 // This
1381 // is where we handle bitcast between vectors and scalars. We need to assume
1382 // that the conversion is scalarized in one way or another.
1383 if (Opcode == Instruction::BitCast) {
1384 // Illegal bitcasts are done by storing and loading from a stack slot.
1385 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1386 /*Extract*/ true, CostKind)
1387 : 0) +
1388 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1389 /*Extract*/ false, CostKind)
1390 : 0);
1391 }
1392
1393 llvm_unreachable("Unhandled cast");
1394 }
1395
1397 getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1398 unsigned Index,
1399 TTI::TargetCostKind CostKind) const override {
1400 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1401 CostKind, Index, nullptr, nullptr) +
1402 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1404 }
1405
1408 const Instruction *I = nullptr) const override {
1409 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1410 }
1411
1413 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1417 const Instruction *I = nullptr) const override {
1418 const TargetLoweringBase *TLI = getTLI();
1419 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1420 assert(ISD && "Invalid opcode");
1421
1422 if (getTLI()->getValueType(DL, ValTy, true) == MVT::Other)
1423 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1424 Op1Info, Op2Info, I);
1425
1426 // Selects on vectors are actually vector selects.
1427 if (ISD == ISD::SELECT) {
1428 assert(CondTy && "CondTy must exist");
1429 if (CondTy->isVectorTy())
1430 ISD = ISD::VSELECT;
1431 }
1432 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1433
1434 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1435 !TLI->isOperationExpand(ISD, LT.second)) {
1436 // The operation is legal. Assume it costs 1. Multiply
1437 // by the type-legalization overhead.
1438 return LT.first * 1;
1439 }
1440
1441 // Otherwise, assume that the cast is scalarized.
1442 // TODO: If one of the types get legalized by splitting, handle this
1443 // similarly to what getCastInstrCost() does.
1444 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1445 if (isa<ScalableVectorType>(ValTy))
1447
1448 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1449 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1450 Opcode, ValVTy->getScalarType(), CondTy->getScalarType(), VecPred,
1451 CostKind, Op1Info, Op2Info, I);
1452
1453 // Return the cost of multiple scalar invocation plus the cost of
1454 // inserting and extracting the values.
1455 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1456 /*Extract*/ false, CostKind) +
1457 Num * Cost;
1458 }
1459
1460 // Unknown scalar opcode.
1461 return 1;
1462 }
1463
1466 unsigned Index, const Value *Op0, const Value *Op1,
1468 TTI::VectorInstrContext::None) const override {
1469 return getRegUsageForType(Val->getScalarType());
1470 }
1471
1472 /// \param ScalarUserAndIdx encodes the information about extracts from a
1473 /// vector with 'Scalar' being the value being extracted,'User' being the user
1474 /// of the extract(nullptr if user is not known before vectorization) and
1475 /// 'Idx' being the extract lane.
1477 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1478 Value *Scalar,
1479 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1481 TTI::VectorInstrContext::None) const override {
1482 return getVectorInstrCost(Opcode, Val, CostKind, Index, nullptr, nullptr,
1483 VIC);
1484 }
1485
1488 TTI::TargetCostKind CostKind, unsigned Index,
1490 TTI::VectorInstrContext::None) const override {
1491 Value *Op0 = nullptr;
1492 Value *Op1 = nullptr;
1493 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1494 Op0 = IE->getOperand(0);
1495 Op1 = IE->getOperand(1);
1496 }
1497 // If VIC is None, compute it from the instruction
1500 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1501 Op1, VIC);
1502 }
1503
1507 unsigned Index) const override {
1508 unsigned NewIndex = -1;
1509 if (auto *FVTy = dyn_cast<FixedVectorType>(Val)) {
1510 assert(Index < FVTy->getNumElements() &&
1511 "Unexpected index from end of vector");
1512 NewIndex = FVTy->getNumElements() - 1 - Index;
1513 }
1514 return thisT()->getVectorInstrCost(Opcode, Val, CostKind, NewIndex, nullptr,
1515 nullptr);
1516 }
1517
1519 getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
1520 const APInt &DemandedDstElts,
1521 TTI::TargetCostKind CostKind) const override {
1522 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1523 "Unexpected size of DemandedDstElts.");
1524
1526
1527 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1528 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1529
1530 // The Mask shuffling cost is extract all the elements of the Mask
1531 // and insert each of them Factor times into the wide vector:
1532 //
1533 // E.g. an interleaved group with factor 3:
1534 // %mask = icmp ult <8 x i32> %vec1, %vec2
1535 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1536 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1537 // The cost is estimated as extract all mask elements from the <8xi1> mask
1538 // vector and insert them factor times into the <24xi1> shuffled mask
1539 // vector.
1540 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1541 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1542 /*Insert*/ false,
1543 /*Extract*/ true, CostKind);
1544 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1545 /*Insert*/ true,
1546 /*Extract*/ false, CostKind);
1547
1548 return Cost;
1549 }
1550
1552 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1555 const Instruction *I = nullptr) const override {
1556 assert(!Src->isVoidTy() && "Invalid type");
1557 // Assume types, such as structs, are expensive.
1558 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1559 return 4;
1560 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1561
1562 // Assuming that all loads of legal types cost 1.
1563 InstructionCost Cost = LT.first;
1565 return Cost;
1566
1567 const DataLayout &DL = this->getDataLayout();
1568 if (Src->isVectorTy() &&
1569 // In practice it's not currently possible to have a change in lane
1570 // length for extending loads or truncating stores so both types should
1571 // have the same scalable property.
1572 TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
1573 LT.second.getSizeInBits())) {
1574 // This is a vector load that legalizes to a larger type than the vector
1575 // itself. Unless the corresponding extending load or truncating store is
1576 // legal, then this will scalarize.
1578 EVT MemVT = getTLI()->getValueType(DL, Src);
1579 if (Opcode == Instruction::Store)
1580 LA = getTLI()->getTruncStoreAction(LT.second, MemVT, Alignment,
1581 AddressSpace);
1582 else
1583 LA = getTLI()->getLoadAction(LT.second, MemVT, Alignment, AddressSpace,
1584 ISD::EXTLOAD, false);
1585
1586 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1587 // This is a vector load/store for some illegal type that is scalarized.
1588 // We must account for the cost of building or decomposing the vector.
1590 cast<VectorType>(Src), Opcode != Instruction::Store,
1591 Opcode == Instruction::Store, CostKind);
1592 }
1593 }
1594
1595 return Cost;
1596 }
1597
1599 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1600 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1601 bool UseMaskForCond = false, bool UseMaskForGaps = false) const override {
1602
1603 // We cannot scalarize scalable vectors, so return Invalid.
1604 if (isa<ScalableVectorType>(VecTy))
1606
1607 auto *VT = cast<FixedVectorType>(VecTy);
1608
1609 unsigned NumElts = VT->getNumElements();
1610 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1611
1612 unsigned NumSubElts = NumElts / Factor;
1613 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1614
1615 // Firstly, the cost of load/store operation.
1617 if (UseMaskForCond || UseMaskForGaps) {
1618 unsigned IID = Opcode == Instruction::Load ? Intrinsic::masked_load
1619 : Intrinsic::masked_store;
1620 Cost = thisT()->getMemIntrinsicInstrCost(
1621 MemIntrinsicCostAttributes(IID, VecTy, Alignment, AddressSpace),
1622 CostKind);
1623 } else
1624 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1625 CostKind);
1626
1627 // Legalize the vector type, and get the legalized and unlegalized type
1628 // sizes.
1629 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1630 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1631 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1632
1633 // Scale the cost of the memory operation by the fraction of legalized
1634 // instructions that will actually be used. We shouldn't account for the
1635 // cost of dead instructions since they will be removed.
1636 //
1637 // E.g., An interleaved load of factor 8:
1638 // %vec = load <16 x i64>, <16 x i64>* %ptr
1639 // %v0 = shufflevector %vec, undef, <0, 8>
1640 //
1641 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1642 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1643 // type). The other loads are unused.
1644 //
1645 // TODO: Note that legalization can turn masked loads/stores into unmasked
1646 // (legalized) loads/stores. This can be reflected in the cost.
1647 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1648 // The number of loads of a legal type it will take to represent a load
1649 // of the unlegalized vector type.
1650 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1651
1652 // The number of elements of the unlegalized type that correspond to a
1653 // single legal instruction.
1654 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1655
1656 // Determine which legal instructions will be used.
1657 BitVector UsedInsts(NumLegalInsts, false);
1658 for (unsigned Index : Indices)
1659 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1660 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1661
1662 // Scale the cost of the load by the fraction of legal instructions that
1663 // will be used.
1664 Cost = divideCeil(UsedInsts.count() * Cost.getValue(), NumLegalInsts);
1665 }
1666
1667 // Then plus the cost of interleave operation.
1668 assert(Indices.size() <= Factor &&
1669 "Interleaved memory op has too many members");
1670
1671 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1672 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1673
1674 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1675 for (unsigned Index : Indices) {
1676 assert(Index < Factor && "Invalid index for interleaved memory op");
1677 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1678 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1679 }
1680
1681 if (Opcode == Instruction::Load) {
1682 // The interleave cost is similar to extract sub vectors' elements
1683 // from the wide vector, and insert them into sub vectors.
1684 //
1685 // E.g. An interleaved load of factor 2 (with one member of index 0):
1686 // %vec = load <8 x i32>, <8 x i32>* %ptr
1687 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1688 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1689 // <8 x i32> vector and insert them into a <4 x i32> vector.
1690 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1691 SubVT, DemandedAllSubElts,
1692 /*Insert*/ true, /*Extract*/ false, CostKind);
1693 Cost += Indices.size() * InsSubCost;
1694 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1695 /*Insert*/ false,
1696 /*Extract*/ true, CostKind);
1697 } else {
1698 // The interleave cost is extract elements from sub vectors, and
1699 // insert them into the wide vector.
1700 //
1701 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1702 // (using VF=4):
1703 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1704 // %gaps.mask = <true, true, false, true, true, false,
1705 // true, true, false, true, true, false>
1706 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1707 // i32 Align, <12 x i1> %gaps.mask
1708 // The cost is estimated as extract all elements (of actual members,
1709 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1710 // i32> vector.
1711 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1712 SubVT, DemandedAllSubElts,
1713 /*Insert*/ false, /*Extract*/ true, CostKind);
1714 Cost += ExtSubCost * Indices.size();
1715 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1716 /*Insert*/ true,
1717 /*Extract*/ false, CostKind);
1718 }
1719
1720 if (!UseMaskForCond)
1721 return Cost;
1722
1723 Type *I8Type = Type::getInt8Ty(VT->getContext());
1724
1725 Cost += thisT()->getReplicationShuffleCost(
1726 I8Type, Factor, NumSubElts,
1727 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1728 CostKind);
1729
1730 // The Gaps mask is invariant and created outside the loop, therefore the
1731 // cost of creating it is not accounted for here. However if we have both
1732 // a MaskForGaps and some other mask that guards the execution of the
1733 // memory access, we need to account for the cost of And-ing the two masks
1734 // inside the loop.
1735 if (UseMaskForGaps) {
1736 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1737 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1738 CostKind);
1739 }
1740
1741 return Cost;
1742 }
1743
1744 /// Get intrinsic cost based on arguments.
1747 TTI::TargetCostKind CostKind) const override {
1748 // Check for generically free intrinsics.
1750 return 0;
1751
1752 // Assume that target intrinsics are cheap.
1753 Intrinsic::ID IID = ICA.getID();
1756
1757 // VP Intrinsics should have the same cost as their non-vp counterpart.
1758 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1759 // counterpart when the vector length argument is smaller than the maximum
1760 // vector length.
1761 // TODO: Support other kinds of VPIntrinsics
1762 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1763 std::optional<unsigned> FOp =
1765 if (FOp) {
1766 if (ICA.getID() == Intrinsic::vp_load) {
1767 Align Alignment;
1768 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1769 Alignment = VPI->getPointerAlignment().valueOrOne();
1770 unsigned AS = 0;
1771 if (ICA.getArgTypes().size() > 1)
1772 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[0]))
1773 AS = PtrTy->getAddressSpace();
1774 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1775 AS, CostKind);
1776 }
1777 if (ICA.getID() == Intrinsic::vp_store) {
1778 Align Alignment;
1779 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1780 Alignment = VPI->getPointerAlignment().valueOrOne();
1781 unsigned AS = 0;
1782 if (ICA.getArgTypes().size() >= 2)
1783 if (auto *PtrTy = dyn_cast<PointerType>(ICA.getArgTypes()[1]))
1784 AS = PtrTy->getAddressSpace();
1785 return thisT()->getMemoryOpCost(*FOp, ICA.getArgTypes()[0], Alignment,
1786 AS, CostKind);
1787 }
1789 ICA.getID() == Intrinsic::vp_fneg) {
1790 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1791 CostKind);
1792 }
1793 if (VPCastIntrinsic::isVPCast(ICA.getID())) {
1794 return thisT()->getCastInstrCost(
1795 *FOp, ICA.getReturnType(), ICA.getArgTypes()[0],
1797 }
1798 if (VPCmpIntrinsic::isVPCmp(ICA.getID())) {
1799 // We can only handle vp_cmp intrinsics with underlying instructions.
1800 if (ICA.getInst()) {
1801 assert(FOp);
1802 auto *UI = cast<VPCmpIntrinsic>(ICA.getInst());
1803 return thisT()->getCmpSelInstrCost(*FOp, ICA.getArgTypes()[0],
1804 ICA.getReturnType(),
1805 UI->getPredicate(), CostKind);
1806 }
1807 }
1808 }
1809 if (ICA.getID() == Intrinsic::vp_load_ff) {
1810 Type *RetTy = ICA.getReturnType();
1811 Type *DataTy = cast<StructType>(RetTy)->getElementType(0);
1812 Align Alignment;
1813 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1814 Alignment = VPI->getPointerAlignment().valueOrOne();
1815 return thisT()->getMemIntrinsicInstrCost(
1816 MemIntrinsicCostAttributes(ICA.getID(), DataTy, Alignment),
1817 CostKind);
1818 }
1819 if (ICA.getID() == Intrinsic::vp_scatter) {
1820 if (ICA.isTypeBasedOnly()) {
1821 IntrinsicCostAttributes MaskedScatter(
1824 ICA.getFlags());
1825 return getTypeBasedIntrinsicInstrCost(MaskedScatter, CostKind);
1826 }
1827 Align Alignment;
1828 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1829 Alignment = VPI->getPointerAlignment().valueOrOne();
1830 bool VarMask = isa<Constant>(ICA.getArgs()[2]);
1831 return thisT()->getMemIntrinsicInstrCost(
1832 MemIntrinsicCostAttributes(Intrinsic::vp_scatter,
1833 ICA.getArgTypes()[0], ICA.getArgs()[1],
1834 VarMask, Alignment, nullptr),
1835 CostKind);
1836 }
1837 if (ICA.getID() == Intrinsic::vp_gather) {
1838 if (ICA.isTypeBasedOnly()) {
1839 IntrinsicCostAttributes MaskedGather(
1842 ICA.getFlags());
1843 return getTypeBasedIntrinsicInstrCost(MaskedGather, CostKind);
1844 }
1845 Align Alignment;
1846 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1847 Alignment = VPI->getPointerAlignment().valueOrOne();
1848 bool VarMask = isa<Constant>(ICA.getArgs()[1]);
1849 return thisT()->getMemIntrinsicInstrCost(
1850 MemIntrinsicCostAttributes(Intrinsic::vp_gather,
1851 ICA.getReturnType(), ICA.getArgs()[0],
1852 VarMask, Alignment, nullptr),
1853 CostKind);
1854 }
1855
1856 if (ICA.getID() == Intrinsic::vp_select ||
1857 ICA.getID() == Intrinsic::vp_merge) {
1858 TTI::OperandValueInfo OpInfoX, OpInfoY;
1859 if (!ICA.isTypeBasedOnly()) {
1860 OpInfoX = TTI::getOperandInfo(ICA.getArgs()[0]);
1861 OpInfoY = TTI::getOperandInfo(ICA.getArgs()[1]);
1862 }
1863 return getCmpSelInstrCost(
1864 Instruction::Select, ICA.getReturnType(), ICA.getArgTypes()[0],
1865 CmpInst::BAD_ICMP_PREDICATE, CostKind, OpInfoX, OpInfoY);
1866 }
1867
1868 std::optional<Intrinsic::ID> FID =
1870
1871 // Not functionally equivalent but close enough for cost modelling.
1872 if (ICA.getID() == Intrinsic::experimental_vp_reverse)
1873 FID = Intrinsic::vector_reverse;
1874
1875 if (FID) {
1876 // Non-vp version will have same arg types except mask and vector
1877 // length.
1878 assert(ICA.getArgTypes().size() >= 2 &&
1879 "Expected VPIntrinsic to have Mask and Vector Length args and "
1880 "types");
1881
1882 ArrayRef<const Value *> NewArgs = ArrayRef(ICA.getArgs());
1883 if (!ICA.isTypeBasedOnly())
1884 NewArgs = NewArgs.drop_back(2);
1886
1887 // VPReduction intrinsics have a start value argument that their non-vp
1888 // counterparts do not have, except for the fadd and fmul non-vp
1889 // counterpart.
1891 *FID != Intrinsic::vector_reduce_fadd &&
1892 *FID != Intrinsic::vector_reduce_fmul) {
1893 if (!ICA.isTypeBasedOnly())
1894 NewArgs = NewArgs.drop_front();
1895 NewTys = NewTys.drop_front();
1896 }
1897
1898 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewArgs,
1899 NewTys, ICA.getFlags());
1900 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1901 }
1902 }
1903
1904 if (ICA.isTypeBasedOnly())
1906
1907 Type *RetTy = ICA.getReturnType();
1908
1909 ElementCount RetVF = isVectorizedTy(RetTy) ? getVectorizedTypeVF(RetTy)
1911
1912 const IntrinsicInst *I = ICA.getInst();
1913 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1914 FastMathFlags FMF = ICA.getFlags();
1915 switch (IID) {
1916 default:
1917 break;
1918
1919 case Intrinsic::powi:
1920 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1921 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1922 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1923 ShouldOptForSize)) {
1924 // The cost is modeled on the expansion performed by ExpandPowI in
1925 // SelectionDAGBuilder.
1926 APInt Exponent = RHSC->getValue().abs();
1927 unsigned ActiveBits = Exponent.getActiveBits();
1928 unsigned PopCount = Exponent.popcount();
1929 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1930 thisT()->getArithmeticInstrCost(
1931 Instruction::FMul, RetTy, CostKind);
1932 if (RHSC->isNegative())
1933 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1934 CostKind);
1935 return Cost;
1936 }
1937 }
1938 break;
1939 case Intrinsic::cttz:
1940 // FIXME: If necessary, this should go in target-specific overrides.
1941 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1943 break;
1944
1945 case Intrinsic::ctlz:
1946 // FIXME: If necessary, this should go in target-specific overrides.
1947 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1949 break;
1950
1951 case Intrinsic::memcpy:
1952 return thisT()->getMemcpyCost(ICA.getInst());
1953
1954 case Intrinsic::masked_scatter: {
1955 const Value *Mask = Args[2];
1956 bool VarMask = !isa<Constant>(Mask);
1957 Align Alignment = I->getParamAlign(1).valueOrOne();
1958 return thisT()->getMemIntrinsicInstrCost(
1959 MemIntrinsicCostAttributes(Intrinsic::masked_scatter,
1960 ICA.getArgTypes()[0], Args[1], VarMask,
1961 Alignment, I),
1962 CostKind);
1963 }
1964 case Intrinsic::masked_gather: {
1965 const Value *Mask = Args[1];
1966 bool VarMask = !isa<Constant>(Mask);
1967 Align Alignment = I->getParamAlign(0).valueOrOne();
1968 return thisT()->getMemIntrinsicInstrCost(
1969 MemIntrinsicCostAttributes(Intrinsic::masked_gather, RetTy, Args[0],
1970 VarMask, Alignment, I),
1971 CostKind);
1972 }
1973 case Intrinsic::masked_compressstore: {
1974 const Value *Data = Args[0];
1975 const Value *Mask = Args[2];
1976 Align Alignment = I->getParamAlign(1).valueOrOne();
1977 return thisT()->getMemIntrinsicInstrCost(
1978 MemIntrinsicCostAttributes(IID, Data->getType(), !isa<Constant>(Mask),
1979 Alignment, I),
1980 CostKind);
1981 }
1982 case Intrinsic::masked_expandload: {
1983 const Value *Mask = Args[1];
1984 Align Alignment = I->getParamAlign(0).valueOrOne();
1985 return thisT()->getMemIntrinsicInstrCost(
1986 MemIntrinsicCostAttributes(IID, RetTy, !isa<Constant>(Mask),
1987 Alignment, I),
1988 CostKind);
1989 }
1990 case Intrinsic::experimental_vp_strided_store: {
1991 const Value *Data = Args[0];
1992 const Value *Ptr = Args[1];
1993 const Value *Mask = Args[3];
1994 const Value *EVL = Args[4];
1995 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
1996 Type *EltTy = cast<VectorType>(Data->getType())->getElementType();
1997 Align Alignment =
1998 I->getParamAlign(1).value_or(thisT()->DL.getABITypeAlign(EltTy));
1999 return thisT()->getMemIntrinsicInstrCost(
2000 MemIntrinsicCostAttributes(IID, Data->getType(), Ptr, VarMask,
2001 Alignment, I),
2002 CostKind);
2003 }
2004 case Intrinsic::experimental_vp_strided_load: {
2005 const Value *Ptr = Args[0];
2006 const Value *Mask = Args[2];
2007 const Value *EVL = Args[3];
2008 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
2009 Type *EltTy = cast<VectorType>(RetTy)->getElementType();
2010 Align Alignment =
2011 I->getParamAlign(0).value_or(thisT()->DL.getABITypeAlign(EltTy));
2012 return thisT()->getMemIntrinsicInstrCost(
2013 MemIntrinsicCostAttributes(IID, RetTy, Ptr, VarMask, Alignment, I),
2014 CostKind);
2015 }
2016 case Intrinsic::stepvector: {
2017 if (isa<ScalableVectorType>(RetTy))
2019 // The cost of materialising a constant integer vector.
2021 }
2022 case Intrinsic::vector_extract: {
2023 // FIXME: Handle case where a scalable vector is extracted from a scalable
2024 // vector
2025 if (isa<ScalableVectorType>(RetTy))
2027 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
2028 return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
2029 cast<VectorType>(RetTy),
2030 cast<VectorType>(Args[0]->getType()), {},
2031 CostKind, Index, cast<VectorType>(RetTy));
2032 }
2033 case Intrinsic::vector_insert: {
2034 // FIXME: Handle case where a scalable vector is inserted into a scalable
2035 // vector
2036 if (isa<ScalableVectorType>(Args[1]->getType()))
2038 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
2039 return thisT()->getShuffleCost(
2041 cast<VectorType>(Args[0]->getType()), {}, CostKind, Index,
2042 cast<VectorType>(Args[1]->getType()));
2043 }
2044 case Intrinsic::vector_splice_left:
2045 case Intrinsic::vector_splice_right: {
2046 auto *COffset = dyn_cast<ConstantInt>(Args[2]);
2047 if (!COffset)
2048 break;
2049 unsigned Index = COffset->getZExtValue();
2050 return thisT()->getShuffleCost(
2052 cast<VectorType>(Args[0]->getType()), {}, CostKind,
2053 IID == Intrinsic::vector_splice_left ? Index : -Index,
2054 cast<VectorType>(RetTy));
2055 }
2056 case Intrinsic::vector_reduce_add:
2057 case Intrinsic::vector_reduce_mul:
2058 case Intrinsic::vector_reduce_and:
2059 case Intrinsic::vector_reduce_or:
2060 case Intrinsic::vector_reduce_xor:
2061 case Intrinsic::vector_reduce_smax:
2062 case Intrinsic::vector_reduce_smin:
2063 case Intrinsic::vector_reduce_fmax:
2064 case Intrinsic::vector_reduce_fmin:
2065 case Intrinsic::vector_reduce_fmaximum:
2066 case Intrinsic::vector_reduce_fminimum:
2067 case Intrinsic::vector_reduce_umax:
2068 case Intrinsic::vector_reduce_umin: {
2069 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
2071 }
2072 case Intrinsic::vector_reduce_fadd:
2073 case Intrinsic::vector_reduce_fmul: {
2075 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
2077 }
2078 case Intrinsic::fshl:
2079 case Intrinsic::fshr: {
2080 const Value *X = Args[0];
2081 const Value *Y = Args[1];
2082 const Value *Z = Args[2];
2085 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
2086
2087 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2088 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2090 Cost +=
2091 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2092 Cost += thisT()->getArithmeticInstrCost(
2093 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
2094 {OpInfoZ.Kind, TTI::OP_None});
2095 Cost += thisT()->getArithmeticInstrCost(
2096 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
2097 {OpInfoZ.Kind, TTI::OP_None});
2098
2099 if (!OpInfoZ.isConstant()) {
2100 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
2101 CostKind);
2102 // Non-constant shift amounts requires a modulo. If the typesize is a
2103 // power-2 then this will be converted to an and, otherwise it will use
2104 // a urem.
2105 Cost += thisT()->getArithmeticInstrCost(
2106 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
2107 : BinaryOperator::URem,
2108 RetTy, CostKind, OpInfoZ,
2109 {TTI::OK_UniformConstantValue, TTI::OP_None});
2110 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
2111 if (X != Y) {
2112 Type *CondTy = RetTy->getWithNewBitWidth(1);
2113 Cost += thisT()->getCmpSelInstrCost(
2114 BinaryOperator::ICmp, RetTy, CondTy, CmpInst::ICMP_EQ, CostKind);
2115 Cost +=
2116 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2118 }
2119 }
2120 return Cost;
2121 }
2122 case Intrinsic::experimental_cttz_elts: {
2123 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
2124
2125 // If we're not expanding the intrinsic then we assume this is cheap
2126 // to implement.
2127 if (!getTLI()->shouldExpandCttzElements(ArgType))
2128 return getTypeLegalizationCost(RetTy).first;
2129
2130 // TODO: The costs below reflect the expansion code in
2131 // SelectionDAGBuilder, but we may want to sacrifice some accuracy in
2132 // favour of compile time.
2133
2134 // Find the smallest "sensible" element type to use for the expansion.
2135 bool ZeroIsPoison = !cast<ConstantInt>(Args[1])->isZero();
2136 ConstantRange VScaleRange(APInt(64, 1), APInt::getZero(64));
2137 if (isa<ScalableVectorType>(ICA.getArgTypes()[0]) && I && I->getCaller())
2138 VScaleRange = getVScaleRange(I->getCaller(), 64);
2139
2140 unsigned EltWidth = getTLI()->getBitWidthForCttzElements(
2141 getTLI()->getValueType(DL, RetTy), ArgType.getVectorElementCount(),
2142 ZeroIsPoison, &VScaleRange);
2143 Type *NewEltTy = IntegerType::getIntNTy(RetTy->getContext(), EltWidth);
2144
2145 // Create the new vector type & get the vector length
2146 Type *NewVecTy = VectorType::get(
2147 NewEltTy, cast<VectorType>(Args[0]->getType())->getElementCount());
2148
2149 IntrinsicCostAttributes StepVecAttrs(Intrinsic::stepvector, NewVecTy, {},
2150 FMF);
2152 thisT()->getIntrinsicInstrCost(StepVecAttrs, CostKind);
2153
2154 Cost +=
2155 thisT()->getArithmeticInstrCost(Instruction::Sub, NewVecTy, CostKind);
2156 Cost += thisT()->getCastInstrCost(Instruction::SExt, NewVecTy,
2157 Args[0]->getType(),
2159 Cost +=
2160 thisT()->getArithmeticInstrCost(Instruction::And, NewVecTy, CostKind);
2161
2162 IntrinsicCostAttributes ReducAttrs(Intrinsic::vector_reduce_umax,
2163 NewEltTy, NewVecTy, FMF, I, 1);
2164 Cost += thisT()->getTypeBasedIntrinsicInstrCost(ReducAttrs, CostKind);
2165 Cost +=
2166 thisT()->getArithmeticInstrCost(Instruction::Sub, NewEltTy, CostKind);
2167
2168 return Cost;
2169 }
2170 case Intrinsic::get_active_lane_mask:
2171 case Intrinsic::experimental_vector_match:
2172 case Intrinsic::experimental_vector_histogram_add:
2173 case Intrinsic::experimental_vector_histogram_uadd_sat:
2174 case Intrinsic::experimental_vector_histogram_umax:
2175 case Intrinsic::experimental_vector_histogram_umin:
2176 case Intrinsic::masked_udiv:
2177 case Intrinsic::masked_sdiv:
2178 case Intrinsic::masked_urem:
2179 case Intrinsic::masked_srem:
2180 return thisT()->getTypeBasedIntrinsicInstrCost(ICA, CostKind);
2181 case Intrinsic::modf:
2182 case Intrinsic::sincos:
2183 case Intrinsic::sincospi: {
2184 std::optional<unsigned> CallRetElementIndex;
2185 // The first element of the modf result is returned by value in the
2186 // libcall.
2187 if (ICA.getID() == Intrinsic::modf)
2188 CallRetElementIndex = 0;
2189
2190 if (auto Cost = getMultipleResultIntrinsicVectorLibCallCost(
2191 ICA, CostKind, CallRetElementIndex))
2192 return *Cost;
2193 // Otherwise, fallback to default scalarization cost.
2194 break;
2195 }
2196 case Intrinsic::loop_dependence_war_mask:
2197 case Intrinsic::loop_dependence_raw_mask: {
2198 // Compute the cost of the expanded version of these intrinsics:
2199 //
2200 // The possible expansions are...
2201 //
2202 // loop_dependence_war_mask:
2203 // diff = (ptrB - ptrA) / eltSize
2204 // cmp = icmp sle diff, 0
2205 // upper_bound = select cmp, -1, diff
2206 // mask = get_active_lane_mask 0, upper_bound
2207 //
2208 // loop_dependence_raw_mask:
2209 // diff = (abs(ptrB - ptrA)) / eltSize
2210 // cmp = icmp eq diff, 0
2211 // upper_bound = select cmp, -1, diff
2212 // mask = get_active_lane_mask 0, upper_bound
2213 //
2214 auto *PtrTy = cast<PointerType>(ICA.getArgTypes()[0]);
2215 Type *IntPtrTy = IntegerType::getIntNTy(
2216 RetTy->getContext(), thisT()->getDataLayout().getPointerSizeInBits(
2217 PtrTy->getAddressSpace()));
2218 bool IsReadAfterWrite = IID == Intrinsic::loop_dependence_raw_mask;
2219
2221 thisT()->getArithmeticInstrCost(Instruction::Sub, IntPtrTy, CostKind);
2222 if (IsReadAfterWrite) {
2223 IntrinsicCostAttributes AbsAttrs(Intrinsic::abs, IntPtrTy, {IntPtrTy},
2224 {});
2225 Cost += thisT()->getIntrinsicInstrCost(AbsAttrs, CostKind);
2226 }
2227
2228 TTI::OperandValueInfo EltSizeOpInfo =
2229 TTI::getOperandInfo(ICA.getArgs()[2]);
2230 Cost += thisT()->getArithmeticInstrCost(Instruction::SDiv, IntPtrTy,
2231 CostKind, {}, EltSizeOpInfo);
2232
2233 Type *CondTy = IntegerType::getInt1Ty(RetTy->getContext());
2234 CmpInst::Predicate Pred =
2235 IsReadAfterWrite ? CmpInst::ICMP_EQ : CmpInst::ICMP_SLE;
2236 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CondTy,
2237 IntPtrTy, Pred, CostKind);
2238 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, IntPtrTy,
2239 CondTy, Pred, CostKind);
2240
2241 IntrinsicCostAttributes Attrs(Intrinsic::get_active_lane_mask, RetTy,
2242 {IntPtrTy, IntPtrTy}, FMF);
2243 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2244 return Cost;
2245 }
2246 }
2247
2248 // Assume that we need to scalarize this intrinsic.)
2249 // Compute the scalarization overhead based on Args for a vector
2250 // intrinsic.
2251 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
2252 if (RetVF.isVector() && !RetVF.isScalable()) {
2253 ScalarizationCost = 0;
2254 if (!RetTy->isVoidTy()) {
2255 for (Type *VectorTy : getContainedTypes(RetTy)) {
2256 ScalarizationCost += getScalarizationOverhead(
2257 cast<VectorType>(VectorTy),
2258 /*Insert=*/true, /*Extract=*/false, CostKind);
2259 }
2260 }
2261 ScalarizationCost += getOperandsScalarizationOverhead(
2262 filterConstantAndDuplicatedOperands(Args, ICA.getArgTypes()),
2263 CostKind);
2264 }
2265
2266 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
2267 ScalarizationCost);
2268 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2269 }
2270
2271 /// Get intrinsic cost based on argument types.
2272 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
2273 /// cost of scalarizing the arguments and the return value will be computed
2274 /// based on types.
2278 Intrinsic::ID IID = ICA.getID();
2279 Type *RetTy = ICA.getReturnType();
2280 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
2281 FastMathFlags FMF = ICA.getFlags();
2282 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
2283 bool SkipScalarizationCost = ICA.skipScalarizationCost();
2284
2285 VectorType *VecOpTy = nullptr;
2286 if (!Tys.empty()) {
2287 // The vector reduction operand is operand 0 except for fadd/fmul.
2288 // Their operand 0 is a scalar start value, so the vector op is operand 1.
2289 unsigned VecTyIndex = 0;
2290 if (IID == Intrinsic::vector_reduce_fadd ||
2291 IID == Intrinsic::vector_reduce_fmul)
2292 VecTyIndex = 1;
2293 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
2294 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
2295 }
2296
2297 // Library call cost - other than size, make it expensive.
2298 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
2299 unsigned ISD = 0;
2300 switch (IID) {
2301 default: {
2302 // Scalable vectors cannot be scalarized, so return Invalid.
2303 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2304 return isa<ScalableVectorType>(Ty);
2305 }))
2307
2308 // Assume that we need to scalarize this intrinsic.
2309 InstructionCost ScalarizationCost =
2310 SkipScalarizationCost ? ScalarizationCostPassed : 0;
2311 unsigned ScalarCalls = 1;
2312 Type *ScalarRetTy = RetTy;
2313 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2314 if (!SkipScalarizationCost)
2315 ScalarizationCost = getScalarizationOverhead(
2316 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
2317 ScalarCalls = std::max(ScalarCalls,
2319 ScalarRetTy = RetTy->getScalarType();
2320 }
2321 SmallVector<Type *, 4> ScalarTys;
2322 for (Type *Ty : Tys) {
2323 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
2324 if (!SkipScalarizationCost)
2325 ScalarizationCost += getScalarizationOverhead(
2326 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2327 ScalarCalls = std::max(ScalarCalls,
2329 Ty = Ty->getScalarType();
2330 }
2331 ScalarTys.push_back(Ty);
2332 }
2333 if (ScalarCalls == 1)
2334 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
2335
2336 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
2337 InstructionCost ScalarCost =
2338 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
2339
2340 return ScalarCalls * ScalarCost + ScalarizationCost;
2341 }
2342 // Look for intrinsics that can be lowered directly or turned into a scalar
2343 // intrinsic call.
2344 case Intrinsic::sqrt:
2345 ISD = ISD::FSQRT;
2346 break;
2347 case Intrinsic::sin:
2348 ISD = ISD::FSIN;
2349 break;
2350 case Intrinsic::cos:
2351 ISD = ISD::FCOS;
2352 break;
2353 case Intrinsic::sincos:
2354 ISD = ISD::FSINCOS;
2355 break;
2356 case Intrinsic::sincospi:
2358 break;
2359 case Intrinsic::modf:
2360 ISD = ISD::FMODF;
2361 break;
2362 case Intrinsic::tan:
2363 ISD = ISD::FTAN;
2364 break;
2365 case Intrinsic::asin:
2366 ISD = ISD::FASIN;
2367 break;
2368 case Intrinsic::acos:
2369 ISD = ISD::FACOS;
2370 break;
2371 case Intrinsic::atan:
2372 ISD = ISD::FATAN;
2373 break;
2374 case Intrinsic::atan2:
2375 ISD = ISD::FATAN2;
2376 break;
2377 case Intrinsic::sinh:
2378 ISD = ISD::FSINH;
2379 break;
2380 case Intrinsic::cosh:
2381 ISD = ISD::FCOSH;
2382 break;
2383 case Intrinsic::tanh:
2384 ISD = ISD::FTANH;
2385 break;
2386 case Intrinsic::exp:
2387 ISD = ISD::FEXP;
2388 break;
2389 case Intrinsic::exp2:
2390 ISD = ISD::FEXP2;
2391 break;
2392 case Intrinsic::exp10:
2393 ISD = ISD::FEXP10;
2394 break;
2395 case Intrinsic::log:
2396 ISD = ISD::FLOG;
2397 break;
2398 case Intrinsic::log10:
2399 ISD = ISD::FLOG10;
2400 break;
2401 case Intrinsic::log2:
2402 ISD = ISD::FLOG2;
2403 break;
2404 case Intrinsic::ldexp:
2405 ISD = ISD::FLDEXP;
2406 break;
2407 case Intrinsic::fabs:
2408 ISD = ISD::FABS;
2409 break;
2410 case Intrinsic::canonicalize:
2412 break;
2413 case Intrinsic::minnum:
2414 ISD = ISD::FMINNUM;
2415 break;
2416 case Intrinsic::maxnum:
2417 ISD = ISD::FMAXNUM;
2418 break;
2419 case Intrinsic::minimum:
2421 break;
2422 case Intrinsic::maximum:
2424 break;
2425 case Intrinsic::minimumnum:
2427 break;
2428 case Intrinsic::maximumnum:
2430 break;
2431 case Intrinsic::copysign:
2433 break;
2434 case Intrinsic::floor:
2435 ISD = ISD::FFLOOR;
2436 break;
2437 case Intrinsic::ceil:
2438 ISD = ISD::FCEIL;
2439 break;
2440 case Intrinsic::trunc:
2441 ISD = ISD::FTRUNC;
2442 break;
2443 case Intrinsic::nearbyint:
2445 break;
2446 case Intrinsic::rint:
2447 ISD = ISD::FRINT;
2448 break;
2449 case Intrinsic::lrint:
2450 ISD = ISD::LRINT;
2451 break;
2452 case Intrinsic::llrint:
2453 ISD = ISD::LLRINT;
2454 break;
2455 case Intrinsic::round:
2456 ISD = ISD::FROUND;
2457 break;
2458 case Intrinsic::roundeven:
2460 break;
2461 case Intrinsic::lround:
2462 ISD = ISD::LROUND;
2463 break;
2464 case Intrinsic::llround:
2465 ISD = ISD::LLROUND;
2466 break;
2467 case Intrinsic::pow:
2468 ISD = ISD::FPOW;
2469 break;
2470 case Intrinsic::fma:
2471 ISD = ISD::FMA;
2472 break;
2473 case Intrinsic::fmuladd:
2474 ISD = ISD::FMA;
2475 break;
2476 case Intrinsic::experimental_constrained_fmuladd:
2478 break;
2479 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2480 case Intrinsic::lifetime_start:
2481 case Intrinsic::lifetime_end:
2482 case Intrinsic::sideeffect:
2483 case Intrinsic::pseudoprobe:
2484 case Intrinsic::arithmetic_fence:
2485 return 0;
2486 case Intrinsic::masked_store: {
2487 Type *Ty = Tys[0];
2488 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2489 return thisT()->getMemIntrinsicInstrCost(
2490 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2491 }
2492 case Intrinsic::masked_load: {
2493 Type *Ty = RetTy;
2494 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2495 return thisT()->getMemIntrinsicInstrCost(
2496 MemIntrinsicCostAttributes(IID, Ty, TyAlign, 0), CostKind);
2497 }
2498 case Intrinsic::experimental_vp_strided_store: {
2499 auto *Ty = cast<VectorType>(ICA.getArgTypes()[0]);
2500 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2501 return thisT()->getMemIntrinsicInstrCost(
2502 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2503 /*VariableMask=*/true, Alignment,
2504 ICA.getInst()),
2505 CostKind);
2506 }
2507 case Intrinsic::experimental_vp_strided_load: {
2508 auto *Ty = cast<VectorType>(ICA.getReturnType());
2509 Align Alignment = thisT()->DL.getABITypeAlign(Ty->getElementType());
2510 return thisT()->getMemIntrinsicInstrCost(
2511 MemIntrinsicCostAttributes(IID, Ty, /*Ptr=*/nullptr,
2512 /*VariableMask=*/true, Alignment,
2513 ICA.getInst()),
2514 CostKind);
2515 }
2516 case Intrinsic::vector_reduce_add:
2517 case Intrinsic::vector_reduce_mul:
2518 case Intrinsic::vector_reduce_and:
2519 case Intrinsic::vector_reduce_or:
2520 case Intrinsic::vector_reduce_xor:
2521 return thisT()->getArithmeticReductionCost(
2522 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2523 CostKind);
2524 case Intrinsic::vector_reduce_fadd:
2525 case Intrinsic::vector_reduce_fmul:
2526 return thisT()->getArithmeticReductionCost(
2527 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2528 case Intrinsic::vector_reduce_smax:
2529 case Intrinsic::vector_reduce_smin:
2530 case Intrinsic::vector_reduce_umax:
2531 case Intrinsic::vector_reduce_umin:
2532 case Intrinsic::vector_reduce_fmax:
2533 case Intrinsic::vector_reduce_fmin:
2534 case Intrinsic::vector_reduce_fmaximum:
2535 case Intrinsic::vector_reduce_fminimum:
2536 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2537 VecOpTy, ICA.getFlags(), CostKind);
2538 case Intrinsic::experimental_vector_match: {
2539 auto *SearchTy = cast<VectorType>(ICA.getArgTypes()[0]);
2540 auto *NeedleTy = cast<FixedVectorType>(ICA.getArgTypes()[1]);
2541 unsigned SearchSize = NeedleTy->getNumElements();
2542
2543 // If we're not expanding the intrinsic then we assume this is cheap to
2544 // implement.
2545 EVT SearchVT = getTLI()->getValueType(DL, SearchTy);
2546 if (!getTLI()->shouldExpandVectorMatch(SearchVT, SearchSize))
2547 return getTypeLegalizationCost(RetTy).first;
2548
2549 // Approximate the cost based on the expansion code in
2550 // SelectionDAGBuilder.
2552 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, NeedleTy,
2553 CostKind, 1, nullptr, nullptr);
2554 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SearchTy,
2555 CostKind, 0, nullptr, nullptr);
2556 Cost += thisT()->getShuffleCost(TTI::SK_Broadcast, SearchTy, SearchTy, {},
2557 CostKind, 0, nullptr);
2558 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SearchTy, RetTy,
2560 Cost +=
2561 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2562 Cost *= SearchSize;
2563 Cost +=
2564 thisT()->getArithmeticInstrCost(BinaryOperator::And, RetTy, CostKind);
2565 return Cost;
2566 }
2567 case Intrinsic::vector_reverse:
2568 return thisT()->getShuffleCost(TTI::SK_Reverse, cast<VectorType>(RetTy),
2569 cast<VectorType>(ICA.getArgTypes()[0]), {},
2570 CostKind, 0, cast<VectorType>(RetTy));
2571 case Intrinsic::experimental_vector_histogram_add:
2572 case Intrinsic::experimental_vector_histogram_uadd_sat:
2573 case Intrinsic::experimental_vector_histogram_umax:
2574 case Intrinsic::experimental_vector_histogram_umin: {
2576 Type *EltTy = ICA.getArgTypes()[1];
2577
2578 // Targets with scalable vectors must handle this on their own.
2579 if (!PtrsTy)
2581
2582 Align Alignment = thisT()->DL.getABITypeAlign(EltTy);
2584 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, PtrsTy,
2585 CostKind, 1, nullptr, nullptr);
2586 Cost += thisT()->getMemoryOpCost(Instruction::Load, EltTy, Alignment, 0,
2587 CostKind);
2588 switch (IID) {
2589 default:
2590 llvm_unreachable("Unhandled histogram update operation.");
2591 case Intrinsic::experimental_vector_histogram_add:
2592 Cost +=
2593 thisT()->getArithmeticInstrCost(Instruction::Add, EltTy, CostKind);
2594 break;
2595 case Intrinsic::experimental_vector_histogram_uadd_sat: {
2596 IntrinsicCostAttributes UAddSat(Intrinsic::uadd_sat, EltTy, {EltTy});
2597 Cost += thisT()->getIntrinsicInstrCost(UAddSat, CostKind);
2598 break;
2599 }
2600 case Intrinsic::experimental_vector_histogram_umax: {
2601 IntrinsicCostAttributes UMax(Intrinsic::umax, EltTy, {EltTy});
2602 Cost += thisT()->getIntrinsicInstrCost(UMax, CostKind);
2603 break;
2604 }
2605 case Intrinsic::experimental_vector_histogram_umin: {
2606 IntrinsicCostAttributes UMin(Intrinsic::umin, EltTy, {EltTy});
2607 Cost += thisT()->getIntrinsicInstrCost(UMin, CostKind);
2608 break;
2609 }
2610 }
2611 Cost += thisT()->getMemoryOpCost(Instruction::Store, EltTy, Alignment, 0,
2612 CostKind);
2613 Cost *= PtrsTy->getNumElements();
2614 return Cost;
2615 }
2616 case Intrinsic::get_active_lane_mask: {
2617 Type *ArgTy = ICA.getArgTypes()[0];
2618 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
2619 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true);
2620
2621 // If we're not expanding the intrinsic then we assume this is cheap
2622 // to implement.
2623 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT))
2624 return getTypeLegalizationCost(RetTy).first;
2625
2626 // Create the expanded types that will be used to calculate the uadd_sat
2627 // operation.
2628 Type *ExpRetTy =
2629 VectorType::get(ArgTy, cast<VectorType>(RetTy)->getElementCount());
2630 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
2632 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
2633 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
2635 return Cost;
2636 }
2637 case Intrinsic::experimental_memset_pattern:
2638 // This cost is set to match the cost of the memset_pattern16 libcall.
2639 // It should likely be re-evaluated after migration to this intrinsic
2640 // is complete.
2641 return TTI::TCC_Basic * 4;
2642 case Intrinsic::abs:
2643 ISD = ISD::ABS;
2644 break;
2645 case Intrinsic::fshl:
2646 ISD = ISD::FSHL;
2647 break;
2648 case Intrinsic::fshr:
2649 ISD = ISD::FSHR;
2650 break;
2651 case Intrinsic::smax:
2652 ISD = ISD::SMAX;
2653 break;
2654 case Intrinsic::smin:
2655 ISD = ISD::SMIN;
2656 break;
2657 case Intrinsic::umax:
2658 ISD = ISD::UMAX;
2659 break;
2660 case Intrinsic::umin:
2661 ISD = ISD::UMIN;
2662 break;
2663 case Intrinsic::sadd_sat:
2664 ISD = ISD::SADDSAT;
2665 break;
2666 case Intrinsic::ssub_sat:
2667 ISD = ISD::SSUBSAT;
2668 break;
2669 case Intrinsic::uadd_sat:
2670 ISD = ISD::UADDSAT;
2671 break;
2672 case Intrinsic::usub_sat:
2673 ISD = ISD::USUBSAT;
2674 break;
2675 case Intrinsic::smul_fix:
2676 ISD = ISD::SMULFIX;
2677 break;
2678 case Intrinsic::umul_fix:
2679 ISD = ISD::UMULFIX;
2680 break;
2681 case Intrinsic::sadd_with_overflow:
2682 ISD = ISD::SADDO;
2683 break;
2684 case Intrinsic::ssub_with_overflow:
2685 ISD = ISD::SSUBO;
2686 break;
2687 case Intrinsic::uadd_with_overflow:
2688 ISD = ISD::UADDO;
2689 break;
2690 case Intrinsic::usub_with_overflow:
2691 ISD = ISD::USUBO;
2692 break;
2693 case Intrinsic::smul_with_overflow:
2694 ISD = ISD::SMULO;
2695 break;
2696 case Intrinsic::umul_with_overflow:
2697 ISD = ISD::UMULO;
2698 break;
2699 case Intrinsic::fptosi_sat:
2700 case Intrinsic::fptoui_sat: {
2701 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Tys[0]);
2702 std::pair<InstructionCost, MVT> RetLT = getTypeLegalizationCost(RetTy);
2703
2704 // For cast instructions, types are different between source and
2705 // destination. Also need to check if the source type can be legalize.
2706 if (!SrcLT.first.isValid() || !RetLT.first.isValid())
2708 ISD = IID == Intrinsic::fptosi_sat ? ISD::FP_TO_SINT_SAT
2710 break;
2711 }
2712 case Intrinsic::ctpop:
2713 ISD = ISD::CTPOP;
2714 // In case of legalization use TCC_Expensive. This is cheaper than a
2715 // library call but still not a cheap instruction.
2716 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2717 break;
2718 case Intrinsic::ctlz:
2719 ISD = ISD::CTLZ;
2720 break;
2721 case Intrinsic::cttz:
2722 ISD = ISD::CTTZ;
2723 break;
2724 case Intrinsic::bswap:
2725 ISD = ISD::BSWAP;
2726 break;
2727 case Intrinsic::bitreverse:
2729 break;
2730 case Intrinsic::ucmp:
2731 ISD = ISD::UCMP;
2732 break;
2733 case Intrinsic::scmp:
2734 ISD = ISD::SCMP;
2735 break;
2736 case Intrinsic::clmul:
2737 ISD = ISD::CLMUL;
2738 break;
2739 case Intrinsic::masked_udiv:
2740 case Intrinsic::masked_sdiv:
2741 case Intrinsic::masked_urem:
2742 case Intrinsic::masked_srem: {
2743 unsigned UnmaskedOpc;
2744 switch (IID) {
2745 case Intrinsic::masked_udiv:
2747 UnmaskedOpc = Instruction::UDiv;
2748 break;
2749 case Intrinsic::masked_sdiv:
2751 UnmaskedOpc = Instruction::SDiv;
2752 break;
2753 case Intrinsic::masked_urem:
2755 UnmaskedOpc = Instruction::URem;
2756 break;
2757 case Intrinsic::masked_srem:
2759 UnmaskedOpc = Instruction::SRem;
2760 break;
2761 default:
2762 llvm_unreachable("Unexpected intrinsic ID");
2763 }
2765 thisT()->getArithmeticInstrCost(UnmaskedOpc, RetTy, CostKind);
2766
2767 // Expansion generates a (select %mask, %rhs, 1) for the divisor.
2768 MVT LT = getTypeLegalizationCost(RetTy).second;
2769 if (!getTLI()->isOperationLegalOrCustom(ISD, LT)) {
2770 Type *CondTy = cast<VectorType>(RetTy)->getWithNewType(
2772 Cost += thisT()->getCmpSelInstrCost(
2773 BinaryOperator::Select, RetTy, CondTy, CmpInst::BAD_ICMP_PREDICATE,
2775 }
2776
2777 return Cost;
2778 }
2779 }
2780
2781 auto *ST = dyn_cast<StructType>(RetTy);
2782 Type *LegalizeTy = ST ? ST->getContainedType(0) : RetTy;
2783 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(LegalizeTy);
2784
2785 const TargetLoweringBase *TLI = getTLI();
2786
2787 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2788 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2789 TLI->isFAbsFree(LT.second)) {
2790 return 0;
2791 }
2792
2793 // The operation is legal. Assume it costs 1.
2794 // If the type is split to multiple registers, assume that there is some
2795 // overhead to this.
2796 // TODO: Once we have extract/insert subvector cost we need to use them.
2797 if (LT.first > 1)
2798 return (LT.first * 2);
2799 else
2800 return (LT.first * 1);
2801 } else if (TLI->isOperationCustom(ISD, LT.second)) {
2802 // If the operation is custom lowered then assume
2803 // that the code is twice as expensive.
2804 return (LT.first * 2);
2805 }
2806
2807 switch (IID) {
2808 case Intrinsic::fmuladd: {
2809 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2810 // point mul followed by an add.
2811
2812 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2813 CostKind) +
2814 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2815 CostKind);
2816 }
2817 case Intrinsic::experimental_constrained_fmuladd: {
2818 IntrinsicCostAttributes FMulAttrs(
2819 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2820 IntrinsicCostAttributes FAddAttrs(
2821 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2822 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2823 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2824 }
2825 case Intrinsic::smin:
2826 case Intrinsic::smax:
2827 case Intrinsic::umin:
2828 case Intrinsic::umax: {
2829 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2830 Type *CondTy = RetTy->getWithNewBitWidth(1);
2831 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2832 CmpInst::Predicate Pred =
2833 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2835 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2836 Pred, CostKind);
2837 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2838 Pred, CostKind);
2839 return Cost;
2840 }
2841 case Intrinsic::sadd_with_overflow:
2842 case Intrinsic::ssub_with_overflow: {
2843 Type *SumTy = RetTy->getContainedType(0);
2844 Type *OverflowTy = RetTy->getContainedType(1);
2845 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2846 ? BinaryOperator::Add
2847 : BinaryOperator::Sub;
2848
2849 // Add:
2850 // Overflow -> (Result < LHS) ^ (RHS < 0)
2851 // Sub:
2852 // Overflow -> (Result < LHS) ^ (RHS > 0)
2854 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2855 Cost +=
2856 2 * thisT()->getCmpSelInstrCost(Instruction::ICmp, SumTy, OverflowTy,
2858 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2859 CostKind);
2860 return Cost;
2861 }
2862 case Intrinsic::uadd_with_overflow:
2863 case Intrinsic::usub_with_overflow: {
2864 Type *SumTy = RetTy->getContainedType(0);
2865 Type *OverflowTy = RetTy->getContainedType(1);
2866 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2867 ? BinaryOperator::Add
2868 : BinaryOperator::Sub;
2869 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2872
2874 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2875 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy,
2876 OverflowTy, Pred, CostKind);
2877 return Cost;
2878 }
2879 case Intrinsic::smul_with_overflow:
2880 case Intrinsic::umul_with_overflow: {
2881 Type *MulTy = RetTy->getContainedType(0);
2882 Type *OverflowTy = RetTy->getContainedType(1);
2883 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2884 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2885 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2886
2887 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2889
2891 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2892 Cost +=
2893 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2894 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2895 CCH, CostKind);
2896 Cost += thisT()->getArithmeticInstrCost(
2897 Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2899
2900 if (IsSigned)
2901 Cost += thisT()->getArithmeticInstrCost(
2902 Instruction::AShr, MulTy, CostKind,
2905
2906 Cost += thisT()->getCmpSelInstrCost(
2907 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2908 return Cost;
2909 }
2910 case Intrinsic::sadd_sat:
2911 case Intrinsic::ssub_sat: {
2912 // Assume a default expansion.
2913 Type *CondTy = RetTy->getWithNewBitWidth(1);
2914
2915 Type *OpTy = StructType::create({RetTy, CondTy});
2916 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2917 ? Intrinsic::sadd_with_overflow
2918 : Intrinsic::ssub_with_overflow;
2920
2921 // SatMax -> Overflow && SumDiff < 0
2922 // SatMin -> Overflow && SumDiff >= 0
2924 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2925 nullptr, ScalarizationCostPassed);
2926 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2927 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2928 Pred, CostKind);
2929 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2930 CondTy, Pred, CostKind);
2931 return Cost;
2932 }
2933 case Intrinsic::uadd_sat:
2934 case Intrinsic::usub_sat: {
2935 Type *CondTy = RetTy->getWithNewBitWidth(1);
2936
2937 Type *OpTy = StructType::create({RetTy, CondTy});
2938 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2939 ? Intrinsic::uadd_with_overflow
2940 : Intrinsic::usub_with_overflow;
2941
2943 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2944 nullptr, ScalarizationCostPassed);
2945 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2946 Cost +=
2947 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2949 return Cost;
2950 }
2951 case Intrinsic::smul_fix:
2952 case Intrinsic::umul_fix: {
2953 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2954 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2955
2956 unsigned ExtOp =
2957 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2959
2961 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2962 Cost +=
2963 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2964 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2965 CCH, CostKind);
2966 Cost += thisT()->getArithmeticInstrCost(
2967 Instruction::LShr, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2969 Cost += thisT()->getArithmeticInstrCost(
2970 Instruction::Shl, RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2972 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2973 return Cost;
2974 }
2975 case Intrinsic::abs: {
2976 // abs(X) = select(icmp(X,0),X,sub(0,X))
2977 Type *CondTy = RetTy->getWithNewBitWidth(1);
2980 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2981 Pred, CostKind);
2982 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2983 Pred, CostKind);
2984 // TODO: Should we add an OperandValueProperties::OP_Zero property?
2985 Cost += thisT()->getArithmeticInstrCost(
2986 BinaryOperator::Sub, RetTy, CostKind,
2988 return Cost;
2989 }
2990 case Intrinsic::fshl:
2991 case Intrinsic::fshr: {
2992 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
2993 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
2994 Type *CondTy = RetTy->getWithNewBitWidth(1);
2996 Cost +=
2997 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
2998 Cost +=
2999 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
3000 Cost +=
3001 thisT()->getArithmeticInstrCost(BinaryOperator::Shl, RetTy, CostKind);
3002 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
3003 CostKind);
3004 // Non-constant shift amounts requires a modulo. If the typesize is a
3005 // power-2 then this will be converted to an and, otherwise it will use a
3006 // urem.
3007 Cost += thisT()->getArithmeticInstrCost(
3008 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? BinaryOperator::And
3009 : BinaryOperator::URem,
3010 RetTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
3011 {TTI::OK_UniformConstantValue, TTI::OP_None});
3012 // Shift-by-zero handling.
3013 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
3015 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
3017 return Cost;
3018 }
3019 case Intrinsic::fptosi_sat:
3020 case Intrinsic::fptoui_sat: {
3021 if (Tys.empty())
3022 break;
3023 Type *FromTy = Tys[0];
3024 bool IsSigned = IID == Intrinsic::fptosi_sat;
3025
3027 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
3028 {FromTy, FromTy});
3029 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
3030 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
3031 {FromTy, FromTy});
3032 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
3033 Cost += thisT()->getCastInstrCost(
3034 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
3036 if (IsSigned) {
3037 Type *CondTy = RetTy->getWithNewBitWidth(1);
3038 Cost += thisT()->getCmpSelInstrCost(
3039 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3040 Cost += thisT()->getCmpSelInstrCost(
3041 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
3042 }
3043 return Cost;
3044 }
3045 case Intrinsic::ucmp:
3046 case Intrinsic::scmp: {
3047 Type *CmpTy = Tys[0];
3048 Type *CondTy = RetTy->getWithNewBitWidth(1);
3050 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3052 CostKind) +
3053 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, CmpTy, CondTy,
3055 CostKind);
3056
3057 EVT VT = TLI->getValueType(DL, CmpTy, true);
3059 // x < y ? -1 : (x > y ? 1 : 0)
3060 Cost += 2 * thisT()->getCmpSelInstrCost(
3061 BinaryOperator::Select, RetTy, CondTy,
3063 } else {
3064 // zext(x > y) - zext(x < y)
3065 Cost +=
3066 2 * thisT()->getCastInstrCost(CastInst::ZExt, RetTy, CondTy,
3068 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy,
3069 CostKind);
3070 }
3071 return Cost;
3072 }
3073 case Intrinsic::maximumnum:
3074 case Intrinsic::minimumnum: {
3075 // On platform that support FMAXNUM_IEEE/FMINNUM_IEEE, we expand
3076 // maximumnum/minimumnum to
3077 // ARG0 = fcanonicalize ARG0, ARG0 // to quiet ARG0
3078 // ARG1 = fcanonicalize ARG1, ARG1 // to quiet ARG1
3079 // RESULT = MAXNUM_IEEE ARG0, ARG1 // or MINNUM_IEEE
3080 // FIXME: In LangRef, we claimed FMAXNUM has the same behaviour of
3081 // FMAXNUM_IEEE, while the backend hasn't migrated the code yet.
3082 // Finally, we will remove FMAXNUM_IEEE and FMINNUM_IEEE.
3083 int IeeeISD =
3084 IID == Intrinsic::maximumnum ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
3085 if (TLI->isOperationLegal(IeeeISD, LT.second)) {
3086 IntrinsicCostAttributes FCanonicalizeAttrs(Intrinsic::canonicalize,
3087 RetTy, Tys[0]);
3088 InstructionCost FCanonicalizeCost =
3089 thisT()->getIntrinsicInstrCost(FCanonicalizeAttrs, CostKind);
3090 return LT.first + FCanonicalizeCost * 2;
3091 }
3092 break;
3093 }
3094 case Intrinsic::clmul: {
3095 // This cost model should match the expansion in
3096 // TargetLowering::expandCLMUL.
3097 InstructionCost PerBitCostMul =
3098 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind) +
3099 thisT()->getArithmeticInstrCost(Instruction::Mul, RetTy, CostKind) +
3100 thisT()->getArithmeticInstrCost(Instruction::Xor, RetTy, CostKind);
3101 InstructionCost PerBitCostBittest =
3102 thisT()->getArithmeticInstrCost(Instruction::And, RetTy, CostKind) +
3103 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, RetTy,
3105 thisT()->getCmpSelInstrCost(Instruction::ICmp, RetTy, RetTy,
3107 InstructionCost PerBitCost = std::min(PerBitCostMul, PerBitCostBittest);
3108 return RetTy->getScalarSizeInBits() * PerBitCost;
3109 }
3110 default:
3111 break;
3112 }
3113
3114 // Else, assume that we need to scalarize this intrinsic. For math builtins
3115 // this will emit a costly libcall, adding call overhead and spills. Make it
3116 // very expensive.
3117 if (isVectorizedTy(RetTy)) {
3118 ArrayRef<Type *> RetVTys = getContainedTypes(RetTy);
3119
3120 // Scalable vectors cannot be scalarized, so return Invalid.
3121 if (any_of(concat<Type *const>(RetVTys, Tys),
3122 [](Type *Ty) { return isa<ScalableVectorType>(Ty); }))
3124
3125 InstructionCost ScalarizationCost = ScalarizationCostPassed;
3126 if (!SkipScalarizationCost) {
3127 ScalarizationCost = 0;
3128 for (Type *RetVTy : RetVTys) {
3129 ScalarizationCost += getScalarizationOverhead(
3130 cast<VectorType>(RetVTy), /*Insert=*/true,
3131 /*Extract=*/false, CostKind);
3132 }
3133 }
3134
3135 unsigned ScalarCalls = getVectorizedTypeVF(RetTy).getFixedValue();
3136 SmallVector<Type *, 4> ScalarTys;
3137 for (Type *Ty : Tys) {
3138 if (Ty->isVectorTy())
3139 Ty = Ty->getScalarType();
3140 ScalarTys.push_back(Ty);
3141 }
3142 IntrinsicCostAttributes Attrs(IID, toScalarizedTy(RetTy), ScalarTys, FMF);
3143 InstructionCost ScalarCost =
3144 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
3145 for (Type *Ty : Tys) {
3146 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
3147 if (!ICA.skipScalarizationCost())
3148 ScalarizationCost += getScalarizationOverhead(
3149 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
3150 ScalarCalls = std::max(ScalarCalls,
3152 }
3153 }
3154 return ScalarCalls * ScalarCost + ScalarizationCost;
3155 }
3156
3157 // This is going to be turned into a library call, make it expensive.
3158 return SingleCallCost;
3159 }
3160
3161 /// Get memory intrinsic cost based on arguments.
3164 TTI::TargetCostKind CostKind) const override {
3165 unsigned Id = MICA.getID();
3166 Type *DataTy = MICA.getDataType();
3167 bool VariableMask = MICA.getVariableMask();
3168 Align Alignment = MICA.getAlignment();
3169
3170 switch (Id) {
3171 case Intrinsic::experimental_vp_strided_load:
3172 case Intrinsic::experimental_vp_strided_store: {
3173 unsigned Opcode = Id == Intrinsic::experimental_vp_strided_load
3174 ? Instruction::Load
3175 : Instruction::Store;
3176 // For a target without strided memory operations (or for an illegal
3177 // operation type on one which does), assume we lower to a gather/scatter
3178 // operation. (Which may in turn be scalarized.)
3179 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3180 VariableMask, true, CostKind);
3181 }
3182 case Intrinsic::masked_scatter:
3183 case Intrinsic::masked_gather:
3184 case Intrinsic::vp_scatter:
3185 case Intrinsic::vp_gather: {
3186 unsigned Opcode = (MICA.getID() == Intrinsic::masked_gather ||
3187 MICA.getID() == Intrinsic::vp_gather)
3188 ? Instruction::Load
3189 : Instruction::Store;
3190
3191 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3192 VariableMask, true, CostKind);
3193 }
3194 case Intrinsic::vp_load:
3195 case Intrinsic::vp_store:
3197 case Intrinsic::masked_load:
3198 case Intrinsic::masked_store: {
3199 unsigned Opcode =
3200 Id == Intrinsic::masked_load ? Instruction::Load : Instruction::Store;
3201 // TODO: Pass on AddressSpace when we have test coverage.
3202 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
3203 CostKind);
3204 }
3205 case Intrinsic::masked_compressstore:
3206 case Intrinsic::masked_expandload: {
3207 unsigned Opcode = MICA.getID() == Intrinsic::masked_expandload
3208 ? Instruction::Load
3209 : Instruction::Store;
3210 // Treat expand load/compress store as gather/scatter operation.
3211 // TODO: implement more precise cost estimation for these intrinsics.
3212 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment,
3213 VariableMask,
3214 /*IsGatherScatter*/ true, CostKind);
3215 }
3216 case Intrinsic::vp_load_ff:
3218 default:
3219 llvm_unreachable("unexpected intrinsic");
3220 }
3221 }
3222
3223 /// Compute a cost of the given call instruction.
3224 ///
3225 /// Compute the cost of calling function F with return type RetTy and
3226 /// argument types Tys. F might be nullptr, in this case the cost of an
3227 /// arbitrary call with the specified signature will be returned.
3228 /// This is used, for instance, when we estimate call of a vector
3229 /// counterpart of the given function.
3230 /// \param F Called function, might be nullptr.
3231 /// \param RetTy Return value types.
3232 /// \param Tys Argument types.
3233 /// \returns The cost of Call instruction.
3236 TTI::TargetCostKind CostKind) const override {
3237 return 10;
3238 }
3239
3240 unsigned getNumberOfParts(Type *Tp) const override {
3241 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
3242 if (!LT.first.isValid())
3243 return 0;
3244 // Try to find actual number of parts for non-power-of-2 elements as
3245 // ceil(num-of-elements/num-of-subtype-elements).
3246 if (auto *FTp = dyn_cast<FixedVectorType>(Tp);
3247 Tp && LT.second.isFixedLengthVector() &&
3248 !has_single_bit(FTp->getNumElements())) {
3249 if (auto *SubTp = dyn_cast_if_present<FixedVectorType>(
3250 EVT(LT.second).getTypeForEVT(Tp->getContext()));
3251 SubTp && SubTp->getElementType() == FTp->getElementType())
3252 return divideCeil(FTp->getNumElements(), SubTp->getNumElements());
3253 }
3254 return LT.first.getValue();
3255 }
3256
3259 TTI::TargetCostKind) const override {
3260 return 0;
3261 }
3262
3263 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
3264 /// We're assuming that reduction operation are performing the following way:
3265 ///
3266 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
3267 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
3268 /// \----------------v-------------/ \----------v------------/
3269 /// n/2 elements n/2 elements
3270 /// %red1 = op <n x t> %val, <n x t> val1
3271 /// After this operation we have a vector %red1 where only the first n/2
3272 /// elements are meaningful, the second n/2 elements are undefined and can be
3273 /// dropped. All other operations are actually working with the vector of
3274 /// length n/2, not n, though the real vector length is still n.
3275 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
3276 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
3277 /// \----------------v-------------/ \----------v------------/
3278 /// n/4 elements 3*n/4 elements
3279 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
3280 /// length n/2, the resulting vector has length n/4 etc.
3281 ///
3282 /// The cost model should take into account that the actual length of the
3283 /// vector is reduced on each iteration.
3286 // Targets must implement a default value for the scalable case, since
3287 // we don't know how many lanes the vector has.
3290
3291 Type *ScalarTy = Ty->getElementType();
3292 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3293 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
3294 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
3295 NumVecElts >= 2) {
3296 // Or reduction for i1 is represented as:
3297 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3298 // %res = cmp ne iReduxWidth %val, 0
3299 // And reduction for i1 is represented as:
3300 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
3301 // %res = cmp eq iReduxWidth %val, 11111
3302 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
3303 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
3305 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
3308 }
3309 unsigned NumReduxLevels = Log2_32(NumVecElts);
3310 InstructionCost ArithCost = 0;
3311 InstructionCost ShuffleCost = 0;
3312 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3313 unsigned LongVectorCount = 0;
3314 unsigned MVTLen =
3315 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3316 while (NumVecElts > MVTLen) {
3317 NumVecElts /= 2;
3318 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3319 ShuffleCost += thisT()->getShuffleCost(
3320 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3321 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
3322 Ty = SubTy;
3323 ++LongVectorCount;
3324 }
3325
3326 NumReduxLevels -= LongVectorCount;
3327
3328 // The minimal length of the vector is limited by the real length of vector
3329 // operations performed on the current platform. That's why several final
3330 // reduction operations are performed on the vectors with the same
3331 // architecture-dependent length.
3332
3333 // By default reductions need one shuffle per reduction level.
3334 ShuffleCost +=
3335 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3336 Ty, {}, CostKind, 0, Ty);
3337 ArithCost +=
3338 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
3339 return ShuffleCost + ArithCost +
3340 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3341 CostKind, 0, nullptr, nullptr);
3342 }
3343
3344 /// Try to calculate the cost of performing strict (in-order) reductions,
3345 /// which involves doing a sequence of floating point additions in lane
3346 /// order, starting with an initial value. For example, consider a scalar
3347 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
3348 ///
3349 /// Vector = <float %v0, float %v1, float %v2, float %v3>
3350 ///
3351 /// %add1 = %InitVal + %v0
3352 /// %add2 = %add1 + %v1
3353 /// %add3 = %add2 + %v2
3354 /// %add4 = %add3 + %v3
3355 ///
3356 /// As a simple estimate we can say the cost of such a reduction is 4 times
3357 /// the cost of a scalar FP addition. We can only estimate the costs for
3358 /// fixed-width vectors here because for scalable vectors we do not know the
3359 /// runtime number of operations.
3362 // Targets must implement a default value for the scalable case, since
3363 // we don't know how many lanes the vector has.
3366
3367 auto *VTy = cast<FixedVectorType>(Ty);
3369 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
3370 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
3371 Opcode, VTy->getElementType(), CostKind);
3372 ArithCost *= VTy->getNumElements();
3373
3374 return ExtractCost + ArithCost;
3375 }
3376
3379 std::optional<FastMathFlags> FMF,
3380 TTI::TargetCostKind CostKind) const override {
3381 assert(Ty && "Unknown reduction vector type");
3383 return getOrderedReductionCost(Opcode, Ty, CostKind);
3384 return getTreeReductionCost(Opcode, Ty, CostKind);
3385 }
3386
3387 /// Try to calculate op costs for min/max reduction operations.
3388 /// \param CondTy Conditional type for the Select instruction.
3391 TTI::TargetCostKind CostKind) const override {
3392 // Targets must implement a default value for the scalable case, since
3393 // we don't know how many lanes the vector has.
3396
3397 Type *ScalarTy = Ty->getElementType();
3398 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
3399 unsigned NumReduxLevels = Log2_32(NumVecElts);
3400 InstructionCost MinMaxCost = 0;
3401 InstructionCost ShuffleCost = 0;
3402 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
3403 unsigned LongVectorCount = 0;
3404 unsigned MVTLen =
3405 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
3406 while (NumVecElts > MVTLen) {
3407 NumVecElts /= 2;
3408 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
3409
3410 ShuffleCost += thisT()->getShuffleCost(
3411 TTI::SK_ExtractSubvector, SubTy, Ty, {}, CostKind, NumVecElts, SubTy);
3412
3413 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
3414 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
3415 Ty = SubTy;
3416 ++LongVectorCount;
3417 }
3418
3419 NumReduxLevels -= LongVectorCount;
3420
3421 // The minimal length of the vector is limited by the real length of vector
3422 // operations performed on the current platform. That's why several final
3423 // reduction opertions are perfomed on the vectors with the same
3424 // architecture-dependent length.
3425 ShuffleCost +=
3426 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
3427 Ty, {}, CostKind, 0, Ty);
3428 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
3429 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
3430 // The last min/max should be in vector registers and we counted it above.
3431 // So just need a single extractelement.
3432 return ShuffleCost + MinMaxCost +
3433 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
3434 CostKind, 0, nullptr, nullptr);
3435 }
3436
3438 getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
3439 VectorType *Ty, std::optional<FastMathFlags> FMF,
3440 TTI::TargetCostKind CostKind) const override {
3441 if (auto *FTy = dyn_cast<FixedVectorType>(Ty);
3442 FTy && IsUnsigned && Opcode == Instruction::Add &&
3443 FTy->getElementType() == IntegerType::getInt1Ty(Ty->getContext())) {
3444 // Represent vector_reduce_add(ZExt(<n x i1>)) as
3445 // ZExtOrTrunc(ctpop(bitcast <n x i1> to in)).
3446 auto *IntTy =
3447 IntegerType::get(ResTy->getContext(), FTy->getNumElements());
3448 IntrinsicCostAttributes ICA(Intrinsic::ctpop, IntTy, {IntTy},
3449 FMF ? *FMF : FastMathFlags());
3450 return thisT()->getCastInstrCost(Instruction::BitCast, IntTy, FTy,
3452 thisT()->getIntrinsicInstrCost(ICA, CostKind);
3453 }
3454 // Without any native support, this is equivalent to the cost of
3455 // vecreduce.opcode(ext(Ty A)).
3456 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3457 InstructionCost RedCost =
3458 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
3459 InstructionCost ExtCost = thisT()->getCastInstrCost(
3460 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3462
3463 return RedCost + ExtCost;
3464 }
3465
3467 getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy,
3468 VectorType *Ty,
3469 TTI::TargetCostKind CostKind) const override {
3470 // Without any native support, this is equivalent to the cost of
3471 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
3472 // vecreduce.add(mul(A, B)).
3473 assert((RedOpcode == Instruction::Add || RedOpcode == Instruction::Sub) &&
3474 "The reduction opcode is expected to be Add or Sub.");
3475 VectorType *ExtTy = VectorType::get(ResTy, Ty);
3476 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
3477 RedOpcode, ExtTy, std::nullopt, CostKind);
3478 InstructionCost ExtCost = thisT()->getCastInstrCost(
3479 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
3481
3482 InstructionCost MulCost =
3483 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
3484
3485 return RedCost + MulCost + 2 * ExtCost;
3486 }
3487
3489 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
3491 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
3493 std::optional<FastMathFlags> FMF) const override {
3494 unsigned EltSizeAcc = AccumType->getScalarSizeInBits();
3495 unsigned EltSizeInA = InputTypeA->getScalarSizeInBits();
3496 unsigned Ratio = EltSizeAcc / EltSizeInA;
3497 if (VF.getKnownMinValue() <= Ratio || VF.getKnownMinValue() % Ratio != 0 ||
3498 EltSizeAcc % EltSizeInA != 0 || (BinOp && InputTypeA != InputTypeB))
3500
3501 Type *InputVectorType = VectorType::get(InputTypeA, VF);
3502 Type *ExtInputVectorType = VectorType::get(AccumType, VF);
3503 Type *AccumVectorType =
3504 VectorType::get(AccumType, VF.divideCoefficientBy(Ratio));
3505
3506 InstructionCost ExtendCostA = 0;
3508 ExtendCostA = getCastInstrCost(
3510 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3511 CostKind);
3512
3513 // TODO: add cost of extracting subvectors from the source vector that
3514 // is to be partially reduced.
3515 InstructionCost ReductionOpCost =
3516 Ratio * getArithmeticInstrCost(Opcode, AccumVectorType, CostKind);
3517
3518 if (!BinOp)
3519 return ExtendCostA + ReductionOpCost;
3520
3521 InstructionCost ExtendCostB = 0;
3523 ExtendCostB = getCastInstrCost(
3525 ExtInputVectorType, InputVectorType, TTI::CastContextHint::None,
3526 CostKind);
3527 return ExtendCostA + ExtendCostB + ReductionOpCost +
3528 getArithmeticInstrCost(*BinOp, ExtInputVectorType, CostKind);
3529 }
3530
3532
3533 /// @}
3534};
3535
3536/// Concrete BasicTTIImpl that can be used if no further customization
3537/// is needed.
3538class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
3539 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
3540
3541 friend class BasicTTIImplBase<BasicTTIImpl>;
3542
3543 const TargetSubtargetInfo *ST;
3544 const TargetLoweringBase *TLI;
3545
3546 const TargetSubtargetInfo *getST() const { return ST; }
3547 const TargetLoweringBase *getTLI() const { return TLI; }
3548
3549public:
3550 explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
3551};
3552
3553} // end namespace llvm
3554
3555#endif // LLVM_CODEGEN_BASICTTIIMPL_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
#define X(NUM, ENUM, NAME)
Definition ELF.h:851
This file implements the BitVector class.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
static const Function * getCalledFunction(const Value *V)
#define T
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
#define P(N)
static unsigned getNumElements(Type *Ty)
static Type * getValueType(Value *V, bool LookThroughCmp=false)
Returns the "element type" of the given value/instruction V.
This file contains some templates that are useful if you are working with the STL at all.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition APInt.h:235
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition APInt.h:1345
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition APInt.h:1208
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition APInt.h:1503
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition APInt.h:1137
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition APInt.h:201
an instruction to allocate memory on the stack
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition ArrayRef.h:195
size_t size() const
size - Get the array size.
Definition ArrayRef.h:142
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition ArrayRef.h:201
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition BasicBlock.h:62
InstructionCost getFPOpCost(Type *Ty) const override
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const override
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false) const override
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind) const override
Try to calculate op costs for min/max reduction operations.
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty) const override
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const override
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override
bool shouldBuildLookupTables() const override
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isProfitableToHoist(Instruction *I) const override
unsigned getNumberOfParts(Type *Tp) const override
unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const override
bool useAA() const override
unsigned getPrefetchDistance() const override
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *SrcTy, int &Index, VectorType *&SubTy) const
InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction's operands.
bool isLegalAddScalableImmediate(int64_t Imm) const override
unsigned getAssumedAddrSpace(const Value *V) const override
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const override
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0) const override
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override
bool areInlineCompatible(const Function *Caller, const Function *Callee) const override
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty) const override
bool haveFastSqrt(Type *Ty) const override
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const override
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const override
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const override
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy, Align Alignment, unsigned AddrSpace) const override
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const override
unsigned adjustInliningThreshold(const CallBase *CB) const override
unsigned getInliningThresholdMultiplier() const override
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
Estimate the overhead of scalarizing an instruction.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Scalar, ArrayRef< std::tuple< Value *, User *, int > > ScalarUserAndIdx, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
bool shouldBuildRelLookupTables() const override
bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const override
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Op2Info={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace) const override
unsigned getEpilogueVectorizationMinVF() const override
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const override
InstructionCost getVectorSplitCost() const
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
std::optional< unsigned > getMaxVScale() const override
unsigned getFlatAddressSpace() const override
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const override
Compute a cost of the given call instruction.
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const override
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
~BasicTTIImplBase() override=default
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
unsigned getMaxPrefetchIterationsAhead() const override
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP) const override
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
Get intrinsic cost based on argument types.
bool hasBranchDivergence(const Function *F=nullptr) const override
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const override
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const override
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const override
bool shouldPrefetchAddressSpace(unsigned AS) const override
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const override
unsigned getCacheLineSize() const override
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override
bool shouldDropLSRSolutionIfLessProfitable() const override
int getInlinerVectorBonusPercent() const override
InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind) const override
InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const override
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const override
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, TTI::PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const override
bool isLegalAddImmediate(int64_t imm) const override
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const override
unsigned getMaxInterleaveFactor(ElementCount VF) const override
bool isSingleThreaded() const override
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const override
bool isProfitableLSRChainElement(Instruction *I) const override
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override
bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override
bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const override
std::optional< unsigned > getVScaleForTuning() const override
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind) const override
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const override
Get intrinsic cost based on arguments.
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const override
InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *, TTI::TargetCostKind) const override
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const override
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
TailFoldingStyle getPreferredTailFoldingStyle() const override
std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const override
bool isLegalICmpImmediate(int64_t imm) const override
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const override
unsigned getRegUsageForType(Type *Ty) const override
InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override
Get memory intrinsic cost based on arguments.
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr) const override
bool isTypeLegal(Type *Ty) const override
bool enableWritePrefetching() const override
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const override
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
bool isNumRegsMajorCostOfLSR() const override
BasicTTIImpl(const TargetMachine *TM, const Function &F)
size_type count() const
count - Returns the number of bits which are set.
Definition BitVector.h:181
BitVector & set()
Definition BitVector.h:370
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Definition InstrTypes.h:986
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:676
@ ICMP_SLE
signed less or equal
Definition InstrTypes.h:706
@ ICMP_UGT
unsigned greater than
Definition InstrTypes.h:699
@ ICMP_SGT
signed greater than
Definition InstrTypes.h:703
@ ICMP_ULT
unsigned less than
Definition InstrTypes.h:701
@ ICMP_NE
not equal
Definition InstrTypes.h:698
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition InstrTypes.h:686
static CmpInst::Predicate getGTPredicate(Intrinsic::ID ID)
static CmpInst::Predicate getLTPredicate(Intrinsic::ID ID)
This class represents a range of values.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
constexpr bool isVector() const
One or more elements.
Definition TypeSize.h:324
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition TypeSize.h:309
constexpr bool isScalar() const
Exactly one element.
Definition TypeSize.h:320
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Container class for subtarget features.
Class to represent fixed width SIMD vectors.
unsigned getNumElements() const
static LLVM_ABI FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition Type.cpp:873
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition Function.h:354
The core instruction combiner logic.
static InstructionCost getInvalid(CostType Val=0)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
static LLVM_ABI IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition Type.cpp:354
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
const FeatureBitset & getFeatureBits() const
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
Information for memory intrinsic cost model.
The optimization diagnostic interface.
LLVM_ABI void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static LLVM_ABI PointerType * get(Type *ElementType, unsigned AddressSpace)
This constructs a pointer to an object of the specified type in a numbered address space.
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static LLVM_ABI bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static LLVM_ABI bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static LLVM_ABI bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static LLVM_ABI bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static LLVM_ABI bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static LLVM_ABI bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static LLVM_ABI bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
static StackOffset getScalable(int64_t Scalable)
Definition TypeSize.h:40
static StackOffset getFixed(int64_t Fixed)
Definition TypeSize.h:39
static LLVM_ABI StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition Type.cpp:689
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool preferSelectsOverBooleanArithmetic(EVT VT) const
Should we prefer selects to doing arithmetic on boolean types.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
bool isOperationCustom(unsigned Op, EVT VT) const
Return true if the operation uses custom lowering, regardless of whether the type is legal or not.
bool isSuitableForBitTests(const DenseMap< const BasicBlock *, unsigned int > &DestCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
LegalizeAction getLoadAction(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isLoadLegal(EVT ValVT, EVT MemVT, Align Alignment, unsigned AddrSpace, unsigned ExtType, bool Atomic) const
Return true if the specified load with extension is legal on this target.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
bool isPositionIndependent() const
const Triple & getTargetTriple() const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
CodeModel::Model getCodeModel() const
Returns the code model.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual bool isProfitableLSRChainElement(Instruction *I) const
virtual TailFoldingStyle getPreferredTailFoldingStyle() const
virtual const DataLayout & getDataLayout() const
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
virtual std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
virtual bool shouldDropLSRSolutionIfLessProfitable() const
virtual bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
virtual std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
virtual std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
virtual unsigned getEpilogueVectorizationMinVF() const
virtual InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
virtual bool isLoweredToCall(const Function *F) const
virtual InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
virtual InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
virtual bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
virtual InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info, TTI::OperandValueInfo Op2Info, const Instruction *I) const
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind) const override
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
VectorInstrContext
Represents a hint about the context in which an insert/extract is used.
@ None
The insert/extract is not used with a load/store.
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
static LLVM_ABI Instruction::CastOps getOpcodeForPartialReductionExtendKind(PartialReductionExtendKind Kind)
Get the cast opcode for an extension kind.
MemIndexedMode
The type of load/store indexing.
static VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:47
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:427
LLVM_ABI bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition Triple.cpp:1827
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, DriverKit, XROS, or bridgeOS).
Definition Triple.h:646
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition TypeSize.h:343
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
bool isVectorTy() const
True if this is an instance of VectorType.
Definition Type.h:290
bool isPointerTy() const
True if this is an instance of PointerType.
Definition Type.h:284
LLVM_ABI unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
static LLVM_ABI IntegerType * getInt8Ty(LLVMContext &C)
Definition Type.cpp:311
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:370
LLVM_ABI Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVM_ABI Type * getWithNewType(Type *EltTy) const
Given vector type, change the element type, whilst keeping the old number of elements.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition Type.h:130
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Definition Type.cpp:236
static LLVM_ABI IntegerType * getInt1Ty(LLVMContext &C)
Definition Type.cpp:310
static LLVM_ABI IntegerType * getIntNTy(LLVMContext &C, unsigned N)
Definition Type.cpp:317
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition Type.h:227
Type * getContainedType(unsigned i) const
This method is used to implement the type iterator (defined at the end of the file).
Definition Type.h:399
bool isVoidTy() const
Return true if this is 'void'.
Definition Type.h:141
Value * getOperand(unsigned i) const
Definition User.h:207
static LLVM_ABI bool isVPBinOp(Intrinsic::ID ID)
static LLVM_ABI bool isVPCast(Intrinsic::ID ID)
static LLVM_ABI bool isVPCmp(Intrinsic::ID ID)
static LLVM_ABI std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static LLVM_ABI std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static LLVM_ABI bool isVPIntrinsic(Intrinsic::ID)
static LLVM_ABI bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:255
Base class of all SIMD vector types.
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
static LLVM_ABI VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Type * getElementType() const
constexpr ScalarTy getFixedValue() const
Definition TypeSize.h:200
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition TypeSize.h:216
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition TypeSize.h:168
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition TypeSize.h:252
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
LLVM_ABI APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition APInt.cpp:3049
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:779
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:518
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:747
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:774
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:541
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:796
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:727
@ MASKED_UDIV
Masked vector arithmetic that returns poison on disabled lanes.
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:805
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:735
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:945
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:534
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI bool isTargetIntrinsic(ID IID)
isTargetIntrinsic - Returns true if IID is an intrinsic specific to a certain target.
LLVM_ABI Libcall getSINCOSPI(EVT RetVT)
getSINCOSPI - Return the SINCOSPI_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getMODF(EVT VT)
getMODF - Return the MODF_* value for the given types, or UNKNOWN_LIBCALL if there is none.
LLVM_ABI Libcall getSINCOS(EVT RetVT)
getSINCOS - Return the SINCOS_* value for the given types, or UNKNOWN_LIBCALL if there is none.
DiagnosticInfoOptimizationBase::Argument NV
friend class Instruction
Iterator for Instructions in a `BasicBlock.
Definition BasicBlock.h:73
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1739
LLVM_ABI Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
detail::zippy< detail::zip_first, T, U, Args... > zip_equal(T &&t, U &&u, Args &&...args)
zip iterator that assumes that all iteratees have the same length.
Definition STLExtras.h:841
InstructionCost Cost
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition STLExtras.h:2554
Type * toScalarizedTy(Type *Ty)
A helper for converting vectorized types to scalarized (non-vector) types.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
LLVM_ABI unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
bool isVectorizedTy(Type *Ty)
Returns true if Ty is a vector type or a struct of vector types where all vector types share the same...
detail::concat_range< ValueT, RangeTs... > concat(RangeTs &&...Ranges)
Returns a concatenated range across two or more ranges.
Definition STLExtras.h:1152
auto dyn_cast_or_null(const Y &Val)
Definition Casting.h:753
constexpr bool has_single_bit(T Value) noexcept
Definition bit.h:147
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1746
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition MathExtras.h:331
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition MathExtras.h:279
ElementCount getVectorizedTypeVF(Type *Ty)
Returns the number of vector elements for a vectorized type.
LLVM_ABI ConstantRange getVScaleRange(const Function *F, unsigned BitWidth)
Determine the possible constant range of vscale with the given bit width, based on the vscale_range f...
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
constexpr int PoisonMaskElem
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition MathExtras.h:394
FunctionAddr VTableAddr uintptr_t uintptr_t Data
Definition InstrProf.h:221
@ UMin
Unsigned integer min implemented in terms of select(cmp()).
@ UMax
Unsigned integer max implemented in terms of select(cmp()).
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
constexpr unsigned BitWidth
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
ArrayRef< Type * > getContainedTypes(Type *const &Ty)
Returns the types contained in Ty.
cl::opt< unsigned > PartialUnrollingThreshold
LLVM_ABI bool isVectorizedStructTy(StructType *StructTy)
Returns true if StructTy is an unpacked literal struct where all elements are vectors of matching ele...
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
Extended Value Type.
Definition ValueTypes.h:35
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition ValueTypes.h:145
ElementCount getVectorElementCount() const
Definition ValueTypes.h:358
static LLVM_ABI EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition ValueTypes.h:324
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition ValueTypes.h:61
LLVM_ABI Type * getTypeForEVT(LLVMContext &Context) const
This method returns an LLVM type corresponding to the specified EVT.
Attributes of a target dependent hardware loop.
static bool hasVectorMaskArgument(RTLIB::LibcallImpl Impl)
Returns true if the function has a vector mask argument, which is assumed to be the last argument.
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).