SILowerI1Copies.cpp File Reference

#include "SILowerI1Copies.h"
#include "AMDGPU.h"
#include "llvm/CodeGen/MachineSSAUpdater.h"
#include "llvm/InitializePasses.h"
#include "llvm/Target/CGPassBuilderOption.h"

Go to the source code of this file.

Classes
class	SILowerI1CopiesLegacy

Macros
#define	DEBUG_TYPE   "si-i1-copies"

Functions
static Register	insertUndefLaneMask (MachineBasicBlock *MBB, MachineRegisterInfo *MRI, MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs)
static bool	isVRegCompatibleReg (const SIRegisterInfo &TRI, const MachineRegisterInfo &MRI, Register Reg)
static void	instrDefsUsesSCC (const MachineInstr &MI, bool &Def, bool &Use)
static bool	runFixI1Copies (MachineFunction &MF, MachineDominatorTree &MDT, MachinePostDominatorTree &MPDT)
	Lower all instructions that def or use vreg_1 registers.
	INITIALIZE_PASS_BEGIN (SILowerI1CopiesLegacy, DEBUG_TYPE, "SI Lower i1 Copies", false, false) INITIALIZE_PASS_END(SILowerI1CopiesLegacy

Variables
	DEBUG_TYPE
SI Lower i1	Copies
SI Lower i1	false

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "si-i1-copies"

Definition at line 30 of file SILowerI1Copies.cpp.

Function Documentation

INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN	(	SILowerI1CopiesLegacy	,
		DEBUG_TYPE	,
		"SI Lower i1 Copies"	,
		false	,
		false
	)

insertUndefLaneMask()

static Register insertUndefLaneMask ( MachineBasicBlock *  MBB, MachineRegisterInfo *  MRI, MachineRegisterInfo::VRegAttrs  LaneMaskRegAttrs  )

static

Definition at line 387 of file SILowerI1Copies.cpp.

References llvm::BuildMI(), llvm::createLaneMaskReg(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), MBB, MRI, and TII.

Referenced by llvm::PhiLoweringHelper::lowerPhis().

instrDefsUsesSCC()

static void instrDefsUsesSCC ( const MachineInstr &  MI, bool &  Def, bool &  Use  )

static

Definition at line 707 of file SILowerI1Copies.cpp.

References MI.

Referenced by llvm::PhiLoweringHelper::getSaluInsertionAtEnd().

isVRegCompatibleReg()

static bool isVRegCompatibleReg ( const SIRegisterInfo &  TRI, const MachineRegisterInfo &  MRI, Register  Reg  )

static

Definition at line 399 of file SILowerI1Copies.cpp.

References MRI, Size, and TRI.

runFixI1Copies()

static bool runFixI1Copies ( MachineFunction &  MF, MachineDominatorTree &  MDT, MachinePostDominatorTree &  MPDT  )

static

Lower all instructions that def or use vreg_1 registers.

In a first pass, we lower COPYs from vreg_1 to vector registers, as can occur around inline assembly. We do this first, before vreg_1 registers are changed to scalar mask registers.

Then we lower all defs of vreg_1 registers. Phi nodes are lowered before all others, because phi lowering looks through copies and can therefore often make copy lowering unnecessary.

Definition at line 867 of file SILowerI1Copies.cpp.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::Selected.

Referenced by llvm::SILowerI1CopiesPass::run(), and SILowerI1CopiesLegacy::runOnMachineFunction().

Variable Documentation

Copies

SI Lower i1 Copies

Definition at line 930 of file SILowerI1Copies.cpp.

Referenced by propagateLocalCopies(), llvm::rdf::CopyPropagation::run(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

DEBUG_TYPE

DEBUG_TYPE

Definition at line 930 of file SILowerI1Copies.cpp.

false

SI Lower i1 false

Definition at line 931 of file SILowerI1Copies.cpp.