LLVM 20.0.0git
Public Member Functions | List of all members
llvm::LanaiInstrInfo Class Reference

#include "Target/Lanai/LanaiInstrInfo.h"

Inheritance diagram for llvm::LanaiInstrInfo:
Inheritance graph
[legend]

Public Member Functions

 LanaiInstrInfo ()
 
virtual const LanaiRegisterInfogetRegisterInfo () const
 
bool areMemAccessesTriviallyDisjoint (const MachineInstr &MIa, const MachineInstr &MIb) const override
 
Register isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 
Register isLoadFromStackSlotPostFE (const MachineInstr &MI, int &FrameIndex) const override
 
Register isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
 
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, const DebugLoc &DL, MCRegister DestinationRegister, MCRegister SourceRegister, bool KillSource) const override
 
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, Register SourceRegister, bool IsKill, int FrameIndex, const TargetRegisterClass *RegisterClass, const TargetRegisterInfo *RegisterInfo, Register VReg) const override
 
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, Register DestinationRegister, int FrameIndex, const TargetRegisterClass *RegisterClass, const TargetRegisterInfo *RegisterInfo, Register VReg) const override
 
bool expandPostRAPseudo (MachineInstr &MI) const override
 
bool getMemOperandsWithOffsetWidth (const MachineInstr &LdSt, SmallVectorImpl< const MachineOperand * > &BaseOps, int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, const TargetRegisterInfo *TRI) const override
 
bool getMemOperandWithOffsetWidth (const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, LocationSize &Width, const TargetRegisterInfo *TRI) const
 
std::pair< unsigned, unsigneddecomposeMachineOperandsTargetFlags (unsigned TF) const override
 
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags () const override
 
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TrueBlock, MachineBasicBlock *&FalseBlock, SmallVectorImpl< MachineOperand > &Condition, bool AllowModify) const override
 
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
 
bool analyzeCompare (const MachineInstr &MI, Register &SrcReg, Register &SrcReg2, int64_t &CmpMask, int64_t &CmpValue) const override
 
bool optimizeCompareInstr (MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, int64_t CmpValue, const MachineRegisterInfo *MRI) const override
 
bool analyzeSelect (const MachineInstr &MI, SmallVectorImpl< MachineOperand > &Cond, unsigned &TrueOp, unsigned &FalseOp, bool &Optimizable) const override
 
MachineInstroptimizeSelect (MachineInstr &MI, SmallPtrSetImpl< MachineInstr * > &SeenMIs, bool PreferFalse) const override
 
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Condition) const override
 
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock, MachineBasicBlock *FalseBlock, ArrayRef< MachineOperand > Condition, const DebugLoc &DL, int *BytesAdded=nullptr) const override
 

Detailed Description

Definition at line 25 of file LanaiInstrInfo.h.

Constructor & Destructor Documentation

◆ LanaiInstrInfo()

LanaiInstrInfo::LanaiInstrInfo ( )

Definition at line 30 of file LanaiInstrInfo.cpp.

Member Function Documentation

◆ analyzeBranch()

bool LanaiInstrInfo::analyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TrueBlock,
MachineBasicBlock *&  FalseBlock,
SmallVectorImpl< MachineOperand > &  Condition,
bool  AllowModify 
) const
override

◆ analyzeCompare()

bool LanaiInstrInfo::analyzeCompare ( const MachineInstr MI,
Register SrcReg,
Register SrcReg2,
int64_t &  CmpMask,
int64_t &  CmpValue 
) const
override

Definition at line 178 of file LanaiInstrInfo.cpp.

References MI.

◆ analyzeSelect()

bool LanaiInstrInfo::analyzeSelect ( const MachineInstr MI,
SmallVectorImpl< MachineOperand > &  Cond,
unsigned TrueOp,
unsigned FalseOp,
bool Optimizable 
) const
override

Definition at line 438 of file LanaiInstrInfo.cpp.

References assert(), Cond, and MI.

◆ areMemAccessesTriviallyDisjoint()

bool LanaiInstrInfo::areMemAccessesTriviallyDisjoint ( const MachineInstr MIa,
const MachineInstr MIb 
) const
override

◆ copyPhysReg()

void LanaiInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  Position,
const DebugLoc DL,
MCRegister  DestinationRegister,
MCRegister  SourceRegister,
bool  KillSource 
) const
override

◆ decomposeMachineOperandsTargetFlags()

std::pair< unsigned, unsigned > LanaiInstrInfo::decomposeMachineOperandsTargetFlags ( unsigned  TF) const
override

Definition at line 164 of file LanaiInstrInfo.cpp.

◆ expandPostRAPseudo()

bool LanaiInstrInfo::expandPostRAPseudo ( MachineInstr MI) const
override

Definition at line 120 of file LanaiInstrInfo.cpp.

◆ getMemOperandsWithOffsetWidth()

bool LanaiInstrInfo::getMemOperandsWithOffsetWidth ( const MachineInstr LdSt,
SmallVectorImpl< const MachineOperand * > &  BaseOps,
int64_t &  Offset,
bool OffsetIsScalable,
LocationSize Width,
const TargetRegisterInfo TRI 
) const
override

◆ getMemOperandWithOffsetWidth()

bool LanaiInstrInfo::getMemOperandWithOffsetWidth ( const MachineInstr LdSt,
const MachineOperand *&  BaseOp,
int64_t &  Offset,
LocationSize Width,
const TargetRegisterInfo TRI 
) const

◆ getRegisterInfo()

virtual const LanaiRegisterInfo & llvm::LanaiInstrInfo::getRegisterInfo ( ) const
inlinevirtual

◆ getSerializableDirectMachineOperandTargetFlags()

ArrayRef< std::pair< unsigned, const char * > > LanaiInstrInfo::getSerializableDirectMachineOperandTargetFlags ( ) const
override

Definition at line 169 of file LanaiInstrInfo.cpp.

◆ insertBranch()

unsigned LanaiInstrInfo::insertBranch ( MachineBasicBlock MBB,
MachineBasicBlock TrueBlock,
MachineBasicBlock FalseBlock,
ArrayRef< MachineOperand Condition,
const DebugLoc DL,
int *  BytesAdded = nullptr 
) const
override

◆ isLoadFromStackSlot()

Register LanaiInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
override

Definition at line 714 of file LanaiInstrInfo.cpp.

References MI.

Referenced by isLoadFromStackSlotPostFE().

◆ isLoadFromStackSlotPostFE()

Register LanaiInstrInfo::isLoadFromStackSlotPostFE ( const MachineInstr MI,
int &  FrameIndex 
) const
override

◆ isStoreToStackSlot()

Register LanaiInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int &  FrameIndex 
) const
override

Definition at line 743 of file LanaiInstrInfo.cpp.

References MI.

◆ loadRegFromStackSlot()

void LanaiInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  Position,
Register  DestinationRegister,
int  FrameIndex,
const TargetRegisterClass RegisterClass,
const TargetRegisterInfo RegisterInfo,
Register  VReg 
) const
override

◆ optimizeCompareInstr()

bool LanaiInstrInfo::optimizeCompareInstr ( MachineInstr CmpInstr,
Register  SrcReg,
Register  SrcReg2,
int64_t  CmpMask,
int64_t  CmpValue,
const MachineRegisterInfo MRI 
) const
override

◆ optimizeSelect()

MachineInstr * LanaiInstrInfo::optimizeSelect ( MachineInstr MI,
SmallPtrSetImpl< MachineInstr * > &  SeenMIs,
bool  PreferFalse 
) const
override

◆ removeBranch()

unsigned LanaiInstrInfo::removeBranch ( MachineBasicBlock MBB,
int *  BytesRemoved = nullptr 
) const
override

◆ reverseBranchCondition()

bool LanaiInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Condition) const
override

◆ storeRegToStackSlot()

void LanaiInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  Position,
Register  SourceRegister,
bool  IsKill,
int  FrameIndex,
const TargetRegisterClass RegisterClass,
const TargetRegisterInfo RegisterInfo,
Register  VReg 
) const
override

The documentation for this class was generated from the following files: