LLVM 22.0.0git
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#include "llvm/CodeGen/TargetLowering.h"
Public Member Functions | |
DAGCombinerInfo (SelectionDAG &dag, CombineLevel level, bool cl, void *dc) | |
bool | isBeforeLegalize () const |
bool | isBeforeLegalizeOps () const |
bool | isAfterLegalizeDAG () const |
CombineLevel | getDAGCombineLevel () |
bool | isCalledByLegalizer () const |
LLVM_ABI void | AddToWorklist (SDNode *N) |
LLVM_ABI SDValue | CombineTo (SDNode *N, ArrayRef< SDValue > To, bool AddTo=true) |
LLVM_ABI SDValue | CombineTo (SDNode *N, SDValue Res, bool AddTo=true) |
LLVM_ABI SDValue | CombineTo (SDNode *N, SDValue Res0, SDValue Res1, bool AddTo=true) |
LLVM_ABI bool | recursivelyDeleteUnusedNodes (SDNode *N) |
LLVM_ABI void | CommitTargetLoweringOpt (const TargetLoweringOpt &TLO) |
Public Attributes | |
void * | DC |
CombineLevel | Level |
bool | CalledByLegalizer |
SelectionDAG & | DAG |
Definition at line 4398 of file TargetLowering.h.
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Definition at line 4406 of file TargetLowering.h.
References CalledByLegalizer, DAG, DC, and Level.
void TargetLowering::DAGCombinerInfo::AddToWorklist | ( | SDNode * | N | ) |
Definition at line 934 of file DAGCombiner.cpp.
Referenced by combineAnd(), combineAndnp(), combineBT(), combineCVTPH2PS(), combineGatherScatter(), combineMaskedLoad(), combineMaskedStore(), combineOp_VLToVWOp_VL(), combineOr(), combineVEXTRACT_STORE(), combineVSelectToBLENDV(), combineX86GatherScatter(), distributeOpThroughSelect(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), llvm::AMDGPUTargetLowering::foldFreeOpFromSelect(), PerformARMBUILD_VECTORCombine(), PerformBUILD_VECTORCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), PerformInsertEltCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), PerformSTORECombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), and llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl().
SDValue TargetLowering::DAGCombinerInfo::CombineTo | ( | SDNode * | N, |
ArrayRef< SDValue > | To, | ||
bool | AddTo = true ) |
Definition at line 938 of file DAGCombiner.cpp.
References DC, N, and llvm::ArrayRef< T >::size().
Referenced by combineADC(), combineBROADCAST_LOAD(), combineConstantPoolLoads(), combineCVTP2I_CVTTP2I(), combineCVTPH2PS(), combineExtractVectorElt(), combineINSERT_SUBVECTOR(), combineLoad(), combineMaskedLoadConstantMask(), combineSext(), combineTargetShuffle(), CombineVLDDUP(), combineX86AddSub(), combineX86INT_TO_FP(), combineX86SubCmpForFlags(), combineZext(), DAGCombineAddc(), performActiveLaneMaskCombine(), PerformAddcSubcCombine(), performBRCONDCombine(), performCSELCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), PerformExtractEltToVMOVRRD(), performFlagSettingCombine(), performFPExtendCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulLoHiCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), PerformORCombineToBFI(), performPostLD1Combine(), performSignExtendInRegCombine(), performSPLIT_PAIR_F64Combine(), performVectorDeinterleaveCombine(), PerformVMOVRRDCombine(), reduceANDOfAtomicLoad(), reduceMaskedLoadToScalarLoad(), and TryCombineBaseUpdate().
Definition at line 943 of file DAGCombiner.cpp.
SDValue TargetLowering::DAGCombinerInfo::CombineTo | ( | SDNode * | N, |
SDValue | Res0, | ||
SDValue | Res1, | ||
bool | AddTo = true ) |
Definition at line 948 of file DAGCombiner.cpp.
void TargetLowering::DAGCombinerInfo::CommitTargetLoweringOpt | ( | const TargetLoweringOpt & | TLO | ) |
Definition at line 958 of file DAGCombiner.cpp.
References DC.
Referenced by combineVSelectToBLENDV(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifyDemandedVectorElts().
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Definition at line 4412 of file TargetLowering.h.
References Level.
Referenced by llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), and llvm::AMDGPUTargetLowering::PerformDAGCombine().
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Definition at line 4411 of file TargetLowering.h.
References llvm::AfterLegalizeDAG, and Level.
Referenced by combineAnd(), combineAndnp(), combineBitcast(), combineExtractFromVectorLoad(), combineFP_EXTEND(), combinePackingMovIntoStore(), llvm::VETargetLowering::combineSelect(), llvm::VETargetLowering::combineSelectCC(), combineShiftRightLogical(), llvm::VETargetLowering::combineTRUNCATE(), combineUnpackingMovIntoLoad(), combineVectorInsert(), performANDCombine(), PerformBUILD_VECTORCombine(), performCSELCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performDUPCombine(), PerformExtractEltToVMOVRRD(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performORCombine(), performSETCCCombine(), performSetccMergeZeroCombine(), performSHLCombine(), performSIGN_EXTEND_INREGCombine(), performSVEMulAddSubCombine(), and performTruncateCombine().
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Definition at line 4409 of file TargetLowering.h.
References llvm::BeforeLegalizeTypes, and Level.
Referenced by AddCombineBUILD_VECTORToVPADDL(), CombineANDShift(), combineBitcast(), combineBITREVERSE(), combineCMov(), combineExtractVectorElt(), combineGatherScatter(), combineINTRINSIC_VOID(), combineINTRINSIC_W_CHAIN(), combineINTRINSIC_WO_CHAIN(), combineLOAD(), combineLoad(), combineMul(), combineOp_VLToVWOp_VL(), combineOrCmpEqZeroToCtlzSrl(), combineSelect(), combineSetCC(), combineSIntToFP(), combineSTORE(), combineStore(), combineVSelectToBLENDV(), expandMul(), legalizeScatterGatherIndexType(), performActiveLaneMaskCombine(), performADDCombine(), PerformADDECombine(), performANDSETCCCombine(), performBitcastCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), performEXTRACT_VECTOR_ELTCombine(), performExtractLastActiveCombine(), performFirstTrueTestVectorCombine(), performLastTrueTestVectorCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), performMaskedGatherScatterCombine(), PerformMULCombine(), performMulCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), performSelectCombine(), performSETCCCombine(), performSETCCCombine(), PerformShiftCombine(), PerformSHLSimplify(), llvm::AMDGPUTargetLowering::performStoreCombine(), performVecReduceBitwiseCombine(), performVectorDeinterleaveCombine(), PerformVLDCombine(), scalarizeExtEltFP(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), sinkProxyReg(), and tryConvertSVEWideCompare().
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Definition at line 4410 of file TargetLowering.h.
References llvm::AfterLegalizeVectorOps, and Level.
Referenced by combineAnd(), combineCastedMaskArithmetic(), combineCMov(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineExtractWithShuffle(), combineFMA(), combineFMADDSUB(), combineFneg(), combineGatherScatter(), combineINSERT_SUBVECTOR(), combineLoad(), combineOr(), combineSelect(), combineSext(), combineStore(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineVSelectToBLENDV(), combineXor(), combineZext(), convertIntLogicToFPLogic(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), performADDCombine(), performAddSubLongCombine(), performANDCombine(), performANDCombine(), performBITCASTCombine(), performBITREV_WCombine(), performCMovFPCombine(), performConcatVectorsCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::HexagonTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), performDivRemCombine(), performExtendCombine(), performExtractSubvectorCombine(), performFPExtendCombine(), performMulCombine(), performORCombine(), performORCombine(), performPostLD1Combine(), performScalarToVectorCombine(), performSELECTCombine(), performSHLCombine(), performSHLCombine(), performSignExtendInRegCombine(), performSRLCombine(), performSUBCombine(), performSVEAndCombine(), performXorCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineMULLWithUZP1(), and tryToReplaceScalarFPConversionWithSVE().
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Definition at line 4413 of file TargetLowering.h.
References CalledByLegalizer.
Referenced by CombineANDShift(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), combineMul(), expandMul(), performADDCombine(), PerformMULCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), PerformShiftCombine(), PerformVLDCombine(), and llvm::TargetLowering::SimplifySetCC().
Definition at line 953 of file DAGCombiner.cpp.
Referenced by combineCVTP2I_CVTTP2I(), combineCVTPH2PS(), combineTargetShuffle(), combineX86INT_TO_FP(), llvm::RISCVTargetLowering::PerformDAGCombine(), and reduceANDOfAtomicLoad().
bool llvm::TargetLowering::DAGCombinerInfo::CalledByLegalizer |
Definition at line 4401 of file TargetLowering.h.
Referenced by DAGCombinerInfo(), and isCalledByLegalizer().
SelectionDAG& llvm::TargetLowering::DAGCombinerInfo::DAG |
Definition at line 4404 of file TargetLowering.h.
Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64BitSMLAL16(), AddCombineTo64bitUMAAL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), CombineANDShift(), CombineBaseUpdate(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacy(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), combineLOAD(), combineMADConstOne(), combineMulSelectConstOne(), combineMulWide(), combineOp_VLToVWOp_VL(), combinePackingMovIntoStore(), combinePRMT(), llvm::VETargetLowering::combineSelect(), combineSelectAndUse(), combineSelectAndUse(), llvm::VETargetLowering::combineSelectCC(), combineSTORE(), llvm::VETargetLowering::combineTRUNCATE(), combineVectorSizedSetCCEquality(), CombineVLDDUP(), DAGCombinerInfo(), distributeOpThroughSelect(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), llvm::AMDGPUTargetLowering::foldFreeOpFromSelect(), legalizeScatterGatherIndexType(), matchPERM(), performActiveLaneMaskCombine(), PerformADDCombine(), performADDCombine(), PerformADDCombineWithOperands(), PerformAddcSubcCombine(), PerformAddeSubeCombine(), performAddSubCombine(), performAddSubLongCombine(), PerformANDCombine(), performANDCombine(), performANDCombine(), performANDSETCCCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::performAssertSZExtCombine(), llvm::SparcTargetLowering::PerformBITCASTCombine(), PerformBITCASTCombine(), performBitcastCombine(), PerformBUILD_VECTORCombine(), PerformBUILD_VECTORCombine(), performConcatVectorsCombine(), llvm::AMDGPUTargetLowering::performCtlz_CttzCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::HexagonTargetLowering::PerformDAGCombine(), llvm::LoongArchTargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::MipsTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::X86TargetLowering::PerformDAGCombine(), performDUPCombine(), PerformEXTRACTCombine(), PerformExtractEltCombine(), PerformExtractEltToVMOVRRD(), performExtractLastActiveCombine(), performExtractVectorEltCombine(), llvm::AMDGPUTargetLowering::performFAbsCombine(), performFADDCombine(), PerformFADDCombineWithOperands(), performFirstTrueTestVectorCombine(), performFlagSettingCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFP_TO_INT_SATCombine(), performFP_TO_INTCombine(), PerformHWLoopCombine(), PerformInsertEltCombine(), PerformInsertSubvectorCombine(), llvm::ARMTargetLowering::PerformIntrinsicCombine(), performIntrinsicCombine(), llvm::AMDGPUTargetLowering::performIntrinsicWOChainCombine(), performLastTrueTestVectorCombine(), PerformLOADCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), performMemPairCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulCombine(), performMulCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), llvm::AMDGPUTargetLowering::performMulLoHiCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), PerformMVEVLDCombine(), PerformORCombine(), performORCombine(), performORCombine(), PerformORCombineToBFI(), PerformORCombineToSMULWBT(), performPostLD1Combine(), PerformPREDICATE_CASTCombine(), llvm::AMDGPUTargetLowering::performRcpCombine(), PerformREMCombine(), PerformSELECTCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSelectCombine(), PerformSETCCCombine(), performSETCCCombine(), performSETCCCombine(), performSetccMergeZeroCombine(), PerformShiftCombine(), performSHLCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), PerformSHLSimplify(), performSIGN_EXTEND_INREGCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), PerformSTORECombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformSUBCombine(), performSVEAndCombine(), performSVEMulAddSubCombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), performTruncateCombine(), PerformVDUPLANECombine(), performVECTOR_SHUFFLECombine(), performVectorExtendCombine(), performVectorExtendToFPCombine(), performVectorNonNegToFPCombine(), performVectorShiftCombine(), performVectorTruncZeroCombine(), performVFMADD_VLCombine(), PerformVMOVhrCombine(), PerformVMOVNCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), PerformVQDMULHCombine(), PerformVQMOVNCombine(), PerformVSELECTCombine(), PerformVSELECTCombine(), PerformVSetCCToVCTPCombine(), performVWADDSUBW_VLCombine(), PerformXORCombine(), reduceANDOfAtomicLoad(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), simplifyMul24(), llvm::TargetLowering::SimplifySetCC(), sinkProxyReg(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), TryCombineBaseUpdate(), and TryMULWIDECombine().
void* llvm::TargetLowering::DAGCombinerInfo::DC |
Definition at line 4399 of file TargetLowering.h.
Referenced by AddToWorklist(), CombineTo(), CombineTo(), CombineTo(), CommitTargetLoweringOpt(), DAGCombinerInfo(), and recursivelyDeleteUnusedNodes().
CombineLevel llvm::TargetLowering::DAGCombinerInfo::Level |
Definition at line 4400 of file TargetLowering.h.
Referenced by DAGCombinerInfo(), getDAGCombineLevel(), isAfterLegalizeDAG(), isBeforeLegalize(), isBeforeLegalizeOps(), and performSignExtendCombine().