LLVM 23.0.0git
HexagonGlobalRegion.h
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1//===-- HexagonGlobalRegion.h - VLIW global scheduling infrastructure -----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Basic infrastructure for global scheduling.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef HEXAGON_GLOBAL_REGION_H
14#define HEXAGON_GLOBAL_REGION_H
15
16#include "llvm/ADT/BitVector.h"
17#include "llvm/ADT/DenseMap.h"
20#include "llvm/Support/Debug.h"
22
23#include <map>
24#include <memory>
25#include <vector>
26
27namespace llvm {
28/// Class to track incremental liveness update.
30 const TargetInstrInfo *TII;
31 const TargetRegisterInfo *TRI;
32 BitVector LiveIns;
33 BitVector LiveOuts;
34
35public:
36 LivenessInfo(const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
40 BitVector &Use);
42 BitVector &Use);
43 void setUsed(BitVector &Set, unsigned Reg);
44 // Update Liveness for BB.
46 void dump();
47};
48
49/// Generic sequence of BBs. A trace or SB.
50/// Maintains its own liveness info.
52 const TargetInstrInfo *TII;
53 const TargetRegisterInfo *TRI;
54 // Sequence of BBs in a larger block.
55 std::vector<MachineBasicBlock *> Elements;
56 std::map<MachineBasicBlock *, std::unique_ptr<LivenessInfo>> LiveInfo;
58
59public:
63
65
66 MachineBasicBlock *getEntryBB() { return Elements.front(); }
67
69 return ElementIndex.find(MBB) != ElementIndex.end() ? MBB : nullptr;
70 }
71
73 auto It = ElementIndex.find(MBB);
74 if (It == ElementIndex.end())
75 return;
76 unsigned Index = It->second;
77 Elements.erase(Elements.begin() + Index);
78 ElementIndex.erase(It);
79 LiveInfo.erase(MBB);
80 for (unsigned I = Index, E = static_cast<unsigned>(Elements.size()); I != E;
81 ++I)
82 ElementIndex[Elements[I]] = I;
83 }
84
86 auto It = ElementIndex.find(MBB);
87 if (It == ElementIndex.end())
88 return nullptr;
89 unsigned Next = It->second + 1;
90 if (Next >= Elements.size())
91 return nullptr;
92 return Elements[Next];
93 }
94
95 unsigned size() { return static_cast<unsigned>(Elements.size()); }
96
97 std::vector<MachineBasicBlock *>::iterator getRootMBB() {
98 return Elements.begin();
99 }
100
101 std::vector<MachineBasicBlock *>::iterator getLastMBB() {
102 return Elements.end();
103 }
104
106};
107} // namespace llvm
108
109#endif
MachineBasicBlock & MBB
This file implements the BitVector class.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This file defines the DenseMap class.
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition MD5.cpp:57
Register Reg
std::vector< MachineBasicBlock * >::iterator getRootMBB()
void RemoveBBFromRegion(MachineBasicBlock *MBB)
MachineBasicBlock * findNextMBB(MachineBasicBlock *MBB)
BasicBlockRegion(const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, MachineBasicBlock *MBB)
BasicBlockRegion Methods.
MachineBasicBlock * getEntryBB()
MachineBasicBlock * findMBB(MachineBasicBlock *MBB)
std::vector< MachineBasicBlock * >::iterator getLastMBB()
LivenessInfo * getLivenessInfoForBB(MachineBasicBlock *MBB)
void addBBtoRegion(MachineBasicBlock *MBB)
Class to track incremental liveness update.
void UpdateLiveness(MachineBasicBlock *MBB)
void parseOperands(MachineInstr *MI, BitVector &Gen, BitVector &Kill, BitVector &Use)
Determine def/use set for MI.
LivenessInfo(const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, MachineBasicBlock *MBB)
void setUsed(BitVector &Set, unsigned Reg)
setUsed - Set the register and its sub-registers as being used.
void parseOperandsWithReset(MachineInstr *MI, BitVector &Gen, BitVector &Kill, BitVector &Use)
Representation of each machine instruction.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
A Use represents the edge between a Value definition and its users.
Definition Use.h:35
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
@ Kill
The last use of a register.
FunctionAddr VTableAddr Next
Definition InstrProf.h:141