13#ifndef HEXAGON_GLOBAL_REGION_H
14#define HEXAGON_GLOBAL_REGION_H
55 std::vector<MachineBasicBlock *> Elements;
56 std::map<MachineBasicBlock *, std::unique_ptr<LivenessInfo>> LiveInfo;
69 return ElementIndex.find(
MBB) != ElementIndex.
end() ?
MBB :
nullptr;
73 auto It = ElementIndex.find(
MBB);
74 if (It == ElementIndex.end())
76 unsigned Index = It->second;
77 Elements.erase(Elements.begin() + Index);
78 ElementIndex.erase(It);
80 for (
unsigned I = Index,
E =
static_cast<unsigned>(Elements.size());
I !=
E;
82 ElementIndex[Elements[
I]] =
I;
86 auto It = ElementIndex.find(
MBB);
87 if (It == ElementIndex.end())
89 unsigned Next = It->second + 1;
90 if (
Next >= Elements.size())
92 return Elements[
Next];
95 unsigned size() {
return static_cast<unsigned>(Elements.size()); }
97 std::vector<MachineBasicBlock *>::iterator
getRootMBB() {
98 return Elements.begin();
102 return Elements.end();
This file implements the BitVector class.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This file defines the DenseMap class.
std::vector< MachineBasicBlock * >::iterator getRootMBB()
void RemoveBBFromRegion(MachineBasicBlock *MBB)
MachineBasicBlock * findNextMBB(MachineBasicBlock *MBB)
BasicBlockRegion(const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, MachineBasicBlock *MBB)
BasicBlockRegion Methods.
MachineBasicBlock * getEntryBB()
MachineBasicBlock * findMBB(MachineBasicBlock *MBB)
std::vector< MachineBasicBlock * >::iterator getLastMBB()
LivenessInfo * getLivenessInfoForBB(MachineBasicBlock *MBB)
void addBBtoRegion(MachineBasicBlock *MBB)
Class to track incremental liveness update.
void UpdateLiveness(MachineBasicBlock *MBB)
void parseOperands(MachineInstr *MI, BitVector &Gen, BitVector &Kill, BitVector &Use)
Determine def/use set for MI.
LivenessInfo(const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, MachineBasicBlock *MBB)
void setUsed(BitVector &Set, unsigned Reg)
setUsed - Set the register and its sub-registers as being used.
void parseOperandsWithReset(MachineInstr *MI, BitVector &Gen, BitVector &Kill, BitVector &Use)
Representation of each machine instruction.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
A Use represents the edge between a Value definition and its users.
This is an optimization pass for GlobalISel generic memory operations.
@ Kill
The last use of a register.
FunctionAddr VTableAddr Next