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M68kFrameLowering.h
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1//===-- M68kFrameLowering.h - Define frame lowering for M68k ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains the M68k declaration of TargetFrameLowering class.
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_M68K_M68KFRAMELOWERING_H
15#define LLVM_LIB_TARGET_M68K_M68KFRAMELOWERING_H
16
17#include "M68k.h"
18
20
21namespace llvm {
22class MachineInstrBuilder;
23class MCCFIInstruction;
24class M68kSubtarget;
25class M68kRegisterInfo;
26struct Align;
27
29 // Cached subtarget predicates.
30 const M68kSubtarget &STI;
31 const TargetInstrInfo &TII;
32 const M68kRegisterInfo *TRI;
33
34 /// Stack slot size in bytes.
35 unsigned SlotSize;
36
37 unsigned StackPtr;
38
39 /// If we're forcing a stack realignment we can't rely on just the frame
40 /// info, we need to know the ABI stack alignment as well in case we have a
41 /// call out. Otherwise just make sure we have some alignment - we'll go
42 /// with the minimum SlotSize.
43 uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
44
45 /// Adjusts the stack pointer using LEA, SUB, or ADD.
46 MachineInstrBuilder BuildStackAdjustment(MachineBasicBlock &MBB,
48 const DebugLoc &DL, int64_t Offset,
49 bool InEpilogue) const;
50
51 /// Aligns the stack pointer by ANDing it with -MaxAlign.
52 void BuildStackAlignAND(MachineBasicBlock &MBB,
54 unsigned Reg, uint64_t MaxAlign) const;
55
56 /// Wraps up getting a CFI index and building a MachineInstr for it.
58 const DebugLoc &DL, const MCCFIInstruction &CFIInst) const;
59
60 void emitPrologueCalleeSavedFrameMoves(MachineBasicBlock &MBB,
62 const DebugLoc &DL) const;
63
64 unsigned getPSPSlotOffsetFromSP(const MachineFunction &MF) const;
65
66public:
67 explicit M68kFrameLowering(const M68kSubtarget &sti, Align Alignment);
68
69 static const M68kFrameLowering *create(const M68kSubtarget &ST);
70
71 /// This method is called during prolog/epilog code insertion to eliminate
72 /// call frame setup and destroy pseudo instructions (but only if the Target
73 /// is using them). It is responsible for eliminating these instructions,
74 /// replacing them with concrete instructions. This method need only be
75 /// implemented if using call frame setup/destroy pseudo instructions.
76 /// Returns an iterator pointing to the instruction after the replaced one.
79 MachineBasicBlock::iterator MI) const override;
80
81 /// Insert prolog code into the function.
82 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
83
84 /// Insert epilog code into the function.
85 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
86
87 /// This method determines which of the registers reported by
88 /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved.
89 /// The default implementation checks populates the \p SavedRegs bitset with
90 /// all registers which are modified in the function, targets may override
91 /// this function to save additional registers.
92 /// This method also sets up the register scavenger ensuring there is a free
93 /// register or a frameindex available.
95 RegScavenger *RS = nullptr) const override;
96
97 /// Allows target to override spill slot assignment logic. If implemented,
98 /// assignCalleeSavedSpillSlots() should assign frame slots to all CSI
99 /// entries and return true. If this method returns false, spill slots will
100 /// be assigned using generic implementation. assignCalleeSavedSpillSlots()
101 /// may add, delete or rearrange elements of CSI.
102 bool
104 const TargetRegisterInfo *TRI,
105 std::vector<CalleeSavedInfo> &CSI) const override;
106
107 /// Issues instruction(s) to spill all callee saved registers and returns
108 /// true if it isn't possible / profitable to do so by issuing a series of
109 /// store instructions via storeRegToStackSlot(). Returns false otherwise.
113 const TargetRegisterInfo *TRI) const override;
114
115 /// Issues instruction(s) to restore all callee saved registers and returns
116 /// true if it isn't possible / profitable to do so by issuing a series of
117 /// load instructions via loadRegToStackSlot(). Returns false otherwise.
118 bool
122 const TargetRegisterInfo *TRI) const override;
123
124 /// Under normal circumstances, when a frame pointer is not required, we
125 /// reserve argument space for call sites in the function immediately on
126 /// entry to the current function. This eliminates the need for add/sub sp
127 /// brackets around call sites. Returns true if the call frame is included as
128 /// part of the stack frame.
129 bool hasReservedCallFrame(const MachineFunction &MF) const override;
130
131 /// If there is a reserved call frame, the call frame pseudos can be
132 /// simplified. Having a FP, as in the default implementation, is not
133 /// sufficient here since we can't always use it. Use a more nuanced
134 /// condition.
135 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
136
137 // Do we need to perform FI resolution for this function. Normally, this is
138 // required only when the function has any stack objects. However, FI
139 // resolution actually has another job, not apparent from the title - it
140 // resolves callframe setup/destroy that were not simplified earlier.
141 //
142 // So, this is required for M68k functions that have push sequences even
143 // when there are no stack objects.
144 bool needsFrameIndexResolution(const MachineFunction &MF) const override;
145
146 /// This method should return the base register and offset used to reference
147 /// a frame index location. The offset is returned directly, and the base
148 /// register is returned via FrameReg.
150 Register &FrameReg) const override;
151
152 /// Check the instruction before/after the passed instruction. If
153 /// it is an ADD/SUB/LEA instruction it is deleted argument and the
154 /// stack adjustment is returned as a positive value for ADD/LEA and
155 /// a negative for SUB.
157 bool doMergeWithPrevious) const;
158
159 /// Emit a series of instructions to increment / decrement the stack
160 /// pointer by a constant value.
162 int64_t NumBytes, bool InEpilogue) const;
163
164protected:
165 /// Return true if the specified function should have a dedicated frame
166 /// pointer register. This is true if the function has variable sized
167 /// allocas, if it needs dynamic stack realignment, if frame pointer
168 /// elimination is disabled, or if the frame address is taken.
169 bool hasFPImpl(const MachineFunction &MF) const override;
170};
171} // namespace llvm
172
173#endif // LLVM_LIB_TARGET_M68K_M68KFRAMELOWERING_H
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
uint64_t Align
IRTranslator LLVM IR MI
This file contains the entry points for global functions defined in the M68k target library,...
unsigned Reg
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
A debug info location.
Definition: DebugLoc.h:33
bool hasFPImpl(const MachineFunction &MF) const override
Return true if the specified function should have a dedicated frame pointer register.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Insert epilog code into the function.
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Allows target to override spill slot assignment logic.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
Issues instruction(s) to spill all callee saved registers and returns true if it isn't possible / pro...
bool hasReservedCallFrame(const MachineFunction &MF) const override
Under normal circumstances, when a frame pointer is not required, we reserve argument space for call ...
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
This method should return the base register and offset used to reference a frame index location.
static const M68kFrameLowering * create(const M68kSubtarget &ST)
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Insert prolog code into the function.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
Issues instruction(s) to restore all callee saved registers and returns true if it isn't possible / p...
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
If there is a reserved call frame, the call frame pseudos can be simplified.
bool needsFrameIndexResolution(const MachineFunction &MF) const override
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:310
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StackOffset holds a fixed and a scalable offset in bytes.
Definition: TypeSize.h:33
Information about stack frame layout on the target.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39