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15 #ifndef LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
16 #define LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
22 #define GET_REGINFO_HEADER
23 #include "M68kGenRegisterInfo.inc"
27 class TargetInstrInfo;
31 virtual void anchor();
45 unsigned GlobalBasePtr;
91 unsigned FIOperandNum,
103 if (RC == &M68k::CCRCRegClass)
104 return &M68k::DR32RegClass;
117 #endif // LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
This is an optimization pass for GlobalISel generic memory operations.
const TargetRegisterClass * intRegClass(unsigned Size) const
M68kRegisterInfo(const M68kSubtarget &Subtarget)
int getSpillRegisterOrder(unsigned Reg) const
Return spill order index of a register, if there is none then trap.
Reg
All possible values of the reg field in the ModR/M byte.
unsigned getStackRegister() const
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
Register getFrameRegister(const MachineFunction &MF) const override
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
unsigned getMatchingMegaReg(unsigned Reg, const TargetRegisterClass *RC) const
Return a mega-register of the specified register Reg so its sub-register of index SubIdx is Reg,...
const TargetRegisterClass * getMaximalPhysRegClass(unsigned reg, MVT VT) const
Returns the Register Class of a physical register of the given type, picking the biggest register cla...
const M68kSubtarget & Subtarget
unsigned getGlobalBaseRegister() const
bool requiresRegisterScavenging(const MachineFunction &MF) const override
bool canRealignStack(const MachineFunction &MF) const override
True if the stack can be realigned for the target.
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
FrameIndex represent objects inside a abstract stack.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const override
Wrapper class representing virtual and physical registers.
const TargetRegisterClass * getRegsForTailCall(const MachineFunction &MF) const
Returns a register class with registers that can be used in forming tail calls.
BitVector getReservedRegs(const MachineFunction &MF) const override
bool hasBasePointer(const MachineFunction &MF) const
int getRegisterOrder(unsigned Reg, const TargetRegisterClass &TRC) const
Return index of a register within a register class, otherwise return -1.
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
unsigned getBaseRegister() const