LLVM
17.0.0git
lib
Target
RISCV
GISel
RISCVLegalizerInfo.h
Go to the documentation of this file.
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//===-- RISCVLegalizerInfo.h ------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file declares the targeting of the Machinelegalizer class for RISCV.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVMACHINELEGALIZER_H
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#define LLVM_LIB_TARGET_RISCV_RISCVMACHINELEGALIZER_H
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#include "
llvm/CodeGen/GlobalISel/LegalizerInfo.h
"
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namespace
llvm
{
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class
RISCVSubtarget;
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/// This class provides the information for the target register banks.
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class
RISCVLegalizerInfo
:
public
LegalizerInfo
{
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public
:
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RISCVLegalizerInfo
(
const
RISCVSubtarget
&ST);
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};
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}
// end namespace llvm
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#endif
LegalizerInfo.h
Interface for Targets to specify which operations they can successfully select and how the others sho...
llvm::LegalizerInfo
Definition:
LegalizerInfo.h:1198
llvm::RISCVLegalizerInfo
This class provides the information for the target register banks.
Definition:
RISCVLegalizerInfo.h:23
llvm::RISCVSubtarget
Definition:
RISCVSubtarget.h:35
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
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