LLVM  15.0.0git
SystemZCopyPhysRegs.cpp
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1 //===---------- SystemZPhysRegCopy.cpp - Handle phys reg copies -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass makes sure that a COPY of a physical register will be
10 // implementable after register allocation in copyPhysReg() (this could be
11 // done in EmitInstrWithCustomInserter() instead if COPY instructions would
12 // be passed to it).
13 //
14 //===----------------------------------------------------------------------===//
15 
17 #include "SystemZTargetMachine.h"
25 
26 using namespace llvm;
27 
28 namespace {
29 
30 class SystemZCopyPhysRegs : public MachineFunctionPass {
31 public:
32  static char ID;
33  SystemZCopyPhysRegs()
34  : MachineFunctionPass(ID), TII(nullptr), MRI(nullptr) {
36  }
37 
38  bool runOnMachineFunction(MachineFunction &MF) override;
39  void getAnalysisUsage(AnalysisUsage &AU) const override;
40 
41 private:
42 
43  bool visitMBB(MachineBasicBlock &MBB);
44 
45  const SystemZInstrInfo *TII;
47 };
48 
50 
51 } // end anonymous namespace
52 
53 INITIALIZE_PASS(SystemZCopyPhysRegs, "systemz-copy-physregs",
54  "SystemZ Copy Physregs", false, false)
55 
57  return new SystemZCopyPhysRegs();
58 }
59 
60 void SystemZCopyPhysRegs::getAnalysisUsage(AnalysisUsage &AU) const {
61  AU.setPreservesCFG();
63 }
64 
65 bool SystemZCopyPhysRegs::visitMBB(MachineBasicBlock &MBB) {
66  bool Modified = false;
67 
68  // Certain special registers can only be copied from a subset of the
69  // default register class of the type. It is therefore necessary to create
70  // the target copy instructions before regalloc instead of in copyPhysReg().
72  MBBI != E; ) {
73  MachineInstr *MI = &*MBBI++;
74  if (!MI->isCopy())
75  continue;
76 
77  DebugLoc DL = MI->getDebugLoc();
78  Register SrcReg = MI->getOperand(1).getReg();
79  Register DstReg = MI->getOperand(0).getReg();
80  if (DstReg.isVirtual() &&
81  (SrcReg == SystemZ::CC || SystemZ::AR32BitRegClass.contains(SrcReg))) {
82  Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
83  if (SrcReg == SystemZ::CC)
84  BuildMI(MBB, MI, DL, TII->get(SystemZ::IPM), Tmp);
85  else
86  BuildMI(MBB, MI, DL, TII->get(SystemZ::EAR), Tmp).addReg(SrcReg);
87  MI->getOperand(1).setReg(Tmp);
88  Modified = true;
89  }
90  else if (SrcReg.isVirtual() &&
91  SystemZ::AR32BitRegClass.contains(DstReg)) {
92  Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
93  MI->getOperand(0).setReg(Tmp);
94  BuildMI(MBB, MBBI, DL, TII->get(SystemZ::SAR), DstReg).addReg(Tmp);
95  Modified = true;
96  }
97  }
98 
99  return Modified;
100 }
101 
102 bool SystemZCopyPhysRegs::runOnMachineFunction(MachineFunction &F) {
103  TII = F.getSubtarget<SystemZSubtarget>().getInstrInfo();
104  MRI = &F.getRegInfo();
105 
106  bool Modified = false;
107  for (auto &MBB : F)
108  Modified |= visitMBB(MBB);
109 
110  return Modified;
111 }
112 
llvm::initializeSystemZCopyPhysRegsPass
void initializeSystemZCopyPhysRegsPass(PassRegistry &)
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:156
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
TargetInstrInfo.h
llvm::SystemZInstrInfo
Definition: SystemZInstrInfo.h:174
llvm::MachineFunctionPass::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:103
F
#define F(x, y, z)
Definition: MD5.cpp:55
MachineRegisterInfo.h
TargetMachine.h
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:24
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
LoopDeletionResult::Modified
@ Modified
INITIALIZE_PASS
INITIALIZE_PASS(SystemZCopyPhysRegs, "systemz-copy-physregs", "SystemZ Copy Physregs", false, false) FunctionPass *llvm
Definition: SystemZCopyPhysRegs.cpp:53
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::Register::isVirtual
bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:91
SystemZTargetMachine.h
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
SystemZMachineFunctionInfo.h
llvm::SystemZTargetMachine
Definition: SystemZTargetMachine.h:27
MachineFunctionPass.h
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::SystemZSubtarget
Definition: SystemZSubtarget.h:33
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::AnalysisUsage::setPreservesCFG
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:263
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:278
MachineInstrBuilder.h
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::FunctionPass
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:308
llvm::createSystemZCopyPhysRegsPass
FunctionPass * createSystemZCopyPhysRegsPass(SystemZTargetMachine &TM)
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineInstrBundleIterator< MachineInstr >
TargetRegisterInfo.h
llvm::SystemZISD::IPM
@ IPM
Definition: SystemZISelLowering.h:146
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:280
MachineDominators.h
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38