LLVM 20.0.0git
SystemZCopyPhysRegs.cpp
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1//===---------- SystemZPhysRegCopy.cpp - Handle phys reg copies -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass makes sure that a COPY of a physical register will be
10// implementable after register allocation in copyPhysReg() (this could be
11// done in EmitInstrWithCustomInserter() instead if COPY instructions would
12// be passed to it).
13//
14//===----------------------------------------------------------------------===//
15
23
24using namespace llvm;
25
26namespace {
27
28class SystemZCopyPhysRegs : public MachineFunctionPass {
29public:
30 static char ID;
31 SystemZCopyPhysRegs()
32 : MachineFunctionPass(ID), TII(nullptr), MRI(nullptr) {
34 }
35
36 bool runOnMachineFunction(MachineFunction &MF) override;
37 void getAnalysisUsage(AnalysisUsage &AU) const override;
38
39private:
40
41 bool visitMBB(MachineBasicBlock &MBB);
42
43 const SystemZInstrInfo *TII;
45};
46
47char SystemZCopyPhysRegs::ID = 0;
48
49} // end anonymous namespace
50
51INITIALIZE_PASS(SystemZCopyPhysRegs, "systemz-copy-physregs",
52 "SystemZ Copy Physregs", false, false)
53
55 return new SystemZCopyPhysRegs();
56}
57
58void SystemZCopyPhysRegs::getAnalysisUsage(AnalysisUsage &AU) const {
59 AU.setPreservesCFG();
61}
62
63bool SystemZCopyPhysRegs::visitMBB(MachineBasicBlock &MBB) {
64 bool Modified = false;
65
66 // Certain special registers can only be copied from a subset of the
67 // default register class of the type. It is therefore necessary to create
68 // the target copy instructions before regalloc instead of in copyPhysReg().
70 MBBI != E; ) {
71 MachineInstr *MI = &*MBBI++;
72 if (!MI->isCopy())
73 continue;
74
75 DebugLoc DL = MI->getDebugLoc();
76 Register SrcReg = MI->getOperand(1).getReg();
77 Register DstReg = MI->getOperand(0).getReg();
78 if (DstReg.isVirtual() &&
79 (SrcReg == SystemZ::CC || SystemZ::AR32BitRegClass.contains(SrcReg))) {
80 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
81 if (SrcReg == SystemZ::CC)
82 BuildMI(MBB, MI, DL, TII->get(SystemZ::IPM), Tmp);
83 else
84 BuildMI(MBB, MI, DL, TII->get(SystemZ::EAR), Tmp).addReg(SrcReg);
85 MI->getOperand(1).setReg(Tmp);
86 Modified = true;
87 }
88 else if (SrcReg.isVirtual() &&
89 SystemZ::AR32BitRegClass.contains(DstReg)) {
90 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
91 MI->getOperand(0).setReg(Tmp);
92 BuildMI(MBB, MBBI, DL, TII->get(SystemZ::SAR), DstReg).addReg(Tmp);
93 Modified = true;
94 }
95 }
96
97 return Modified;
98}
99
100bool SystemZCopyPhysRegs::runOnMachineFunction(MachineFunction &F) {
101 TII = F.getSubtarget<SystemZSubtarget>().getInstrInfo();
102 MRI = &F.getRegInfo();
103
104 bool Modified = false;
105 for (auto &MBB : F)
106 Modified |= visitMBB(MBB);
107
108 return Modified;
109}
110
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:256
A debug info location.
Definition: DebugLoc.h:33
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:310
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
Definition: MachineInstr.h:69
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:91
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createSystemZCopyPhysRegsPass(SystemZTargetMachine &TM)
void initializeSystemZCopyPhysRegsPass(PassRegistry &)