#include <PPCRegisterInfo.h>

Inheritance diagram for llvm::PPCRegisterInfo:

Collaboration diagram for llvm::PPCRegisterInfo:

Public Member Functions
	PPCRegisterInfo (const PPCSubtarget &SubTarget)
virtual const TargetRegisterClass *	getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const
const uint16_t *	getCalleeSavedRegs (const MachineFunction *MF=0) const
	Code Generation virtual methods...
const uint32_t *	getCallPreservedMask (CallingConv::ID CC) const
const uint32_t *	getNoPreservedMask () const
BitVector	getReservedRegs (const MachineFunction &MF) const
bool	requiresRegisterScavenging (const MachineFunction &MF) const
	We require the register scavenger.
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const
bool	trackLivenessAfterRegAlloc (const MachineFunction &MF) const
virtual bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const
void	lowerDynamicAlloc (MachineBasicBlock::iterator II) const
void	lowerCRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
void	lowerCRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
void	lowerVRSAVESpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
void	lowerVRSAVERestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
bool	hasReservedSpillSlot (const MachineFunction &MF, unsigned Reg, int &FrameIdx) const
void	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const
void	materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const
void	resolveFrameIndex (MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const
bool	isFrameOffsetLegal (const MachineInstr *MI, int64_t Offset) const
unsigned	getFrameRegister (const MachineFunction &MF) const
unsigned	getEHExceptionRegister () const
unsigned	getEHHandlerRegister () const

Detailed Description

Definition at line 29 of file PPCRegisterInfo.h.

Constructor & Destructor Documentation

PPCRegisterInfo::PPCRegisterInfo ( const PPCSubtarget & SubTarget )

Definition at line 51 of file PPCRegisterInfo.cpp.

References llvm::A64DB::LD.

Member Function Documentation

void PPCRegisterInfo::eliminateFrameIndex	(	MachineBasicBlock::iterator	II,
		int	SPAdj,
		unsigned	FIOperandNum,
		RegScavenger *	RS = `NULL`
	)		const

Definition at line 494 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::count(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetOpcode::DBG_VALUE, llvm::PPCISD::DYNALLOC, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::find(), llvm::ISD::FrameIndex, llvm::AttributeSet::FunctionIndex, llvm::MCInstrInfo::get(), llvm::Function::getAttributes(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::PPCFunctionInfo::getFramePointerSaveIndex(), llvm::MachineFunction::getFunction(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetMachine::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getTarget(), llvm::TargetFrameLowering::hasFP(), llvm::TargetOpcode::INLINEASM, llvm::MachineInstr::isInlineAsm(), llvm::isInt< 16 >(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, lowerCRRestore(), lowerCRSpilling(), lowerDynamicAlloc(), lowerVRSAVERestore(), lowerVRSAVESpilling(), llvm::A64CC::MI, llvm::Attribute::Naked, llvm::MachineInstr::setDesc(), TII, and usesIXAddr().

const uint16_t * PPCRegisterInfo::getCalleeSavedRegs ( const MachineFunction * MF = 0 ) const

Code Generation virtual methods...

Definition at line 92 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::isDarwinABI(), and llvm::PPCSubtarget::isPPC64().

const uint32_t * PPCRegisterInfo::getCallPreservedMask ( CallingConv::ID CC ) const

Definition at line 101 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::isDarwinABI(), and llvm::PPCSubtarget::isPPC64().

unsigned PPCRegisterInfo::getEHExceptionRegister ( ) const

Definition at line 635 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::isPPC64().

unsigned PPCRegisterInfo::getEHHandlerRegister ( ) const

Definition at line 639 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::isPPC64().

unsigned PPCRegisterInfo::getFrameRegister ( const MachineFunction & MF ) const

Definition at line 626 of file PPCRegisterInfo.cpp.

References llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getTarget(), llvm::TargetFrameLowering::hasFP(), and llvm::PPCSubtarget::isPPC64().

const uint32_t * PPCRegisterInfo::getNoPreservedMask ( ) const

Definition at line 110 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::hasAltivec(), and llvm::PPCSubtarget::isDarwin().

Referenced by llvm::PPCTargetLowering::emitEHSjLjSetJmp().

const TargetRegisterClass * PPCRegisterInfo::getPointerRegClass	(	const MachineFunction &	MF,
		unsigned	Kind = `0`
	)		const `[virtual]`

getPointerRegClass - Return the register class to use to hold pointers. This is used for addressing modes.

Definition at line 76 of file PPCRegisterInfo.cpp.

References llvm::PPCSubtarget::isPPC64().

unsigned PPCRegisterInfo::getRegPressureLimit	(	const TargetRegisterClass *	RC,
		MachineFunction &	MF
	)		const

Definition at line 177 of file PPCRegisterInfo.cpp.

References llvm::TargetMachine::getFrameLowering(), llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getTarget(), and llvm::TargetFrameLowering::hasFP().

BitVector PPCRegisterInfo::getReservedRegs ( const MachineFunction & MF ) const

Definition at line 123 of file PPCRegisterInfo.cpp.

References llvm::TargetMachine::getFrameLowering(), llvm::MachineFunction::getTarget(), llvm::PPCSubtarget::isPPC64(), llvm::PPCSubtarget::isSVR4ABI(), llvm::PPCFrameLowering::needsFP(), and llvm::BitVector::set().

bool PPCRegisterInfo::hasReservedSpillSlot	(	const MachineFunction &	MF,
		unsigned	Reg,
		int &	FrameIdx
	)		const

Definition at line 447 of file PPCRegisterInfo.cpp.

References llvm::PPCFunctionInfo::getCRSpillFrameIndex(), llvm::MachineFunction::getInfo(), llvm::PPCSubtarget::isPPC64(), and llvm::PPCSubtarget::isSVR4ABI().

bool PPCRegisterInfo::isFrameOffsetLegal	(	const MachineInstr *	MI,
		int64_t	Offset
	)		const

Definition at line 744 of file PPCRegisterInfo.cpp.

References llvm::TargetOpcode::DBG_VALUE, llvm::MachineInstr::getOpcode(), llvm::isInt< 16 >(), and usesIXAddr().

Referenced by needsFrameBaseReg().

void PPCRegisterInfo::lowerCRRestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex
	)		const

void PPCRegisterInfo::lowerCRSpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex
	)		const

lowerCRSpilling - Generate the code for spilling a CR register. Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:

mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.

Definition at line 309 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::TargetMachine::getInstrInfo(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getTarget(), llvm::MachineOperand::isKill(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::A64CC::MI, and TII.

Referenced by eliminateFrameIndex().

void PPCRegisterInfo::lowerDynamicAlloc ( MachineBasicBlock::iterator II ) const

lowerDynamicAlloc - Generate the code for allocating an object in the current frame. The sequence of code with be in the general form

addi R0, SP, #frameSize ; get the address of the previous frame stwxu R0, SP, Rnegsize ; add and update the SP with the negated size addi Rnew, SP, #maxCalFrameSize ; get the top of the allocation

Definition at line 212 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetMachine::getFrameLowering(), llvm::TargetMachine::getInstrInfo(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::TargetFrameLowering::getStackAlignment(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getTarget(), llvm::RegState::ImplicitKill, llvm::isInt< 16 >(), llvm::MachineOperand::isKill(), llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::A64DB::LD, llvm::A64CC::MI, llvm::report_fatal_error(), and TII.

Referenced by eliminateFrameIndex().

void PPCRegisterInfo::lowerVRSAVERestore	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex
	)		const

void PPCRegisterInfo::lowerVRSAVESpilling	(	MachineBasicBlock::iterator	II,
		unsigned	FrameIndex
	)		const

void PPCRegisterInfo::materializeFrameBaseRegister	(	MachineBasicBlock *	MBB,
		unsigned	BaseReg,
		int	FrameIdx,
		int64_t	Offset
	)		const

Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.

Definition at line 706 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::MachineBasicBlock::end(), llvm::MCInstrInfo::get(), llvm::TargetMachine::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::TargetInstrInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getTarget(), llvm::MipsISD::Ins, llvm::PPCSubtarget::isPPC64(), and TII.

bool PPCRegisterInfo::needsFrameBaseReg	(	MachineInstr *	MI,
		int64_t	Offset
	)		const

Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 648 of file PPCRegisterInfo.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::count(), llvm::PPCFrameLowering::determineFrameLayout(), llvm::TargetMachine::getFrameLowering(), llvm::MachineOperand::getImm(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getTarget(), llvm::MachineOperand::isFI(), and isFrameOffsetLegal().

bool llvm::PPCRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction & MF ) const [inline]

Definition at line 55 of file PPCRegisterInfo.h.

bool llvm::PPCRegisterInfo::requiresRegisterScavenging ( const MachineFunction & MF ) const [inline]

We require the register scavenger.

Definition at line 51 of file PPCRegisterInfo.h.

virtual bool llvm::PPCRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction & MF ) const [inline, virtual]

Definition at line 63 of file PPCRegisterInfo.h.

void PPCRegisterInfo::resolveFrameIndex	(	MachineBasicBlock::iterator	I,
		unsigned	BaseReg,
		int64_t	Offset
	)		const

Definition at line 727 of file PPCRegisterInfo.cpp.

References llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getNumOperands(), getOffsetONFromFION(), llvm::MachineInstr::getOperand(), I, llvm::MachineOperand::isFI(), and llvm::A64CC::MI.

bool llvm::PPCRegisterInfo::trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const [inline]

Definition at line 59 of file PPCRegisterInfo.h.

The documentation for this class was generated from the following files:

Public Member Functions

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation