#include "PPCISelLowering.h"#include "MCTargetDesc/PPCPredicates.h"#include "PPCMachineFunctionInfo.h"#include "PPCPerfectShuffle.h"#include "PPCTargetMachine.h"#include "PPCTargetObjectFile.h"#include "llvm/ADT/STLExtras.h"#include "llvm/CodeGen/CallingConvLower.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/SelectionDAG.h"#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"#include "llvm/IR/CallingConv.h"#include "llvm/IR/Constants.h"#include "llvm/IR/DerivedTypes.h"#include "llvm/IR/Function.h"#include "llvm/IR/Intrinsics.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/raw_ostream.h"#include "llvm/Target/TargetOptions.h"#include "PPCGenCallingConv.inc"
Go to the source code of this file.
Functions | |
| static bool | CC_PPC32_SVR4_Custom_Dummy (unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) |
| static bool | CC_PPC32_SVR4_Custom_AlignArgRegs (unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) |
| static bool | CC_PPC32_SVR4_Custom_AlignFPArgRegs (unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) |
| static TargetLoweringObjectFile * | CreateTLOF (const PPCTargetMachine &TM) |
| static bool | isFloatingPointZero (SDValue Op) |
| isFloatingPointZero - Return true if this is 0.0 or -0.0. | |
| static bool | isConstantOrUndef (int Op, int Val) |
| static bool | isVMerge (ShuffleVectorSDNode *N, unsigned UnitSize, unsigned LHSStart, unsigned RHSStart) |
| static bool | isIntS16Immediate (SDNode *N, short &Imm) |
| static bool | isIntS16Immediate (SDValue Op, short &Imm) |
| static bool | GetLabelAccessInfo (const TargetMachine &TM, unsigned &HiOpFlags, unsigned &LoOpFlags, const GlobalValue *GV=0) |
| static SDValue | LowerLabelRef (SDValue HiPart, SDValue LoPart, bool isPIC, SelectionDAG &DAG) |
| static const uint16_t * | GetFPR () |
| static unsigned | CalculateStackSlotSize (EVT ArgVT, ISD::ArgFlagsTy Flags, unsigned PtrByteSize) |
| static unsigned | CalculateParameterAndLinkageAreaSize (SelectionDAG &DAG, bool isPPC64, bool isVarArg, unsigned CC, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, unsigned &nAltivecParamsAtEnd) |
| static int | CalculateTailCallSPDiff (SelectionDAG &DAG, bool isTailCall, unsigned ParamSize) |
| static SDNode * | isBLACompatibleAddress (SDValue Op, SelectionDAG &DAG) |
| static void | StoreTailCallArgumentsToStackSlot (SelectionDAG &DAG, SDValue Chain, const SmallVector< TailCallArgumentInfo, 8 > &TailCallArgs, SmallVector< SDValue, 8 > &MemOpChains, DebugLoc dl) |
| StoreTailCallArgumentsToStackSlot - Stores arguments to their stack slot. | |
| static SDValue | EmitTailCallStoreFPAndRetAddr (SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue OldRetAddr, SDValue OldFP, int SPDiff, bool isPPC64, bool isDarwinABI, DebugLoc dl) |
| static void | CalculateTailCallArgDest (SelectionDAG &DAG, MachineFunction &MF, bool isPPC64, SDValue Arg, int SPDiff, unsigned ArgOffset, SmallVector< TailCallArgumentInfo, 8 > &TailCallArguments) |
| static SDValue | CreateCopyOfByValArgument (SDValue Src, SDValue Dst, SDValue Chain, ISD::ArgFlagsTy Flags, SelectionDAG &DAG, DebugLoc dl) |
| static void | LowerMemOpCallTo (SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg, SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64, bool isTailCall, bool isVector, SmallVector< SDValue, 8 > &MemOpChains, SmallVector< TailCallArgumentInfo, 8 > &TailCallArguments, DebugLoc dl) |
| static void | PrepareTailCall (SelectionDAG &DAG, SDValue &InFlag, SDValue &Chain, DebugLoc dl, bool isPPC64, int SPDiff, unsigned NumBytes, SDValue LROp, SDValue FPOp, bool isDarwinABI, SmallVector< TailCallArgumentInfo, 8 > &TailCallArguments) |
| static unsigned | PrepareCall (SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain, DebugLoc dl, int SPDiff, bool isTailCall, SmallVector< std::pair< unsigned, SDValue >, 8 > &RegsToPass, SmallVector< SDValue, 8 > &Ops, std::vector< EVT > &NodeTys, const PPCSubtarget &PPCSubTarget) |
| static bool | isLocalCall (const SDValue &Callee) |
| static SDValue | BuildSplatI (int Val, unsigned SplatSize, EVT VT, SelectionDAG &DAG, DebugLoc dl) |
| static SDValue | BuildIntrinsicOp (unsigned IID, SDValue LHS, SDValue RHS, SelectionDAG &DAG, DebugLoc dl, EVT DestVT=MVT::Other) |
| static SDValue | BuildIntrinsicOp (unsigned IID, SDValue Op0, SDValue Op1, SDValue Op2, SelectionDAG &DAG, DebugLoc dl, EVT DestVT=MVT::Other) |
| static SDValue | BuildVSLDOI (SDValue LHS, SDValue RHS, unsigned Amt, EVT VT, SelectionDAG &DAG, DebugLoc dl) |
| static SDValue | GeneratePerfectShuffle (unsigned PFEntry, SDValue LHS, SDValue RHS, SelectionDAG &DAG, DebugLoc dl) |
| static bool | getAltivecCompareInfo (SDValue Intrin, int &CompareOpc, bool &isDot) |
Variables | |
| static cl::opt< bool > | DisablePPCPreinc ("disable-ppc-preinc", cl::desc("disable preincrement load/store generation on PPC"), cl::Hidden) |
| static cl::opt< bool > | DisableILPPref ("disable-ppc-ilp-pref", cl::desc("disable setting the node scheduling preference to ILP on PPC"), cl::Hidden) |
| static cl::opt< bool > | DisablePPCUnaligned ("disable-ppc-unaligned", cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden) |
Function Documentation
| static SDValue BuildIntrinsicOp | ( | unsigned | IID, |
| SDValue | LHS, | ||
| SDValue | RHS, | ||
| SelectionDAG & | DAG, | ||
| DebugLoc | dl, | ||
| EVT | DestVT = MVT::Other |
||
| ) | [static] |
BuildIntrinsicOp - Return a binary operator intrinsic node with the specified intrinsic ID.
Definition at line 5075 of file PPCISelLowering.cpp.
References llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::ISD::INTRINSIC_WO_CHAIN, and llvm::MVT::Other.
| static SDValue BuildIntrinsicOp | ( | unsigned | IID, |
| SDValue | Op0, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SelectionDAG & | DAG, | ||
| DebugLoc | dl, | ||
| EVT | DestVT = MVT::Other |
||
| ) | [static] |
BuildIntrinsicOp - Return a ternary operator intrinsic node with the specified intrinsic ID.
Definition at line 5085 of file PPCISelLowering.cpp.
References llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::ISD::INTRINSIC_WO_CHAIN, and llvm::MVT::Other.
| static SDValue BuildSplatI | ( | int | Val, |
| unsigned | SplatSize, | ||
| EVT | VT, | ||
| SelectionDAG & | DAG, | ||
| DebugLoc | dl | ||
| ) | [static] |
BuildSplatI - Build a canonical splati of Val with an element size of SplatSize. Cast the result to VT.
Definition at line 5048 of file PPCISelLowering.cpp.
References llvm::SmallVectorImpl< T >::assign(), llvm::ISD::BITCAST, llvm::ISD::BUILD_VECTOR, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::EVT::getVectorNumElements(), llvm::MVT::Other, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::MVT::v16i8, llvm::MVT::v4i32, and llvm::MVT::v8i16.
| static SDValue BuildVSLDOI | ( | SDValue | LHS, |
| SDValue | RHS, | ||
| unsigned | Amt, | ||
| EVT | VT, | ||
| SelectionDAG & | DAG, | ||
| DebugLoc | dl | ||
| ) | [static] |
BuildVSLDOI - Return a VECTOR_SHUFFLE that is a vsldoi of the specified amount. The result has the specified value type.
Definition at line 5096 of file PPCISelLowering.cpp.
References llvm::ISD::BITCAST, llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getVectorShuffle(), and llvm::MVT::v16i8.
Referenced by GeneratePerfectShuffle().
| static unsigned CalculateParameterAndLinkageAreaSize | ( | SelectionDAG & | DAG, |
| bool | isPPC64, | ||
| bool | isVarArg, | ||
| unsigned | CC, | ||
| const SmallVectorImpl< ISD::OutputArg > & | Outs, | ||
| const SmallVectorImpl< SDValue > & | OutVals, | ||
| unsigned & | nAltivecParamsAtEnd | ||
| ) | [static] |
CalculateParameterAndLinkageAreaSize - Get the size of the parameter plus linkage area for the Darwin ABI, or the 64-bit SVR4 ABI.
Definition at line 2781 of file PPCISelLowering.cpp.
References CalculateStackSlotSize(), llvm::CallingConv::Fast, llvm::PPCFrameLowering::getLinkageSize(), llvm::SelectionDAG::getMachineFunction(), llvm::PPCFrameLowering::getMinCallFrameSize(), llvm::MachineFunction::getTarget(), llvm::SelectionDAG::getTarget(), llvm::TargetOptions::GuaranteedTailCallOpt, llvm::TargetMachine::Options, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::MVT::v16i8, llvm::MVT::v4f32, llvm::MVT::v4i32, and llvm::MVT::v8i16.
| static unsigned CalculateStackSlotSize | ( | EVT | ArgVT, |
| ISD::ArgFlagsTy | Flags, | ||
| unsigned | PtrByteSize | ||
| ) | [static] |
CalculateStackSlotSize - Calculates the size reserved for this argument on the stack.
Definition at line 1847 of file PPCISelLowering.cpp.
References llvm::ISD::ArgFlagsTy::getByValSize(), llvm::EVT::getSizeInBits(), and llvm::ISD::ArgFlagsTy::isByVal().
Referenced by CalculateParameterAndLinkageAreaSize().
| static void CalculateTailCallArgDest | ( | SelectionDAG & | DAG, |
| MachineFunction & | MF, | ||
| bool | isPPC64, | ||
| SDValue | Arg, | ||
| int | SPDiff, | ||
| unsigned | ArgOffset, | ||
| SmallVector< TailCallArgumentInfo, 8 > & | TailCallArguments | ||
| ) | [static] |
CalculateTailCallArgDest - Remember Argument for later processing. Calculate the position of the argument.
Definition at line 2990 of file PPCISelLowering.cpp.
References llvm::MachineFrameInfo::CreateFixedObject(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MVT::i64, llvm::X86II::OpSize, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by LowerMemOpCallTo().
| static int CalculateTailCallSPDiff | ( | SelectionDAG & | DAG, |
| bool | isTailCall, | ||
| unsigned | ParamSize | ||
| ) | [static] |
CalculateTailCallSPDiff - Get the amount the stack pointer has to be adjusted to accommodate the arguments for the tailcall.
Definition at line 2848 of file PPCISelLowering.cpp.
References llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getMachineFunction(), llvm::PPCFunctionInfo::getMinReservedArea(), and llvm::PPCFunctionInfo::setTailCallSPDelta().
| static bool CC_PPC32_SVR4_Custom_AlignArgRegs | ( | unsigned & | ValNo, |
| MVT & | ValVT, | ||
| MVT & | LocVT, | ||
| CCValAssign::LocInfo & | LocInfo, | ||
| ISD::ArgFlagsTy & | ArgFlags, | ||
| CCState & | State | ||
| ) | [static] |
Definition at line 1780 of file PPCISelLowering.cpp.
References llvm::CCState::AllocateReg(), llvm::array_lengthof(), llvm::CCState::getFirstUnallocated(), and NumArgRegs.
| static bool CC_PPC32_SVR4_Custom_AlignFPArgRegs | ( | unsigned & | ValNo, |
| MVT & | ValVT, | ||
| MVT & | LocVT, | ||
| CCValAssign::LocInfo & | LocInfo, | ||
| ISD::ArgFlagsTy & | ArgFlags, | ||
| CCState & | State | ||
| ) | [static] |
Definition at line 1807 of file PPCISelLowering.cpp.
References llvm::CCState::AllocateReg(), llvm::array_lengthof(), llvm::CCState::getFirstUnallocated(), and NumArgRegs.
| static bool CC_PPC32_SVR4_Custom_Dummy | ( | unsigned & | ValNo, |
| MVT & | ValVT, | ||
| MVT & | LocVT, | ||
| CCValAssign::LocInfo & | LocInfo, | ||
| ISD::ArgFlagsTy & | ArgFlags, | ||
| CCState & | State | ||
| ) | [static] |
Definition at line 1773 of file PPCISelLowering.cpp.
| static SDValue CreateCopyOfByValArgument | ( | SDValue | Src, |
| SDValue | Dst, | ||
| SDValue | Chain, | ||
| ISD::ArgFlagsTy | Flags, | ||
| SelectionDAG & | DAG, | ||
| DebugLoc | dl | ||
| ) | [static] |
CreateCopyOfByValArgument - Make a copy of an aggregate at address specified by "Src" to address "Dst" of size "Size". Alignment information is specified by the specific parameter attribute. The copy will be passed as a byval function parameter. Sometimes what we are copying is the end of a larger object, the part that does not fit in registers.
Definition at line 3042 of file PPCISelLowering.cpp.
References llvm::ISD::ArgFlagsTy::getByValAlign(), llvm::ISD::ArgFlagsTy::getByValSize(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getMemcpy(), and llvm::MVT::i32.
| static TargetLoweringObjectFile* CreateTLOF | ( | const PPCTargetMachine & | TM | ) | [static] |
Definition at line 64 of file PPCISelLowering.cpp.
References llvm::PPCTargetMachine::getSubtargetImpl(), llvm::PPCSubtarget::isDarwin(), and llvm::PPCSubtarget::isSVR4ABI().
| static SDValue EmitTailCallStoreFPAndRetAddr | ( | SelectionDAG & | DAG, |
| MachineFunction & | MF, | ||
| SDValue | Chain, | ||
| SDValue | OldRetAddr, | ||
| SDValue | OldFP, | ||
| int | SPDiff, | ||
| bool | isPPC64, | ||
| bool | isDarwinABI, | ||
| DebugLoc | dl | ||
| ) | [static] |
EmitTailCallStoreFPAndRetAddr - Move the frame pointer and return address to the appropriate stack slot for the tail call optimized function call.
Definition at line 2949 of file PPCISelLowering.cpp.
References llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFrameLowering::getFramePointerSaveOffset(), llvm::PPCFrameLowering::getReturnSaveOffset(), llvm::SelectionDAG::getStore(), llvm::MVT::i32, and llvm::MVT::i64.
Referenced by PrepareTailCall().
| static SDValue GeneratePerfectShuffle | ( | unsigned | PFEntry, |
| SDValue | LHS, | ||
| SDValue | RHS, | ||
| SelectionDAG & | DAG, | ||
| DebugLoc | dl | ||
| ) | [static] |
GeneratePerfectShuffle - Given an entry in the perfect-shuffle table, emit the specified operations to build the shuffle.
Definition at line 5270 of file PPCISelLowering.cpp.
References llvm::ISD::BITCAST, BuildVSLDOI(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVectorShuffle(), llvm_unreachable, PerfectShuffleTable, and llvm::MVT::v16i8.
getAltivecCompareInfo - Given an intrinsic, return false if it is not an altivec comparison. If it is, return true and fill in Opc/isDot with information about the intrinsic.
Definition at line 5471 of file PPCISelLowering.cpp.
References llvm::SDValue::getOperand().
Referenced by llvm::PPCTargetLowering::PerformDAGCombine().
| static const uint16_t* GetFPR | ( | ) | [static] |
GetFPR - Get the set of FP registers that should be allocated for arguments, on Darwin.
Definition at line 1836 of file PPCISelLowering.cpp.
| static bool GetLabelAccessInfo | ( | const TargetMachine & | TM, |
| unsigned & | HiOpFlags, | ||
| unsigned & | LoOpFlags, | ||
| const GlobalValue * | GV = 0 |
||
| ) | [static] |
GetLabelAccessInfo - Return true if we should reference labels using a PICBase, set the HiOpFlags and LoOpFlags to the target MO flags.
Definition at line 1253 of file PPCISelLowering.cpp.
References llvm::TargetMachine::getRelocationModel(), llvm::TargetMachine::getSubtarget(), llvm::PPCSubtarget::hasLazyResolverStub(), llvm::PPCII::MO_HA16, llvm::PPCII::MO_LO16, llvm::PPCII::MO_NLP_FLAG, llvm::PPCII::MO_NLP_HIDDEN_FLAG, llvm::PPCII::MO_PIC_FLAG, and llvm::Reloc::PIC_.
| static SDNode* isBLACompatibleAddress | ( | SDValue | Op, |
| SelectionDAG & | DAG | ||
| ) | [static] |
isCallCompatibleAddress - Return the immediate to use if the specified 32-bit value is representable in the immediate field of a BxA instruction.
Definition at line 2904 of file PPCISelLowering.cpp.
References llvm::dyn_cast(), llvm::SelectionDAG::getConstant(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), and llvm::ConstantSDNode::getZExtValue().
Referenced by PrepareCall().
| static bool isConstantOrUndef | ( | int | Op, |
| int | Val | ||
| ) | [static] |
isConstantOrUndef - Op is either an undef node or a ConstantSDNode. Return true if Op is undef or if it matches the specified value.
Definition at line 703 of file PPCISelLowering.cpp.
Referenced by isVMerge(), llvm::PPC::isVPKUHUMShuffleMask(), llvm::PPC::isVPKUWUMShuffleMask(), and llvm::PPC::isVSLDOIShuffleMask().
isFloatingPointZero - Return true if this is 0.0 or -0.0.
Definition at line 689 of file PPCISelLowering.cpp.
References llvm::SDValue::getNode(), llvm::SDValue::getOperand(), llvm::ISD::isEXTLoad(), and llvm::ISD::isNON_EXTLoad().
isIntS16Immediate - This method tests to see if the node is either a 32-bit or 64-bit immediate, and if the value can be accurately represented as a sign extension from a 16-bit value. If so, this returns true and the immediate.
Definition at line 990 of file PPCISelLowering.cpp.
References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i32.
Definition at line 1000 of file PPCISelLowering.cpp.
References llvm::SDValue::getNode(), and isIntS16Immediate().
Definition at line 3282 of file PPCISelLowering.cpp.
| static bool isVMerge | ( | ShuffleVectorSDNode * | N, |
| unsigned | UnitSize, | ||
| unsigned | LHSStart, | ||
| unsigned | RHSStart | ||
| ) | [static] |
isVMerge - Common function, used to match vmrg* shuffles.
Definition at line 744 of file PPCISelLowering.cpp.
References llvm::ShuffleVectorSDNode::getMaskElt(), llvm::SDNode::getValueType(), isConstantOrUndef(), and llvm::MVT::v16i8.
Referenced by llvm::PPC::isVMRGHShuffleMask(), and llvm::PPC::isVMRGLShuffleMask().
| static SDValue LowerLabelRef | ( | SDValue | HiPart, |
| SDValue | LoPart, | ||
| bool | isPIC, | ||
| SelectionDAG & | DAG | ||
| ) | [static] |
Definition at line 1282 of file PPCISelLowering.cpp.
References llvm::ISD::ADD, llvm::SelectionDAG::getConstant(), llvm::SDValue::getDebugLoc(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::PPCISD::GlobalBaseReg, llvm::HexagonISD::Hi, llvm::PPCISD::Hi, llvm::HexagonISD::Lo, and llvm::PPCISD::Lo.
| static void LowerMemOpCallTo | ( | SelectionDAG & | DAG, |
| MachineFunction & | MF, | ||
| SDValue | Chain, | ||
| SDValue | Arg, | ||
| SDValue | PtrOff, | ||
| int | SPDiff, | ||
| unsigned | ArgOffset, | ||
| bool | isPPC64, | ||
| bool | isTailCall, | ||
| bool | isVector, | ||
| SmallVector< SDValue, 8 > & | MemOpChains, | ||
| SmallVector< TailCallArgumentInfo, 8 > & | TailCallArguments, | ||
| DebugLoc | dl | ||
| ) | [static] |
LowerMemOpCallTo - Store the argument to the stack or remember it in case of tail calls.
Definition at line 3054 of file PPCISelLowering.cpp.
References llvm::ISD::ADD, CalculateTailCallArgDest(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::MVT::i64, and llvm::SmallVectorTemplateBase< T, isPodLike >::push_back().
| static unsigned PrepareCall | ( | SelectionDAG & | DAG, |
| SDValue & | Callee, | ||
| SDValue & | InFlag, | ||
| SDValue & | Chain, | ||
| DebugLoc | dl, | ||
| int | SPDiff, | ||
| bool | isTailCall, | ||
| SmallVector< std::pair< unsigned, SDValue >, 8 > & | RegsToPass, | ||
| SmallVector< SDValue, 8 > & | Ops, | ||
| std::vector< EVT > & | NodeTys, | ||
| const PPCSubtarget & | PPCSubTarget | ||
| ) | [static] |
Definition at line 3107 of file PPCISelLowering.cpp.
References llvm::ISD::ADD, llvm::PPCISD::BCTRL, llvm::PPCISD::CALL, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getRegister(), llvm::TargetMachine::getRelocationModel(), llvm::TargetMachine::getSubtarget(), llvm::SelectionDAG::getTarget(), llvm::SelectionDAG::getTargetExternalSymbol(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::PPCSubtarget::getTargetTriple(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVTList(), llvm::MVT::Glue, llvm::MVT::i64, isBLACompatibleAddress(), llvm::Triple::isMacOSX(), llvm::Triple::isMacOSXVersionLT(), llvm::PPCSubtarget::isPPC64(), llvm::PPCSubtarget::isSVR4ABI(), llvm::PPCISD::LOAD, llvm::PPCISD::LOAD_TOC, llvm::PPCII::MO_DARWIN_STUB, llvm::PPCISD::MTCTR, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SDValue::setNode(), and llvm::Reloc::Static.
| static void PrepareTailCall | ( | SelectionDAG & | DAG, |
| SDValue & | InFlag, | ||
| SDValue & | Chain, | ||
| DebugLoc | dl, | ||
| bool | isPPC64, | ||
| int | SPDiff, | ||
| unsigned | NumBytes, | ||
| SDValue | LROp, | ||
| SDValue | FPOp, | ||
| bool | isDarwinABI, | ||
| SmallVector< TailCallArgumentInfo, 8 > & | TailCallArguments | ||
| ) | [static] |
Definition at line 3079 of file PPCISelLowering.cpp.
References EmitTailCallStoreFPAndRetAddr(), llvm::SmallVectorBase::empty(), llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValue(), llvm::MVT::Other, llvm::SmallVectorTemplateCommon< T, typename >::size(), StoreTailCallArgumentsToStackSlot(), and llvm::ISD::TokenFactor.
| static void StoreTailCallArgumentsToStackSlot | ( | SelectionDAG & | DAG, |
| SDValue | Chain, | ||
| const SmallVector< TailCallArgumentInfo, 8 > & | TailCallArgs, | ||
| SmallVector< SDValue, 8 > & | MemOpChains, | ||
| DebugLoc | dl | ||
| ) | [static] |
StoreTailCallArgumentsToStackSlot - Stores arguments to their stack slot.
Definition at line 2931 of file PPCISelLowering.cpp.
References llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getStore(), llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), and llvm::SmallVectorTemplateCommon< T >::size().
Referenced by PrepareTailCall().
Variable Documentation
cl::opt<bool> DisableILPPref("disable-ppc-ilp-pref", cl::desc("disable setting the node scheduling preference to ILP on PPC"), cl::Hidden) [static] |
Referenced by llvm::PPCTargetLowering::getSchedulingPreference().
cl::opt<bool> DisablePPCPreinc("disable-ppc-preinc", cl::desc("disable preincrement load/store generation on PPC"), cl::Hidden) [static] |
Referenced by llvm::PPCTargetLowering::getPreIndexedAddressParts().
cl::opt<bool> DisablePPCUnaligned("disable-ppc-unaligned", cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden) [static] |
Referenced by llvm::PPCTargetLowering::allowsUnalignedMemoryAccesses().
1.7.5.1