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ARMMCInstLower.cpp
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1 //===-- ARMMCInstLower.cpp - Convert ARM MachineInstr to an MCInst --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains code to lower ARM MachineInstrs to their corresponding
11 // MCInst records.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "ARM.h"
16 #include "ARMAsmPrinter.h"
17 #include "ARMBaseInstrInfo.h"
18 #include "ARMMachineFunctionInfo.h"
19 #include "ARMSubtarget.h"
22 #include "MCTargetDesc/ARMMCExpr.h"
23 #include "llvm/ADT/APFloat.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/MC/MCContext.h"
29 #include "llvm/MC/MCExpr.h"
30 #include "llvm/MC/MCInst.h"
31 #include "llvm/MC/MCInstBuilder.h"
32 #include "llvm/MC/MCStreamer.h"
34 #include <cassert>
35 #include <cstdint>
36 
37 using namespace llvm;
38 
39 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
40  const MCSymbol *Symbol) {
43  SymbolVariant = MCSymbolRefExpr::VK_ARM_SBREL;
44 
45  const MCExpr *Expr =
46  MCSymbolRefExpr::create(Symbol, SymbolVariant, OutContext);
47  switch (MO.getTargetFlags() & ARMII::MO_OPTION_MASK) {
48  default:
49  llvm_unreachable("Unknown target flag on symbol operand");
50  case ARMII::MO_NO_FLAG:
51  break;
52  case ARMII::MO_LO16:
53  Expr =
54  MCSymbolRefExpr::create(Symbol, SymbolVariant, OutContext);
56  break;
57  case ARMII::MO_HI16:
58  Expr =
59  MCSymbolRefExpr::create(Symbol, SymbolVariant, OutContext);
61  break;
62  }
63 
64  if (!MO.isJTI() && MO.getOffset())
65  Expr = MCBinaryExpr::createAdd(Expr,
67  OutContext),
68  OutContext);
69  return MCOperand::createExpr(Expr);
70 
71 }
72 
74  MCOperand &MCOp) {
75  switch (MO.getType()) {
76  default: llvm_unreachable("unknown operand type");
78  // Ignore all non-CPSR implicit register operands.
79  if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
80  return false;
81  assert(!MO.getSubReg() && "Subregs should be eliminated!");
82  MCOp = MCOperand::createReg(MO.getReg());
83  break;
85  MCOp = MCOperand::createImm(MO.getImm());
86  break;
89  MO.getMBB()->getSymbol(), OutContext));
90  break;
92  MCOp = GetSymbolRef(MO,
93  GetARMGVSymbol(MO.getGlobal(), MO.getTargetFlags()));
94  break;
96  MCOp = GetSymbolRef(MO,
98  break;
100  MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
101  break;
103  if (Subtarget->genExecuteOnly())
104  llvm_unreachable("execute-only should not generate constant pools");
105  MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
106  break;
108  MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
109  break;
111  APFloat Val = MO.getFPImm()->getValueAPF();
112  bool ignored;
115  break;
116  }
118  // Ignore call clobbers.
119  return false;
120  }
121  return true;
122 }
123 
125  ARMAsmPrinter &AP) {
126  OutMI.setOpcode(MI->getOpcode());
127 
128  // In the MC layer, we keep modified immediates in their encoded form
129  bool EncodeImms = false;
130  switch (MI->getOpcode()) {
131  default: break;
132  case ARM::MOVi:
133  case ARM::MVNi:
134  case ARM::CMPri:
135  case ARM::CMNri:
136  case ARM::TSTri:
137  case ARM::TEQri:
138  case ARM::MSRi:
139  case ARM::ADCri:
140  case ARM::ADDri:
141  case ARM::ADDSri:
142  case ARM::SBCri:
143  case ARM::SUBri:
144  case ARM::SUBSri:
145  case ARM::ANDri:
146  case ARM::ORRri:
147  case ARM::EORri:
148  case ARM::BICri:
149  case ARM::RSBri:
150  case ARM::RSBSri:
151  case ARM::RSCri:
152  EncodeImms = true;
153  break;
154  }
155 
156  for (const MachineOperand &MO : MI->operands()) {
157  MCOperand MCOp;
158  if (AP.lowerOperand(MO, MCOp)) {
159  if (MCOp.isImm() && EncodeImms) {
160  int32_t Enc = ARM_AM::getSOImmVal(MCOp.getImm());
161  if (Enc != -1)
162  MCOp.setImm(Enc);
163  }
164  OutMI.addOperand(MCOp);
165  }
166  }
167 }
168 
169 void ARMAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind)
170 {
172  ->isThumbFunction())
173  {
174  MI.emitError("An attempt to perform XRay instrumentation for a"
175  " Thumb function (not supported). Detected when emitting a sled.");
176  return;
177  }
178  static const int8_t NoopsInSledCount = 6;
179  // We want to emit the following pattern:
180  //
181  // .Lxray_sled_N:
182  // ALIGN
183  // B #20
184  // ; 6 NOP instructions (24 bytes)
185  // .tmpN
186  //
187  // We need the 24 bytes (6 instructions) because at runtime, we'd be patching
188  // over the full 28 bytes (7 instructions) with the following pattern:
189  //
190  // PUSH{ r0, lr }
191  // MOVW r0, #<lower 16 bits of function ID>
192  // MOVT r0, #<higher 16 bits of function ID>
193  // MOVW ip, #<lower 16 bits of address of __xray_FunctionEntry/Exit>
194  // MOVT ip, #<higher 16 bits of address of __xray_FunctionEntry/Exit>
195  // BLX ip
196  // POP{ r0, lr }
197  //
198  OutStreamer->EmitCodeAlignment(4);
199  auto CurSled = OutContext.createTempSymbol("xray_sled_", true);
200  OutStreamer->EmitLabel(CurSled);
202 
203  // Emit "B #20" instruction, which jumps over the next 24 bytes (because
204  // register pc is 8 bytes ahead of the jump instruction by the moment CPU
205  // is executing it).
206  // By analogy to ARMAsmPrinter::emitPseudoExpansionLowering() |case ARM::B|.
207  // It is not clear why |addReg(0)| is needed (the last operand).
208  EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::Bcc).addImm(20)
209  .addImm(ARMCC::AL).addReg(0));
210 
211  MCInst Noop;
212  Subtarget->getInstrInfo()->getNoop(Noop);
213  for (int8_t I = 0; I < NoopsInSledCount; I++)
214  OutStreamer->EmitInstruction(Noop, getSubtargetInfo());
215 
216  OutStreamer->EmitLabel(Target);
217  recordSled(CurSled, MI, Kind);
218 }
219 
221 {
222  EmitSled(MI, SledKind::FUNCTION_ENTER);
223 }
224 
226 {
227  EmitSled(MI, SledKind::FUNCTION_EXIT);
228 }
229 
231 {
232  EmitSled(MI, SledKind::TAIL_CALL);
233 }
unsigned getTargetFlags() const
bool isImm() const
Definition: MCInst.h:59
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp)
MachineBasicBlock * getMBB() const
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:93
void emitError(StringRef Msg) const
Emit an error referring to the source location of this instruction.
MCSymbol * GetExternalSymbolSymbol(StringRef Sym) const
Return the MCSymbol for the specified ExternalSymbol.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:305
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:88
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:137
const MCSubtargetInfo & getSubtargetInfo() const
Return information about subtarget.
Definition: AsmPrinter.cpp:204
unsigned getReg() const
getReg - Returns the register number.
Address of indexed Jump Table for switch.
unsigned getSubReg() const
MachineBasicBlock reference.
void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI)
iterator_range< mop_iterator > operands()
Definition: MachineInstr.h:306
bool genExecuteOnly() const
Definition: ARMSubtarget.h:568
Mask of preserved registers.
const ARMBaseInstrInfo * getInstrInfo() const override
Definition: ARMSubtarget.h:437
MO_SBREL - On a symbol operand, this represents a static base relative relocation.
Definition: ARMBaseInfo.h:298
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:116
const ConstantFP * getFPImm() const
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
Name of external global symbol.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:279
const char * getSymbolName() const
static const ARMMCExpr * createLower16(const MCExpr *Expr, MCContext &Ctx)
Definition: ARMMCExpr.h:43
opStatus convert(const fltSemantics &ToSemantics, roundingMode RM, bool *losesInfo)
Definition: APFloat.cpp:4441
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:122
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:443
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI)
int64_t getImm() const
Definition: MCInst.h:76
Address of a global value.
void setImm(int64_t Val)
Definition: MCInst.h:81
MCSymbol * createTempSymbol(bool CanBeUnnamed=true)
Create and return a new assembler temporary symbol with a unique but unspecified name.
Definition: MCContext.cpp:215
This file contains the declarations for the subclasses of Constant, which represent the different fla...
void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind)
const GlobalValue * getGlobal() const
double convertToDouble() const
Definition: APFloat.h:1097
This file declares a class to represent arbitrary precision floating point values and provide a varie...
Address of a basic block.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MO_LO16 - On a symbol operand, this represents a relocation containing lower 16 bit of the address...
Definition: ARMBaseInfo.h:286
const APFloat & getValueAPF() const
Definition: Constants.h:294
void setOpcode(unsigned Op)
Definition: MCInst.h:167
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
MachineOperand class - Representation of each machine instruction operand.
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:209
static MCOperand createFPImm(double Val)
Definition: MCInst.h:130
int64_t getImm() const
Target - Wrapper for Target specific information.
void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, ARMAsmPrinter &AP)
static int getSOImmVal(unsigned Arg)
getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immed...
void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:139
Representation of each machine instruction.
Definition: MachineInstr.h:59
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const
Return the symbol for the specified jump table entry.
ARMFunctionInfo - This class is derived from MachineFunctionInfo and contains private ARM-specific in...
int64_t getOffset() const
Return the offset from the symbol in this operand.
const BlockAddress * getBlockAddress() const
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define I(x, y, z)
Definition: MD5.cpp:58
static const ARMMCExpr * createUpper16(const MCExpr *Expr, MCContext &Ctx)
Definition: ARMMCExpr.h:39
MO_OPTION_MASK - Most flags are mutually exclusive; this mask selects just that part of the flag set...
Definition: ARMBaseInfo.h:294
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Floating-point immediate operand.
IRTranslator LLVM IR MI
void addOperand(const MCOperand &Op)
Definition: MCInst.h:177
Address of indexed Constant in Constant Pool.
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static MCOperand createImm(int64_t Val)
Definition: MCInst.h:123
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx)
Definition: MCExpr.cpp:159
MO_HI16 - On a symbol operand, this represents a relocation containing higher 16 bit of the address...
Definition: ARMBaseInfo.h:290
bool isImplicit() const