LLVM  9.0.0svn
AutoUpgrade.cpp
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1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the auto-upgrade helper functions.
10 // This is where deprecated IR intrinsics and other IR features are updated to
11 // current specifications.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/IR/AutoUpgrade.h"
16 #include "llvm/ADT/StringSwitch.h"
17 #include "llvm/IR/Constants.h"
18 #include "llvm/IR/DIBuilder.h"
19 #include "llvm/IR/DebugInfo.h"
20 #include "llvm/IR/DiagnosticInfo.h"
21 #include "llvm/IR/Function.h"
22 #include "llvm/IR/IRBuilder.h"
23 #include "llvm/IR/Instruction.h"
24 #include "llvm/IR/IntrinsicInst.h"
25 #include "llvm/IR/LLVMContext.h"
26 #include "llvm/IR/Module.h"
27 #include "llvm/IR/Verifier.h"
29 #include "llvm/Support/Regex.h"
30 #include <cstring>
31 using namespace llvm;
32 
33 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); }
34 
35 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have
36 // changed their type from v4f32 to v2i64.
38  Function *&NewFn) {
39  // Check whether this is an old version of the function, which received
40  // v4f32 arguments.
41  Type *Arg0Type = F->getFunctionType()->getParamType(0);
42  if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4))
43  return false;
44 
45  // Yes, it's old, replace it with new version.
46  rename(F);
47  NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
48  return true;
49 }
50 
51 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask
52 // arguments have changed their type from i32 to i8.
54  Function *&NewFn) {
55  // Check that the last argument is an i32.
56  Type *LastArgType = F->getFunctionType()->getParamType(
57  F->getFunctionType()->getNumParams() - 1);
58  if (!LastArgType->isIntegerTy(32))
59  return false;
60 
61  // Move this function aside and map down.
62  rename(F);
63  NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
64  return true;
65 }
66 
68  // All of the intrinsics matches below should be marked with which llvm
69  // version started autoupgrading them. At some point in the future we would
70  // like to use this information to remove upgrade code for some older
71  // intrinsics. It is currently undecided how we will determine that future
72  // point.
73  if (Name == "addcarryx.u32" || // Added in 8.0
74  Name == "addcarryx.u64" || // Added in 8.0
75  Name == "addcarry.u32" || // Added in 8.0
76  Name == "addcarry.u64" || // Added in 8.0
77  Name == "subborrow.u32" || // Added in 8.0
78  Name == "subborrow.u64" || // Added in 8.0
79  Name.startswith("sse2.padds.") || // Added in 8.0
80  Name.startswith("sse2.psubs.") || // Added in 8.0
81  Name.startswith("sse2.paddus.") || // Added in 8.0
82  Name.startswith("sse2.psubus.") || // Added in 8.0
83  Name.startswith("avx2.padds.") || // Added in 8.0
84  Name.startswith("avx2.psubs.") || // Added in 8.0
85  Name.startswith("avx2.paddus.") || // Added in 8.0
86  Name.startswith("avx2.psubus.") || // Added in 8.0
87  Name.startswith("avx512.padds.") || // Added in 8.0
88  Name.startswith("avx512.psubs.") || // Added in 8.0
89  Name.startswith("avx512.mask.padds.") || // Added in 8.0
90  Name.startswith("avx512.mask.psubs.") || // Added in 8.0
91  Name.startswith("avx512.mask.paddus.") || // Added in 8.0
92  Name.startswith("avx512.mask.psubus.") || // Added in 8.0
93  Name=="ssse3.pabs.b.128" || // Added in 6.0
94  Name=="ssse3.pabs.w.128" || // Added in 6.0
95  Name=="ssse3.pabs.d.128" || // Added in 6.0
96  Name.startswith("fma4.vfmadd.s") || // Added in 7.0
97  Name.startswith("fma.vfmadd.") || // Added in 7.0
98  Name.startswith("fma.vfmsub.") || // Added in 7.0
99  Name.startswith("fma.vfmaddsub.") || // Added in 7.0
100  Name.startswith("fma.vfmsubadd.") || // Added in 7.0
101  Name.startswith("fma.vfnmadd.") || // Added in 7.0
102  Name.startswith("fma.vfnmsub.") || // Added in 7.0
103  Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0
104  Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0
105  Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0
106  Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0
107  Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0
108  Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0
109  Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0
110  Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0
111  Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0
112  Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0
113  Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0
114  Name.startswith("avx512.mask.shuf.i") || // Added in 6.0
115  Name.startswith("avx512.mask.shuf.f") || // Added in 6.0
116  Name.startswith("avx512.kunpck") || //added in 6.0
117  Name.startswith("avx2.pabs.") || // Added in 6.0
118  Name.startswith("avx512.mask.pabs.") || // Added in 6.0
119  Name.startswith("avx512.broadcastm") || // Added in 6.0
120  Name == "sse.sqrt.ss" || // Added in 7.0
121  Name == "sse2.sqrt.sd" || // Added in 7.0
122  Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0
123  Name.startswith("avx.sqrt.p") || // Added in 7.0
124  Name.startswith("sse2.sqrt.p") || // Added in 7.0
125  Name.startswith("sse.sqrt.p") || // Added in 7.0
126  Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0
127  Name.startswith("sse2.pcmpeq.") || // Added in 3.1
128  Name.startswith("sse2.pcmpgt.") || // Added in 3.1
129  Name.startswith("avx2.pcmpeq.") || // Added in 3.1
130  Name.startswith("avx2.pcmpgt.") || // Added in 3.1
131  Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9
132  Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9
133  Name.startswith("avx.vperm2f128.") || // Added in 6.0
134  Name == "avx2.vperm2i128" || // Added in 6.0
135  Name == "sse.add.ss" || // Added in 4.0
136  Name == "sse2.add.sd" || // Added in 4.0
137  Name == "sse.sub.ss" || // Added in 4.0
138  Name == "sse2.sub.sd" || // Added in 4.0
139  Name == "sse.mul.ss" || // Added in 4.0
140  Name == "sse2.mul.sd" || // Added in 4.0
141  Name == "sse.div.ss" || // Added in 4.0
142  Name == "sse2.div.sd" || // Added in 4.0
143  Name == "sse41.pmaxsb" || // Added in 3.9
144  Name == "sse2.pmaxs.w" || // Added in 3.9
145  Name == "sse41.pmaxsd" || // Added in 3.9
146  Name == "sse2.pmaxu.b" || // Added in 3.9
147  Name == "sse41.pmaxuw" || // Added in 3.9
148  Name == "sse41.pmaxud" || // Added in 3.9
149  Name == "sse41.pminsb" || // Added in 3.9
150  Name == "sse2.pmins.w" || // Added in 3.9
151  Name == "sse41.pminsd" || // Added in 3.9
152  Name == "sse2.pminu.b" || // Added in 3.9
153  Name == "sse41.pminuw" || // Added in 3.9
154  Name == "sse41.pminud" || // Added in 3.9
155  Name == "avx512.kand.w" || // Added in 7.0
156  Name == "avx512.kandn.w" || // Added in 7.0
157  Name == "avx512.knot.w" || // Added in 7.0
158  Name == "avx512.kor.w" || // Added in 7.0
159  Name == "avx512.kxor.w" || // Added in 7.0
160  Name == "avx512.kxnor.w" || // Added in 7.0
161  Name == "avx512.kortestc.w" || // Added in 7.0
162  Name == "avx512.kortestz.w" || // Added in 7.0
163  Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0
164  Name.startswith("avx2.pmax") || // Added in 3.9
165  Name.startswith("avx2.pmin") || // Added in 3.9
166  Name.startswith("avx512.mask.pmax") || // Added in 4.0
167  Name.startswith("avx512.mask.pmin") || // Added in 4.0
168  Name.startswith("avx2.vbroadcast") || // Added in 3.8
169  Name.startswith("avx2.pbroadcast") || // Added in 3.8
170  Name.startswith("avx.vpermil.") || // Added in 3.1
171  Name.startswith("sse2.pshuf") || // Added in 3.9
172  Name.startswith("avx512.pbroadcast") || // Added in 3.9
173  Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9
174  Name.startswith("avx512.mask.movddup") || // Added in 3.9
175  Name.startswith("avx512.mask.movshdup") || // Added in 3.9
176  Name.startswith("avx512.mask.movsldup") || // Added in 3.9
177  Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9
178  Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9
179  Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9
180  Name.startswith("avx512.mask.shuf.p") || // Added in 4.0
181  Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9
182  Name.startswith("avx512.mask.perm.df.") || // Added in 3.9
183  Name.startswith("avx512.mask.perm.di.") || // Added in 3.9
184  Name.startswith("avx512.mask.punpckl") || // Added in 3.9
185  Name.startswith("avx512.mask.punpckh") || // Added in 3.9
186  Name.startswith("avx512.mask.unpckl.") || // Added in 3.9
187  Name.startswith("avx512.mask.unpckh.") || // Added in 3.9
188  Name.startswith("avx512.mask.pand.") || // Added in 3.9
189  Name.startswith("avx512.mask.pandn.") || // Added in 3.9
190  Name.startswith("avx512.mask.por.") || // Added in 3.9
191  Name.startswith("avx512.mask.pxor.") || // Added in 3.9
192  Name.startswith("avx512.mask.and.") || // Added in 3.9
193  Name.startswith("avx512.mask.andn.") || // Added in 3.9
194  Name.startswith("avx512.mask.or.") || // Added in 3.9
195  Name.startswith("avx512.mask.xor.") || // Added in 3.9
196  Name.startswith("avx512.mask.padd.") || // Added in 4.0
197  Name.startswith("avx512.mask.psub.") || // Added in 4.0
198  Name.startswith("avx512.mask.pmull.") || // Added in 4.0
199  Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0
200  Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0
201  Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0
202  Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0
203  Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0
204  Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0
205  Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0
206  Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0
207  Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0
208  Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0
209  Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0
210  Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0
211  Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0
212  Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0
213  Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0
214  Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0
215  Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0
216  Name == "avx512.cvtusi2sd" || // Added in 7.0
217  Name.startswith("avx512.mask.permvar.") || // Added in 7.0
218  Name == "sse2.pmulu.dq" || // Added in 7.0
219  Name == "sse41.pmuldq" || // Added in 7.0
220  Name == "avx2.pmulu.dq" || // Added in 7.0
221  Name == "avx2.pmul.dq" || // Added in 7.0
222  Name == "avx512.pmulu.dq.512" || // Added in 7.0
223  Name == "avx512.pmul.dq.512" || // Added in 7.0
224  Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0
225  Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0
226  Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0
227  Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0
228  Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0
229  Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0
230  Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0
231  Name.startswith("avx512.mask.packsswb.") || // Added in 5.0
232  Name.startswith("avx512.mask.packssdw.") || // Added in 5.0
233  Name.startswith("avx512.mask.packuswb.") || // Added in 5.0
234  Name.startswith("avx512.mask.packusdw.") || // Added in 5.0
235  Name.startswith("avx512.mask.cmp.b") || // Added in 5.0
236  Name.startswith("avx512.mask.cmp.d") || // Added in 5.0
237  Name.startswith("avx512.mask.cmp.q") || // Added in 5.0
238  Name.startswith("avx512.mask.cmp.w") || // Added in 5.0
239  Name.startswith("avx512.mask.cmp.p") || // Added in 7.0
240  Name.startswith("avx512.mask.ucmp.") || // Added in 5.0
241  Name.startswith("avx512.cvtb2mask.") || // Added in 7.0
242  Name.startswith("avx512.cvtw2mask.") || // Added in 7.0
243  Name.startswith("avx512.cvtd2mask.") || // Added in 7.0
244  Name.startswith("avx512.cvtq2mask.") || // Added in 7.0
245  Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0
246  Name.startswith("avx512.mask.psll.d") || // Added in 4.0
247  Name.startswith("avx512.mask.psll.q") || // Added in 4.0
248  Name.startswith("avx512.mask.psll.w") || // Added in 4.0
249  Name.startswith("avx512.mask.psra.d") || // Added in 4.0
250  Name.startswith("avx512.mask.psra.q") || // Added in 4.0
251  Name.startswith("avx512.mask.psra.w") || // Added in 4.0
252  Name.startswith("avx512.mask.psrl.d") || // Added in 4.0
253  Name.startswith("avx512.mask.psrl.q") || // Added in 4.0
254  Name.startswith("avx512.mask.psrl.w") || // Added in 4.0
255  Name.startswith("avx512.mask.pslli") || // Added in 4.0
256  Name.startswith("avx512.mask.psrai") || // Added in 4.0
257  Name.startswith("avx512.mask.psrli") || // Added in 4.0
258  Name.startswith("avx512.mask.psllv") || // Added in 4.0
259  Name.startswith("avx512.mask.psrav") || // Added in 4.0
260  Name.startswith("avx512.mask.psrlv") || // Added in 4.0
261  Name.startswith("sse41.pmovsx") || // Added in 3.8
262  Name.startswith("sse41.pmovzx") || // Added in 3.9
263  Name.startswith("avx2.pmovsx") || // Added in 3.9
264  Name.startswith("avx2.pmovzx") || // Added in 3.9
265  Name.startswith("avx512.mask.pmovsx") || // Added in 4.0
266  Name.startswith("avx512.mask.pmovzx") || // Added in 4.0
267  Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0
268  Name.startswith("avx512.mask.pternlog.") || // Added in 7.0
269  Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0
270  Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0
271  Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0
272  Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0
273  Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0
274  Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0
275  Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0
276  Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0
277  Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0
278  Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0
279  Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0
280  Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0
281  Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0
282  Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0
283  Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0
284  Name.startswith("avx512.mask.vpshld.") || // Added in 7.0
285  Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0
286  Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0
287  Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0
288  Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0
289  Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0
290  Name.startswith("avx512.vpshld.") || // Added in 8.0
291  Name.startswith("avx512.vpshrd.") || // Added in 8.0
292  Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0
293  Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0
294  Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0
295  Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0
296  Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0
297  Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0
298  Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0
299  Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0
300  Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0
301  Name.startswith("avx512.mask.conflict.") || // Added in 9.0
302  Name == "avx512.mask.pmov.qd.256" || // Added in 9.0
303  Name == "avx512.mask.pmov.qd.512" || // Added in 9.0
304  Name == "avx512.mask.pmov.wb.256" || // Added in 9.0
305  Name == "avx512.mask.pmov.wb.512" || // Added in 9.0
306  Name == "sse.cvtsi2ss" || // Added in 7.0
307  Name == "sse.cvtsi642ss" || // Added in 7.0
308  Name == "sse2.cvtsi2sd" || // Added in 7.0
309  Name == "sse2.cvtsi642sd" || // Added in 7.0
310  Name == "sse2.cvtss2sd" || // Added in 7.0
311  Name == "sse2.cvtdq2pd" || // Added in 3.9
312  Name == "sse2.cvtdq2ps" || // Added in 7.0
313  Name == "sse2.cvtps2pd" || // Added in 3.9
314  Name == "avx.cvtdq2.pd.256" || // Added in 3.9
315  Name == "avx.cvtdq2.ps.256" || // Added in 7.0
316  Name == "avx.cvt.ps2.pd.256" || // Added in 3.9
317  Name.startswith("avx.vinsertf128.") || // Added in 3.7
318  Name == "avx2.vinserti128" || // Added in 3.7
319  Name.startswith("avx512.mask.insert") || // Added in 4.0
320  Name.startswith("avx.vextractf128.") || // Added in 3.7
321  Name == "avx2.vextracti128" || // Added in 3.7
322  Name.startswith("avx512.mask.vextract") || // Added in 4.0
323  Name.startswith("sse4a.movnt.") || // Added in 3.9
324  Name.startswith("avx.movnt.") || // Added in 3.2
325  Name.startswith("avx512.storent.") || // Added in 3.9
326  Name == "sse41.movntdqa" || // Added in 5.0
327  Name == "avx2.movntdqa" || // Added in 5.0
328  Name == "avx512.movntdqa" || // Added in 5.0
329  Name == "sse2.storel.dq" || // Added in 3.9
330  Name.startswith("sse.storeu.") || // Added in 3.9
331  Name.startswith("sse2.storeu.") || // Added in 3.9
332  Name.startswith("avx.storeu.") || // Added in 3.9
333  Name.startswith("avx512.mask.storeu.") || // Added in 3.9
334  Name.startswith("avx512.mask.store.p") || // Added in 3.9
335  Name.startswith("avx512.mask.store.b.") || // Added in 3.9
336  Name.startswith("avx512.mask.store.w.") || // Added in 3.9
337  Name.startswith("avx512.mask.store.d.") || // Added in 3.9
338  Name.startswith("avx512.mask.store.q.") || // Added in 3.9
339  Name == "avx512.mask.store.ss" || // Added in 7.0
340  Name.startswith("avx512.mask.loadu.") || // Added in 3.9
341  Name.startswith("avx512.mask.load.") || // Added in 3.9
342  Name.startswith("avx512.mask.expand.load.") || // Added in 7.0
343  Name.startswith("avx512.mask.compress.store.") || // Added in 7.0
344  Name.startswith("avx512.mask.expand.b") || // Added in 9.0
345  Name.startswith("avx512.mask.expand.w") || // Added in 9.0
346  Name.startswith("avx512.mask.expand.d") || // Added in 9.0
347  Name.startswith("avx512.mask.expand.q") || // Added in 9.0
348  Name.startswith("avx512.mask.expand.p") || // Added in 9.0
349  Name.startswith("avx512.mask.compress.b") || // Added in 9.0
350  Name.startswith("avx512.mask.compress.w") || // Added in 9.0
351  Name.startswith("avx512.mask.compress.d") || // Added in 9.0
352  Name.startswith("avx512.mask.compress.q") || // Added in 9.0
353  Name.startswith("avx512.mask.compress.p") || // Added in 9.0
354  Name == "sse42.crc32.64.8" || // Added in 3.4
355  Name.startswith("avx.vbroadcast.s") || // Added in 3.5
356  Name.startswith("avx512.vbroadcast.s") || // Added in 7.0
357  Name.startswith("avx512.mask.palignr.") || // Added in 3.9
358  Name.startswith("avx512.mask.valign.") || // Added in 4.0
359  Name.startswith("sse2.psll.dq") || // Added in 3.7
360  Name.startswith("sse2.psrl.dq") || // Added in 3.7
361  Name.startswith("avx2.psll.dq") || // Added in 3.7
362  Name.startswith("avx2.psrl.dq") || // Added in 3.7
363  Name.startswith("avx512.psll.dq") || // Added in 3.9
364  Name.startswith("avx512.psrl.dq") || // Added in 3.9
365  Name == "sse41.pblendw" || // Added in 3.7
366  Name.startswith("sse41.blendp") || // Added in 3.7
367  Name.startswith("avx.blend.p") || // Added in 3.7
368  Name == "avx2.pblendw" || // Added in 3.7
369  Name.startswith("avx2.pblendd.") || // Added in 3.7
370  Name.startswith("avx.vbroadcastf128") || // Added in 4.0
371  Name == "avx2.vbroadcasti128" || // Added in 3.7
372  Name.startswith("avx512.mask.broadcastf") || // Added in 6.0
373  Name.startswith("avx512.mask.broadcasti") || // Added in 6.0
374  Name == "xop.vpcmov" || // Added in 3.8
375  Name == "xop.vpcmov.256" || // Added in 5.0
376  Name.startswith("avx512.mask.move.s") || // Added in 4.0
377  Name.startswith("avx512.cvtmask2") || // Added in 5.0
378  Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0
379  Name.startswith("xop.vprot") || // Added in 8.0
380  Name.startswith("avx512.prol") || // Added in 8.0
381  Name.startswith("avx512.pror") || // Added in 8.0
382  Name.startswith("avx512.mask.prorv.") || // Added in 8.0
383  Name.startswith("avx512.mask.pror.") || // Added in 8.0
384  Name.startswith("avx512.mask.prolv.") || // Added in 8.0
385  Name.startswith("avx512.mask.prol.") || // Added in 8.0
386  Name.startswith("avx512.ptestm") || //Added in 6.0
387  Name.startswith("avx512.ptestnm") || //Added in 6.0
388  Name.startswith("avx512.mask.pavg")) // Added in 6.0
389  return true;
390 
391  return false;
392 }
393 
395  Function *&NewFn) {
396  // Only handle intrinsics that start with "x86.".
397  if (!Name.startswith("x86."))
398  return false;
399  // Remove "x86." prefix.
400  Name = Name.substr(4);
401 
402  if (ShouldUpgradeX86Intrinsic(F, Name)) {
403  NewFn = nullptr;
404  return true;
405  }
406 
407  if (Name == "rdtscp") { // Added in 8.0
408  // If this intrinsic has 0 operands, it's the new version.
409  if (F->getFunctionType()->getNumParams() == 0)
410  return false;
411 
412  rename(F);
414  Intrinsic::x86_rdtscp);
415  return true;
416  }
417 
418  // SSE4.1 ptest functions may have an old signature.
419  if (Name.startswith("sse41.ptest")) { // Added in 3.2
420  if (Name.substr(11) == "c")
421  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn);
422  if (Name.substr(11) == "z")
423  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn);
424  if (Name.substr(11) == "nzc")
425  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn);
426  }
427  // Several blend and other instructions with masks used the wrong number of
428  // bits.
429  if (Name == "sse41.insertps") // Added in 3.6
430  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps,
431  NewFn);
432  if (Name == "sse41.dppd") // Added in 3.6
433  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd,
434  NewFn);
435  if (Name == "sse41.dpps") // Added in 3.6
436  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps,
437  NewFn);
438  if (Name == "sse41.mpsadbw") // Added in 3.6
439  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw,
440  NewFn);
441  if (Name == "avx.dp.ps.256") // Added in 3.6
442  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256,
443  NewFn);
444  if (Name == "avx2.mpsadbw") // Added in 3.6
445  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw,
446  NewFn);
447 
448  // frcz.ss/sd may need to have an argument dropped. Added in 3.2
449  if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) {
450  rename(F);
452  Intrinsic::x86_xop_vfrcz_ss);
453  return true;
454  }
455  if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) {
456  rename(F);
458  Intrinsic::x86_xop_vfrcz_sd);
459  return true;
460  }
461  // Upgrade any XOP PERMIL2 index operand still using a float/double vector.
462  if (Name.startswith("xop.vpermil2")) { // Added in 3.9
463  auto Idx = F->getFunctionType()->getParamType(2);
464  if (Idx->isFPOrFPVectorTy()) {
465  rename(F);
466  unsigned IdxSize = Idx->getPrimitiveSizeInBits();
467  unsigned EltSize = Idx->getScalarSizeInBits();
468  Intrinsic::ID Permil2ID;
469  if (EltSize == 64 && IdxSize == 128)
470  Permil2ID = Intrinsic::x86_xop_vpermil2pd;
471  else if (EltSize == 32 && IdxSize == 128)
472  Permil2ID = Intrinsic::x86_xop_vpermil2ps;
473  else if (EltSize == 64 && IdxSize == 256)
474  Permil2ID = Intrinsic::x86_xop_vpermil2pd_256;
475  else
476  Permil2ID = Intrinsic::x86_xop_vpermil2ps_256;
477  NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID);
478  return true;
479  }
480  }
481 
482  if (Name == "seh.recoverfp") {
483  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp);
484  return true;
485  }
486 
487  return false;
488 }
489 
491  assert(F && "Illegal to upgrade a non-existent Function.");
492 
493  // Upgrade intrinsics "clang.arc.use" which doesn't start with "llvm.".
494  if (F->getName() == "clang.arc.use") {
495  NewFn = nullptr;
496  return true;
497  }
498 
499  // Quickly eliminate it, if it's not a candidate.
500  StringRef Name = F->getName();
501  if (Name.size() <= 8 || !Name.startswith("llvm."))
502  return false;
503  Name = Name.substr(5); // Strip off "llvm."
504 
505  switch (Name[0]) {
506  default: break;
507  case 'a': {
508  if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) {
509  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse,
510  F->arg_begin()->getType());
511  return true;
512  }
513  if (Name.startswith("arm.neon.vclz")) {
514  Type* args[2] = {
515  F->arg_begin()->getType(),
517  };
518  // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to
519  // the end of the name. Change name from llvm.arm.neon.vclz.* to
520  // llvm.ctlz.*
521  FunctionType* fType = FunctionType::get(F->getReturnType(), args, false);
522  NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(),
523  "llvm.ctlz." + Name.substr(14), F->getParent());
524  return true;
525  }
526  if (Name.startswith("arm.neon.vcnt")) {
527  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
528  F->arg_begin()->getType());
529  return true;
530  }
531  Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$");
532  if (vldRegex.match(Name)) {
533  auto fArgs = F->getFunctionType()->params();
534  SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end());
535  // Can't use Intrinsic::getDeclaration here as the return types might
536  // then only be structurally equal.
537  FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false);
538  NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(),
539  "llvm." + Name + ".p0i8", F->getParent());
540  return true;
541  }
542  Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
543  if (vstRegex.match(Name)) {
544  static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
545  Intrinsic::arm_neon_vst2,
546  Intrinsic::arm_neon_vst3,
547  Intrinsic::arm_neon_vst4};
548 
549  static const Intrinsic::ID StoreLaneInts[] = {
550  Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
551  Intrinsic::arm_neon_vst4lane
552  };
553 
554  auto fArgs = F->getFunctionType()->params();
555  Type *Tys[] = {fArgs[0], fArgs[1]};
556  if (Name.find("lane") == StringRef::npos)
558  StoreInts[fArgs.size() - 3], Tys);
559  else
561  StoreLaneInts[fArgs.size() - 5], Tys);
562  return true;
563  }
564  if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") {
565  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer);
566  return true;
567  }
568  if (Name.startswith("aarch64.neon.addp")) {
569  if (F->arg_size() != 2)
570  break; // Invalid IR.
571  auto fArgs = F->getFunctionType()->params();
572  VectorType *ArgTy = dyn_cast<VectorType>(fArgs[0]);
573  if (ArgTy && ArgTy->getElementType()->isFloatingPointTy()) {
575  Intrinsic::aarch64_neon_faddp, fArgs);
576  return true;
577  }
578  }
579  break;
580  }
581 
582  case 'c': {
583  if (Name.startswith("ctlz.") && F->arg_size() == 1) {
584  rename(F);
585  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
586  F->arg_begin()->getType());
587  return true;
588  }
589  if (Name.startswith("cttz.") && F->arg_size() == 1) {
590  rename(F);
591  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz,
592  F->arg_begin()->getType());
593  return true;
594  }
595  break;
596  }
597  case 'd': {
598  if (Name == "dbg.value" && F->arg_size() == 4) {
599  rename(F);
600  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value);
601  return true;
602  }
603  break;
604  }
605  case 'e': {
607  Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+");
608  if (R.match(Name, &Groups)) {
610  if (Groups[1] == "fadd")
611  ID = Intrinsic::experimental_vector_reduce_v2_fadd;
612  if (Groups[1] == "fmul")
613  ID = Intrinsic::experimental_vector_reduce_v2_fmul;
614 
615  if (ID != Intrinsic::not_intrinsic) {
616  rename(F);
617  auto Args = F->getFunctionType()->params();
618  Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]};
619  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys);
620  return true;
621  }
622  }
623  break;
624  }
625  case 'i':
626  case 'l': {
627  bool IsLifetimeStart = Name.startswith("lifetime.start");
628  if (IsLifetimeStart || Name.startswith("invariant.start")) {
629  Intrinsic::ID ID = IsLifetimeStart ?
630  Intrinsic::lifetime_start : Intrinsic::invariant_start;
631  auto Args = F->getFunctionType()->params();
632  Type* ObjectPtr[1] = {Args[1]};
633  if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) {
634  rename(F);
635  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr);
636  return true;
637  }
638  }
639 
640  bool IsLifetimeEnd = Name.startswith("lifetime.end");
641  if (IsLifetimeEnd || Name.startswith("invariant.end")) {
642  Intrinsic::ID ID = IsLifetimeEnd ?
643  Intrinsic::lifetime_end : Intrinsic::invariant_end;
644 
645  auto Args = F->getFunctionType()->params();
646  Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]};
647  if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) {
648  rename(F);
649  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr);
650  return true;
651  }
652  }
653  if (Name.startswith("invariant.group.barrier")) {
654  // Rename invariant.group.barrier to launder.invariant.group
655  auto Args = F->getFunctionType()->params();
656  Type* ObjectPtr[1] = {Args[0]};
657  rename(F);
659  Intrinsic::launder_invariant_group, ObjectPtr);
660  return true;
661 
662  }
663 
664  break;
665  }
666  case 'm': {
667  if (Name.startswith("masked.load.")) {
668  Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() };
669  if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) {
670  rename(F);
672  Intrinsic::masked_load,
673  Tys);
674  return true;
675  }
676  }
677  if (Name.startswith("masked.store.")) {
678  auto Args = F->getFunctionType()->params();
679  Type *Tys[] = { Args[0], Args[1] };
680  if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) {
681  rename(F);
683  Intrinsic::masked_store,
684  Tys);
685  return true;
686  }
687  }
688  // Renaming gather/scatter intrinsics with no address space overloading
689  // to the new overload which includes an address space
690  if (Name.startswith("masked.gather.")) {
691  Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()};
692  if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) {
693  rename(F);
695  Intrinsic::masked_gather, Tys);
696  return true;
697  }
698  }
699  if (Name.startswith("masked.scatter.")) {
700  auto Args = F->getFunctionType()->params();
701  Type *Tys[] = {Args[0], Args[1]};
702  if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) {
703  rename(F);
705  Intrinsic::masked_scatter, Tys);
706  return true;
707  }
708  }
709  // Updating the memory intrinsics (memcpy/memmove/memset) that have an
710  // alignment parameter to embedding the alignment as an attribute of
711  // the pointer args.
712  if (Name.startswith("memcpy.") && F->arg_size() == 5) {
713  rename(F);
714  // Get the types of dest, src, and len
715  ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3);
716  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy,
717  ParamTypes);
718  return true;
719  }
720  if (Name.startswith("memmove.") && F->arg_size() == 5) {
721  rename(F);
722  // Get the types of dest, src, and len
723  ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3);
724  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove,
725  ParamTypes);
726  return true;
727  }
728  if (Name.startswith("memset.") && F->arg_size() == 5) {
729  rename(F);
730  // Get the types of dest, and len
731  const auto *FT = F->getFunctionType();
732  Type *ParamTypes[2] = {
733  FT->getParamType(0), // Dest
734  FT->getParamType(2) // len
735  };
736  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset,
737  ParamTypes);
738  return true;
739  }
740  break;
741  }
742  case 'n': {
743  if (Name.startswith("nvvm.")) {
744  Name = Name.substr(5);
745 
746  // The following nvvm intrinsics correspond exactly to an LLVM intrinsic.
748  .Cases("brev32", "brev64", Intrinsic::bitreverse)
749  .Case("clz.i", Intrinsic::ctlz)
750  .Case("popc.i", Intrinsic::ctpop)
752  if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) {
753  NewFn = Intrinsic::getDeclaration(F->getParent(), IID,
754  {F->getReturnType()});
755  return true;
756  }
757 
758  // The following nvvm intrinsics correspond exactly to an LLVM idiom, but
759  // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall.
760  //
761  // TODO: We could add lohi.i2d.
762  bool Expand = StringSwitch<bool>(Name)
763  .Cases("abs.i", "abs.ll", true)
764  .Cases("clz.ll", "popc.ll", "h2f", true)
765  .Cases("max.i", "max.ll", "max.ui", "max.ull", true)
766  .Cases("min.i", "min.ll", "min.ui", "min.ull", true)
767  .Default(false);
768  if (Expand) {
769  NewFn = nullptr;
770  return true;
771  }
772  }
773  break;
774  }
775  case 'o':
776  // We only need to change the name to match the mangling including the
777  // address space.
778  if (Name.startswith("objectsize.")) {
779  Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() };
780  if (F->arg_size() == 2 || F->arg_size() == 3 ||
781  F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) {
782  rename(F);
783  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize,
784  Tys);
785  return true;
786  }
787  }
788  break;
789 
790  case 's':
791  if (Name == "stackprotectorcheck") {
792  NewFn = nullptr;
793  return true;
794  }
795  break;
796 
797  case 'x':
798  if (UpgradeX86IntrinsicFunction(F, Name, NewFn))
799  return true;
800  }
801  // Remangle our intrinsic since we upgrade the mangling
803  if (Result != None) {
804  NewFn = Result.getValue();
805  return true;
806  }
807 
808  // This may not belong here. This function is effectively being overloaded
809  // to both detect an intrinsic which needs upgrading, and to provide the
810  // upgraded form of the intrinsic. We should perhaps have two separate
811  // functions for this.
812  return false;
813 }
814 
816  NewFn = nullptr;
817  bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn);
818  assert(F != NewFn && "Intrinsic function upgraded to the same function");
819 
820  // Upgrade intrinsic attributes. This does not change the function.
821  if (NewFn)
822  F = NewFn;
823  if (Intrinsic::ID id = F->getIntrinsicID())
825  return Upgraded;
826 }
827 
829  if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" ||
830  GV->getName() == "llvm.global_dtors")) ||
831  !GV->hasInitializer())
832  return nullptr;
833  ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType());
834  if (!ATy)
835  return nullptr;
837  if (!STy || STy->getNumElements() != 2)
838  return nullptr;
839 
840  LLVMContext &C = GV->getContext();
841  IRBuilder<> IRB(C);
842  auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1),
843  IRB.getInt8PtrTy());
844  Constant *Init = GV->getInitializer();
845  unsigned N = Init->getNumOperands();
846  std::vector<Constant *> NewCtors(N);
847  for (unsigned i = 0; i != N; ++i) {
848  auto Ctor = cast<Constant>(Init->getOperand(i));
849  NewCtors[i] = ConstantStruct::get(
850  EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1),
852  }
853  Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors);
854 
855  return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(),
856  NewInit, GV->getName());
857 }
858 
859 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them
860 // to byte shuffles.
862  Value *Op, unsigned Shift) {
863  Type *ResultTy = Op->getType();
864  unsigned NumElts = ResultTy->getVectorNumElements() * 8;
865 
866  // Bitcast from a 64-bit element type to a byte element type.
867  Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
868  Op = Builder.CreateBitCast(Op, VecTy, "cast");
869 
870  // We'll be shuffling in zeroes.
871  Value *Res = Constant::getNullValue(VecTy);
872 
873  // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
874  // we'll just return the zero vector.
875  if (Shift < 16) {
876  uint32_t Idxs[64];
877  // 256/512-bit version is split into 2/4 16-byte lanes.
878  for (unsigned l = 0; l != NumElts; l += 16)
879  for (unsigned i = 0; i != 16; ++i) {
880  unsigned Idx = NumElts + i - Shift;
881  if (Idx < NumElts)
882  Idx -= NumElts - 16; // end of lane, switch operand.
883  Idxs[l + i] = Idx + l;
884  }
885 
886  Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
887  }
888 
889  // Bitcast back to a 64-bit element type.
890  return Builder.CreateBitCast(Res, ResultTy, "cast");
891 }
892 
893 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them
894 // to byte shuffles.
896  unsigned Shift) {
897  Type *ResultTy = Op->getType();
898  unsigned NumElts = ResultTy->getVectorNumElements() * 8;
899 
900  // Bitcast from a 64-bit element type to a byte element type.
901  Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
902  Op = Builder.CreateBitCast(Op, VecTy, "cast");
903 
904  // We'll be shuffling in zeroes.
905  Value *Res = Constant::getNullValue(VecTy);
906 
907  // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
908  // we'll just return the zero vector.
909  if (Shift < 16) {
910  uint32_t Idxs[64];
911  // 256/512-bit version is split into 2/4 16-byte lanes.
912  for (unsigned l = 0; l != NumElts; l += 16)
913  for (unsigned i = 0; i != 16; ++i) {
914  unsigned Idx = i + Shift;
915  if (Idx >= 16)
916  Idx += NumElts - 16; // end of lane, switch operand.
917  Idxs[l + i] = Idx + l;
918  }
919 
920  Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts));
921  }
922 
923  // Bitcast back to a 64-bit element type.
924  return Builder.CreateBitCast(Res, ResultTy, "cast");
925 }
926 
928  unsigned NumElts) {
930  cast<IntegerType>(Mask->getType())->getBitWidth());
931  Mask = Builder.CreateBitCast(Mask, MaskTy);
932 
933  // If we have less than 8 elements, then the starting mask was an i8 and
934  // we need to extract down to the right number of elements.
935  if (NumElts < 8) {
936  uint32_t Indices[4];
937  for (unsigned i = 0; i != NumElts; ++i)
938  Indices[i] = i;
939  Mask = Builder.CreateShuffleVector(Mask, Mask,
940  makeArrayRef(Indices, NumElts),
941  "extract");
942  }
943 
944  return Mask;
945 }
946 
948  Value *Op0, Value *Op1) {
949  // If the mask is all ones just emit the first operation.
950  if (const auto *C = dyn_cast<Constant>(Mask))
951  if (C->isAllOnesValue())
952  return Op0;
953 
954  Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements());
955  return Builder.CreateSelect(Mask, Op0, Op1);
956 }
957 
959  Value *Op0, Value *Op1) {
960  // If the mask is all ones just emit the first operation.
961  if (const auto *C = dyn_cast<Constant>(Mask))
962  if (C->isAllOnesValue())
963  return Op0;
964 
965  llvm::VectorType *MaskTy =
967  Mask->getType()->getIntegerBitWidth());
968  Mask = Builder.CreateBitCast(Mask, MaskTy);
969  Mask = Builder.CreateExtractElement(Mask, (uint64_t)0);
970  return Builder.CreateSelect(Mask, Op0, Op1);
971 }
972 
973 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics.
974 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate
975 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes.
977  Value *Op1, Value *Shift,
978  Value *Passthru, Value *Mask,
979  bool IsVALIGN) {
980  unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue();
981 
982  unsigned NumElts = Op0->getType()->getVectorNumElements();
983  assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!");
984  assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!");
985  assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!");
986 
987  // Mask the immediate for VALIGN.
988  if (IsVALIGN)
989  ShiftVal &= (NumElts - 1);
990 
991  // If palignr is shifting the pair of vectors more than the size of two
992  // lanes, emit zero.
993  if (ShiftVal >= 32)
994  return llvm::Constant::getNullValue(Op0->getType());
995 
996  // If palignr is shifting the pair of input vectors more than one lane,
997  // but less than two lanes, convert to shifting in zeroes.
998  if (ShiftVal > 16) {
999  ShiftVal -= 16;
1000  Op1 = Op0;
1001  Op0 = llvm::Constant::getNullValue(Op0->getType());
1002  }
1003 
1004  uint32_t Indices[64];
1005  // 256-bit palignr operates on 128-bit lanes so we need to handle that
1006  for (unsigned l = 0; l < NumElts; l += 16) {
1007  for (unsigned i = 0; i != 16; ++i) {
1008  unsigned Idx = ShiftVal + i;
1009  if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN.
1010  Idx += NumElts - 16; // End of lane, switch operand.
1011  Indices[l + i] = Idx + l;
1012  }
1013  }
1014 
1015  Value *Align = Builder.CreateShuffleVector(Op1, Op0,
1016  makeArrayRef(Indices, NumElts),
1017  "palignr");
1018 
1019  return EmitX86Select(Builder, Mask, Align, Passthru);
1020 }
1021 
1023  bool ZeroMask, bool IndexForm) {
1024  Type *Ty = CI.getType();
1025  unsigned VecWidth = Ty->getPrimitiveSizeInBits();
1026  unsigned EltWidth = Ty->getScalarSizeInBits();
1027  bool IsFloat = Ty->isFPOrFPVectorTy();
1028  Intrinsic::ID IID;
1029  if (VecWidth == 128 && EltWidth == 32 && IsFloat)
1030  IID = Intrinsic::x86_avx512_vpermi2var_ps_128;
1031  else if (VecWidth == 128 && EltWidth == 32 && !IsFloat)
1032  IID = Intrinsic::x86_avx512_vpermi2var_d_128;
1033  else if (VecWidth == 128 && EltWidth == 64 && IsFloat)
1034  IID = Intrinsic::x86_avx512_vpermi2var_pd_128;
1035  else if (VecWidth == 128 && EltWidth == 64 && !IsFloat)
1036  IID = Intrinsic::x86_avx512_vpermi2var_q_128;
1037  else if (VecWidth == 256 && EltWidth == 32 && IsFloat)
1038  IID = Intrinsic::x86_avx512_vpermi2var_ps_256;
1039  else if (VecWidth == 256 && EltWidth == 32 && !IsFloat)
1040  IID = Intrinsic::x86_avx512_vpermi2var_d_256;
1041  else if (VecWidth == 256 && EltWidth == 64 && IsFloat)
1042  IID = Intrinsic::x86_avx512_vpermi2var_pd_256;
1043  else if (VecWidth == 256 && EltWidth == 64 && !IsFloat)
1044  IID = Intrinsic::x86_avx512_vpermi2var_q_256;
1045  else if (VecWidth == 512 && EltWidth == 32 && IsFloat)
1046  IID = Intrinsic::x86_avx512_vpermi2var_ps_512;
1047  else if (VecWidth == 512 && EltWidth == 32 && !IsFloat)
1048  IID = Intrinsic::x86_avx512_vpermi2var_d_512;
1049  else if (VecWidth == 512 && EltWidth == 64 && IsFloat)
1050  IID = Intrinsic::x86_avx512_vpermi2var_pd_512;
1051  else if (VecWidth == 512 && EltWidth == 64 && !IsFloat)
1052  IID = Intrinsic::x86_avx512_vpermi2var_q_512;
1053  else if (VecWidth == 128 && EltWidth == 16)
1054  IID = Intrinsic::x86_avx512_vpermi2var_hi_128;
1055  else if (VecWidth == 256 && EltWidth == 16)
1056  IID = Intrinsic::x86_avx512_vpermi2var_hi_256;
1057  else if (VecWidth == 512 && EltWidth == 16)
1058  IID = Intrinsic::x86_avx512_vpermi2var_hi_512;
1059  else if (VecWidth == 128 && EltWidth == 8)
1060  IID = Intrinsic::x86_avx512_vpermi2var_qi_128;
1061  else if (VecWidth == 256 && EltWidth == 8)
1062  IID = Intrinsic::x86_avx512_vpermi2var_qi_256;
1063  else if (VecWidth == 512 && EltWidth == 8)
1064  IID = Intrinsic::x86_avx512_vpermi2var_qi_512;
1065  else
1066  llvm_unreachable("Unexpected intrinsic");
1067 
1068  Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1),
1069  CI.getArgOperand(2) };
1070 
1071  // If this isn't index form we need to swap operand 0 and 1.
1072  if (!IndexForm)
1073  std::swap(Args[0], Args[1]);
1074 
1075  Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID),
1076  Args);
1077  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty)
1078  : Builder.CreateBitCast(CI.getArgOperand(1),
1079  Ty);
1080  return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru);
1081 }
1082 
1084  bool IsSigned, bool IsAddition) {
1085  Type *Ty = CI.getType();
1086  Value *Op0 = CI.getOperand(0);
1087  Value *Op1 = CI.getOperand(1);
1088 
1089  Intrinsic::ID IID =
1090  IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat)
1091  : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat);
1092  Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty);
1093  Value *Res = Builder.CreateCall(Intrin, {Op0, Op1});
1094 
1095  if (CI.getNumArgOperands() == 4) { // For masked intrinsics.
1096  Value *VecSrc = CI.getOperand(2);
1097  Value *Mask = CI.getOperand(3);
1098  Res = EmitX86Select(Builder, Mask, Res, VecSrc);
1099  }
1100  return Res;
1101 }
1102 
1104  bool IsRotateRight) {
1105  Type *Ty = CI.getType();
1106  Value *Src = CI.getArgOperand(0);
1107  Value *Amt = CI.getArgOperand(1);
1108 
1109  // Amount may be scalar immediate, in which case create a splat vector.
1110  // Funnel shifts amounts are treated as modulo and types are all power-of-2 so
1111  // we only care about the lowest log2 bits anyway.
1112  if (Amt->getType() != Ty) {
1113  unsigned NumElts = Ty->getVectorNumElements();
1114  Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false);
1115  Amt = Builder.CreateVectorSplat(NumElts, Amt);
1116  }
1117 
1118  Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl;
1119  Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty);
1120  Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt});
1121 
1122  if (CI.getNumArgOperands() == 4) { // For masked intrinsics.
1123  Value *VecSrc = CI.getOperand(2);
1124  Value *Mask = CI.getOperand(3);
1125  Res = EmitX86Select(Builder, Mask, Res, VecSrc);
1126  }
1127  return Res;
1128 }
1129 
1130 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm,
1131  bool IsSigned) {
1132  Type *Ty = CI.getType();
1133  Value *LHS = CI.getArgOperand(0);
1134  Value *RHS = CI.getArgOperand(1);
1135 
1136  CmpInst::Predicate Pred;
1137  switch (Imm) {
1138  case 0x0:
1139  Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT;
1140  break;
1141  case 0x1:
1142  Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE;
1143  break;
1144  case 0x2:
1145  Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT;
1146  break;
1147  case 0x3:
1148  Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE;
1149  break;
1150  case 0x4:
1151  Pred = ICmpInst::ICMP_EQ;
1152  break;
1153  case 0x5:
1154  Pred = ICmpInst::ICMP_NE;
1155  break;
1156  case 0x6:
1157  return Constant::getNullValue(Ty); // FALSE
1158  case 0x7:
1159  return Constant::getAllOnesValue(Ty); // TRUE
1160  default:
1161  llvm_unreachable("Unknown XOP vpcom/vpcomu predicate");
1162  }
1163 
1164  Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS);
1165  Value *Ext = Builder.CreateSExt(Cmp, Ty);
1166  return Ext;
1167 }
1168 
1170  bool IsShiftRight, bool ZeroMask) {
1171  Type *Ty = CI.getType();
1172  Value *Op0 = CI.getArgOperand(0);
1173  Value *Op1 = CI.getArgOperand(1);
1174  Value *Amt = CI.getArgOperand(2);
1175 
1176  if (IsShiftRight)
1177  std::swap(Op0, Op1);
1178 
1179  // Amount may be scalar immediate, in which case create a splat vector.
1180  // Funnel shifts amounts are treated as modulo and types are all power-of-2 so
1181  // we only care about the lowest log2 bits anyway.
1182  if (Amt->getType() != Ty) {
1183  unsigned NumElts = Ty->getVectorNumElements();
1184  Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false);
1185  Amt = Builder.CreateVectorSplat(NumElts, Amt);
1186  }
1187 
1188  Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl;
1189  Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty);
1190  Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt});
1191 
1192  unsigned NumArgs = CI.getNumArgOperands();
1193  if (NumArgs >= 4) { // For masked intrinsics.
1194  Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) :
1195  ZeroMask ? ConstantAggregateZero::get(CI.getType()) :
1196  CI.getArgOperand(0);
1197  Value *Mask = CI.getOperand(NumArgs - 1);
1198  Res = EmitX86Select(Builder, Mask, Res, VecSrc);
1199  }
1200  return Res;
1201 }
1202 
1204  Value *Ptr, Value *Data, Value *Mask,
1205  bool Aligned) {
1206  // Cast the pointer to the right type.
1207  Ptr = Builder.CreateBitCast(Ptr,
1209  unsigned Align =
1210  Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1;
1211 
1212  // If the mask is all ones just emit a regular store.
1213  if (const auto *C = dyn_cast<Constant>(Mask))
1214  if (C->isAllOnesValue())
1215  return Builder.CreateAlignedStore(Data, Ptr, Align);
1216 
1217  // Convert the mask from an integer type to a vector of i1.
1218  unsigned NumElts = Data->getType()->getVectorNumElements();
1219  Mask = getX86MaskVec(Builder, Mask, NumElts);
1220  return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
1221 }
1222 
1224  Value *Ptr, Value *Passthru, Value *Mask,
1225  bool Aligned) {
1226  Type *ValTy = Passthru->getType();
1227  // Cast the pointer to the right type.
1228  Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy));
1229  unsigned Align =
1230  Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1;
1231 
1232  // If the mask is all ones just emit a regular store.
1233  if (const auto *C = dyn_cast<Constant>(Mask))
1234  if (C->isAllOnesValue())
1235  return Builder.CreateAlignedLoad(ValTy, Ptr, Align);
1236 
1237  // Convert the mask from an integer type to a vector of i1.
1238  unsigned NumElts = Passthru->getType()->getVectorNumElements();
1239  Mask = getX86MaskVec(Builder, Mask, NumElts);
1240  return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
1241 }
1242 
1243 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) {
1244  Value *Op0 = CI.getArgOperand(0);
1245  llvm::Type *Ty = Op0->getType();
1246  Value *Zero = llvm::Constant::getNullValue(Ty);
1247  Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero);
1248  Value *Neg = Builder.CreateNeg(Op0);
1249  Value *Res = Builder.CreateSelect(Cmp, Op0, Neg);
1250 
1251  if (CI.getNumArgOperands() == 3)
1252  Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1));
1253 
1254  return Res;
1255 }
1256 
1258  ICmpInst::Predicate Pred) {
1259  Value *Op0 = CI.getArgOperand(0);
1260  Value *Op1 = CI.getArgOperand(1);
1261  Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1);
1262  Value *Res = Builder.CreateSelect(Cmp, Op0, Op1);
1263 
1264  if (CI.getNumArgOperands() == 4)
1265  Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2));
1266 
1267  return Res;
1268 }
1269 
1270 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) {
1271  Type *Ty = CI.getType();
1272 
1273  // Arguments have a vXi32 type so cast to vXi64.
1274  Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty);
1275  Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty);
1276 
1277  if (IsSigned) {
1278  // Shift left then arithmetic shift right.
1279  Constant *ShiftAmt = ConstantInt::get(Ty, 32);
1280  LHS = Builder.CreateShl(LHS, ShiftAmt);
1281  LHS = Builder.CreateAShr(LHS, ShiftAmt);
1282  RHS = Builder.CreateShl(RHS, ShiftAmt);
1283  RHS = Builder.CreateAShr(RHS, ShiftAmt);
1284  } else {
1285  // Clear the upper bits.
1286  Constant *Mask = ConstantInt::get(Ty, 0xffffffff);
1287  LHS = Builder.CreateAnd(LHS, Mask);
1288  RHS = Builder.CreateAnd(RHS, Mask);
1289  }
1290 
1291  Value *Res = Builder.CreateMul(LHS, RHS);
1292 
1293  if (CI.getNumArgOperands() == 4)
1294  Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2));
1295 
1296  return Res;
1297 }
1298 
1299 // Applying mask on vector of i1's and make sure result is at least 8 bits wide.
1301  Value *Mask) {
1302  unsigned NumElts = Vec->getType()->getVectorNumElements();
1303  if (Mask) {
1304  const auto *C = dyn_cast<Constant>(Mask);
1305  if (!C || !C->isAllOnesValue())
1306  Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts));
1307  }
1308 
1309  if (NumElts < 8) {
1310  uint32_t Indices[8];
1311  for (unsigned i = 0; i != NumElts; ++i)
1312  Indices[i] = i;
1313  for (unsigned i = NumElts; i != 8; ++i)
1314  Indices[i] = NumElts + i % NumElts;
1315  Vec = Builder.CreateShuffleVector(Vec,
1317  Indices);
1318  }
1319  return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U)));
1320 }
1321 
1323  unsigned CC, bool Signed) {
1324  Value *Op0 = CI.getArgOperand(0);
1325  unsigned NumElts = Op0->getType()->getVectorNumElements();
1326 
1327  Value *Cmp;
1328  if (CC == 3) {
1329  Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts));
1330  } else if (CC == 7) {
1331  Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts));
1332  } else {
1333  ICmpInst::Predicate Pred;
1334  switch (CC) {
1335  default: llvm_unreachable("Unknown condition code");
1336  case 0: Pred = ICmpInst::ICMP_EQ; break;
1337  case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break;
1338  case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break;
1339  case 4: Pred = ICmpInst::ICMP_NE; break;
1340  case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break;
1341  case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break;
1342  }
1343  Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1));
1344  }
1345 
1346  Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1);
1347 
1348  return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask);
1349 }
1350 
1351 // Replace a masked intrinsic with an older unmasked intrinsic.
1353  Intrinsic::ID IID) {
1354  Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID);
1355  Value *Rep = Builder.CreateCall(Intrin,
1356  { CI.getArgOperand(0), CI.getArgOperand(1) });
1357  return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2));
1358 }
1359 
1361  Value* A = CI.getArgOperand(0);
1362  Value* B = CI.getArgOperand(1);
1363  Value* Src = CI.getArgOperand(2);
1364  Value* Mask = CI.getArgOperand(3);
1365 
1366  Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1));
1367  Value* Cmp = Builder.CreateIsNotNull(AndNode);
1368  Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0);
1369  Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0);
1370  Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2);
1371  return Builder.CreateInsertElement(A, Select, (uint64_t)0);
1372 }
1373 
1374 
1375 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) {
1376  Value* Op = CI.getArgOperand(0);
1377  Type* ReturnOp = CI.getType();
1378  unsigned NumElts = CI.getType()->getVectorNumElements();
1379  Value *Mask = getX86MaskVec(Builder, Op, NumElts);
1380  return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2");
1381 }
1382 
1383 // Replace intrinsic with unmasked version and a select.
1385  CallInst &CI, Value *&Rep) {
1386  Name = Name.substr(12); // Remove avx512.mask.
1387 
1388  unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits();
1389  unsigned EltWidth = CI.getType()->getScalarSizeInBits();
1390  Intrinsic::ID IID;
1391  if (Name.startswith("max.p")) {
1392  if (VecWidth == 128 && EltWidth == 32)
1393  IID = Intrinsic::x86_sse_max_ps;
1394  else if (VecWidth == 128 && EltWidth == 64)
1395  IID = Intrinsic::x86_sse2_max_pd;
1396  else if (VecWidth == 256 && EltWidth == 32)
1397  IID = Intrinsic::x86_avx_max_ps_256;
1398  else if (VecWidth == 256 && EltWidth == 64)
1399  IID = Intrinsic::x86_avx_max_pd_256;
1400  else
1401  llvm_unreachable("Unexpected intrinsic");
1402  } else if (Name.startswith("min.p")) {
1403  if (VecWidth == 128 && EltWidth == 32)
1404  IID = Intrinsic::x86_sse_min_ps;
1405  else if (VecWidth == 128 && EltWidth == 64)
1406  IID = Intrinsic::x86_sse2_min_pd;
1407  else if (VecWidth == 256 && EltWidth == 32)
1408  IID = Intrinsic::x86_avx_min_ps_256;
1409  else if (VecWidth == 256 && EltWidth == 64)
1410  IID = Intrinsic::x86_avx_min_pd_256;
1411  else
1412  llvm_unreachable("Unexpected intrinsic");
1413  } else if (Name.startswith("pshuf.b.")) {
1414  if (VecWidth == 128)
1415  IID = Intrinsic::x86_ssse3_pshuf_b_128;
1416  else if (VecWidth == 256)
1417  IID = Intrinsic::x86_avx2_pshuf_b;
1418  else if (VecWidth == 512)
1419  IID = Intrinsic::x86_avx512_pshuf_b_512;
1420  else
1421  llvm_unreachable("Unexpected intrinsic");
1422  } else if (Name.startswith("pmul.hr.sw.")) {
1423  if (VecWidth == 128)
1424  IID = Intrinsic::x86_ssse3_pmul_hr_sw_128;
1425  else if (VecWidth == 256)
1426  IID = Intrinsic::x86_avx2_pmul_hr_sw;
1427  else if (VecWidth == 512)
1428  IID = Intrinsic::x86_avx512_pmul_hr_sw_512;
1429  else
1430  llvm_unreachable("Unexpected intrinsic");
1431  } else if (Name.startswith("pmulh.w.")) {
1432  if (VecWidth == 128)
1433  IID = Intrinsic::x86_sse2_pmulh_w;
1434  else if (VecWidth == 256)
1435  IID = Intrinsic::x86_avx2_pmulh_w;
1436  else if (VecWidth == 512)
1437  IID = Intrinsic::x86_avx512_pmulh_w_512;
1438  else
1439  llvm_unreachable("Unexpected intrinsic");
1440  } else if (Name.startswith("pmulhu.w.")) {
1441  if (VecWidth == 128)
1442  IID = Intrinsic::x86_sse2_pmulhu_w;
1443  else if (VecWidth == 256)
1444  IID = Intrinsic::x86_avx2_pmulhu_w;
1445  else if (VecWidth == 512)
1446  IID = Intrinsic::x86_avx512_pmulhu_w_512;
1447  else
1448  llvm_unreachable("Unexpected intrinsic");
1449  } else if (Name.startswith("pmaddw.d.")) {
1450  if (VecWidth == 128)
1451  IID = Intrinsic::x86_sse2_pmadd_wd;
1452  else if (VecWidth == 256)
1453  IID = Intrinsic::x86_avx2_pmadd_wd;
1454  else if (VecWidth == 512)
1455  IID = Intrinsic::x86_avx512_pmaddw_d_512;
1456  else
1457  llvm_unreachable("Unexpected intrinsic");
1458  } else if (Name.startswith("pmaddubs.w.")) {
1459  if (VecWidth == 128)
1460  IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128;
1461  else if (VecWidth == 256)
1462  IID = Intrinsic::x86_avx2_pmadd_ub_sw;
1463  else if (VecWidth == 512)
1464  IID = Intrinsic::x86_avx512_pmaddubs_w_512;
1465  else
1466  llvm_unreachable("Unexpected intrinsic");
1467  } else if (Name.startswith("packsswb.")) {
1468  if (VecWidth == 128)
1469  IID = Intrinsic::x86_sse2_packsswb_128;
1470  else if (VecWidth == 256)
1471  IID = Intrinsic::x86_avx2_packsswb;
1472  else if (VecWidth == 512)
1473  IID = Intrinsic::x86_avx512_packsswb_512;
1474  else
1475  llvm_unreachable("Unexpected intrinsic");
1476  } else if (Name.startswith("packssdw.")) {
1477  if (VecWidth == 128)
1478  IID = Intrinsic::x86_sse2_packssdw_128;
1479  else if (VecWidth == 256)
1480  IID = Intrinsic::x86_avx2_packssdw;
1481  else if (VecWidth == 512)
1482  IID = Intrinsic::x86_avx512_packssdw_512;
1483  else
1484  llvm_unreachable("Unexpected intrinsic");
1485  } else if (Name.startswith("packuswb.")) {
1486  if (VecWidth == 128)
1487  IID = Intrinsic::x86_sse2_packuswb_128;
1488  else if (VecWidth == 256)
1489  IID = Intrinsic::x86_avx2_packuswb;
1490  else if (VecWidth == 512)
1491  IID = Intrinsic::x86_avx512_packuswb_512;
1492  else
1493  llvm_unreachable("Unexpected intrinsic");
1494  } else if (Name.startswith("packusdw.")) {
1495  if (VecWidth == 128)
1496  IID = Intrinsic::x86_sse41_packusdw;
1497  else if (VecWidth == 256)
1498  IID = Intrinsic::x86_avx2_packusdw;
1499  else if (VecWidth == 512)
1500  IID = Intrinsic::x86_avx512_packusdw_512;
1501  else
1502  llvm_unreachable("Unexpected intrinsic");
1503  } else if (Name.startswith("vpermilvar.")) {
1504  if (VecWidth == 128 && EltWidth == 32)
1505  IID = Intrinsic::x86_avx_vpermilvar_ps;
1506  else if (VecWidth == 128 && EltWidth == 64)
1507  IID = Intrinsic::x86_avx_vpermilvar_pd;
1508  else if (VecWidth == 256 && EltWidth == 32)
1509  IID = Intrinsic::x86_avx_vpermilvar_ps_256;
1510  else if (VecWidth == 256 && EltWidth == 64)
1511  IID = Intrinsic::x86_avx_vpermilvar_pd_256;
1512  else if (VecWidth == 512 && EltWidth == 32)
1513  IID = Intrinsic::x86_avx512_vpermilvar_ps_512;
1514  else if (VecWidth == 512 && EltWidth == 64)
1515  IID = Intrinsic::x86_avx512_vpermilvar_pd_512;
1516  else
1517  llvm_unreachable("Unexpected intrinsic");
1518  } else if (Name == "cvtpd2dq.256") {
1519  IID = Intrinsic::x86_avx_cvt_pd2dq_256;
1520  } else if (Name == "cvtpd2ps.256") {
1521  IID = Intrinsic::x86_avx_cvt_pd2_ps_256;
1522  } else if (Name == "cvttpd2dq.256") {
1523  IID = Intrinsic::x86_avx_cvtt_pd2dq_256;
1524  } else if (Name == "cvttps2dq.128") {
1525  IID = Intrinsic::x86_sse2_cvttps2dq;
1526  } else if (Name == "cvttps2dq.256") {
1527  IID = Intrinsic::x86_avx_cvtt_ps2dq_256;
1528  } else if (Name.startswith("permvar.")) {
1529  bool IsFloat = CI.getType()->isFPOrFPVectorTy();
1530  if (VecWidth == 256 && EltWidth == 32 && IsFloat)
1531  IID = Intrinsic::x86_avx2_permps;
1532  else if (VecWidth == 256 && EltWidth == 32 && !IsFloat)
1533  IID = Intrinsic::x86_avx2_permd;
1534  else if (VecWidth == 256 && EltWidth == 64 && IsFloat)
1535  IID = Intrinsic::x86_avx512_permvar_df_256;
1536  else if (VecWidth == 256 && EltWidth == 64 && !IsFloat)
1537  IID = Intrinsic::x86_avx512_permvar_di_256;
1538  else if (VecWidth == 512 && EltWidth == 32 && IsFloat)
1539  IID = Intrinsic::x86_avx512_permvar_sf_512;
1540  else if (VecWidth == 512 && EltWidth == 32 && !IsFloat)
1541  IID = Intrinsic::x86_avx512_permvar_si_512;
1542  else if (VecWidth == 512 && EltWidth == 64 && IsFloat)
1543  IID = Intrinsic::x86_avx512_permvar_df_512;
1544  else if (VecWidth == 512 && EltWidth == 64 && !IsFloat)
1545  IID = Intrinsic::x86_avx512_permvar_di_512;
1546  else if (VecWidth == 128 && EltWidth == 16)
1547  IID = Intrinsic::x86_avx512_permvar_hi_128;
1548  else if (VecWidth == 256 && EltWidth == 16)
1549  IID = Intrinsic::x86_avx512_permvar_hi_256;
1550  else if (VecWidth == 512 && EltWidth == 16)
1551  IID = Intrinsic::x86_avx512_permvar_hi_512;
1552  else if (VecWidth == 128 && EltWidth == 8)
1553  IID = Intrinsic::x86_avx512_permvar_qi_128;
1554  else if (VecWidth == 256 && EltWidth == 8)
1555  IID = Intrinsic::x86_avx512_permvar_qi_256;
1556  else if (VecWidth == 512 && EltWidth == 8)
1557  IID = Intrinsic::x86_avx512_permvar_qi_512;
1558  else
1559  llvm_unreachable("Unexpected intrinsic");
1560  } else if (Name.startswith("dbpsadbw.")) {
1561  if (VecWidth == 128)
1562  IID = Intrinsic::x86_avx512_dbpsadbw_128;
1563  else if (VecWidth == 256)
1564  IID = Intrinsic::x86_avx512_dbpsadbw_256;
1565  else if (VecWidth == 512)
1566  IID = Intrinsic::x86_avx512_dbpsadbw_512;
1567  else
1568  llvm_unreachable("Unexpected intrinsic");
1569  } else if (Name.startswith("pmultishift.qb.")) {
1570  if (VecWidth == 128)
1571  IID = Intrinsic::x86_avx512_pmultishift_qb_128;
1572  else if (VecWidth == 256)
1573  IID = Intrinsic::x86_avx512_pmultishift_qb_256;
1574  else if (VecWidth == 512)
1575  IID = Intrinsic::x86_avx512_pmultishift_qb_512;
1576  else
1577  llvm_unreachable("Unexpected intrinsic");
1578  } else if (Name.startswith("conflict.")) {
1579  if (Name[9] == 'd' && VecWidth == 128)
1580  IID = Intrinsic::x86_avx512_conflict_d_128;
1581  else if (Name[9] == 'd' && VecWidth == 256)
1582  IID = Intrinsic::x86_avx512_conflict_d_256;
1583  else if (Name[9] == 'd' && VecWidth == 512)
1584  IID = Intrinsic::x86_avx512_conflict_d_512;
1585  else if (Name[9] == 'q' && VecWidth == 128)
1586  IID = Intrinsic::x86_avx512_conflict_q_128;
1587  else if (Name[9] == 'q' && VecWidth == 256)
1588  IID = Intrinsic::x86_avx512_conflict_q_256;
1589  else if (Name[9] == 'q' && VecWidth == 512)
1590  IID = Intrinsic::x86_avx512_conflict_q_512;
1591  else
1592  llvm_unreachable("Unexpected intrinsic");
1593  } else if (Name.startswith("pavg.")) {
1594  if (Name[5] == 'b' && VecWidth == 128)
1595  IID = Intrinsic::x86_sse2_pavg_b;
1596  else if (Name[5] == 'b' && VecWidth == 256)
1597  IID = Intrinsic::x86_avx2_pavg_b;
1598  else if (Name[5] == 'b' && VecWidth == 512)
1599  IID = Intrinsic::x86_avx512_pavg_b_512;
1600  else if (Name[5] == 'w' && VecWidth == 128)
1601  IID = Intrinsic::x86_sse2_pavg_w;
1602  else if (Name[5] == 'w' && VecWidth == 256)
1603  IID = Intrinsic::x86_avx2_pavg_w;
1604  else if (Name[5] == 'w' && VecWidth == 512)
1605  IID = Intrinsic::x86_avx512_pavg_w_512;
1606  else
1607  llvm_unreachable("Unexpected intrinsic");
1608  } else
1609  return false;
1610 
1612  CI.arg_operands().end());
1613  Args.pop_back();
1614  Args.pop_back();
1615  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID),
1616  Args);
1617  unsigned NumArgs = CI.getNumArgOperands();
1618  Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep,
1619  CI.getArgOperand(NumArgs - 2));
1620  return true;
1621 }
1622 
1623 /// Upgrade comment in call to inline asm that represents an objc retain release
1624 /// marker.
1625 void llvm::UpgradeInlineAsmString(std::string *AsmStr) {
1626  size_t Pos;
1627  if (AsmStr->find("mov\tfp") == 0 &&
1628  AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos &&
1629  (Pos = AsmStr->find("# marker")) != std::string::npos) {
1630  AsmStr->replace(Pos, 1, ";");
1631  }
1632  return;
1633 }
1634 
1635 /// Upgrade a call to an old intrinsic. All argument and return casting must be
1636 /// provided to seamlessly integrate with existing context.
1638  Function *F = CI->getCalledFunction();
1639  LLVMContext &C = CI->getContext();
1640  IRBuilder<> Builder(C);
1641  Builder.SetInsertPoint(CI->getParent(), CI->getIterator());
1642 
1643  assert(F && "Intrinsic call is not direct?");
1644 
1645  if (!NewFn) {
1646  // Get the Function's name.
1647  StringRef Name = F->getName();
1648 
1649  // clang.arc.use is an old name for llvm.arc.clang.arc.use. It is dropped
1650  // from upgrader because the optimizer now only recognizes intrinsics for
1651  // ARC runtime calls.
1652  if (Name == "clang.arc.use") {
1653  CI->eraseFromParent();
1654  return;
1655  }
1656 
1657  assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'");
1658  Name = Name.substr(5);
1659 
1660  bool IsX86 = Name.startswith("x86.");
1661  if (IsX86)
1662  Name = Name.substr(4);
1663  bool IsNVVM = Name.startswith("nvvm.");
1664  if (IsNVVM)
1665  Name = Name.substr(5);
1666 
1667  if (IsX86 && Name.startswith("sse4a.movnt.")) {
1668  Module *M = F->getParent();
1670  Elts.push_back(
1672  MDNode *Node = MDNode::get(C, Elts);
1673 
1674  Value *Arg0 = CI->getArgOperand(0);
1675  Value *Arg1 = CI->getArgOperand(1);
1676 
1677  // Nontemporal (unaligned) store of the 0'th element of the float/double
1678  // vector.
1679  Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType();
1680  PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy);
1681  Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast");
1682  Value *Extract =
1683  Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement");
1684 
1685  StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1);
1686  SI->setMetadata(M->getMDKindID("nontemporal"), Node);
1687 
1688  // Remove intrinsic.
1689  CI->eraseFromParent();
1690  return;
1691  }
1692 
1693  if (IsX86 && (Name.startswith("avx.movnt.") ||
1694  Name.startswith("avx512.storent."))) {
1695  Module *M = F->getParent();
1697  Elts.push_back(
1699  MDNode *Node = MDNode::get(C, Elts);
1700 
1701  Value *Arg0 = CI->getArgOperand(0);
1702  Value *Arg1 = CI->getArgOperand(1);
1703 
1704  // Convert the type of the pointer to a pointer to the stored type.
1705  Value *BC = Builder.CreateBitCast(Arg0,
1707  "cast");
1708  VectorType *VTy = cast<VectorType>(Arg1->getType());
1709  StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC,
1710  VTy->getBitWidth() / 8);
1711  SI->setMetadata(M->getMDKindID("nontemporal"), Node);
1712 
1713  // Remove intrinsic.
1714  CI->eraseFromParent();
1715  return;
1716  }
1717 
1718  if (IsX86 && Name == "sse2.storel.dq") {
1719  Value *Arg0 = CI->getArgOperand(0);
1720  Value *Arg1 = CI->getArgOperand(1);
1721 
1722  Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
1723  Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
1724  Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0);
1725  Value *BC = Builder.CreateBitCast(Arg0,
1727  "cast");
1728  Builder.CreateAlignedStore(Elt, BC, 1);
1729 
1730  // Remove intrinsic.
1731  CI->eraseFromParent();
1732  return;
1733  }
1734 
1735  if (IsX86 && (Name.startswith("sse.storeu.") ||
1736  Name.startswith("sse2.storeu.") ||
1737  Name.startswith("avx.storeu."))) {
1738  Value *Arg0 = CI->getArgOperand(0);
1739  Value *Arg1 = CI->getArgOperand(1);
1740 
1741  Arg0 = Builder.CreateBitCast(Arg0,
1743  "cast");
1744  Builder.CreateAlignedStore(Arg1, Arg0, 1);
1745 
1746  // Remove intrinsic.
1747  CI->eraseFromParent();
1748  return;
1749  }
1750 
1751  if (IsX86 && Name == "avx512.mask.store.ss") {
1752  Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1));
1753  UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
1754  Mask, false);
1755 
1756  // Remove intrinsic.
1757  CI->eraseFromParent();
1758  return;
1759  }
1760 
1761  if (IsX86 && (Name.startswith("avx512.mask.store"))) {
1762  // "avx512.mask.storeu." or "avx512.mask.store."
1763  bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu".
1764  UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
1765  CI->getArgOperand(2), Aligned);
1766 
1767  // Remove intrinsic.
1768  CI->eraseFromParent();
1769  return;
1770  }
1771 
1772  Value *Rep;
1773  // Upgrade packed integer vector compare intrinsics to compare instructions.
1774  if (IsX86 && (Name.startswith("sse2.pcmp") ||
1775  Name.startswith("avx2.pcmp"))) {
1776  // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt."
1777  bool CmpEq = Name[9] == 'e';
1778  Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT,
1779  CI->getArgOperand(0), CI->getArgOperand(1));
1780  Rep = Builder.CreateSExt(Rep, CI->getType(), "");
1781  } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) {
1782  Type *ExtTy = Type::getInt32Ty(C);
1783  if (CI->getOperand(0)->getType()->isIntegerTy(8))
1784  ExtTy = Type::getInt64Ty(C);
1785  unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() /
1786  ExtTy->getPrimitiveSizeInBits();
1787  Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy);
1788  Rep = Builder.CreateVectorSplat(NumElts, Rep);
1789  } else if (IsX86 && (Name == "sse.sqrt.ss" ||
1790  Name == "sse2.sqrt.sd")) {
1791  Value *Vec = CI->getArgOperand(0);
1792  Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0);
1794  Intrinsic::sqrt, Elt0->getType());
1795  Elt0 = Builder.CreateCall(Intr, Elt0);
1796  Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0);
1797  } else if (IsX86 && (Name.startswith("avx.sqrt.p") ||
1798  Name.startswith("sse2.sqrt.p") ||
1799  Name.startswith("sse.sqrt.p"))) {
1800  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
1801  Intrinsic::sqrt,
1802  CI->getType()),
1803  {CI->getArgOperand(0)});
1804  } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) {
1805  if (CI->getNumArgOperands() == 4 &&
1806  (!isa<ConstantInt>(CI->getArgOperand(3)) ||
1807  cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) {
1808  Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512
1809  : Intrinsic::x86_avx512_sqrt_pd_512;
1810 
1811  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) };
1812  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(),
1813  IID), Args);
1814  } else {
1815  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
1816  Intrinsic::sqrt,
1817  CI->getType()),
1818  {CI->getArgOperand(0)});
1819  }
1820  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1821  CI->getArgOperand(1));
1822  } else if (IsX86 && (Name.startswith("avx512.ptestm") ||
1823  Name.startswith("avx512.ptestnm"))) {
1824  Value *Op0 = CI->getArgOperand(0);
1825  Value *Op1 = CI->getArgOperand(1);
1826  Value *Mask = CI->getArgOperand(2);
1827  Rep = Builder.CreateAnd(Op0, Op1);
1828  llvm::Type *Ty = Op0->getType();
1829  Value *Zero = llvm::Constant::getNullValue(Ty);
1830  ICmpInst::Predicate Pred =
1831  Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ;
1832  Rep = Builder.CreateICmp(Pred, Rep, Zero);
1833  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask);
1834  } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){
1835  unsigned NumElts =
1837  Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0));
1838  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1839  CI->getArgOperand(1));
1840  } else if (IsX86 && (Name.startswith("avx512.kunpck"))) {
1841  unsigned NumElts = CI->getType()->getScalarSizeInBits();
1842  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts);
1843  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts);
1844  uint32_t Indices[64];
1845  for (unsigned i = 0; i != NumElts; ++i)
1846  Indices[i] = i;
1847 
1848  // First extract half of each vector. This gives better codegen than
1849  // doing it in a single shuffle.
1850  LHS = Builder.CreateShuffleVector(LHS, LHS,
1851  makeArrayRef(Indices, NumElts / 2));
1852  RHS = Builder.CreateShuffleVector(RHS, RHS,
1853  makeArrayRef(Indices, NumElts / 2));
1854  // Concat the vectors.
1855  // NOTE: Operands have to be swapped to match intrinsic definition.
1856  Rep = Builder.CreateShuffleVector(RHS, LHS,
1857  makeArrayRef(Indices, NumElts));
1858  Rep = Builder.CreateBitCast(Rep, CI->getType());
1859  } else if (IsX86 && Name == "avx512.kand.w") {
1860  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1861  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1862  Rep = Builder.CreateAnd(LHS, RHS);
1863  Rep = Builder.CreateBitCast(Rep, CI->getType());
1864  } else if (IsX86 && Name == "avx512.kandn.w") {
1865  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1866  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1867  LHS = Builder.CreateNot(LHS);
1868  Rep = Builder.CreateAnd(LHS, RHS);
1869  Rep = Builder.CreateBitCast(Rep, CI->getType());
1870  } else if (IsX86 && Name == "avx512.kor.w") {
1871  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1872  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1873  Rep = Builder.CreateOr(LHS, RHS);
1874  Rep = Builder.CreateBitCast(Rep, CI->getType());
1875  } else if (IsX86 && Name == "avx512.kxor.w") {
1876  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1877  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1878  Rep = Builder.CreateXor(LHS, RHS);
1879  Rep = Builder.CreateBitCast(Rep, CI->getType());
1880  } else if (IsX86 && Name == "avx512.kxnor.w") {
1881  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1882  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1883  LHS = Builder.CreateNot(LHS);
1884  Rep = Builder.CreateXor(LHS, RHS);
1885  Rep = Builder.CreateBitCast(Rep, CI->getType());
1886  } else if (IsX86 && Name == "avx512.knot.w") {
1887  Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1888  Rep = Builder.CreateNot(Rep);
1889  Rep = Builder.CreateBitCast(Rep, CI->getType());
1890  } else if (IsX86 &&
1891  (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) {
1892  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1893  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1894  Rep = Builder.CreateOr(LHS, RHS);
1895  Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty());
1896  Value *C;
1897  if (Name[14] == 'c')
1899  else
1900  C = ConstantInt::getNullValue(Builder.getInt16Ty());
1901  Rep = Builder.CreateICmpEQ(Rep, C);
1902  Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty());
1903  } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" ||
1904  Name == "sse.sub.ss" || Name == "sse2.sub.sd" ||
1905  Name == "sse.mul.ss" || Name == "sse2.mul.sd" ||
1906  Name == "sse.div.ss" || Name == "sse2.div.sd")) {
1907  Type *I32Ty = Type::getInt32Ty(C);
1908  Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0),
1909  ConstantInt::get(I32Ty, 0));
1910  Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1),
1911  ConstantInt::get(I32Ty, 0));
1912  Value *EltOp;
1913  if (Name.contains(".add."))
1914  EltOp = Builder.CreateFAdd(Elt0, Elt1);
1915  else if (Name.contains(".sub."))
1916  EltOp = Builder.CreateFSub(Elt0, Elt1);
1917  else if (Name.contains(".mul."))
1918  EltOp = Builder.CreateFMul(Elt0, Elt1);
1919  else
1920  EltOp = Builder.CreateFDiv(Elt0, Elt1);
1921  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp,
1922  ConstantInt::get(I32Ty, 0));
1923  } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) {
1924  // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt."
1925  bool CmpEq = Name[16] == 'e';
1926  Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true);
1927  } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) {
1928  Type *OpTy = CI->getArgOperand(0)->getType();
1929  unsigned VecWidth = OpTy->getPrimitiveSizeInBits();
1930  Intrinsic::ID IID;
1931  switch (VecWidth) {
1932  default: llvm_unreachable("Unexpected intrinsic");
1933  case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break;
1934  case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break;
1935  case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break;
1936  }
1937 
1938  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1939  { CI->getOperand(0), CI->getArgOperand(1) });
1940  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2));
1941  } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) {
1942  Type *OpTy = CI->getArgOperand(0)->getType();
1943  unsigned VecWidth = OpTy->getPrimitiveSizeInBits();
1944  unsigned EltWidth = OpTy->getScalarSizeInBits();
1945  Intrinsic::ID IID;
1946  if (VecWidth == 128 && EltWidth == 32)
1947  IID = Intrinsic::x86_avx512_fpclass_ps_128;
1948  else if (VecWidth == 256 && EltWidth == 32)
1949  IID = Intrinsic::x86_avx512_fpclass_ps_256;
1950  else if (VecWidth == 512 && EltWidth == 32)
1951  IID = Intrinsic::x86_avx512_fpclass_ps_512;
1952  else if (VecWidth == 128 && EltWidth == 64)
1953  IID = Intrinsic::x86_avx512_fpclass_pd_128;
1954  else if (VecWidth == 256 && EltWidth == 64)
1955  IID = Intrinsic::x86_avx512_fpclass_pd_256;
1956  else if (VecWidth == 512 && EltWidth == 64)
1957  IID = Intrinsic::x86_avx512_fpclass_pd_512;
1958  else
1959  llvm_unreachable("Unexpected intrinsic");
1960 
1961  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1962  { CI->getOperand(0), CI->getArgOperand(1) });
1963  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2));
1964  } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) {
1965  Type *OpTy = CI->getArgOperand(0)->getType();
1966  unsigned VecWidth = OpTy->getPrimitiveSizeInBits();
1967  unsigned EltWidth = OpTy->getScalarSizeInBits();
1968  Intrinsic::ID IID;
1969  if (VecWidth == 128 && EltWidth == 32)
1970  IID = Intrinsic::x86_avx512_cmp_ps_128;
1971  else if (VecWidth == 256 && EltWidth == 32)
1972  IID = Intrinsic::x86_avx512_cmp_ps_256;
1973  else if (VecWidth == 512 && EltWidth == 32)
1974  IID = Intrinsic::x86_avx512_cmp_ps_512;
1975  else if (VecWidth == 128 && EltWidth == 64)
1976  IID = Intrinsic::x86_avx512_cmp_pd_128;
1977  else if (VecWidth == 256 && EltWidth == 64)
1978  IID = Intrinsic::x86_avx512_cmp_pd_256;
1979  else if (VecWidth == 512 && EltWidth == 64)
1980  IID = Intrinsic::x86_avx512_cmp_pd_512;
1981  else
1982  llvm_unreachable("Unexpected intrinsic");
1983 
1985  Args.push_back(CI->getArgOperand(0));
1986  Args.push_back(CI->getArgOperand(1));
1987  Args.push_back(CI->getArgOperand(2));
1988  if (CI->getNumArgOperands() == 5)
1989  Args.push_back(CI->getArgOperand(4));
1990 
1991  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1992  Args);
1993  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3));
1994  } else if (IsX86 && Name.startswith("avx512.mask.cmp.") &&
1995  Name[16] != 'p') {
1996  // Integer compare intrinsics.
1997  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1998  Rep = upgradeMaskedCompare(Builder, *CI, Imm, true);
1999  } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) {
2000  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2001  Rep = upgradeMaskedCompare(Builder, *CI, Imm, false);
2002  } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") ||
2003  Name.startswith("avx512.cvtw2mask.") ||
2004  Name.startswith("avx512.cvtd2mask.") ||
2005  Name.startswith("avx512.cvtq2mask."))) {
2006  Value *Op = CI->getArgOperand(0);
2008  Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero);
2009  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr);
2010  } else if(IsX86 && (Name == "ssse3.pabs.b.128" ||
2011  Name == "ssse3.pabs.w.128" ||
2012  Name == "ssse3.pabs.d.128" ||
2013  Name.startswith("avx2.pabs") ||
2014  Name.startswith("avx512.mask.pabs"))) {
2015  Rep = upgradeAbs(Builder, *CI);
2016  } else if (IsX86 && (Name == "sse41.pmaxsb" ||
2017  Name == "sse2.pmaxs.w" ||
2018  Name == "sse41.pmaxsd" ||
2019  Name.startswith("avx2.pmaxs") ||
2020  Name.startswith("avx512.mask.pmaxs"))) {
2021  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT);
2022  } else if (IsX86 && (Name == "sse2.pmaxu.b" ||
2023  Name == "sse41.pmaxuw" ||
2024  Name == "sse41.pmaxud" ||
2025  Name.startswith("avx2.pmaxu") ||
2026  Name.startswith("avx512.mask.pmaxu"))) {
2027  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT);
2028  } else if (IsX86 && (Name == "sse41.pminsb" ||
2029  Name == "sse2.pmins.w" ||
2030  Name == "sse41.pminsd" ||
2031  Name.startswith("avx2.pmins") ||
2032  Name.startswith("avx512.mask.pmins"))) {
2033  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT);
2034  } else if (IsX86 && (Name == "sse2.pminu.b" ||
2035  Name == "sse41.pminuw" ||
2036  Name == "sse41.pminud" ||
2037  Name.startswith("avx2.pminu") ||
2038  Name.startswith("avx512.mask.pminu"))) {
2039  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT);
2040  } else if (IsX86 && (Name == "sse2.pmulu.dq" ||
2041  Name == "avx2.pmulu.dq" ||
2042  Name == "avx512.pmulu.dq.512" ||
2043  Name.startswith("avx512.mask.pmulu.dq."))) {
2044  Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false);
2045  } else if (IsX86 && (Name == "sse41.pmuldq" ||
2046  Name == "avx2.pmul.dq" ||
2047  Name == "avx512.pmul.dq.512" ||
2048  Name.startswith("avx512.mask.pmul.dq."))) {
2049  Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true);
2050  } else if (IsX86 && (Name == "sse.cvtsi2ss" ||
2051  Name == "sse2.cvtsi2sd" ||
2052  Name == "sse.cvtsi642ss" ||
2053  Name == "sse2.cvtsi642sd")) {
2054  Rep = Builder.CreateSIToFP(CI->getArgOperand(1),
2055  CI->getType()->getVectorElementType());
2056  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
2057  } else if (IsX86 && Name == "avx512.cvtusi2sd") {
2058  Rep = Builder.CreateUIToFP(CI->getArgOperand(1),
2059  CI->getType()->getVectorElementType());
2060  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
2061  } else if (IsX86 && Name == "sse2.cvtss2sd") {
2062  Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0);
2063  Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType());
2064  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
2065  } else if (IsX86 && (Name == "sse2.cvtdq2pd" ||
2066  Name == "sse2.cvtdq2ps" ||
2067  Name == "avx.cvtdq2.pd.256" ||
2068  Name == "avx.cvtdq2.ps.256" ||
2069  Name.startswith("avx512.mask.cvtdq2pd.") ||
2070  Name.startswith("avx512.mask.cvtudq2pd.") ||
2071  Name.startswith("avx512.mask.cvtdq2ps.") ||
2072  Name.startswith("avx512.mask.cvtudq2ps.") ||
2073  Name.startswith("avx512.mask.cvtqq2pd.") ||
2074  Name.startswith("avx512.mask.cvtuqq2pd.") ||
2075  Name == "avx512.mask.cvtqq2ps.256" ||
2076  Name == "avx512.mask.cvtqq2ps.512" ||
2077  Name == "avx512.mask.cvtuqq2ps.256" ||
2078  Name == "avx512.mask.cvtuqq2ps.512" ||
2079  Name == "sse2.cvtps2pd" ||
2080  Name == "avx.cvt.ps2.pd.256" ||
2081  Name == "avx512.mask.cvtps2pd.128" ||
2082  Name == "avx512.mask.cvtps2pd.256")) {
2083  Type *DstTy = CI->getType();
2084  Rep = CI->getArgOperand(0);
2085  Type *SrcTy = Rep->getType();
2086 
2087  unsigned NumDstElts = DstTy->getVectorNumElements();
2088  if (NumDstElts < SrcTy->getVectorNumElements()) {
2089  assert(NumDstElts == 2 && "Unexpected vector size");
2090  uint32_t ShuffleMask[2] = { 0, 1 };
2091  Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask);
2092  }
2093 
2094  bool IsPS2PD = SrcTy->getVectorElementType()->isFloatTy();
2095  bool IsUnsigned = (StringRef::npos != Name.find("cvtu"));
2096  if (IsPS2PD)
2097  Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd");
2098  else if (CI->getNumArgOperands() == 4 &&
2099  (!isa<ConstantInt>(CI->getArgOperand(3)) ||
2100  cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) {
2101  Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round
2102  : Intrinsic::x86_avx512_sitofp_round;
2104  { DstTy, SrcTy });
2105  Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) });
2106  } else {
2107  Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt")
2108  : Builder.CreateSIToFP(Rep, DstTy, "cvt");
2109  }
2110 
2111  if (CI->getNumArgOperands() >= 3)
2112  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2113  CI->getArgOperand(1));
2114  } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) {
2115  Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
2116  CI->getArgOperand(1), CI->getArgOperand(2),
2117  /*Aligned*/false);
2118  } else if (IsX86 && (Name.startswith("avx512.mask.load."))) {
2119  Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
2120  CI->getArgOperand(1),CI->getArgOperand(2),
2121  /*Aligned*/true);
2122  } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) {
2123  Type *ResultTy = CI->getType();
2124  Type *PtrTy = ResultTy->getVectorElementType();
2125 
2126  // Cast the pointer to element type.
2127  Value *Ptr = Builder.CreateBitCast(CI->getOperand(0),
2129 
2130  Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2),
2131  ResultTy->getVectorNumElements());
2132 
2134  Intrinsic::masked_expandload,
2135  ResultTy);
2136  Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) });
2137  } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) {
2138  Type *ResultTy = CI->getArgOperand(1)->getType();
2139  Type *PtrTy = ResultTy->getVectorElementType();
2140 
2141  // Cast the pointer to element type.
2142  Value *Ptr = Builder.CreateBitCast(CI->getOperand(0),
2144 
2145  Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2),
2146  ResultTy->getVectorNumElements());
2147 
2149  Intrinsic::masked_compressstore,
2150  ResultTy);
2151  Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec });
2152  } else if (IsX86 && (Name.startswith("avx512.mask.compress.") ||
2153  Name.startswith("avx512.mask.expand."))) {
2154  Type *ResultTy = CI->getType();
2155 
2156  Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2),
2157  ResultTy->getVectorNumElements());
2158 
2159  bool IsCompress = Name[12] == 'c';
2160  Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress
2161  : Intrinsic::x86_avx512_mask_expand;
2162  Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy);
2163  Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1),
2164  MaskVec });
2165  } else if (IsX86 && Name.startswith("xop.vpcom")) {
2166  bool IsSigned;
2167  if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") ||
2168  Name.endswith("uq"))
2169  IsSigned = false;
2170  else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") ||
2171  Name.endswith("q"))
2172  IsSigned = true;
2173  else
2174  llvm_unreachable("Unknown suffix");
2175 
2176  unsigned Imm;
2177  if (CI->getNumArgOperands() == 3) {
2178  Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2179  } else {
2180  Name = Name.substr(9); // strip off "xop.vpcom"
2181  if (Name.startswith("lt"))
2182  Imm = 0;
2183  else if (Name.startswith("le"))
2184  Imm = 1;
2185  else if (Name.startswith("gt"))
2186  Imm = 2;
2187  else if (Name.startswith("ge"))
2188  Imm = 3;
2189  else if (Name.startswith("eq"))
2190  Imm = 4;
2191  else if (Name.startswith("ne"))
2192  Imm = 5;
2193  else if (Name.startswith("false"))
2194  Imm = 6;
2195  else if (Name.startswith("true"))
2196  Imm = 7;
2197  else
2198  llvm_unreachable("Unknown condition");
2199  }
2200 
2201  Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned);
2202  } else if (IsX86 && Name.startswith("xop.vpcmov")) {
2203  Value *Sel = CI->getArgOperand(2);
2204  Value *NotSel = Builder.CreateNot(Sel);
2205  Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel);
2206  Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel);
2207  Rep = Builder.CreateOr(Sel0, Sel1);
2208  } else if (IsX86 && (Name.startswith("xop.vprot") ||
2209  Name.startswith("avx512.prol") ||
2210  Name.startswith("avx512.mask.prol"))) {
2211  Rep = upgradeX86Rotate(Builder, *CI, false);
2212  } else if (IsX86 && (Name.startswith("avx512.pror") ||
2213  Name.startswith("avx512.mask.pror"))) {
2214  Rep = upgradeX86Rotate(Builder, *CI, true);
2215  } else if (IsX86 && (Name.startswith("avx512.vpshld.") ||
2216  Name.startswith("avx512.mask.vpshld") ||
2217  Name.startswith("avx512.maskz.vpshld"))) {
2218  bool ZeroMask = Name[11] == 'z';
2219  Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask);
2220  } else if (IsX86 && (Name.startswith("avx512.vpshrd.") ||
2221  Name.startswith("avx512.mask.vpshrd") ||
2222  Name.startswith("avx512.maskz.vpshrd"))) {
2223  bool ZeroMask = Name[11] == 'z';
2224  Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask);
2225  } else if (IsX86 && Name == "sse42.crc32.64.8") {
2227  Intrinsic::x86_sse42_crc32_32_8);
2228  Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C));
2229  Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)});
2230  Rep = Builder.CreateZExt(Rep, CI->getType(), "");
2231  } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") ||
2232  Name.startswith("avx512.vbroadcast.s"))) {
2233  // Replace broadcasts with a series of insertelements.
2234  Type *VecTy = CI->getType();
2235  Type *EltTy = VecTy->getVectorElementType();
2236  unsigned EltNum = VecTy->getVectorNumElements();
2237  Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0),
2238  EltTy->getPointerTo());
2239  Value *Load = Builder.CreateLoad(EltTy, Cast);
2240  Type *I32Ty = Type::getInt32Ty(C);
2241  Rep = UndefValue::get(VecTy);
2242  for (unsigned I = 0; I < EltNum; ++I)
2243  Rep = Builder.CreateInsertElement(Rep, Load,
2244  ConstantInt::get(I32Ty, I));
2245  } else if (IsX86 && (Name.startswith("sse41.pmovsx") ||
2246  Name.startswith("sse41.pmovzx") ||
2247  Name.startswith("avx2.pmovsx") ||
2248  Name.startswith("avx2.pmovzx") ||
2249  Name.startswith("avx512.mask.pmovsx") ||
2250  Name.startswith("avx512.mask.pmovzx"))) {
2251  VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType());
2252  VectorType *DstTy = cast<VectorType>(CI->getType());
2253  unsigned NumDstElts = DstTy->getNumElements();
2254 
2255  // Extract a subvector of the first NumDstElts lanes and sign/zero extend.
2256  SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
2257  for (unsigned i = 0; i != NumDstElts; ++i)
2258  ShuffleMask[i] = i;
2259 
2260  Value *SV = Builder.CreateShuffleVector(
2261  CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask);
2262 
2263  bool DoSext = (StringRef::npos != Name.find("pmovsx"));
2264  Rep = DoSext ? Builder.CreateSExt(SV, DstTy)
2265  : Builder.CreateZExt(SV, DstTy);
2266  // If there are 3 arguments, it's a masked intrinsic so we need a select.
2267  if (CI->getNumArgOperands() == 3)
2268  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2269  CI->getArgOperand(1));
2270  } else if (Name == "avx512.mask.pmov.qd.256" ||
2271  Name == "avx512.mask.pmov.qd.512" ||
2272  Name == "avx512.mask.pmov.wb.256" ||
2273  Name == "avx512.mask.pmov.wb.512") {
2274  Type *Ty = CI->getArgOperand(1)->getType();
2275  Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty);
2276  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2277  CI->getArgOperand(1));
2278  } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") ||
2279  Name == "avx2.vbroadcasti128")) {
2280  // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle.
2281  Type *EltTy = CI->getType()->getVectorElementType();
2282  unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits();
2283  Type *VT = VectorType::get(EltTy, NumSrcElts);
2284  Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
2286  Value *Load = Builder.CreateAlignedLoad(VT, Op, 1);
2287  if (NumSrcElts == 2)
2288  Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
2289  { 0, 1, 0, 1 });
2290  else
2291  Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
2292  { 0, 1, 2, 3, 0, 1, 2, 3 });
2293  } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") ||
2294  Name.startswith("avx512.mask.shuf.f"))) {
2295  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2296  Type *VT = CI->getType();
2297  unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128;
2298  unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits();
2299  unsigned ControlBitsMask = NumLanes - 1;
2300  unsigned NumControlBits = NumLanes / 2;
2301  SmallVector<uint32_t, 8> ShuffleMask(0);
2302 
2303  for (unsigned l = 0; l != NumLanes; ++l) {
2304  unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask;
2305  // We actually need the other source.
2306  if (l >= NumLanes / 2)
2307  LaneMask += NumLanes;
2308  for (unsigned i = 0; i != NumElementsInLane; ++i)
2309  ShuffleMask.push_back(LaneMask * NumElementsInLane + i);
2310  }
2311  Rep = Builder.CreateShuffleVector(CI->getArgOperand(0),
2312  CI->getArgOperand(1), ShuffleMask);
2313  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
2314  CI->getArgOperand(3));
2315  }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") ||
2316  Name.startswith("avx512.mask.broadcasti"))) {
2317  unsigned NumSrcElts =
2319  unsigned NumDstElts = CI->getType()->getVectorNumElements();
2320 
2321  SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
2322  for (unsigned i = 0; i != NumDstElts; ++i)
2323  ShuffleMask[i] = i % NumSrcElts;
2324 
2325  Rep = Builder.CreateShuffleVector(CI->getArgOperand(0),
2326  CI->getArgOperand(0),
2327  ShuffleMask);
2328  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2329  CI->getArgOperand(1));
2330  } else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
2331  Name.startswith("avx2.vbroadcast") ||
2332  Name.startswith("avx512.pbroadcast") ||
2333  Name.startswith("avx512.mask.broadcast.s"))) {
2334  // Replace vp?broadcasts with a vector shuffle.
2335  Value *Op = CI->getArgOperand(0);
2336  unsigned NumElts = CI->getType()->getVectorNumElements();
2337  Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts);
2338  Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()),
2339  Constant::getNullValue(MaskTy));
2340 
2341  if (CI->getNumArgOperands() == 3)
2342  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2343  CI->getArgOperand(1));
2344  } else if (IsX86 && (Name.startswith("sse2.padds.") ||
2345  Name.startswith("sse2.psubs.") ||
2346  Name.startswith("avx2.padds.") ||
2347  Name.startswith("avx2.psubs.") ||
2348  Name.startswith("avx512.padds.") ||
2349  Name.startswith("avx512.psubs.") ||
2350  Name.startswith("avx512.mask.padds.") ||
2351  Name.startswith("avx512.mask.psubs."))) {
2352  bool IsAdd = Name.contains(".padds");
2353  Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd);
2354  } else if (IsX86 && (Name.startswith("sse2.paddus.") ||
2355  Name.startswith("sse2.psubus.") ||
2356  Name.startswith("avx2.paddus.") ||
2357  Name.startswith("avx2.psubus.") ||
2358  Name.startswith("avx512.mask.paddus.") ||
2359  Name.startswith("avx512.mask.psubus."))) {
2360  bool IsAdd = Name.contains(".paddus");
2361  Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd);
2362  } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) {
2363  Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0),
2364  CI->getArgOperand(1),
2365  CI->getArgOperand(2),
2366  CI->getArgOperand(3),
2367  CI->getArgOperand(4),
2368  false);
2369  } else if (IsX86 && Name.startswith("avx512.mask.valign.")) {
2370  Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0),
2371  CI->getArgOperand(1),
2372  CI->getArgOperand(2),
2373  CI->getArgOperand(3),
2374  CI->getArgOperand(4),
2375  true);
2376  } else if (IsX86 && (Name == "sse2.psll.dq" ||
2377  Name == "avx2.psll.dq")) {
2378  // 128/256-bit shift left specified in bits.
2379  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2380  Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0),
2381  Shift / 8); // Shift is in bits.
2382  } else if (IsX86 && (Name == "sse2.psrl.dq" ||
2383  Name == "avx2.psrl.dq")) {
2384  // 128/256-bit shift right specified in bits.
2385  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2386  Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0),
2387  Shift / 8); // Shift is in bits.
2388  } else if (IsX86 && (Name == "sse2.psll.dq.bs" ||
2389  Name == "avx2.psll.dq.bs" ||
2390  Name == "avx512.psll.dq.512")) {
2391  // 128/256/512-bit shift left specified in bytes.
2392  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2393  Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
2394  } else if (IsX86 && (Name == "sse2.psrl.dq.bs" ||
2395  Name == "avx2.psrl.dq.bs" ||
2396  Name == "avx512.psrl.dq.512")) {
2397  // 128/256/512-bit shift right specified in bytes.
2398  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2399  Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
2400  } else if (IsX86 && (Name == "sse41.pblendw" ||
2401  Name.startswith("sse41.blendp") ||
2402  Name.startswith("avx.blend.p") ||
2403  Name == "avx2.pblendw" ||
2404  Name.startswith("avx2.pblendd."))) {
2405  Value *Op0 = CI->getArgOperand(0);
2406  Value *Op1 = CI->getArgOperand(1);
2407  unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2408  VectorType *VecTy = cast<VectorType>(CI->getType());
2409  unsigned NumElts = VecTy->getNumElements();
2410 
2411  SmallVector<uint32_t, 16> Idxs(NumElts);
2412  for (unsigned i = 0; i != NumElts; ++i)
2413  Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i;
2414 
2415  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2416  } else if (IsX86 && (Name.startswith("avx.vinsertf128.") ||
2417  Name == "avx2.vinserti128" ||
2418  Name.startswith("avx512.mask.insert"))) {
2419  Value *Op0 = CI->getArgOperand(0);
2420  Value *Op1 = CI->getArgOperand(1);
2421  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2422  unsigned DstNumElts = CI->getType()->getVectorNumElements();
2423  unsigned SrcNumElts = Op1->getType()->getVectorNumElements();
2424  unsigned Scale = DstNumElts / SrcNumElts;
2425 
2426  // Mask off the high bits of the immediate value; hardware ignores those.
2427  Imm = Imm % Scale;
2428 
2429  // Extend the second operand into a vector the size of the destination.
2430  Value *UndefV = UndefValue::get(Op1->getType());
2431  SmallVector<uint32_t, 8> Idxs(DstNumElts);
2432  for (unsigned i = 0; i != SrcNumElts; ++i)
2433  Idxs[i] = i;
2434  for (unsigned i = SrcNumElts; i != DstNumElts; ++i)
2435  Idxs[i] = SrcNumElts;
2436  Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs);
2437 
2438  // Insert the second operand into the first operand.
2439 
2440  // Note that there is no guarantee that instruction lowering will actually
2441  // produce a vinsertf128 instruction for the created shuffles. In
2442  // particular, the 0 immediate case involves no lane changes, so it can
2443  // be handled as a blend.
2444 
2445  // Example of shuffle mask for 32-bit elements:
2446  // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
2447  // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 >
2448 
2449  // First fill with identify mask.
2450  for (unsigned i = 0; i != DstNumElts; ++i)
2451  Idxs[i] = i;
2452  // Then replace the elements where we need to insert.
2453  for (unsigned i = 0; i != SrcNumElts; ++i)
2454  Idxs[i + Imm * SrcNumElts] = i + DstNumElts;
2455  Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs);
2456 
2457  // If the intrinsic has a mask operand, handle that.
2458  if (CI->getNumArgOperands() == 5)
2459  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
2460  CI->getArgOperand(3));
2461  } else if (IsX86 && (Name.startswith("avx.vextractf128.") ||
2462  Name == "avx2.vextracti128" ||
2463  Name.startswith("avx512.mask.vextract"))) {
2464  Value *Op0 = CI->getArgOperand(0);
2465  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2466  unsigned DstNumElts = CI->getType()->getVectorNumElements();
2467  unsigned SrcNumElts = Op0->getType()->getVectorNumElements();
2468  unsigned Scale = SrcNumElts / DstNumElts;
2469 
2470  // Mask off the high bits of the immediate value; hardware ignores those.
2471  Imm = Imm % Scale;
2472 
2473  // Get indexes for the subvector of the input vector.
2474  SmallVector<uint32_t, 8> Idxs(DstNumElts);
2475  for (unsigned i = 0; i != DstNumElts; ++i) {
2476  Idxs[i] = i + (Imm * DstNumElts);
2477  }
2478  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2479 
2480  // If the intrinsic has a mask operand, handle that.
2481  if (CI->getNumArgOperands() == 4)
2482  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2483  CI->getArgOperand(2));
2484  } else if (!IsX86 && Name == "stackprotectorcheck") {
2485  Rep = nullptr;
2486  } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") ||
2487  Name.startswith("avx512.mask.perm.di."))) {
2488  Value *Op0 = CI->getArgOperand(0);
2489  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2490  VectorType *VecTy = cast<VectorType>(CI->getType());
2491  unsigned NumElts = VecTy->getNumElements();
2492 
2493  SmallVector<uint32_t, 8> Idxs(NumElts);
2494  for (unsigned i = 0; i != NumElts; ++i)
2495  Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3);
2496 
2497  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2498 
2499  if (CI->getNumArgOperands() == 4)
2500  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2501  CI->getArgOperand(2));
2502  } else if (IsX86 && (Name.startswith("avx.vperm2f128.") ||
2503  Name == "avx2.vperm2i128")) {
2504  // The immediate permute control byte looks like this:
2505  // [1:0] - select 128 bits from sources for low half of destination
2506  // [2] - ignore
2507  // [3] - zero low half of destination
2508  // [5:4] - select 128 bits from sources for high half of destination
2509  // [6] - ignore
2510  // [7] - zero high half of destination
2511 
2512  uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2513 
2514  unsigned NumElts = CI->getType()->getVectorNumElements();
2515  unsigned HalfSize = NumElts / 2;
2516  SmallVector<uint32_t, 8> ShuffleMask(NumElts);
2517 
2518  // Determine which operand(s) are actually in use for this instruction.
2519  Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0);
2520  Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0);
2521 
2522  // If needed, replace operands based on zero mask.
2523  V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0;
2524  V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1;
2525 
2526  // Permute low half of result.
2527  unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0;
2528  for (unsigned i = 0; i < HalfSize; ++i)
2529  ShuffleMask[i] = StartIndex + i;
2530 
2531  // Permute high half of result.
2532  StartIndex = (Imm & 0x10) ? HalfSize : 0;
2533  for (unsigned i = 0; i < HalfSize; ++i)
2534  ShuffleMask[i + HalfSize] = NumElts + StartIndex + i;
2535 
2536  Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask);
2537 
2538  } else if (IsX86 && (Name.startswith("avx.vpermil.") ||
2539  Name == "sse2.pshuf.d" ||
2540  Name.startswith("avx512.mask.vpermil.p") ||
2541  Name.startswith("avx512.mask.pshuf.d."))) {
2542  Value *Op0 = CI->getArgOperand(0);
2543  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2544  VectorType *VecTy = cast<VectorType>(CI->getType());
2545  unsigned NumElts = VecTy->getNumElements();
2546  // Calculate the size of each index in the immediate.
2547  unsigned IdxSize = 64 / VecTy->getScalarSizeInBits();
2548  unsigned IdxMask = ((1 << IdxSize) - 1);
2549 
2550  SmallVector<uint32_t, 8> Idxs(NumElts);
2551  // Lookup the bits for this element, wrapping around the immediate every
2552  // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need
2553  // to offset by the first index of each group.
2554  for (unsigned i = 0; i != NumElts; ++i)
2555  Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask);
2556 
2557  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2558 
2559  if (CI->getNumArgOperands() == 4)
2560  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2561  CI->getArgOperand(2));
2562  } else if (IsX86 && (Name == "sse2.pshufl.w" ||
2563  Name.startswith("avx512.mask.pshufl.w."))) {
2564  Value *Op0 = CI->getArgOperand(0);
2565  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2566  unsigned NumElts = CI->getType()->getVectorNumElements();
2567 
2568  SmallVector<uint32_t, 16> Idxs(NumElts);
2569  for (unsigned l = 0; l != NumElts; l += 8) {
2570  for (unsigned i = 0; i != 4; ++i)
2571  Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l;
2572  for (unsigned i = 4; i != 8; ++i)
2573  Idxs[i + l] = i + l;
2574  }
2575 
2576  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2577 
2578  if (CI->getNumArgOperands() == 4)
2579  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2580  CI->getArgOperand(2));
2581  } else if (IsX86 && (Name == "sse2.pshufh.w" ||
2582  Name.startswith("avx512.mask.pshufh.w."))) {
2583  Value *Op0 = CI->getArgOperand(0);
2584  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2585  unsigned NumElts = CI->getType()->getVectorNumElements();
2586 
2587  SmallVector<uint32_t, 16> Idxs(NumElts);
2588  for (unsigned l = 0; l != NumElts; l += 8) {
2589  for (unsigned i = 0; i != 4; ++i)
2590  Idxs[i + l] = i + l;
2591  for (unsigned i = 0; i != 4; ++i)
2592  Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l;
2593  }
2594 
2595  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2596 
2597  if (CI->getNumArgOperands() == 4)
2598  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2599  CI->getArgOperand(2));
2600  } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) {
2601  Value *Op0 = CI->getArgOperand(0);
2602  Value *Op1 = CI->getArgOperand(1);
2603  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2604  unsigned NumElts = CI->getType()->getVectorNumElements();
2605 
2606  unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2607  unsigned HalfLaneElts = NumLaneElts / 2;
2608 
2609  SmallVector<uint32_t, 16> Idxs(NumElts);
2610  for (unsigned i = 0; i != NumElts; ++i) {
2611  // Base index is the starting element of the lane.
2612  Idxs[i] = i - (i % NumLaneElts);
2613  // If we are half way through the lane switch to the other source.
2614  if ((i % NumLaneElts) >= HalfLaneElts)
2615  Idxs[i] += NumElts;
2616  // Now select the specific element. By adding HalfLaneElts bits from
2617  // the immediate. Wrapping around the immediate every 8-bits.
2618  Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1);
2619  }
2620 
2621  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2622 
2623  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
2624  CI->getArgOperand(3));
2625  } else if (IsX86 && (Name.startswith("avx512.mask.movddup") ||
2626  Name.startswith("avx512.mask.movshdup") ||
2627  Name.startswith("avx512.mask.movsldup"))) {
2628  Value *Op0 = CI->getArgOperand(0);
2629  unsigned NumElts = CI->getType()->getVectorNumElements();
2630  unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2631 
2632  unsigned Offset = 0;
2633  if (Name.startswith("avx512.mask.movshdup."))
2634  Offset = 1;
2635 
2636  SmallVector<uint32_t, 16> Idxs(NumElts);
2637  for (unsigned l = 0; l != NumElts; l += NumLaneElts)
2638  for (unsigned i = 0; i != NumLaneElts; i += 2) {
2639  Idxs[i + l + 0] = i + l + Offset;
2640  Idxs[i + l + 1] = i + l + Offset;
2641  }
2642 
2643  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2644 
2645  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2646  CI->getArgOperand(1));
2647  } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") ||
2648  Name.startswith("avx512.mask.unpckl."))) {
2649  Value *Op0 = CI->getArgOperand(0);
2650  Value *Op1 = CI->getArgOperand(1);
2651  int NumElts = CI->getType()->getVectorNumElements();
2652  int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2653 
2654  SmallVector<uint32_t, 64> Idxs(NumElts);
2655  for (int l = 0; l != NumElts; l += NumLaneElts)
2656  for (int i = 0; i != NumLaneElts; ++i)
2657  Idxs[i + l] = l + (i / 2) + NumElts * (i % 2);
2658 
2659  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2660 
2661  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2662  CI->getArgOperand(2));
2663  } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") ||
2664  Name.startswith("avx512.mask.unpckh."))) {
2665  Value *Op0 = CI->getArgOperand(0);
2666  Value *Op1 = CI->getArgOperand(1);
2667  int NumElts = CI->getType()->getVectorNumElements();
2668  int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2669 
2670  SmallVector<uint32_t, 64> Idxs(NumElts);
2671  for (int l = 0; l != NumElts; l += NumLaneElts)
2672  for (int i = 0; i != NumLaneElts; ++i)
2673  Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2);
2674 
2675  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2676 
2677  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2678  CI->getArgOperand(2));
2679  } else if (IsX86 && (Name.startswith("avx512.mask.and.") ||
2680  Name.startswith("avx512.mask.pand."))) {
2681  VectorType *FTy = cast<VectorType>(CI->getType());
2682  VectorType *ITy = VectorType::getInteger(FTy);
2683  Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
2684  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2685  Rep = Builder.CreateBitCast(Rep, FTy);
2686  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2687  CI->getArgOperand(2));
2688  } else if (IsX86 && (Name.startswith("avx512.mask.andn.") ||
2689  Name.startswith("avx512.mask.pandn."))) {
2690  VectorType *FTy = cast<VectorType>(CI->getType());
2691  VectorType *ITy = VectorType::getInteger(FTy);
2692  Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy));
2693  Rep = Builder.CreateAnd(Rep,
2694  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2695  Rep = Builder.CreateBitCast(Rep, FTy);
2696  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2697  CI->getArgOperand(2));
2698  } else if (IsX86 && (Name.startswith("avx512.mask.or.") ||
2699  Name.startswith("avx512.mask.por."))) {
2700  VectorType *FTy = cast<VectorType>(CI->getType());
2701  VectorType *ITy = VectorType::getInteger(FTy);
2702  Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
2703  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2704  Rep = Builder.CreateBitCast(Rep, FTy);
2705  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2706  CI->getArgOperand(2));
2707  } else if (IsX86 && (Name.startswith("avx512.mask.xor.") ||
2708  Name.startswith("avx512.mask.pxor."))) {
2709  VectorType *FTy = cast<VectorType>(CI->getType());
2710  VectorType *ITy = VectorType::getInteger(FTy);
2711  Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
2712  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2713  Rep = Builder.CreateBitCast(Rep, FTy);
2714  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2715  CI->getArgOperand(2));
2716  } else if (IsX86 && Name.startswith("avx512.mask.padd.")) {
2717  Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1));
2718  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2719  CI->getArgOperand(2));
2720  } else if (IsX86 && Name.startswith("avx512.mask.psub.")) {
2721  Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1));
2722  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2723  CI->getArgOperand(2));
2724  } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) {
2725  Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1));
2726  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2727  CI->getArgOperand(2));
2728  } else if (IsX86 && Name.startswith("avx512.mask.add.p")) {
2729  if (Name.endswith(".512")) {
2730  Intrinsic::ID IID;
2731  if (Name[17] == 's')
2732  IID = Intrinsic::x86_avx512_add_ps_512;
2733  else
2734  IID = Intrinsic::x86_avx512_add_pd_512;
2735 
2736  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2737  { CI->getArgOperand(0), CI->getArgOperand(1),
2738  CI->getArgOperand(4) });
2739  } else {
2740  Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1));
2741  }
2742  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2743  CI->getArgOperand(2));
2744  } else if (IsX86 && Name.startswith("avx512.mask.div.p")) {
2745  if (Name.endswith(".512")) {
2746  Intrinsic::ID IID;
2747  if (Name[17] == 's')
2748  IID = Intrinsic::x86_avx512_div_ps_512;
2749  else
2750  IID = Intrinsic::x86_avx512_div_pd_512;
2751 
2752  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2753  { CI->getArgOperand(0), CI->getArgOperand(1),
2754  CI->getArgOperand(4) });
2755  } else {
2756  Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1));
2757  }
2758  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2759  CI->getArgOperand(2));
2760  } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) {
2761  if (Name.endswith(".512")) {
2762  Intrinsic::ID IID;
2763  if (Name[17] == 's')
2764  IID = Intrinsic::x86_avx512_mul_ps_512;
2765  else
2766  IID = Intrinsic::x86_avx512_mul_pd_512;
2767 
2768  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2769  { CI->getArgOperand(0), CI->getArgOperand(1),
2770  CI->getArgOperand(4) });
2771  } else {
2772  Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1));
2773  }
2774  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2775  CI->getArgOperand(2));
2776  } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) {
2777  if (Name.endswith(".512")) {
2778  Intrinsic::ID IID;
2779  if (Name[17] == 's')
2780  IID = Intrinsic::x86_avx512_sub_ps_512;
2781  else
2782  IID = Intrinsic::x86_avx512_sub_pd_512;
2783 
2784  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2785  { CI->getArgOperand(0), CI->getArgOperand(1),
2786  CI->getArgOperand(4) });
2787  } else {
2788  Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1));
2789  }
2790  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2791  CI->getArgOperand(2));
2792  } else if (IsX86 && (Name.startswith("avx512.mask.max.p") ||
2793  Name.startswith("avx512.mask.min.p")) &&
2794  Name.drop_front(18) == ".512") {
2795  bool IsDouble = Name[17] == 'd';
2796  bool IsMin = Name[13] == 'i';
2797  static const Intrinsic::ID MinMaxTbl[2][2] = {
2798  { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 },
2799  { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 }
2800  };
2801  Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble];
2802 
2803  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2804  { CI->getArgOperand(0), CI->getArgOperand(1),
2805  CI->getArgOperand(4) });
2806  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2807  CI->getArgOperand(2));
2808  } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) {
2809  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
2810  Intrinsic::ctlz,
2811  CI->getType()),
2812  { CI->getArgOperand(0), Builder.getInt1(false) });
2813  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2814  CI->getArgOperand(1));
2815  } else if (IsX86 && Name.startswith("avx512.mask.psll")) {
2816  bool IsImmediate = Name[16] == 'i' ||
2817  (Name.size() > 18 && Name[18] == 'i');
2818  bool IsVariable = Name[16] == 'v';
2819  char Size = Name[16] == '.' ? Name[17] :
2820  Name[17] == '.' ? Name[18] :
2821  Name[18] == '.' ? Name[19] :
2822  Name[20];
2823 
2824  Intrinsic::ID IID;
2825  if (IsVariable && Name[17] != '.') {
2826  if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di
2827  IID = Intrinsic::x86_avx2_psllv_q;
2828  else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di
2829  IID = Intrinsic::x86_avx2_psllv_q_256;
2830  else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si
2831  IID = Intrinsic::x86_avx2_psllv_d;
2832  else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si
2833  IID = Intrinsic::x86_avx2_psllv_d_256;
2834  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi
2835  IID = Intrinsic::x86_avx512_psllv_w_128;
2836  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi
2837  IID = Intrinsic::x86_avx512_psllv_w_256;
2838  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi
2839  IID = Intrinsic::x86_avx512_psllv_w_512;
2840  else
2841  llvm_unreachable("Unexpected size");
2842  } else if (Name.endswith(".128")) {
2843  if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128
2844  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d
2845  : Intrinsic::x86_sse2_psll_d;
2846  else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128
2847  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q
2848  : Intrinsic::x86_sse2_psll_q;
2849  else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128
2850  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w
2851  : Intrinsic::x86_sse2_psll_w;
2852  else
2853  llvm_unreachable("Unexpected size");
2854  } else if (Name.endswith(".256")) {
2855  if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256
2856  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d
2857  : Intrinsic::x86_avx2_psll_d;
2858  else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256
2859  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q
2860  : Intrinsic::x86_avx2_psll_q;
2861  else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256
2862  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w
2863  : Intrinsic::x86_avx2_psll_w;
2864  else
2865  llvm_unreachable("Unexpected size");
2866  } else {
2867  if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512
2868  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 :
2869  IsVariable ? Intrinsic::x86_avx512_psllv_d_512 :
2870  Intrinsic::x86_avx512_psll_d_512;
2871  else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512
2872  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 :
2873  IsVariable ? Intrinsic::x86_avx512_psllv_q_512 :
2874  Intrinsic::x86_avx512_psll_q_512;
2875  else if (Size == 'w') // psll.wi.512, pslli.w, psll.w
2876  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512
2877  : Intrinsic::x86_avx512_psll_w_512;
2878  else
2879  llvm_unreachable("Unexpected size");
2880  }
2881 
2882  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
2883  } else if (IsX86 && Name.startswith("avx512.mask.psrl")) {
2884  bool IsImmediate = Name[16] == 'i' ||
2885  (Name.size() > 18 && Name[18] == 'i');
2886  bool IsVariable = Name[16] == 'v';
2887  char Size = Name[16] == '.' ? Name[17] :
2888  Name[17] == '.' ? Name[18] :
2889  Name[18] == '.' ? Name[19] :
2890  Name[20];
2891 
2892  Intrinsic::ID IID;
2893  if (IsVariable && Name[17] != '.') {
2894  if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di
2895  IID = Intrinsic::x86_avx2_psrlv_q;
2896  else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di
2897  IID = Intrinsic::x86_avx2_psrlv_q_256;
2898  else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si
2899  IID = Intrinsic::x86_avx2_psrlv_d;
2900  else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si
2901  IID = Intrinsic::x86_avx2_psrlv_d_256;
2902  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi
2903  IID = Intrinsic::x86_avx512_psrlv_w_128;
2904  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi
2905  IID = Intrinsic::x86_avx512_psrlv_w_256;
2906  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi
2907  IID = Intrinsic::x86_avx512_psrlv_w_512;
2908  else
2909  llvm_unreachable("Unexpected size");
2910  } else if (Name.endswith(".128")) {
2911  if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128
2912  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d
2913  : Intrinsic::x86_sse2_psrl_d;
2914  else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128
2915  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q
2916  : Intrinsic::x86_sse2_psrl_q;
2917  else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128
2918  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w
2919  : Intrinsic::x86_sse2_psrl_w;
2920  else
2921  llvm_unreachable("Unexpected size");
2922  } else if (Name.endswith(".256")) {
2923  if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256
2924  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d
2925  : Intrinsic::x86_avx2_psrl_d;
2926  else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256
2927  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q
2928  : Intrinsic::x86_avx2_psrl_q;
2929  else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256
2930  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w
2931  : Intrinsic::x86_avx2_psrl_w;
2932  else
2933  llvm_unreachable("Unexpected size");
2934  } else {
2935  if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512
2936  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 :
2937  IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 :
2938  Intrinsic::x86_avx512_psrl_d_512;
2939  else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512
2940  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 :
2941  IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 :
2942  Intrinsic::x86_avx512_psrl_q_512;
2943  else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w)
2944  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512
2945  : Intrinsic::x86_avx512_psrl_w_512;
2946  else
2947  llvm_unreachable("Unexpected size");
2948  }
2949 
2950  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
2951  } else if (IsX86 && Name.startswith("avx512.mask.psra")) {
2952  bool IsImmediate = Name[16] == 'i' ||
2953  (Name.size() > 18 && Name[18] == 'i');
2954  bool IsVariable = Name[16] == 'v';
2955  char Size = Name[16] == '.' ? Name[17] :
2956  Name[17] == '.' ? Name[18] :
2957  Name[18] == '.' ? Name[19] :
2958  Name[20];
2959 
2960  Intrinsic::ID IID;
2961  if (IsVariable && Name[17] != '.') {
2962  if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si
2963  IID = Intrinsic::x86_avx2_psrav_d;
2964  else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si
2965  IID = Intrinsic::x86_avx2_psrav_d_256;
2966  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi
2967  IID = Intrinsic::x86_avx512_psrav_w_128;
2968  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi
2969  IID = Intrinsic::x86_avx512_psrav_w_256;
2970  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi
2971  IID = Intrinsic::x86_avx512_psrav_w_512;
2972  else
2973  llvm_unreachable("Unexpected size");
2974  } else if (Name.endswith(".128")) {
2975  if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128
2976  IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d
2977  : Intrinsic::x86_sse2_psra_d;
2978  else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128
2979  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 :
2980  IsVariable ? Intrinsic::x86_avx512_psrav_q_128 :
2981  Intrinsic::x86_avx512_psra_q_128;
2982  else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128
2983  IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w
2984  : Intrinsic::x86_sse2_psra_w;
2985  else
2986  llvm_unreachable("Unexpected size");
2987  } else if (Name.endswith(".256")) {
2988  if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256
2989  IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d
2990  : Intrinsic::x86_avx2_psra_d;
2991  else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256
2992  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 :
2993  IsVariable ? Intrinsic::x86_avx512_psrav_q_256 :
2994  Intrinsic::x86_avx512_psra_q_256;
2995  else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256
2996  IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w
2997  : Intrinsic::x86_avx2_psra_w;
2998  else
2999  llvm_unreachable("Unexpected size");
3000  } else {
3001  if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512
3002  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 :
3003  IsVariable ? Intrinsic::x86_avx512_psrav_d_512 :
3004  Intrinsic::x86_avx512_psra_d_512;
3005  else if (Size == 'q') // psra.qi.512, psrai.q, psra.q
3006  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 :
3007  IsVariable ? Intrinsic::x86_avx512_psrav_q_512 :
3008  Intrinsic::x86_avx512_psra_q_512;
3009  else if (Size == 'w') // psra.wi.512, psrai.w, psra.w
3010  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512
3011  : Intrinsic::x86_avx512_psra_w_512;
3012  else
3013  llvm_unreachable("Unexpected size");
3014  }
3015 
3016  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
3017  } else if (IsX86 && Name.startswith("avx512.mask.move.s")) {
3018  Rep = upgradeMaskedMove(Builder, *CI);
3019  } else if (IsX86 && Name.startswith("avx512.cvtmask2")) {
3020  Rep = UpgradeMaskToInt(Builder, *CI);
3021  } else if (IsX86 && Name.endswith(".movntdqa")) {
3022  Module *M = F->getParent();
3023  MDNode *Node = MDNode::get(
3025 
3026  Value *Ptr = CI->getArgOperand(0);
3027  VectorType *VTy = cast<VectorType>(CI->getType());
3028 
3029  // Convert the type of the pointer to a pointer to the stored type.
3030  Value *BC =
3031  Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast");
3032  LoadInst *LI = Builder.CreateAlignedLoad(VTy, BC, VTy->getBitWidth() / 8);
3033  LI->setMetadata(M->getMDKindID("nontemporal"), Node);
3034  Rep = LI;
3035  } else if (IsX86 && (Name.startswith("fma.vfmadd.") ||
3036  Name.startswith("fma.vfmsub.") ||
3037  Name.startswith("fma.vfnmadd.") ||
3038  Name.startswith("fma.vfnmsub."))) {
3039  bool NegMul = Name[6] == 'n';
3040  bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's';
3041  bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's';
3042 
3043  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3044  CI->getArgOperand(2) };
3045 
3046  if (IsScalar) {
3047  Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0);
3048  Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0);
3049  Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0);
3050  }
3051 
3052  if (NegMul && !IsScalar)
3053  Ops[0] = Builder.CreateFNeg(Ops[0]);
3054  if (NegMul && IsScalar)
3055  Ops[1] = Builder.CreateFNeg(Ops[1]);
3056  if (NegAcc)
3057  Ops[2] = Builder.CreateFNeg(Ops[2]);
3058 
3059  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(),
3060  Intrinsic::fma,
3061  Ops[0]->getType()),
3062  Ops);
3063 
3064  if (IsScalar)
3065  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep,
3066  (uint64_t)0);
3067  } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) {
3068  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3069  CI->getArgOperand(2) };
3070 
3071  Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0);
3072  Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0);
3073  Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0);
3074 
3075  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(),
3076  Intrinsic::fma,
3077  Ops[0]->getType()),
3078  Ops);
3079 
3080  Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()),
3081  Rep, (uint64_t)0);
3082  } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") ||
3083  Name.startswith("avx512.maskz.vfmadd.s") ||
3084  Name.startswith("avx512.mask3.vfmadd.s") ||
3085  Name.startswith("avx512.mask3.vfmsub.s") ||
3086  Name.startswith("avx512.mask3.vfnmsub.s"))) {
3087  bool IsMask3 = Name[11] == '3';
3088  bool IsMaskZ = Name[11] == 'z';
3089  // Drop the "avx512.mask." to make it easier.
3090  Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12);
3091  bool NegMul = Name[2] == 'n';
3092  bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's';
3093 
3094  Value *A = CI->getArgOperand(0);
3095  Value *B = CI->getArgOperand(1);
3096  Value *C = CI->getArgOperand(2);
3097 
3098  if (NegMul && (IsMask3 || IsMaskZ))
3099  A = Builder.CreateFNeg(A);
3100  if (NegMul && !(IsMask3 || IsMaskZ))
3101  B = Builder.CreateFNeg(B);
3102  if (NegAcc)
3103  C = Builder.CreateFNeg(C);
3104 
3105  A = Builder.CreateExtractElement(A, (uint64_t)0);
3106  B = Builder.CreateExtractElement(B, (uint64_t)0);
3107  C = Builder.CreateExtractElement(C, (uint64_t)0);
3108 
3109  if (!isa<ConstantInt>(CI->getArgOperand(4)) ||
3110  cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) {
3111  Value *Ops[] = { A, B, C, CI->getArgOperand(4) };
3112 
3113  Intrinsic::ID IID;
3114  if (Name.back() == 'd')
3115  IID = Intrinsic::x86_avx512_vfmadd_f64;
3116  else
3117  IID = Intrinsic::x86_avx512_vfmadd_f32;
3119  Rep = Builder.CreateCall(FMA, Ops);
3120  } else {
3122  Intrinsic::fma,
3123  A->getType());
3124  Rep = Builder.CreateCall(FMA, { A, B, C });
3125  }
3126 
3127  Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) :
3128  IsMask3 ? C : A;
3129 
3130  // For Mask3 with NegAcc, we need to create a new extractelement that
3131  // avoids the negation above.
3132  if (NegAcc && IsMask3)
3133  PassThru = Builder.CreateExtractElement(CI->getArgOperand(2),
3134  (uint64_t)0);
3135 
3136  Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3),
3137  Rep, PassThru);
3138  Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0),
3139  Rep, (uint64_t)0);
3140  } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") ||
3141  Name.startswith("avx512.mask.vfnmadd.p") ||
3142  Name.startswith("avx512.mask.vfnmsub.p") ||
3143  Name.startswith("avx512.mask3.vfmadd.p") ||
3144  Name.startswith("avx512.mask3.vfmsub.p") ||
3145  Name.startswith("avx512.mask3.vfnmsub.p") ||
3146  Name.startswith("avx512.maskz.vfmadd.p"))) {
3147  bool IsMask3 = Name[11] == '3';
3148  bool IsMaskZ = Name[11] == 'z';
3149  // Drop the "avx512.mask." to make it easier.
3150  Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12);
3151  bool NegMul = Name[2] == 'n';
3152  bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's';
3153 
3154  Value *A = CI->getArgOperand(0);
3155  Value *B = CI->getArgOperand(1);
3156  Value *C = CI->getArgOperand(2);
3157 
3158  if (NegMul && (IsMask3 || IsMaskZ))
3159  A = Builder.CreateFNeg(A);
3160  if (NegMul && !(IsMask3 || IsMaskZ))
3161  B = Builder.CreateFNeg(B);
3162  if (NegAcc)
3163  C = Builder.CreateFNeg(C);
3164 
3165  if (CI->getNumArgOperands() == 5 &&
3166  (!isa<ConstantInt>(CI->getArgOperand(4)) ||
3167  cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) {
3168  Intrinsic::ID IID;
3169  // Check the character before ".512" in string.
3170  if (Name[Name.size()-5] == 's')
3171  IID = Intrinsic::x86_avx512_vfmadd_ps_512;
3172  else
3173  IID = Intrinsic::x86_avx512_vfmadd_pd_512;
3174 
3175  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
3176  { A, B, C, CI->getArgOperand(4) });
3177  } else {
3179  Intrinsic::fma,
3180  A->getType());
3181  Rep = Builder.CreateCall(FMA, { A, B, C });
3182  }
3183 
3184  Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) :
3185  IsMask3 ? CI->getArgOperand(2) :
3186  CI->getArgOperand(0);
3187 
3188  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3189  } else if (IsX86 && (Name.startswith("fma.vfmaddsub.p") ||
3190  Name.startswith("fma.vfmsubadd.p"))) {
3191  bool IsSubAdd = Name[7] == 's';
3192  int NumElts = CI->getType()->getVectorNumElements();
3193 
3194  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3195  CI->getArgOperand(2) };
3196 
3197  Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma,
3198  Ops[0]->getType());
3199  Value *Odd = Builder.CreateCall(FMA, Ops);
3200  Ops[2] = Builder.CreateFNeg(Ops[2]);
3201  Value *Even = Builder.CreateCall(FMA, Ops);
3202 
3203  if (IsSubAdd)
3204  std::swap(Even, Odd);
3205 
3206  SmallVector<uint32_t, 32> Idxs(NumElts);
3207  for (int i = 0; i != NumElts; ++i)
3208  Idxs[i] = i + (i % 2) * NumElts;
3209 
3210  Rep = Builder.CreateShuffleVector(Even, Odd, Idxs);
3211  } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") ||
3212  Name.startswith("avx512.mask3.vfmaddsub.p") ||
3213  Name.startswith("avx512.maskz.vfmaddsub.p") ||
3214  Name.startswith("avx512.mask3.vfmsubadd.p"))) {
3215  bool IsMask3 = Name[11] == '3';
3216  bool IsMaskZ = Name[11] == 'z';
3217  // Drop the "avx512.mask." to make it easier.
3218  Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12);
3219  bool IsSubAdd = Name[3] == 's';
3220  if (CI->getNumArgOperands() == 5 &&
3221  (!isa<ConstantInt>(CI->getArgOperand(4)) ||
3222  cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) {
3223  Intrinsic::ID IID;
3224  // Check the character before ".512" in string.
3225  if (Name[Name.size()-5] == 's')
3226  IID = Intrinsic::x86_avx512_vfmaddsub_ps_512;
3227  else
3228  IID = Intrinsic::x86_avx512_vfmaddsub_pd_512;
3229 
3230  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3231  CI->getArgOperand(2), CI->getArgOperand(4) };
3232  if (IsSubAdd)
3233  Ops[2] = Builder.CreateFNeg(Ops[2]);
3234 
3235  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
3236  {CI->getArgOperand(0), CI->getArgOperand(1),
3237  CI->getArgOperand(2), CI->getArgOperand(4)});
3238  } else {
3239  int NumElts = CI->getType()->getVectorNumElements();
3240 
3241  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3242  CI->getArgOperand(2) };
3243 
3244  Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma,
3245  Ops[0]->getType());
3246  Value *Odd = Builder.CreateCall(FMA, Ops);
3247  Ops[2] = Builder.CreateFNeg(Ops[2]);
3248  Value *Even = Builder.CreateCall(FMA, Ops);
3249 
3250  if (IsSubAdd)
3251  std::swap(Even, Odd);
3252 
3253  SmallVector<uint32_t, 32> Idxs(NumElts);
3254  for (int i = 0; i != NumElts; ++i)
3255  Idxs[i] = i + (i % 2) * NumElts;
3256 
3257  Rep = Builder.CreateShuffleVector(Even, Odd, Idxs);
3258  }
3259 
3260  Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) :
3261  IsMask3 ? CI->getArgOperand(2) :
3262  CI->getArgOperand(0);
3263 
3264  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3265  } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") ||
3266  Name.startswith("avx512.maskz.pternlog."))) {
3267  bool ZeroMask = Name[11] == 'z';
3268  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3269  unsigned EltWidth = CI->getType()->getScalarSizeInBits();
3270  Intrinsic::ID IID;
3271  if (VecWidth == 128 && EltWidth == 32)
3272  IID = Intrinsic::x86_avx512_pternlog_d_128;
3273  else if (VecWidth == 256 && EltWidth == 32)
3274  IID = Intrinsic::x86_avx512_pternlog_d_256;
3275  else if (VecWidth == 512 && EltWidth == 32)
3276  IID = Intrinsic::x86_avx512_pternlog_d_512;
3277  else if (VecWidth == 128 && EltWidth == 64)
3278  IID = Intrinsic::x86_avx512_pternlog_q_128;
3279  else if (VecWidth == 256 && EltWidth == 64)
3280  IID = Intrinsic::x86_avx512_pternlog_q_256;
3281  else if (VecWidth == 512 && EltWidth == 64)
3282  IID = Intrinsic::x86_avx512_pternlog_q_512;
3283  else
3284  llvm_unreachable("Unexpected intrinsic");
3285 
3286  Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1),
3287  CI->getArgOperand(2), CI->getArgOperand(3) };
3288  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3289  Args);
3290  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3291  : CI->getArgOperand(0);
3292  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru);
3293  } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") ||
3294  Name.startswith("avx512.maskz.vpmadd52"))) {
3295  bool ZeroMask = Name[11] == 'z';
3296  bool High = Name[20] == 'h' || Name[21] == 'h';
3297  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3298  Intrinsic::ID IID;
3299  if (VecWidth == 128 && !High)
3300  IID = Intrinsic::x86_avx512_vpmadd52l_uq_128;
3301  else if (VecWidth == 256 && !High)
3302  IID = Intrinsic::x86_avx512_vpmadd52l_uq_256;
3303  else if (VecWidth == 512 && !High)
3304  IID = Intrinsic::x86_avx512_vpmadd52l_uq_512;
3305  else if (VecWidth == 128 && High)
3306  IID = Intrinsic::x86_avx512_vpmadd52h_uq_128;
3307  else if (VecWidth == 256 && High)
3308  IID = Intrinsic::x86_avx512_vpmadd52h_uq_256;
3309  else if (VecWidth == 512 && High)
3310  IID = Intrinsic::x86_avx512_vpmadd52h_uq_512;
3311  else
3312  llvm_unreachable("Unexpected intrinsic");
3313 
3314  Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1),
3315  CI->getArgOperand(2) };
3316  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3317  Args);
3318  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3319  : CI->getArgOperand(0);
3320  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3321  } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") ||
3322  Name.startswith("avx512.mask.vpermt2var.") ||
3323  Name.startswith("avx512.maskz.vpermt2var."))) {
3324  bool ZeroMask = Name[11] == 'z';
3325  bool IndexForm = Name[17] == 'i';
3326  Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm);
3327  } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") ||
3328  Name.startswith("avx512.maskz.vpdpbusd.") ||
3329  Name.startswith("avx512.mask.vpdpbusds.") ||
3330  Name.startswith("avx512.maskz.vpdpbusds."))) {
3331  bool ZeroMask = Name[11] == 'z';
3332  bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's';
3333  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3334  Intrinsic::ID IID;
3335  if (VecWidth == 128 && !IsSaturating)
3336  IID = Intrinsic::x86_avx512_vpdpbusd_128;
3337  else if (VecWidth == 256 && !IsSaturating)
3338  IID = Intrinsic::x86_avx512_vpdpbusd_256;
3339  else if (VecWidth == 512 && !IsSaturating)
3340  IID = Intrinsic::x86_avx512_vpdpbusd_512;
3341  else if (VecWidth == 128 && IsSaturating)
3342  IID = Intrinsic::x86_avx512_vpdpbusds_128;
3343  else if (VecWidth == 256 && IsSaturating)
3344  IID = Intrinsic::x86_avx512_vpdpbusds_256;
3345  else if (VecWidth == 512 && IsSaturating)
3346  IID = Intrinsic::x86_avx512_vpdpbusds_512;
3347  else
3348  llvm_unreachable("Unexpected intrinsic");
3349 
3350  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3351  CI->getArgOperand(2) };
3352  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3353  Args);
3354  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3355  : CI->getArgOperand(0);
3356  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3357  } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") ||
3358  Name.startswith("avx512.maskz.vpdpwssd.") ||
3359  Name.startswith("avx512.mask.vpdpwssds.") ||
3360  Name.startswith("avx512.maskz.vpdpwssds."))) {
3361  bool ZeroMask = Name[11] == 'z';
3362  bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's';
3363  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3364  Intrinsic::ID IID;
3365  if (VecWidth == 128 && !IsSaturating)
3366  IID = Intrinsic::x86_avx512_vpdpwssd_128;
3367  else if (VecWidth == 256 && !IsSaturating)
3368  IID = Intrinsic::x86_avx512_vpdpwssd_256;
3369  else if (VecWidth == 512 && !IsSaturating)
3370  IID = Intrinsic::x86_avx512_vpdpwssd_512;
3371  else if (VecWidth == 128 && IsSaturating)
3372  IID = Intrinsic::x86_avx512_vpdpwssds_128;
3373  else if (VecWidth == 256 && IsSaturating)
3374  IID = Intrinsic::x86_avx512_vpdpwssds_256;
3375  else if (VecWidth == 512 && IsSaturating)
3376  IID = Intrinsic::x86_avx512_vpdpwssds_512;
3377  else
3378  llvm_unreachable("Unexpected intrinsic");
3379 
3380  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3381  CI->getArgOperand(2) };
3382  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3383  Args);
3384  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3385  : CI->getArgOperand(0);
3386  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3387  } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" ||
3388  Name == "addcarry.u32" || Name == "addcarry.u64" ||
3389  Name == "subborrow.u32" || Name == "subborrow.u64")) {
3390  Intrinsic::ID IID;
3391  if (Name[0] == 'a' && Name.back() == '2')
3392  IID = Intrinsic::x86_addcarry_32;
3393  else if (Name[0] == 'a' && Name.back() == '4')
3394  IID = Intrinsic::x86_addcarry_64;
3395  else if (Name[0] == 's' && Name.back() == '2')
3396  IID = Intrinsic::x86_subborrow_32;
3397  else if (Name[0] == 's' && Name.back() == '4')
3398  IID = Intrinsic::x86_subborrow_64;
3399  else
3400  llvm_unreachable("Unexpected intrinsic");
3401 
3402  // Make a call with 3 operands.
3403  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3404  CI->getArgOperand(2)};
3405  Value *NewCall = Builder.CreateCall(
3407  Args);
3408 
3409  // Extract the second result and store it.
3410  Value *Data = Builder.CreateExtractValue(NewCall, 1);
3411  // Cast the pointer to the right type.
3412  Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3),
3414  Builder.CreateAlignedStore(Data, Ptr, 1);
3415  // Replace the original call result with the first result of the new call.
3416  Value *CF = Builder.CreateExtractValue(NewCall, 0);
3417 
3418  CI->replaceAllUsesWith(CF);
3419  Rep = nullptr;
3420  } else if (IsX86 && Name.startswith("avx512.mask.") &&
3421  upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) {
3422  // Rep will be updated by the call in the condition.
3423  } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) {
3424  Value *Arg = CI->getArgOperand(0);
3425  Value *Neg = Builder.CreateNeg(Arg, "neg");
3426  Value *Cmp = Builder.CreateICmpSGE(
3427  Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond");
3428  Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs");
3429  } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" ||
3430  Name == "max.ui" || Name == "max.ull")) {
3431  Value *Arg0 = CI->getArgOperand(0);
3432  Value *Arg1 = CI->getArgOperand(1);
3433  Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
3434  ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond")
3435  : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond");
3436  Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max");
3437  } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" ||
3438  Name == "min.ui" || Name == "min.ull")) {
3439  Value *Arg0 = CI->getArgOperand(0);
3440  Value *Arg1 = CI->getArgOperand(1);
3441  Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
3442  ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond")
3443  : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond");
3444  Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min");
3445  } else if (IsNVVM && Name == "clz.ll") {
3446  // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64.
3447  Value *Arg = CI->getArgOperand(0);
3448  Value *Ctlz = Builder.CreateCall(
3449  Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
3450  {Arg->getType()}),
3451  {Arg, Builder.getFalse()}, "ctlz");
3452  Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc");
3453  } else if (IsNVVM && Name == "popc.ll") {
3454  // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an
3455  // i64.
3456  Value *Arg = CI->getArgOperand(0);
3457  Value *Popc = Builder.CreateCall(
3458  Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
3459  {Arg->getType()}),
3460  Arg, "ctpop");
3461  Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc");
3462  } else if (IsNVVM && Name == "h2f") {
3463  Rep = Builder.CreateCall(Intrinsic::getDeclaration(
3464  F->getParent(), Intrinsic::convert_from_fp16,
3465  {Builder.getFloatTy()}),
3466  CI->getArgOperand(0), "h2f");
3467  } else {
3468  llvm_unreachable("Unknown function for CallInst upgrade.");
3469  }
3470 
3471  if (Rep)
3472  CI->replaceAllUsesWith(Rep);
3473  CI->eraseFromParent();
3474  return;
3475  }
3476 
3477  const auto &DefaultCase = [&NewFn, &CI]() -> void {
3478  // Handle generic mangling change, but nothing else
3479  assert(
3480  (CI->getCalledFunction()->getName() != NewFn->getName()) &&
3481  "Unknown function for CallInst upgrade and isn't just a name change");
3482  CI->setCalledFunction(NewFn);
3483  };
3484  CallInst *NewCall = nullptr;
3485  switch (NewFn->getIntrinsicID()) {
3486  default: {
3487  DefaultCase();
3488  return;
3489  }
3490  case Intrinsic::experimental_vector_reduce_v2_fmul: {
3492  if (CI->isFast())
3493  Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0));
3494  else
3495  Args.push_back(CI->getOperand(0));
3496  Args.push_back(CI->getOperand(1));
3497  NewCall = Builder.CreateCall(NewFn, Args);
3498  cast<Instruction>(NewCall)->copyFastMathFlags(CI);
3499  break;
3500  }
3501  case Intrinsic::experimental_vector_reduce_v2_fadd: {
3503  if (CI->isFast())
3505  else
3506  Args.push_back(CI->getOperand(0));
3507  Args.push_back(CI->getOperand(1));
3508  NewCall = Builder.CreateCall(NewFn, Args);
3509  cast<Instruction>(NewCall)->copyFastMathFlags(CI);
3510  break;
3511  }
3512  case Intrinsic::arm_neon_vld1:
3513  case Intrinsic::arm_neon_vld2:
3514  case Intrinsic::arm_neon_vld3:
3515  case Intrinsic::arm_neon_vld4:
3516  case Intrinsic::arm_neon_vld2lane:
3517  case Intrinsic::arm_neon_vld3lane:
3518  case Intrinsic::arm_neon_vld4lane:
3519  case Intrinsic::arm_neon_vst1:
3520  case Intrinsic::arm_neon_vst2:
3521  case Intrinsic::arm_neon_vst3:
3522  case Intrinsic::arm_neon_vst4:
3523  case Intrinsic::arm_neon_vst2lane:
3524  case Intrinsic::arm_neon_vst3lane:
3525  case Intrinsic::arm_neon_vst4lane: {
3527  CI->arg_operands().end());
3528  NewCall = Builder.CreateCall(NewFn, Args);
3529  break;
3530  }
3531 
3532  case Intrinsic::bitreverse:
3533  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
3534  break;
3535 
3536  case Intrinsic::ctlz:
3537  case Intrinsic::cttz:
3538  assert(CI->getNumArgOperands() == 1 &&
3539  "Mismatch between function args and call args");
3540  NewCall =
3541  Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()});
3542  break;
3543 
3544  case Intrinsic::objectsize: {
3545  Value *NullIsUnknownSize = CI->getNumArgOperands() == 2
3546  ? Builder.getFalse()
3547  : CI->getArgOperand(2);
3548  Value *Dynamic =
3549  CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3);
3550  NewCall = Builder.CreateCall(
3551  NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic});
3552  break;
3553  }
3554 
3555  case Intrinsic::ctpop:
3556  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
3557  break;
3558 
3559  case Intrinsic::convert_from_fp16:
3560  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
3561  break;
3562 
3563  case Intrinsic::dbg_value:
3564  // Upgrade from the old version that had an extra offset argument.
3565  assert(CI->getNumArgOperands() == 4);
3566  // Drop nonzero offsets instead of attempting to upgrade them.
3567  if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1)))
3568  if (Offset->isZeroValue()) {
3569  NewCall = Builder.CreateCall(
3570  NewFn,
3571  {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)});
3572  break;
3573  }
3574  CI->eraseFromParent();
3575  return;
3576 
3577  case Intrinsic::x86_xop_vfrcz_ss:
3578  case Intrinsic::x86_xop_vfrcz_sd:
3579  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)});
3580  break;
3581 
3582  case Intrinsic::x86_xop_vpermil2pd:
3583  case Intrinsic::x86_xop_vpermil2ps:
3584  case Intrinsic::x86_xop_vpermil2pd_256:
3585  case Intrinsic::x86_xop_vpermil2ps_256: {
3587  CI->arg_operands().end());
3588  VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType());
3589  VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy);
3590  Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy);
3591  NewCall = Builder.CreateCall(NewFn, Args);
3592  break;
3593  }
3594 
3595  case Intrinsic::x86_sse41_ptestc:
3596  case Intrinsic::x86_sse41_ptestz:
3597  case Intrinsic::x86_sse41_ptestnzc: {
3598  // The arguments for these intrinsics used to be v4f32, and changed
3599  // to v2i64. This is purely a nop, since those are bitwise intrinsics.
3600  // So, the only thing required is a bitcast for both arguments.
3601  // First, check the arguments have the old type.
3602  Value *Arg0 = CI->getArgOperand(0);
3603  if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4))
3604  return;
3605 
3606  // Old intrinsic, add bitcasts
3607  Value *Arg1 = CI->getArgOperand(1);
3608 
3609  Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
3610 
3611  Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast");
3612  Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
3613 
3614  NewCall = Builder.CreateCall(NewFn, {BC0, BC1});
3615  break;
3616  }
3617 
3618  case Intrinsic::x86_rdtscp: {
3619  // This used to take 1 arguments. If we have no arguments, it is already
3620  // upgraded.
3621  if (CI->getNumOperands() == 0)
3622  return;
3623 
3624  NewCall = Builder.CreateCall(NewFn);
3625  // Extract the second result and store it.
3626  Value *Data = Builder.CreateExtractValue(NewCall, 1);
3627  // Cast the pointer to the right type.
3628  Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0),
3630  Builder.CreateAlignedStore(Data, Ptr, 1);
3631  // Replace the original call result with the first result of the new call.
3632  Value *TSC = Builder.CreateExtractValue(NewCall, 0);
3633 
3634  std::string Name = CI->getName();
3635  if (!Name.empty()) {
3636  CI->setName(Name + ".old");
3637  NewCall->setName(Name);
3638  }
3639  CI->replaceAllUsesWith(TSC);
3640  CI->eraseFromParent();
3641  return;
3642  }
3643 
3644  case Intrinsic::x86_sse41_insertps:
3645  case Intrinsic::x86_sse41_dppd:
3646  case Intrinsic::x86_sse41_dpps:
3647  case Intrinsic::x86_sse41_mpsadbw:
3648  case Intrinsic::x86_avx_dp_ps_256:
3649  case Intrinsic::x86_avx2_mpsadbw: {
3650  // Need to truncate the last argument from i32 to i8 -- this argument models
3651  // an inherently 8-bit immediate operand to these x86 instructions.
3653  CI->arg_operands().end());
3654 
3655  // Replace the last argument with a trunc.
3656  Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc");
3657  NewCall = Builder.CreateCall(NewFn, Args);
3658  break;
3659  }
3660 
3661  case Intrinsic::thread_pointer: {
3662  NewCall = Builder.CreateCall(NewFn, {});
3663  break;
3664  }
3665 
3666  case Intrinsic::invariant_start:
3667  case Intrinsic::invariant_end:
3668  case Intrinsic::masked_load:
3669  case Intrinsic::masked_store:
3670  case Intrinsic::masked_gather:
3671  case Intrinsic::masked_scatter: {
3673  CI->arg_operands().end());
3674  NewCall = Builder.CreateCall(NewFn, Args);
3675  break;
3676  }
3677 
3678  case Intrinsic::memcpy:
3679  case Intrinsic::memmove:
3680  case Intrinsic::memset: {
3681  // We have to make sure that the call signature is what we're expecting.
3682  // We only want to change the old signatures by removing the alignment arg:
3683  // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1)
3684  // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1)
3685  // @llvm.memset...(i8*, i8, i[32|64], i32, i1)
3686  // -> @llvm.memset...(i8*, i8, i[32|64], i1)
3687  // Note: i8*'s in the above can be any pointer type
3688  if (CI->getNumArgOperands() != 5) {
3689  DefaultCase();
3690  return;
3691  }
3692  // Remove alignment argument (3), and add alignment attributes to the
3693  // dest/src pointers.
3694  Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1),
3695  CI->getArgOperand(2), CI->getArgOperand(4)};
3696  NewCall = Builder.CreateCall(NewFn, Args);
3697  auto *MemCI = cast<MemIntrinsic>(NewCall);
3698  // All mem intrinsics support dest alignment.
3699  const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3));
3700  MemCI->setDestAlignment(Align->getZExtValue());
3701  // Memcpy/Memmove also support source alignment.
3702  if (auto *MTI = dyn_cast<MemTransferInst>(MemCI))
3703  MTI->setSourceAlignment(Align->getZExtValue());
3704  break;
3705  }
3706  }
3707  assert(NewCall && "Should have either set this variable or returned through "
3708  "the default case");
3709  std::string Name = CI->getName();
3710  if (!Name.empty()) {
3711  CI->setName(Name + ".old");
3712  NewCall->setName(Name);
3713  }
3714  CI->replaceAllUsesWith(NewCall);
3715  CI->eraseFromParent();
3716 }
3717 
3719  assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
3720 
3721  // Check if this function should be upgraded and get the replacement function
3722  // if there is one.
3723  Function *NewFn;
3724  if (UpgradeIntrinsicFunction(F, NewFn)) {
3725  // Replace all users of the old function with the new function or new
3726  // instructions. This is not a range loop because the call is deleted.
3727  for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; )
3728  if (CallInst *CI = dyn_cast<CallInst>(*UI++))
3729  UpgradeIntrinsicCall(CI, NewFn);
3730 
3731  // Remove old function, no longer used, from the module.
3732  F->eraseFromParent();
3733  }
3734 }
3735 
3737  // Check if the tag uses struct-path aware TBAA format.
3738  if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3)
3739  return &MD;
3740 
3741  auto &Context = MD.getContext();
3742  if (MD.getNumOperands() == 3) {
3743  Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)};
3744  MDNode *ScalarType = MDNode::get(Context, Elts);
3745  // Create a MDNode <ScalarType, ScalarType, offset 0, const>
3746  Metadata *Elts2[] = {ScalarType, ScalarType,
3749  MD.getOperand(2)};
3750  return MDNode::get(Context, Elts2);
3751  }
3752  // Create a MDNode <MD, MD, offset 0>
3755  return MDNode::get(Context, Elts);
3756 }
3757 
3758 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy,
3759  Instruction *&Temp) {
3760  if (Opc != Instruction::BitCast)
3761  return nullptr;
3762 
3763  Temp = nullptr;
3764  Type *SrcTy = V->getType();
3765  if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
3766  SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
3767  LLVMContext &Context = V->getContext();
3768 
3769  // We have no information about target data layout, so we assume that
3770  // the maximum pointer size is 64bit.
3771  Type *MidTy = Type::getInt64Ty(Context);
3772  Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy);
3773 
3774  return CastInst::Create(Instruction::IntToPtr, Temp, DestTy);
3775  }
3776 
3777  return nullptr;
3778 }
3779 
3780 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) {
3781  if (Opc != Instruction::BitCast)
3782  return nullptr;
3783 
3784  Type *SrcTy = C->getType();
3785  if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
3786  SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
3787  LLVMContext &Context = C->getContext();
3788 
3789  // We have no information about target data layout, so we assume that
3790  // the maximum pointer size is 64bit.
3791  Type *MidTy = Type::getInt64Ty(Context);
3792 
3794  DestTy);
3795  }
3796 
3797  return nullptr;
3798 }
3799 
3800 /// Check the debug info version number, if it is out-dated, drop the debug
3801 /// info. Return true if module is modified.
3804  if (Version == DEBUG_METADATA_VERSION) {
3805  bool BrokenDebugInfo = false;
3806  if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo))
3807  report_fatal_error("Broken module found, compilation aborted!");
3808  if (!BrokenDebugInfo)
3809  // Everything is ok.
3810  return false;
3811  else {
3812  // Diagnose malformed debug info.
3814  M.getContext().diagnose(Diag);
3815  }
3816  }
3817  bool Modified = StripDebugInfo(M);
3818  if (Modified && Version != DEBUG_METADATA_VERSION) {
3819  // Diagnose a version mismatch.
3820  DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version);
3821  M.getContext().diagnose(DiagVersion);
3822  }
3823  return Modified;
3824 }
3825 
3827  bool Changed = false;
3828  const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker";
3829  NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey);
3830  if (ModRetainReleaseMarker) {
3831  MDNode *Op = ModRetainReleaseMarker->getOperand(0);
3832  if (Op) {
3833  MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0));
3834  if (ID) {
3835  SmallVector<StringRef, 4> ValueComp;
3836  ID->getString().split(ValueComp, "#");
3837  if (ValueComp.size() == 2) {
3838  std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str();
3839  ID = MDString::get(M.getContext(), NewValue);
3840  }
3841  M.addModuleFlag(Module::Error, MarkerKey, ID);
3842  M.eraseNamedMetadata(ModRetainReleaseMarker);
3843  Changed = true;
3844  }
3845  }
3846  }
3847  return Changed;
3848 }
3849 
3851  NamedMDNode *ModFlags = M.getModuleFlagsMetadata();
3852  if (!ModFlags)
3853  return false;
3854 
3855  bool HasObjCFlag = false, HasClassProperties = false, Changed = false;
3856  for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) {
3857  MDNode *Op = ModFlags->getOperand(I);
3858  if (Op->getNumOperands() != 3)
3859  continue;
3860  MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1));
3861  if (!ID)
3862  continue;
3863  if (ID->getString() == "Objective-C Image Info Version")
3864  HasObjCFlag = true;
3865  if (ID->getString() == "Objective-C Class Properties")
3866  HasClassProperties = true;
3867  // Upgrade PIC/PIE Module Flags. The module flag behavior for these two
3868  // field was Error and now they are Max.
3869  if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") {
3870  if (auto *Behavior =
3871  mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) {
3872  if (Behavior->getLimitedValue() == Module::Error) {
3874  Metadata *Ops[3] = {
3876  MDString::get(M.getContext(), ID->getString()),
3877  Op->getOperand(2)};
3878  ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
3879  Changed = true;
3880  }
3881  }
3882  }
3883  // Upgrade Objective-C Image Info Section. Removed the whitespce in the
3884  // section name so that llvm-lto will not complain about mismatching
3885  // module flags that is functionally the same.
3886  if (ID->getString() == "Objective-C Image Info Section") {
3887  if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) {
3888  SmallVector<StringRef, 4> ValueComp;
3889  Value->getString().split(ValueComp, " ");
3890  if (ValueComp.size() != 1) {
3891  std::string NewValue;
3892  for (auto &S : ValueComp)
3893  NewValue += S.str();
3894  Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1),
3895  MDString::get(M.getContext(), NewValue)};
3896  ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
3897  Changed = true;
3898  }
3899  }
3900  }
3901  }
3902 
3903  // "Objective-C Class Properties" is recently added for Objective-C. We
3904  // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module
3905  // flag of value 0, so we can correclty downgrade this flag when trying to
3906  // link an ObjC bitcode without this module flag with an ObjC bitcode with
3907  // this module flag.
3908  if (HasObjCFlag && !HasClassProperties) {
3909  M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties",
3910  (uint32_t)0);
3911  Changed = true;
3912  }
3913 
3914  return Changed;
3915 }
3916 
3918  auto TrimSpaces = [](StringRef Section) -> std::string {
3919  SmallVector<StringRef, 5> Components;
3920  Section.split(Components, ',');
3921 
3922  SmallString<32> Buffer;
3923  raw_svector_ostream OS(Buffer);
3924 
3925  for (auto Component : Components)
3926  OS << ',' << Component.trim();
3927 
3928  return OS.str().substr(1);
3929  };
3930 
3931  for (auto &GV : M.globals()) {
3932  if (!GV.hasSection())
3933  continue;
3934 
3935  StringRef Section = GV.getSection();
3936 
3937  if (!Section.startswith("__DATA, __objc_catlist"))
3938  continue;
3939 
3940  // __DATA, __objc_catlist, regular, no_dead_strip
3941  // __DATA,__objc_catlist,regular,no_dead_strip
3942  GV.setSection(TrimSpaces(Section));
3943  }
3944 }
3945 
3946 static bool isOldLoopArgument(Metadata *MD) {
3947  auto *T = dyn_cast_or_null<MDTuple>(MD);
3948  if (!T)
3949  return false;
3950  if (T->getNumOperands() < 1)
3951  return false;
3952  auto *S = dyn_cast_or_null<MDString>(T->getOperand(0));
3953  if (!S)
3954  return false;
3955  return S->getString().startswith("llvm.vectorizer.");
3956 }
3957 
3959  StringRef OldPrefix = "llvm.vectorizer.";
3960  assert(OldTag.startswith(OldPrefix) && "Expected old prefix");
3961 
3962  if (OldTag == "llvm.vectorizer.unroll")
3963  return MDString::get(C, "llvm.loop.interleave.count");
3964 
3965  return MDString::get(
3966  C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size()))
3967  .str());
3968 }
3969 
3971  auto *T = dyn_cast_or_null<MDTuple>(MD);
3972  if (!T)
3973  return MD;
3974  if (T->getNumOperands() < 1)
3975  return MD;
3976  auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0));
3977  if (!OldTag)
3978  return MD;
3979  if (!OldTag->getString().startswith("llvm.vectorizer."))
3980  return MD;
3981 
3982  // This has an old tag. Upgrade it.
3984  Ops.reserve(T->getNumOperands());
3985  Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString()));
3986  for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I)
3987  Ops.push_back(T->getOperand(I));
3988 
3989  return MDTuple::get(T->getContext(), Ops);
3990 }
3991 
3993  auto *T = dyn_cast<MDTuple>(&N);
3994  if (!T)
3995  return &N;
3996 
3997  if (none_of(T->operands(), isOldLoopArgument))
3998  return &N;
3999 
4001  Ops.reserve(T->getNumOperands());
4002  for (Metadata *MD : T->operands())
4003  Ops.push_back(upgradeLoopArgument(MD));
4004 
4005  return MDTuple::get(T->getContext(), Ops);
4006 }
IntegerType * getInt16Ty()
Fetch the type representing a 16-bit integer.
Definition: IRBuilder.h:341
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
Type * getVectorElementType() const
Definition: Type.h:370
const NoneType None
Definition: None.h:23
static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn)
uint64_t CallInst * C
SymbolTableList< Instruction >::iterator eraseFromParent()
This method unlinks &#39;this&#39; from the containing basic block and deletes it.
Definition: Instruction.cpp:67
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
Value * CreateICmp(CmpInst::Predicate P, Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:2026
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1132
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
static IntegerType * getInt1Ty(LLVMContext &C)
Definition: Type.cpp:172
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
LLVMContext & Context
Value * CreateIsNotNull(Value *Arg, const Twine &Name="")
Return an i1 value testing if Arg is not null.
Definition: IRBuilder.h:2196
void UpgradeSectionAttributes(Module &M)
Takes the max of the two values, which are required to be integers.
Definition: Module.h:145
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1080
const Constant * getInitializer() const
getInitializer - Return the initializer for this global variable.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
This class represents lattice values for constants.
Definition: AllocatorList.h:23
Type * getParamType(unsigned i) const
Parameter type accessors.
Definition: DerivedTypes.h:134
Type * getElementType(unsigned N) const
Definition: DerivedTypes.h:345
static Value * UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, bool ZeroMask, bool IndexForm)
LoadInst * CreateLoad(Type *Ty, Value *Ptr, const char *Name)
Provided to resolve &#39;CreateLoad(Ty, Ptr, "...")&#39; correctly, instead of converting the string to &#39;bool...
Definition: IRBuilder.h:1434
Value * CreateXor(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1235
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:65
LoadInst * CreateAlignedLoad(Type *Ty, Value *Ptr, unsigned Align, const char *Name)
Provided to resolve &#39;CreateAlignedLoad(Ptr, Align, "...")&#39; correctly, instead of converting the strin...
Definition: IRBuilder.h:1470
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:453
bool UpgradeRetainReleaseMarker(Module &M)
This checks for objc retain release marker which should be upgraded.
LLVM_NODISCARD bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:256
unsigned getNumElements() const
Random access to the elements.
Definition: DerivedTypes.h:344
static Value * upgradeAbs(IRBuilder<> &Builder, CallInst &CI)
static ConstantAggregateZero * get(Type *Ty)
Definition: Constants.cpp:1341
static Value * ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, Value *Mask)
static Value * upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, bool IsShiftRight, bool ZeroMask)
This class represents a function call, abstracting a target machine&#39;s calling convention.
unsigned less or equal
Definition: InstrTypes.h:758
unsigned less than
Definition: InstrTypes.h:757
static Constant * getIntToPtr(Constant *C, Type *Ty, bool OnlyIfReduced=false)
Definition: Constants.cpp:1769
void UpgradeInlineAsmString(std::string *AsmStr)
Upgrade comment in call to inline asm that represents an objc retain release marker.
unsigned getDebugMetadataVersionFromModule(const Module &M)
Return Debug Info Metadata Version by checking module flags.
Definition: DebugInfo.cpp:682
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:720
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:509
Value * CreateSExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1740
Metadata node.
Definition: Metadata.h:863
F(f)
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1068
unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
Definition: DerivedTypes.h:534
An instruction for reading from memory.
Definition: Instructions.h:167
static IntegerType * getInt64Ty(LLVMContext &C)
Definition: Type.cpp:176
Value * CreateICmpULE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1936
void reserve(size_type N)
Definition: SmallVector.h:369
void UpgradeIntrinsicCall(CallInst *CI, Function *NewFn)
This is the complement to the above, replacing a specific call to an intrinsic function with a call t...
static Value * EmitX86Select(IRBuilder<> &Builder, Value *Mask, Value *Op0, Value *Op1)
void setOperand(unsigned I, MDNode *New)
Definition: Metadata.cpp:1088
static Value * upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, ICmpInst::Predicate Pred)
uint64_t High
Diagnostic information for stripping invalid debug metadata.
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
static Constant * get(ArrayType *T, ArrayRef< Constant *> V)
Definition: Constants.cpp:992
Tuple of metadata.
Definition: Metadata.h:1105
static Constant * getNullValue(Type *Ty)
Constructor to create a &#39;0&#39; constant of arbitrary type.
Definition: Constants.cpp:274
Value * CreateNot(Value *V, const Twine &Name="")
Definition: IRBuilder.h:1369
StoreInst * CreateAlignedStore(Value *Val, Value *Ptr, unsigned Align, bool isVolatile=false)
Definition: IRBuilder.h:1507
IntegerType * getInt32Ty()
Fetch the type representing a 32-bit integer.
Definition: IRBuilder.h:346
Value * getArgOperand(unsigned i) const
Definition: InstrTypes.h:1241
unsigned getBitWidth() const
Return the number of bits in the Vector type.
Definition: DerivedTypes.h:483
A tuple of MDNodes.
Definition: Metadata.h:1325
static Value * UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, unsigned Shift)
Value * CreateFPExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1795
MDNode * upgradeInstructionLoopAttachment(MDNode &N)
Upgrade the loop attachment metadata node.
StringRef getName(ID id)
Return the LLVM name for an intrinsic, such as "llvm.ppc.altivec.lvx".
Definition: Function.cpp:638
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
void UpgradeCallsToIntrinsic(Function *F)
This is an auto-upgrade hook for any old intrinsic function syntaxes which need to have both the func...
static Type * getFloatTy(LLVMContext &C)
Definition: Type.cpp:163
void eraseNamedMetadata(NamedMDNode *NMD)
Remove the given NamedMDNode from this module and delete it.
Definition: Module.cpp:272
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:450
bool isFloatingPointTy() const
Return true if this is one of the six floating-point types.
Definition: Type.h:161
LLVM_NODISCARD StringRef drop_front(size_t N=1) const
Return a StringRef equal to &#39;this&#39; but with the first N elements dropped.
Definition: StringRef.h:620
Class to represent struct types.
Definition: DerivedTypes.h:232
LLVMContext & getContext() const
Get the global data context.
Definition: Module.h:244
static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name)
Definition: AutoUpgrade.cpp:67
PointerType * getPointerTo(unsigned AddrSpace=0) const
Return a pointer to the current type.
Definition: Type.cpp:651
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:196
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:742
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
bool none_of(R &&Range, UnaryPredicate P)
Provide wrappers to std::none_of which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1206
unsigned Intr
unsigned getNumOperands() const
Definition: Metadata.cpp:1076
Value * CreateAdd(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1049
static Value * UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI)
void setName(const Twine &Name)
Change the name of the value.
Definition: Value.cpp:285
LLVM_NODISCARD StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:578
uint64_t getNumElements() const
Definition: DerivedTypes.h:390
static Metadata * upgradeLoopArgument(Metadata *MD)
static StructType * get(LLVMContext &Context, ArrayRef< Type *> Elements, bool isPacked=false)
This static method is the primary way to create a literal StructType.
Definition: Type.cpp:341
AttributeList getAttributes(LLVMContext &C, ID id)
Return the attributes for an intrinsic.
llvm::Optional< Function * > remangleIntrinsicFunction(Function *F)
Definition: Function.cpp:1309
Class to represent function types.
Definition: DerivedTypes.h:102
Value * CreateBitCast(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1809
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:244
void setCalledFunction(Function *Fn)
Sets the function called, including updating the function type.
Definition: InstrTypes.h:1323
LLVMContext & getContext() const
Definition: Metadata.h:923
Class to represent array types.
Definition: DerivedTypes.h:400
bool StripDebugInfo(Module &M)
Strip debug info in the module if it exists.
Definition: DebugInfo.cpp:350
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
Definition: Module.cpp:250
static Value * EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, Value *Op0, Value *Op1)
Value * CreateVectorSplat(unsigned NumElts, Value *V, const Twine &Name="")
Return a vector value that contains.
Definition: IRBuilder.h:2276
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
LLVM_NODISCARD size_t size() const
size - Get the string size.
Definition: StringRef.h:130
bool UpgradeIntrinsicFunction(Function *F, Function *&NewFn)
This is a more granular function that simply checks an intrinsic function for upgrading, and returns true if it requires upgrading.
iterator_range< User::op_iterator > arg_operands()
Definition: InstrTypes.h:1233
Value * CreateSub(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1066
Value * CreateSIToFP(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1786
An instruction for storing to memory.
Definition: Instructions.h:320
LinkageTypes getLinkage() const
Definition: GlobalValue.h:460
void replaceAllUsesWith(Value *V)
Change all uses of this to point to a new Value.
Definition: Value.cpp:429
Value * CreateZExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1736
static ConstantAsMetadata * get(Constant *C)
Definition: Metadata.h:409
Function * getDeclaration(Module *M, ID id, ArrayRef< Type *> Tys=None)
Create or insert an LLVM Function declaration for an intrinsic, and return it.
Definition: Function.cpp:1044
static Value * UpgradeMaskedLoad(IRBuilder<> &Builder, Value *Ptr, Value *Passthru, Value *Mask, bool Aligned)
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block...
Definition: IRBuilder.h:126
Value * getOperand(unsigned i) const
Definition: User.h:169
Class to represent pointers.
Definition: DerivedTypes.h:498
static Value * UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, Value *Op, unsigned Shift)
Value * CreateOr(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1217
bool UpgradeModuleFlags(Module &M)
This checks for module flags which should be upgraded.
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return &#39;this&#39;.
Definition: Type.h:303
StringRef getString() const
Definition: Metadata.cpp:463
bool isFloatTy() const
Return true if this is &#39;float&#39;, a 32-bit IEEE fp type.
Definition: Type.h:146
static Value * UpgradeMaskedStore(IRBuilder<> &Builder, Value *Ptr, Value *Data, Value *Mask, bool Aligned)
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1165
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:168
void getModuleFlagsMetadata(SmallVectorImpl< ModuleFlagEntry > &Flags) const
Returns the module flags in the provided vector.
Definition: Module.cpp:290
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
Definition: StringSwitch.h:88
static Function * Create(FunctionType *Ty, LinkageTypes Linkage, unsigned AddrSpace, const Twine &N="", Module *M=nullptr)
Definition: Function.h:135
Emits an error if two values disagree, otherwise the resulting value is that of the operands...
Definition: Module.h:116
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Value * CreateFMul(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1282
Value * CreateAShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Definition: IRBuilder.h:1179
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:428
bool hasName() const
Definition: Value.h:250
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:64
ConstantInt * getInt1(bool V)
Get a constant value representing either true or false.
Definition: IRBuilder.h:281
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Value * CreateSelect(Value *C, Value *True, Value *False, const Twine &Name="", Instruction *MDFrom=nullptr)
Definition: IRBuilder.h:2099
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:138
bool UpgradeDebugInfo(Module &M)
Check the debug info version number, if it is out-dated, drop the debug info.
LLVM_NODISCARD size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:285
ArrayRef< Type * > params() const
Definition: DerivedTypes.h:129
GlobalVariable * UpgradeGlobalVariable(GlobalVariable *GV)
This checks for global variables which should be upgraded.
static VectorType * getInteger(VectorType *VTy)
This static method gets a VectorType with the same number of elements as the input type...
Definition: DerivedTypes.h:437
bool isFast() const
Determine whether all fast-math-flags are set.
void addModuleFlag(ModFlagBehavior Behavior, StringRef Key, Metadata *Val)
Add a module-level flag to the module-level flags metadata.
Definition: Module.cpp:337
Value * CreateNeg(Value *V, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1343
static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, Function *&NewFn)
Definition: AutoUpgrade.cpp:53
unsigned getAddressSpace() const
Definition: Globals.cpp:111
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:732
Value * CreateICmpSGE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1944
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
static FunctionType * get(Type *Result, ArrayRef< Type *> Params, bool isVarArg)
This static method is the primary way of constructing a FunctionType.
Definition: Type.cpp:296
static Constant * get(StructType *T, ArrayRef< Constant *> V)
Definition: Constants.cpp:1053
size_t arg_size() const
Definition: Function.h:714
arg_iterator arg_begin()
Definition: Function.h:687
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1916
self_iterator getIterator()
Definition: ilist_node.h:81
IntegerType * getIntNTy(unsigned N)
Fetch the type representing an N-bit integer.
Definition: IRBuilder.h:359
Value * CreateExtractElement(Value *Vec, Value *Idx, const Twine &Name="")
Definition: IRBuilder.h:2121
static Value * UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, bool IsSigned, bool IsAddition)
static Constant * getAllOnesValue(Type *Ty)
Definition: Constants.cpp:328
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:205
static UndefValue * get(Type *T)
Static factory methods - Return an &#39;undef&#39; object of the specified type.
Definition: Constants.cpp:1424
static Value * upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, bool IsSigned)
Value * CreateExtractValue(Value *Agg, ArrayRef< unsigned > Idxs, const Twine &Name="")
Definition: IRBuilder.h:2163
size_t size() const
Definition: SmallVector.h:52
PointerType * getInt8PtrTy(unsigned AddrSpace=0)
Fetch the type representing a pointer to an 8-bit integer value.
Definition: IRBuilder.h:384
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void setMetadata(unsigned KindID, MDNode *Node)
Set the metadata of the specified kind to the specified node.
Definition: Metadata.cpp:1222
Value * CreateMul(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1083
Value * CreateTrunc(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1732
static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, Function *&NewFn)
signed greater than
Definition: InstrTypes.h:759
Value * CreateUIToFP(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1782
static Value * getX86MaskVec(IRBuilder<> &Builder, Value *Mask, unsigned NumElts)
static const X86InstrFMA3Group Groups[]
bool isPtrOrPtrVectorTy() const
Return true if this is a pointer type or a vector of pointer types.
Definition: Type.h:226
static Value * UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, Value *Op1, Value *Shift, Value *Passthru, Value *Mask, bool IsVALIGN)
Instruction * UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, Instruction *&Temp)
This is an auto-upgrade for bitcast between pointers with different address spaces: the instruction i...
static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, CallInst &CI, Value *&Rep)
unsigned getNumOperands() const
Definition: User.h:191
static PointerType * getUnqual(Type *ElementType)
This constructs a pointer to an object of the specified type in the generic address space (address sp...
Definition: DerivedTypes.h:513
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type...
Definition: Type.cpp:129
Value * CreateIntCast(Value *V, Type *DestTy, bool isSigned, const Twine &Name="")
Definition: IRBuilder.h:1878
Value * CreateICmpUGE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1928
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
static MDString * upgradeLoopTag(LLVMContext &C, StringRef OldTag)
Module.h This file contains the declarations for the Module class.
Value * CreateInsertElement(Value *Vec, Value *NewElt, Value *Idx, const Twine &Name="")
Definition: IRBuilder.h:2134
LLVM_NODISCARD std::pair< StringRef, StringRef > split(char Separator) const
Split into two substrings around the first occurrence of a separator character.
Definition: StringRef.h:696
signed less than
Definition: InstrTypes.h:761
Type * getReturnType() const
Definition: DerivedTypes.h:123
CallInst * CreateMaskedStore(Value *Val, Value *Ptr, unsigned Align, Value *Mask)
Create a call to Masked Store intrinsic.
Definition: IRBuilder.cpp:489
Value * CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name="")
Definition: IRBuilder.h:2148
StringRef str()
Return a StringRef for the vector contents.
Definition: raw_ostream.h:534
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Definition: Constants.cpp:631
static Constant * get(Type *Ty, double V)
This returns a ConstantFP, or a vector containing a splat of a ConstantFP, for the specified value in...
Definition: Constants.cpp:694
CallInst * CreateMaskedLoad(Value *Ptr, unsigned Align, Value *Mask, Value *PassThru=nullptr, const Twine &Name="")
Create a call to Masked Load intrinsic.
Definition: IRBuilder.cpp:468
static Value * UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, Intrinsic::ID IID)
void setAttributes(AttributeList Attrs)
Set the attribute list for this Function.
Definition: Function.h:226
Intrinsic::ID getIntrinsicID() const LLVM_READONLY
getIntrinsicID - This method returns the ID number of the specified function, or Intrinsic::not_intri...
Definition: Function.h:193
Uses the specified value, regardless of the behavior or value of the other module.
Definition: Module.h:134
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:940
unsigned getVectorNumElements() const
Definition: DerivedTypes.h:493
FunctionType * getFunctionType() const
Returns the FunctionType for me.
Definition: Function.h:163
MDNode * UpgradeTBAANode(MDNode &TBAANode)
If the given TBAA tag uses the scalar TBAA format, create a new node corresponding to the upgrade to ...
signed less or equal
Definition: InstrTypes.h:762
Class to represent vector types.
Definition: DerivedTypes.h:424
const Module * getModule() const
Return the module owning the function this instruction belongs to or nullptr it the function does not...
Definition: Instruction.cpp:55
Class for arbitrary precision integers.
Definition: APInt.h:69
IntegerType * getInt8Ty()
Fetch the type representing an 8-bit integer.
Definition: IRBuilder.h:336
Value * CreateShl(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1138
Value * CreatePointerCast(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1855
bool verifyModule(const Module &M, raw_ostream *OS=nullptr, bool *BrokenDebugInfo=nullptr)
Check a module for errors.
Definition: Verifier.cpp:4967
ConstantInt * getFalse()
Get the constant value for i1 false.
Definition: IRBuilder.h:291
IntegerType * getInt1Ty()
Fetch the type representing a single bit.
Definition: IRBuilder.h:331
static CastInst * Create(Instruction::CastOps, Value *S, Type *Ty, const Twine &Name="", Instruction *InsertBefore=nullptr)
Provides a way to construct any of the CastInst subclasses using an opcode instead of the subclass&#39;s ...
unsigned getNumArgOperands() const
Definition: InstrTypes.h:1239
static bool isOldLoopArgument(Metadata *MD)
static const size_t npos
Definition: StringRef.h:50
static IntegerType * getInt32Ty(LLVMContext &C)
Definition: Type.cpp:175
unsigned getIntegerBitWidth() const
Definition: DerivedTypes.h:96
unsigned greater or equal
Definition: InstrTypes.h:756
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:214
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation.
Definition: InstrTypes.h:1287
static Constant * getPtrToInt(Constant *C, Type *Ty, bool OnlyIfReduced=false)
Definition: Constants.cpp:1756
#define I(x, y, z)
Definition: MD5.cpp:58
Value * CreateFSub(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1265
#define N
Diagnostic information for debug metadata version reporting.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static Value * upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI)
static void rename(GlobalValue *GV)
Definition: AutoUpgrade.cpp:33
static ArrayType * get(Type *ElementType, uint64_t NumElements)
This static method is the primary way to construct an ArrayType.
Definition: Type.cpp:580
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:332
static Value * upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, unsigned CC, bool Signed)
Type * getValueType() const
Definition: GlobalValue.h:279
uint32_t Size
Definition: Profile.cpp:46
CallInst * CreateCall(FunctionType *FTy, Value *Callee, ArrayRef< Value *> Args=None, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:2051
void eraseFromParent()
eraseFromParent - This method unlinks &#39;this&#39; from the containing module and deletes it...
Definition: Function.cpp:226
Type * getFloatTy()
Fetch the type representing a 32-bit floating point value.
Definition: IRBuilder.h:369
void diagnose(const DiagnosticInfo &DI)
Report a message to the currently installed diagnostic handler.
Value * CreateFAdd(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1248
Value * CreateAnd(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1199
Value * CreateFDiv(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1299
static bool UpgradePTESTIntrinsic(Function *F, Intrinsic::ID IID, Function *&NewFn)
Definition: AutoUpgrade.cpp:37
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition: Type.h:184
unsigned getMDKindID(StringRef Name) const
Return a unique non-zero ID for the specified metadata kind.
Definition: Module.cpp:119
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
user_iterator user_begin()
Definition: Value.h:375
unsigned getPrimitiveSizeInBits() const LLVM_READONLY
Return the basic size of this type if it is a primitive type.
Definition: Type.cpp:114
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
LLVM Value Representation.
Definition: Value.h:72
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:326
bool hasInitializer() const
Definitions have initializers, declarations don&#39;t.
static VectorType * get(Type *ElementType, unsigned NumElements)
This static method is the primary way to construct an VectorType.
Definition: Type.cpp:605
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
bool match(StringRef String, SmallVectorImpl< StringRef > *Matches=nullptr)
matches - Match the regex against a given String.
Definition: Regex.cpp:72
Type * getElementType() const
Definition: DerivedTypes.h:391
ConstantInt * getInt8(uint8_t C)
Get a constant 8-bit value.
Definition: IRBuilder.h:296
iterator_range< global_iterator > globals()
Definition: Module.h:587
unsigned greater than
Definition: InstrTypes.h:755
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
A single uniqued string.
Definition: Metadata.h:603
static Value * upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned)
Value * UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy)
This is an auto-upgrade for bitcast constant expression between pointers with different address space...
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1074
Root of the metadata hierarchy.
Definition: Metadata.h:57
Value * CreateICmpSLE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1952
const uint64_t Version
Definition: InstrProf.h:984
static IntegerType * getInt8Ty(LLVMContext &C)
Definition: Type.cpp:173
static Value * upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, bool IsRotateRight)
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Value * CreateFNeg(Value *V, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:1361
signed greater or equal
Definition: InstrTypes.h:760
IntegerType * Int32Ty
const BasicBlock * getParent() const
Definition: Instruction.h:66
user_iterator user_end()
Definition: Value.h:383