LLVM  6.0.0svn
AutoUpgrade.cpp
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1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the auto-upgrade helper functions.
11 // This is where deprecated IR intrinsics and other IR features are updated to
12 // current specifications.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "llvm/IR/AutoUpgrade.h"
17 #include "llvm/ADT/StringSwitch.h"
18 #include "llvm/IR/CFG.h"
19 #include "llvm/IR/CallSite.h"
20 #include "llvm/IR/Constants.h"
21 #include "llvm/IR/DIBuilder.h"
22 #include "llvm/IR/DebugInfo.h"
23 #include "llvm/IR/DiagnosticInfo.h"
24 #include "llvm/IR/Function.h"
25 #include "llvm/IR/IRBuilder.h"
26 #include "llvm/IR/Instruction.h"
27 #include "llvm/IR/IntrinsicInst.h"
28 #include "llvm/IR/LLVMContext.h"
29 #include "llvm/IR/Module.h"
31 #include "llvm/Support/Regex.h"
32 #include <cstring>
33 using namespace llvm;
34 
35 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); }
36 
37 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have
38 // changed their type from v4f32 to v2i64.
40  Function *&NewFn) {
41  // Check whether this is an old version of the function, which received
42  // v4f32 arguments.
43  Type *Arg0Type = F->getFunctionType()->getParamType(0);
44  if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4))
45  return false;
46 
47  // Yes, it's old, replace it with new version.
48  rename(F);
49  NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
50  return true;
51 }
52 
53 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask
54 // arguments have changed their type from i32 to i8.
56  Function *&NewFn) {
57  // Check that the last argument is an i32.
58  Type *LastArgType = F->getFunctionType()->getParamType(
59  F->getFunctionType()->getNumParams() - 1);
60  if (!LastArgType->isIntegerTy(32))
61  return false;
62 
63  // Move this function aside and map down.
64  rename(F);
65  NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
66  return true;
67 }
68 
70  // All of the intrinsics matches below should be marked with which llvm
71  // version started autoupgrading them. At some point in the future we would
72  // like to use this information to remove upgrade code for some older
73  // intrinsics. It is currently undecided how we will determine that future
74  // point.
75  if (Name=="ssse3.pabs.b.128" || // Added in 6.0
76  Name=="ssse3.pabs.w.128" || // Added in 6.0
77  Name=="ssse3.pabs.d.128" || // Added in 6.0
78  Name.startswith("avx2.pabs.") || // Added in 6.0
79  Name.startswith("avx512.mask.pabs.") || // Added in 6.0
80  Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0
81  Name.startswith("sse2.pcmpeq.") || // Added in 3.1
82  Name.startswith("sse2.pcmpgt.") || // Added in 3.1
83  Name.startswith("avx2.pcmpeq.") || // Added in 3.1
84  Name.startswith("avx2.pcmpgt.") || // Added in 3.1
85  Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9
86  Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9
87  Name.startswith("avx.vperm2f128.") || // Added in 6.0
88  Name == "avx2.vperm2i128" || // Added in 6.0
89  Name == "sse.add.ss" || // Added in 4.0
90  Name == "sse2.add.sd" || // Added in 4.0
91  Name == "sse.sub.ss" || // Added in 4.0
92  Name == "sse2.sub.sd" || // Added in 4.0
93  Name == "sse.mul.ss" || // Added in 4.0
94  Name == "sse2.mul.sd" || // Added in 4.0
95  Name == "sse.div.ss" || // Added in 4.0
96  Name == "sse2.div.sd" || // Added in 4.0
97  Name == "sse41.pmaxsb" || // Added in 3.9
98  Name == "sse2.pmaxs.w" || // Added in 3.9
99  Name == "sse41.pmaxsd" || // Added in 3.9
100  Name == "sse2.pmaxu.b" || // Added in 3.9
101  Name == "sse41.pmaxuw" || // Added in 3.9
102  Name == "sse41.pmaxud" || // Added in 3.9
103  Name == "sse41.pminsb" || // Added in 3.9
104  Name == "sse2.pmins.w" || // Added in 3.9
105  Name == "sse41.pminsd" || // Added in 3.9
106  Name == "sse2.pminu.b" || // Added in 3.9
107  Name == "sse41.pminuw" || // Added in 3.9
108  Name == "sse41.pminud" || // Added in 3.9
109  Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0
110  Name.startswith("avx2.pmax") || // Added in 3.9
111  Name.startswith("avx2.pmin") || // Added in 3.9
112  Name.startswith("avx512.mask.pmax") || // Added in 4.0
113  Name.startswith("avx512.mask.pmin") || // Added in 4.0
114  Name.startswith("avx2.vbroadcast") || // Added in 3.8
115  Name.startswith("avx2.pbroadcast") || // Added in 3.8
116  Name.startswith("avx.vpermil.") || // Added in 3.1
117  Name.startswith("sse2.pshuf") || // Added in 3.9
118  Name.startswith("avx512.pbroadcast") || // Added in 3.9
119  Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9
120  Name.startswith("avx512.mask.movddup") || // Added in 3.9
121  Name.startswith("avx512.mask.movshdup") || // Added in 3.9
122  Name.startswith("avx512.mask.movsldup") || // Added in 3.9
123  Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9
124  Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9
125  Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9
126  Name.startswith("avx512.mask.shuf.p") || // Added in 4.0
127  Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9
128  Name.startswith("avx512.mask.perm.df.") || // Added in 3.9
129  Name.startswith("avx512.mask.perm.di.") || // Added in 3.9
130  Name.startswith("avx512.mask.punpckl") || // Added in 3.9
131  Name.startswith("avx512.mask.punpckh") || // Added in 3.9
132  Name.startswith("avx512.mask.unpckl.") || // Added in 3.9
133  Name.startswith("avx512.mask.unpckh.") || // Added in 3.9
134  Name.startswith("avx512.mask.pand.") || // Added in 3.9
135  Name.startswith("avx512.mask.pandn.") || // Added in 3.9
136  Name.startswith("avx512.mask.por.") || // Added in 3.9
137  Name.startswith("avx512.mask.pxor.") || // Added in 3.9
138  Name.startswith("avx512.mask.and.") || // Added in 3.9
139  Name.startswith("avx512.mask.andn.") || // Added in 3.9
140  Name.startswith("avx512.mask.or.") || // Added in 3.9
141  Name.startswith("avx512.mask.xor.") || // Added in 3.9
142  Name.startswith("avx512.mask.padd.") || // Added in 4.0
143  Name.startswith("avx512.mask.psub.") || // Added in 4.0
144  Name.startswith("avx512.mask.pmull.") || // Added in 4.0
145  Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0
146  Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0
147  Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0
148  Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0
149  Name.startswith("avx512.mask.packsswb.") || // Added in 5.0
150  Name.startswith("avx512.mask.packssdw.") || // Added in 5.0
151  Name.startswith("avx512.mask.packuswb.") || // Added in 5.0
152  Name.startswith("avx512.mask.packusdw.") || // Added in 5.0
153  Name.startswith("avx512.mask.cmp.b") || // Added in 5.0
154  Name.startswith("avx512.mask.cmp.d") || // Added in 5.0
155  Name.startswith("avx512.mask.cmp.q") || // Added in 5.0
156  Name.startswith("avx512.mask.cmp.w") || // Added in 5.0
157  Name.startswith("avx512.mask.ucmp.") || // Added in 5.0
158  Name == "avx512.mask.add.pd.128" || // Added in 4.0
159  Name == "avx512.mask.add.pd.256" || // Added in 4.0
160  Name == "avx512.mask.add.ps.128" || // Added in 4.0
161  Name == "avx512.mask.add.ps.256" || // Added in 4.0
162  Name == "avx512.mask.div.pd.128" || // Added in 4.0
163  Name == "avx512.mask.div.pd.256" || // Added in 4.0
164  Name == "avx512.mask.div.ps.128" || // Added in 4.0
165  Name == "avx512.mask.div.ps.256" || // Added in 4.0
166  Name == "avx512.mask.mul.pd.128" || // Added in 4.0
167  Name == "avx512.mask.mul.pd.256" || // Added in 4.0
168  Name == "avx512.mask.mul.ps.128" || // Added in 4.0
169  Name == "avx512.mask.mul.ps.256" || // Added in 4.0
170  Name == "avx512.mask.sub.pd.128" || // Added in 4.0
171  Name == "avx512.mask.sub.pd.256" || // Added in 4.0
172  Name == "avx512.mask.sub.ps.128" || // Added in 4.0
173  Name == "avx512.mask.sub.ps.256" || // Added in 4.0
174  Name == "avx512.mask.max.pd.128" || // Added in 5.0
175  Name == "avx512.mask.max.pd.256" || // Added in 5.0
176  Name == "avx512.mask.max.ps.128" || // Added in 5.0
177  Name == "avx512.mask.max.ps.256" || // Added in 5.0
178  Name == "avx512.mask.min.pd.128" || // Added in 5.0
179  Name == "avx512.mask.min.pd.256" || // Added in 5.0
180  Name == "avx512.mask.min.ps.128" || // Added in 5.0
181  Name == "avx512.mask.min.ps.256" || // Added in 5.0
182  Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0
183  Name.startswith("avx512.mask.psll.d") || // Added in 4.0
184  Name.startswith("avx512.mask.psll.q") || // Added in 4.0
185  Name.startswith("avx512.mask.psll.w") || // Added in 4.0
186  Name.startswith("avx512.mask.psra.d") || // Added in 4.0
187  Name.startswith("avx512.mask.psra.q") || // Added in 4.0
188  Name.startswith("avx512.mask.psra.w") || // Added in 4.0
189  Name.startswith("avx512.mask.psrl.d") || // Added in 4.0
190  Name.startswith("avx512.mask.psrl.q") || // Added in 4.0
191  Name.startswith("avx512.mask.psrl.w") || // Added in 4.0
192  Name.startswith("avx512.mask.pslli") || // Added in 4.0
193  Name.startswith("avx512.mask.psrai") || // Added in 4.0
194  Name.startswith("avx512.mask.psrli") || // Added in 4.0
195  Name.startswith("avx512.mask.psllv") || // Added in 4.0
196  Name.startswith("avx512.mask.psrav") || // Added in 4.0
197  Name.startswith("avx512.mask.psrlv") || // Added in 4.0
198  Name.startswith("sse41.pmovsx") || // Added in 3.8
199  Name.startswith("sse41.pmovzx") || // Added in 3.9
200  Name.startswith("avx2.pmovsx") || // Added in 3.9
201  Name.startswith("avx2.pmovzx") || // Added in 3.9
202  Name.startswith("avx512.mask.pmovsx") || // Added in 4.0
203  Name.startswith("avx512.mask.pmovzx") || // Added in 4.0
204  Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0
205  Name == "sse2.cvtdq2pd" || // Added in 3.9
206  Name == "sse2.cvtps2pd" || // Added in 3.9
207  Name == "avx.cvtdq2.pd.256" || // Added in 3.9
208  Name == "avx.cvt.ps2.pd.256" || // Added in 3.9
209  Name.startswith("avx.vinsertf128.") || // Added in 3.7
210  Name == "avx2.vinserti128" || // Added in 3.7
211  Name.startswith("avx512.mask.insert") || // Added in 4.0
212  Name.startswith("avx.vextractf128.") || // Added in 3.7
213  Name == "avx2.vextracti128" || // Added in 3.7
214  Name.startswith("avx512.mask.vextract") || // Added in 4.0
215  Name.startswith("sse4a.movnt.") || // Added in 3.9
216  Name.startswith("avx.movnt.") || // Added in 3.2
217  Name.startswith("avx512.storent.") || // Added in 3.9
218  Name == "sse41.movntdqa" || // Added in 5.0
219  Name == "avx2.movntdqa" || // Added in 5.0
220  Name == "avx512.movntdqa" || // Added in 5.0
221  Name == "sse2.storel.dq" || // Added in 3.9
222  Name.startswith("sse.storeu.") || // Added in 3.9
223  Name.startswith("sse2.storeu.") || // Added in 3.9
224  Name.startswith("avx.storeu.") || // Added in 3.9
225  Name.startswith("avx512.mask.storeu.") || // Added in 3.9
226  Name.startswith("avx512.mask.store.p") || // Added in 3.9
227  Name.startswith("avx512.mask.store.b.") || // Added in 3.9
228  Name.startswith("avx512.mask.store.w.") || // Added in 3.9
229  Name.startswith("avx512.mask.store.d.") || // Added in 3.9
230  Name.startswith("avx512.mask.store.q.") || // Added in 3.9
231  Name.startswith("avx512.mask.loadu.") || // Added in 3.9
232  Name.startswith("avx512.mask.load.") || // Added in 3.9
233  Name == "sse42.crc32.64.8" || // Added in 3.4
234  Name.startswith("avx.vbroadcast.s") || // Added in 3.5
235  Name.startswith("avx512.mask.palignr.") || // Added in 3.9
236  Name.startswith("avx512.mask.valign.") || // Added in 4.0
237  Name.startswith("sse2.psll.dq") || // Added in 3.7
238  Name.startswith("sse2.psrl.dq") || // Added in 3.7
239  Name.startswith("avx2.psll.dq") || // Added in 3.7
240  Name.startswith("avx2.psrl.dq") || // Added in 3.7
241  Name.startswith("avx512.psll.dq") || // Added in 3.9
242  Name.startswith("avx512.psrl.dq") || // Added in 3.9
243  Name == "sse41.pblendw" || // Added in 3.7
244  Name.startswith("sse41.blendp") || // Added in 3.7
245  Name.startswith("avx.blend.p") || // Added in 3.7
246  Name == "avx2.pblendw" || // Added in 3.7
247  Name.startswith("avx2.pblendd.") || // Added in 3.7
248  Name.startswith("avx.vbroadcastf128") || // Added in 4.0
249  Name == "avx2.vbroadcasti128" || // Added in 3.7
250  Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0
251  Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0
252  Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0
253  Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0
254  Name == "avx512.mask.broadcastf32x8.512" || // Added in 6.0
255  Name == "avx512.mask.broadcasti32x8.512" || // Added in 6.0
256  Name == "avx512.mask.broadcastf64x4.512" || // Added in 6.0
257  Name == "avx512.mask.broadcasti64x4.512" || // Added in 6.0
258  Name == "xop.vpcmov" || // Added in 3.8
259  Name == "xop.vpcmov.256" || // Added in 5.0
260  Name.startswith("avx512.mask.move.s") || // Added in 4.0
261  Name.startswith("avx512.cvtmask2") || // Added in 5.0
262  (Name.startswith("xop.vpcom") && // Added in 3.2
263  F->arg_size() == 2) ||
264  Name.startswith("sse2.pavg") || // Added in 6.0
265  Name.startswith("avx2.pavg") || // Added in 6.0
266  Name.startswith("avx512.mask.pavg")) // Added in 6.0
267  return true;
268 
269  return false;
270 }
271 
273  Function *&NewFn) {
274  // Only handle intrinsics that start with "x86.".
275  if (!Name.startswith("x86."))
276  return false;
277  // Remove "x86." prefix.
278  Name = Name.substr(4);
279 
280  if (ShouldUpgradeX86Intrinsic(F, Name)) {
281  NewFn = nullptr;
282  return true;
283  }
284 
285  // SSE4.1 ptest functions may have an old signature.
286  if (Name.startswith("sse41.ptest")) { // Added in 3.2
287  if (Name.substr(11) == "c")
288  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn);
289  if (Name.substr(11) == "z")
290  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn);
291  if (Name.substr(11) == "nzc")
292  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn);
293  }
294  // Several blend and other instructions with masks used the wrong number of
295  // bits.
296  if (Name == "sse41.insertps") // Added in 3.6
297  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps,
298  NewFn);
299  if (Name == "sse41.dppd") // Added in 3.6
300  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd,
301  NewFn);
302  if (Name == "sse41.dpps") // Added in 3.6
303  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps,
304  NewFn);
305  if (Name == "sse41.mpsadbw") // Added in 3.6
306  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw,
307  NewFn);
308  if (Name == "avx.dp.ps.256") // Added in 3.6
309  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256,
310  NewFn);
311  if (Name == "avx2.mpsadbw") // Added in 3.6
312  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw,
313  NewFn);
314 
315  // frcz.ss/sd may need to have an argument dropped. Added in 3.2
316  if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) {
317  rename(F);
319  Intrinsic::x86_xop_vfrcz_ss);
320  return true;
321  }
322  if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) {
323  rename(F);
325  Intrinsic::x86_xop_vfrcz_sd);
326  return true;
327  }
328  // Upgrade any XOP PERMIL2 index operand still using a float/double vector.
329  if (Name.startswith("xop.vpermil2")) { // Added in 3.9
330  auto Idx = F->getFunctionType()->getParamType(2);
331  if (Idx->isFPOrFPVectorTy()) {
332  rename(F);
333  unsigned IdxSize = Idx->getPrimitiveSizeInBits();
334  unsigned EltSize = Idx->getScalarSizeInBits();
335  Intrinsic::ID Permil2ID;
336  if (EltSize == 64 && IdxSize == 128)
337  Permil2ID = Intrinsic::x86_xop_vpermil2pd;
338  else if (EltSize == 32 && IdxSize == 128)
339  Permil2ID = Intrinsic::x86_xop_vpermil2ps;
340  else if (EltSize == 64 && IdxSize == 256)
341  Permil2ID = Intrinsic::x86_xop_vpermil2pd_256;
342  else
343  Permil2ID = Intrinsic::x86_xop_vpermil2ps_256;
344  NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID);
345  return true;
346  }
347  }
348 
349  return false;
350 }
351 
353  assert(F && "Illegal to upgrade a non-existent Function.");
354 
355  // Quickly eliminate it, if it's not a candidate.
356  StringRef Name = F->getName();
357  if (Name.size() <= 8 || !Name.startswith("llvm."))
358  return false;
359  Name = Name.substr(5); // Strip off "llvm."
360 
361  switch (Name[0]) {
362  default: break;
363  case 'a': {
364  if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) {
365  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse,
366  F->arg_begin()->getType());
367  return true;
368  }
369  if (Name.startswith("arm.neon.vclz")) {
370  Type* args[2] = {
371  F->arg_begin()->getType(),
373  };
374  // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to
375  // the end of the name. Change name from llvm.arm.neon.vclz.* to
376  // llvm.ctlz.*
377  FunctionType* fType = FunctionType::get(F->getReturnType(), args, false);
378  NewFn = Function::Create(fType, F->getLinkage(),
379  "llvm.ctlz." + Name.substr(14), F->getParent());
380  return true;
381  }
382  if (Name.startswith("arm.neon.vcnt")) {
383  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
384  F->arg_begin()->getType());
385  return true;
386  }
387  Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$");
388  if (vldRegex.match(Name)) {
389  auto fArgs = F->getFunctionType()->params();
390  SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end());
391  // Can't use Intrinsic::getDeclaration here as the return types might
392  // then only be structurally equal.
393  FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false);
394  NewFn = Function::Create(fType, F->getLinkage(),
395  "llvm." + Name + ".p0i8", F->getParent());
396  return true;
397  }
398  Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
399  if (vstRegex.match(Name)) {
400  static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
401  Intrinsic::arm_neon_vst2,
402  Intrinsic::arm_neon_vst3,
403  Intrinsic::arm_neon_vst4};
404 
405  static const Intrinsic::ID StoreLaneInts[] = {
406  Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
407  Intrinsic::arm_neon_vst4lane
408  };
409 
410  auto fArgs = F->getFunctionType()->params();
411  Type *Tys[] = {fArgs[0], fArgs[1]};
412  if (Name.find("lane") == StringRef::npos)
414  StoreInts[fArgs.size() - 3], Tys);
415  else
417  StoreLaneInts[fArgs.size() - 5], Tys);
418  return true;
419  }
420  if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") {
421  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer);
422  return true;
423  }
424  break;
425  }
426 
427  case 'c': {
428  if (Name.startswith("ctlz.") && F->arg_size() == 1) {
429  rename(F);
430  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
431  F->arg_begin()->getType());
432  return true;
433  }
434  if (Name.startswith("cttz.") && F->arg_size() == 1) {
435  rename(F);
436  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz,
437  F->arg_begin()->getType());
438  return true;
439  }
440  break;
441  }
442  case 'd': {
443  if (Name == "dbg.value" && F->arg_size() == 4) {
444  rename(F);
445  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value);
446  return true;
447  }
448  break;
449  }
450  case 'i':
451  case 'l': {
452  bool IsLifetimeStart = Name.startswith("lifetime.start");
453  if (IsLifetimeStart || Name.startswith("invariant.start")) {
454  Intrinsic::ID ID = IsLifetimeStart ?
455  Intrinsic::lifetime_start : Intrinsic::invariant_start;
456  auto Args = F->getFunctionType()->params();
457  Type* ObjectPtr[1] = {Args[1]};
458  if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) {
459  rename(F);
460  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr);
461  return true;
462  }
463  }
464 
465  bool IsLifetimeEnd = Name.startswith("lifetime.end");
466  if (IsLifetimeEnd || Name.startswith("invariant.end")) {
467  Intrinsic::ID ID = IsLifetimeEnd ?
468  Intrinsic::lifetime_end : Intrinsic::invariant_end;
469 
470  auto Args = F->getFunctionType()->params();
471  Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]};
472  if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) {
473  rename(F);
474  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr);
475  return true;
476  }
477  }
478  break;
479  }
480  case 'm': {
481  if (Name.startswith("masked.load.")) {
482  Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() };
483  if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) {
484  rename(F);
486  Intrinsic::masked_load,
487  Tys);
488  return true;
489  }
490  }
491  if (Name.startswith("masked.store.")) {
492  auto Args = F->getFunctionType()->params();
493  Type *Tys[] = { Args[0], Args[1] };
494  if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) {
495  rename(F);
497  Intrinsic::masked_store,
498  Tys);
499  return true;
500  }
501  }
502  // Renaming gather/scatter intrinsics with no address space overloading
503  // to the new overload which includes an address space
504  if (Name.startswith("masked.gather.")) {
505  Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()};
506  if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) {
507  rename(F);
509  Intrinsic::masked_gather, Tys);
510  return true;
511  }
512  }
513  if (Name.startswith("masked.scatter.")) {
514  auto Args = F->getFunctionType()->params();
515  Type *Tys[] = {Args[0], Args[1]};
516  if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) {
517  rename(F);
519  Intrinsic::masked_scatter, Tys);
520  return true;
521  }
522  }
523  break;
524  }
525  case 'n': {
526  if (Name.startswith("nvvm.")) {
527  Name = Name.substr(5);
528 
529  // The following nvvm intrinsics correspond exactly to an LLVM intrinsic.
531  .Cases("brev32", "brev64", Intrinsic::bitreverse)
532  .Case("clz.i", Intrinsic::ctlz)
533  .Case("popc.i", Intrinsic::ctpop)
535  if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) {
536  NewFn = Intrinsic::getDeclaration(F->getParent(), IID,
537  {F->getReturnType()});
538  return true;
539  }
540 
541  // The following nvvm intrinsics correspond exactly to an LLVM idiom, but
542  // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall.
543  //
544  // TODO: We could add lohi.i2d.
545  bool Expand = StringSwitch<bool>(Name)
546  .Cases("abs.i", "abs.ll", true)
547  .Cases("clz.ll", "popc.ll", "h2f", true)
548  .Cases("max.i", "max.ll", "max.ui", "max.ull", true)
549  .Cases("min.i", "min.ll", "min.ui", "min.ull", true)
550  .Default(false);
551  if (Expand) {
552  NewFn = nullptr;
553  return true;
554  }
555  }
556  break;
557  }
558  case 'o':
559  // We only need to change the name to match the mangling including the
560  // address space.
561  if (Name.startswith("objectsize.")) {
562  Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() };
563  if (F->arg_size() == 2 ||
564  F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) {
565  rename(F);
566  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize,
567  Tys);
568  return true;
569  }
570  }
571  break;
572 
573  case 's':
574  if (Name == "stackprotectorcheck") {
575  NewFn = nullptr;
576  return true;
577  }
578  break;
579 
580  case 'x':
581  if (UpgradeX86IntrinsicFunction(F, Name, NewFn))
582  return true;
583  }
584  // Remangle our intrinsic since we upgrade the mangling
586  if (Result != None) {
587  NewFn = Result.getValue();
588  return true;
589  }
590 
591  // This may not belong here. This function is effectively being overloaded
592  // to both detect an intrinsic which needs upgrading, and to provide the
593  // upgraded form of the intrinsic. We should perhaps have two separate
594  // functions for this.
595  return false;
596 }
597 
599  NewFn = nullptr;
600  bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn);
601  assert(F != NewFn && "Intrinsic function upgraded to the same function");
602 
603  // Upgrade intrinsic attributes. This does not change the function.
604  if (NewFn)
605  F = NewFn;
606  if (Intrinsic::ID id = F->getIntrinsicID())
608  return Upgraded;
609 }
610 
612  // Nothing to do yet.
613  return false;
614 }
615 
616 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them
617 // to byte shuffles.
619  Value *Op, unsigned Shift) {
620  Type *ResultTy = Op->getType();
621  unsigned NumElts = ResultTy->getVectorNumElements() * 8;
622 
623  // Bitcast from a 64-bit element type to a byte element type.
624  Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
625  Op = Builder.CreateBitCast(Op, VecTy, "cast");
626 
627  // We'll be shuffling in zeroes.
628  Value *Res = Constant::getNullValue(VecTy);
629 
630  // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
631  // we'll just return the zero vector.
632  if (Shift < 16) {
633  uint32_t Idxs[64];
634  // 256/512-bit version is split into 2/4 16-byte lanes.
635  for (unsigned l = 0; l != NumElts; l += 16)
636  for (unsigned i = 0; i != 16; ++i) {
637  unsigned Idx = NumElts + i - Shift;
638  if (Idx < NumElts)
639  Idx -= NumElts - 16; // end of lane, switch operand.
640  Idxs[l + i] = Idx + l;
641  }
642 
643  Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
644  }
645 
646  // Bitcast back to a 64-bit element type.
647  return Builder.CreateBitCast(Res, ResultTy, "cast");
648 }
649 
650 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them
651 // to byte shuffles.
653  unsigned Shift) {
654  Type *ResultTy = Op->getType();
655  unsigned NumElts = ResultTy->getVectorNumElements() * 8;
656 
657  // Bitcast from a 64-bit element type to a byte element type.
658  Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
659  Op = Builder.CreateBitCast(Op, VecTy, "cast");
660 
661  // We'll be shuffling in zeroes.
662  Value *Res = Constant::getNullValue(VecTy);
663 
664  // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
665  // we'll just return the zero vector.
666  if (Shift < 16) {
667  uint32_t Idxs[64];
668  // 256/512-bit version is split into 2/4 16-byte lanes.
669  for (unsigned l = 0; l != NumElts; l += 16)
670  for (unsigned i = 0; i != 16; ++i) {
671  unsigned Idx = i + Shift;
672  if (Idx >= 16)
673  Idx += NumElts - 16; // end of lane, switch operand.
674  Idxs[l + i] = Idx + l;
675  }
676 
677  Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts));
678  }
679 
680  // Bitcast back to a 64-bit element type.
681  return Builder.CreateBitCast(Res, ResultTy, "cast");
682 }
683 
685  unsigned NumElts) {
687  cast<IntegerType>(Mask->getType())->getBitWidth());
688  Mask = Builder.CreateBitCast(Mask, MaskTy);
689 
690  // If we have less than 8 elements, then the starting mask was an i8 and
691  // we need to extract down to the right number of elements.
692  if (NumElts < 8) {
693  uint32_t Indices[4];
694  for (unsigned i = 0; i != NumElts; ++i)
695  Indices[i] = i;
696  Mask = Builder.CreateShuffleVector(Mask, Mask,
697  makeArrayRef(Indices, NumElts),
698  "extract");
699  }
700 
701  return Mask;
702 }
703 
705  Value *Op0, Value *Op1) {
706  // If the mask is all ones just emit the align operation.
707  if (const auto *C = dyn_cast<Constant>(Mask))
708  if (C->isAllOnesValue())
709  return Op0;
710 
711  Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements());
712  return Builder.CreateSelect(Mask, Op0, Op1);
713 }
714 
715 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics.
716 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate
717 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes.
719  Value *Op1, Value *Shift,
720  Value *Passthru, Value *Mask,
721  bool IsVALIGN) {
722  unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue();
723 
724  unsigned NumElts = Op0->getType()->getVectorNumElements();
725  assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!");
726  assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!");
727  assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!");
728 
729  // Mask the immediate for VALIGN.
730  if (IsVALIGN)
731  ShiftVal &= (NumElts - 1);
732 
733  // If palignr is shifting the pair of vectors more than the size of two
734  // lanes, emit zero.
735  if (ShiftVal >= 32)
736  return llvm::Constant::getNullValue(Op0->getType());
737 
738  // If palignr is shifting the pair of input vectors more than one lane,
739  // but less than two lanes, convert to shifting in zeroes.
740  if (ShiftVal > 16) {
741  ShiftVal -= 16;
742  Op1 = Op0;
744  }
745 
746  uint32_t Indices[64];
747  // 256-bit palignr operates on 128-bit lanes so we need to handle that
748  for (unsigned l = 0; l < NumElts; l += 16) {
749  for (unsigned i = 0; i != 16; ++i) {
750  unsigned Idx = ShiftVal + i;
751  if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN.
752  Idx += NumElts - 16; // End of lane, switch operand.
753  Indices[l + i] = Idx + l;
754  }
755  }
756 
757  Value *Align = Builder.CreateShuffleVector(Op1, Op0,
758  makeArrayRef(Indices, NumElts),
759  "palignr");
760 
761  return EmitX86Select(Builder, Mask, Align, Passthru);
762 }
763 
765  Value *Ptr, Value *Data, Value *Mask,
766  bool Aligned) {
767  // Cast the pointer to the right type.
768  Ptr = Builder.CreateBitCast(Ptr,
770  unsigned Align =
771  Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1;
772 
773  // If the mask is all ones just emit a regular store.
774  if (const auto *C = dyn_cast<Constant>(Mask))
775  if (C->isAllOnesValue())
776  return Builder.CreateAlignedStore(Data, Ptr, Align);
777 
778  // Convert the mask from an integer type to a vector of i1.
779  unsigned NumElts = Data->getType()->getVectorNumElements();
780  Mask = getX86MaskVec(Builder, Mask, NumElts);
781  return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
782 }
783 
785  Value *Ptr, Value *Passthru, Value *Mask,
786  bool Aligned) {
787  // Cast the pointer to the right type.
788  Ptr = Builder.CreateBitCast(Ptr,
790  unsigned Align =
791  Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1;
792 
793  // If the mask is all ones just emit a regular store.
794  if (const auto *C = dyn_cast<Constant>(Mask))
795  if (C->isAllOnesValue())
796  return Builder.CreateAlignedLoad(Ptr, Align);
797 
798  // Convert the mask from an integer type to a vector of i1.
799  unsigned NumElts = Passthru->getType()->getVectorNumElements();
800  Mask = getX86MaskVec(Builder, Mask, NumElts);
801  return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
802 }
803 
804 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) {
805  Value *Op0 = CI.getArgOperand(0);
806  llvm::Type *Ty = Op0->getType();
808  Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero);
809  Value *Neg = Builder.CreateNeg(Op0);
810  Value *Res = Builder.CreateSelect(Cmp, Op0, Neg);
811 
812  if (CI.getNumArgOperands() == 3)
813  Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1));
814 
815  return Res;
816 }
817 
819  ICmpInst::Predicate Pred) {
820  Value *Op0 = CI.getArgOperand(0);
821  Value *Op1 = CI.getArgOperand(1);
822  Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1);
823  Value *Res = Builder.CreateSelect(Cmp, Op0, Op1);
824 
825  if (CI.getNumArgOperands() == 4)
826  Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2));
827 
828  return Res;
829 }
830 
832  unsigned CC, bool Signed) {
833  Value *Op0 = CI.getArgOperand(0);
834  unsigned NumElts = Op0->getType()->getVectorNumElements();
835 
836  Value *Cmp;
837  if (CC == 3) {
838  Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts));
839  } else if (CC == 7) {
840  Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts));
841  } else {
842  ICmpInst::Predicate Pred;
843  switch (CC) {
844  default: llvm_unreachable("Unknown condition code");
845  case 0: Pred = ICmpInst::ICMP_EQ; break;
846  case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break;
847  case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break;
848  case 4: Pred = ICmpInst::ICMP_NE; break;
849  case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break;
850  case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break;
851  }
852  Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1));
853  }
854 
855  Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1);
856  const auto *C = dyn_cast<Constant>(Mask);
857  if (!C || !C->isAllOnesValue())
858  Cmp = Builder.CreateAnd(Cmp, getX86MaskVec(Builder, Mask, NumElts));
859 
860  if (NumElts < 8) {
861  uint32_t Indices[8];
862  for (unsigned i = 0; i != NumElts; ++i)
863  Indices[i] = i;
864  for (unsigned i = NumElts; i != 8; ++i)
865  Indices[i] = NumElts + i % NumElts;
866  Cmp = Builder.CreateShuffleVector(Cmp,
868  Indices);
869  }
870  return Builder.CreateBitCast(Cmp, IntegerType::get(CI.getContext(),
871  std::max(NumElts, 8U)));
872 }
873 
874 // Replace a masked intrinsic with an older unmasked intrinsic.
876  Intrinsic::ID IID) {
877  Function *F = CI.getCalledFunction();
878  Function *Intrin = Intrinsic::getDeclaration(F->getParent(), IID);
879  Value *Rep = Builder.CreateCall(Intrin,
880  { CI.getArgOperand(0), CI.getArgOperand(1) });
881  return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2));
882 }
883 
884 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) {
885  Value* A = CI.getArgOperand(0);
886  Value* B = CI.getArgOperand(1);
887  Value* Src = CI.getArgOperand(2);
888  Value* Mask = CI.getArgOperand(3);
889 
890  Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1));
891  Value* Cmp = Builder.CreateIsNotNull(AndNode);
892  Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0);
893  Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0);
894  Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2);
895  return Builder.CreateInsertElement(A, Select, (uint64_t)0);
896 }
897 
898 
899 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) {
900  Value* Op = CI.getArgOperand(0);
901  Type* ReturnOp = CI.getType();
902  unsigned NumElts = CI.getType()->getVectorNumElements();
903  Value *Mask = getX86MaskVec(Builder, Op, NumElts);
904  return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2");
905 }
906 
907 /// Upgrade a call to an old intrinsic. All argument and return casting must be
908 /// provided to seamlessly integrate with existing context.
910  Function *F = CI->getCalledFunction();
911  LLVMContext &C = CI->getContext();
912  IRBuilder<> Builder(C);
913  Builder.SetInsertPoint(CI->getParent(), CI->getIterator());
914 
915  assert(F && "Intrinsic call is not direct?");
916 
917  if (!NewFn) {
918  // Get the Function's name.
919  StringRef Name = F->getName();
920 
921  assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'");
922  Name = Name.substr(5);
923 
924  bool IsX86 = Name.startswith("x86.");
925  if (IsX86)
926  Name = Name.substr(4);
927  bool IsNVVM = Name.startswith("nvvm.");
928  if (IsNVVM)
929  Name = Name.substr(5);
930 
931  if (IsX86 && Name.startswith("sse4a.movnt.")) {
932  Module *M = F->getParent();
934  Elts.push_back(
936  MDNode *Node = MDNode::get(C, Elts);
937 
938  Value *Arg0 = CI->getArgOperand(0);
939  Value *Arg1 = CI->getArgOperand(1);
940 
941  // Nontemporal (unaligned) store of the 0'th element of the float/double
942  // vector.
943  Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType();
944  PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy);
945  Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast");
946  Value *Extract =
947  Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement");
948 
949  StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1);
950  SI->setMetadata(M->getMDKindID("nontemporal"), Node);
951 
952  // Remove intrinsic.
953  CI->eraseFromParent();
954  return;
955  }
956 
957  if (IsX86 && (Name.startswith("avx.movnt.") ||
958  Name.startswith("avx512.storent."))) {
959  Module *M = F->getParent();
961  Elts.push_back(
963  MDNode *Node = MDNode::get(C, Elts);
964 
965  Value *Arg0 = CI->getArgOperand(0);
966  Value *Arg1 = CI->getArgOperand(1);
967 
968  // Convert the type of the pointer to a pointer to the stored type.
969  Value *BC = Builder.CreateBitCast(Arg0,
971  "cast");
972  VectorType *VTy = cast<VectorType>(Arg1->getType());
973  StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC,
974  VTy->getBitWidth() / 8);
975  SI->setMetadata(M->getMDKindID("nontemporal"), Node);
976 
977  // Remove intrinsic.
978  CI->eraseFromParent();
979  return;
980  }
981 
982  if (IsX86 && Name == "sse2.storel.dq") {
983  Value *Arg0 = CI->getArgOperand(0);
984  Value *Arg1 = CI->getArgOperand(1);
985 
986  Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
987  Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
988  Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0);
989  Value *BC = Builder.CreateBitCast(Arg0,
991  "cast");
992  Builder.CreateAlignedStore(Elt, BC, 1);
993 
994  // Remove intrinsic.
995  CI->eraseFromParent();
996  return;
997  }
998 
999  if (IsX86 && (Name.startswith("sse.storeu.") ||
1000  Name.startswith("sse2.storeu.") ||
1001  Name.startswith("avx.storeu."))) {
1002  Value *Arg0 = CI->getArgOperand(0);
1003  Value *Arg1 = CI->getArgOperand(1);
1004 
1005  Arg0 = Builder.CreateBitCast(Arg0,
1007  "cast");
1008  Builder.CreateAlignedStore(Arg1, Arg0, 1);
1009 
1010  // Remove intrinsic.
1011  CI->eraseFromParent();
1012  return;
1013  }
1014 
1015  if (IsX86 && (Name.startswith("avx512.mask.store"))) {
1016  // "avx512.mask.storeu." or "avx512.mask.store."
1017  bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu".
1018  UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
1019  CI->getArgOperand(2), Aligned);
1020 
1021  // Remove intrinsic.
1022  CI->eraseFromParent();
1023  return;
1024  }
1025 
1026  Value *Rep;
1027  // Upgrade packed integer vector compare intrinsics to compare instructions.
1028  if (IsX86 && (Name.startswith("sse2.pcmp") ||
1029  Name.startswith("avx2.pcmp"))) {
1030  // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt."
1031  bool CmpEq = Name[9] == 'e';
1032  Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT,
1033  CI->getArgOperand(0), CI->getArgOperand(1));
1034  Rep = Builder.CreateSExt(Rep, CI->getType(), "");
1035  } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){
1036  unsigned NumElts =
1038  Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0));
1039  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1040  CI->getArgOperand(1));
1041  } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd")) {
1042  Type *I32Ty = Type::getInt32Ty(C);
1043  Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0),
1044  ConstantInt::get(I32Ty, 0));
1045  Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1),
1046  ConstantInt::get(I32Ty, 0));
1047  Rep = Builder.CreateInsertElement(CI->getArgOperand(0),
1048  Builder.CreateFAdd(Elt0, Elt1),
1049  ConstantInt::get(I32Ty, 0));
1050  } else if (IsX86 && (Name == "sse.sub.ss" || Name == "sse2.sub.sd")) {
1051  Type *I32Ty = Type::getInt32Ty(C);
1052  Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0),
1053  ConstantInt::get(I32Ty, 0));
1054  Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1),
1055  ConstantInt::get(I32Ty, 0));
1056  Rep = Builder.CreateInsertElement(CI->getArgOperand(0),
1057  Builder.CreateFSub(Elt0, Elt1),
1058  ConstantInt::get(I32Ty, 0));
1059  } else if (IsX86 && (Name == "sse.mul.ss" || Name == "sse2.mul.sd")) {
1060  Type *I32Ty = Type::getInt32Ty(C);
1061  Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0),
1062  ConstantInt::get(I32Ty, 0));
1063  Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1),
1064  ConstantInt::get(I32Ty, 0));
1065  Rep = Builder.CreateInsertElement(CI->getArgOperand(0),
1066  Builder.CreateFMul(Elt0, Elt1),
1067  ConstantInt::get(I32Ty, 0));
1068  } else if (IsX86 && (Name == "sse.div.ss" || Name == "sse2.div.sd")) {
1069  Type *I32Ty = Type::getInt32Ty(C);
1070  Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0),
1071  ConstantInt::get(I32Ty, 0));
1072  Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1),
1073  ConstantInt::get(I32Ty, 0));
1074  Rep = Builder.CreateInsertElement(CI->getArgOperand(0),
1075  Builder.CreateFDiv(Elt0, Elt1),
1076  ConstantInt::get(I32Ty, 0));
1077  } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) {
1078  // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt."
1079  bool CmpEq = Name[16] == 'e';
1080  Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true);
1081  } else if (IsX86 && Name.startswith("avx512.mask.cmp")) {
1082  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1083  Rep = upgradeMaskedCompare(Builder, *CI, Imm, true);
1084  } else if (IsX86 && Name.startswith("avx512.mask.ucmp")) {
1085  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1086  Rep = upgradeMaskedCompare(Builder, *CI, Imm, false);
1087  } else if(IsX86 && (Name == "ssse3.pabs.b.128" ||
1088  Name == "ssse3.pabs.w.128" ||
1089  Name == "ssse3.pabs.d.128" ||
1090  Name.startswith("avx2.pabs") ||
1091  Name.startswith("avx512.mask.pabs"))) {
1092  Rep = upgradeAbs(Builder, *CI);
1093  } else if (IsX86 && (Name == "sse41.pmaxsb" ||
1094  Name == "sse2.pmaxs.w" ||
1095  Name == "sse41.pmaxsd" ||
1096  Name.startswith("avx2.pmaxs") ||
1097  Name.startswith("avx512.mask.pmaxs"))) {
1098  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT);
1099  } else if (IsX86 && (Name == "sse2.pmaxu.b" ||
1100  Name == "sse41.pmaxuw" ||
1101  Name == "sse41.pmaxud" ||
1102  Name.startswith("avx2.pmaxu") ||
1103  Name.startswith("avx512.mask.pmaxu"))) {
1104  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT);
1105  } else if (IsX86 && (Name == "sse41.pminsb" ||
1106  Name == "sse2.pmins.w" ||
1107  Name == "sse41.pminsd" ||
1108  Name.startswith("avx2.pmins") ||
1109  Name.startswith("avx512.mask.pmins"))) {
1110  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT);
1111  } else if (IsX86 && (Name == "sse2.pminu.b" ||
1112  Name == "sse41.pminuw" ||
1113  Name == "sse41.pminud" ||
1114  Name.startswith("avx2.pminu") ||
1115  Name.startswith("avx512.mask.pminu"))) {
1116  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT);
1117  } else if (IsX86 && (Name == "sse2.cvtdq2pd" ||
1118  Name == "sse2.cvtps2pd" ||
1119  Name == "avx.cvtdq2.pd.256" ||
1120  Name == "avx.cvt.ps2.pd.256" ||
1121  Name.startswith("avx512.mask.cvtdq2pd.") ||
1122  Name.startswith("avx512.mask.cvtudq2pd."))) {
1123  // Lossless i32/float to double conversion.
1124  // Extract the bottom elements if necessary and convert to double vector.
1125  Value *Src = CI->getArgOperand(0);
1126  VectorType *SrcTy = cast<VectorType>(Src->getType());
1127  VectorType *DstTy = cast<VectorType>(CI->getType());
1128  Rep = CI->getArgOperand(0);
1129 
1130  unsigned NumDstElts = DstTy->getNumElements();
1131  if (NumDstElts < SrcTy->getNumElements()) {
1132  assert(NumDstElts == 2 && "Unexpected vector size");
1133  uint32_t ShuffleMask[2] = { 0, 1 };
1134  Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy),
1135  ShuffleMask);
1136  }
1137 
1138  bool SInt2Double = (StringRef::npos != Name.find("cvtdq2"));
1139  bool UInt2Double = (StringRef::npos != Name.find("cvtudq2"));
1140  if (SInt2Double)
1141  Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd");
1142  else if (UInt2Double)
1143  Rep = Builder.CreateUIToFP(Rep, DstTy, "cvtudq2pd");
1144  else
1145  Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd");
1146 
1147  if (CI->getNumArgOperands() == 3)
1148  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1149  CI->getArgOperand(1));
1150  } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) {
1151  Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
1152  CI->getArgOperand(1), CI->getArgOperand(2),
1153  /*Aligned*/false);
1154  } else if (IsX86 && (Name.startswith("avx512.mask.load."))) {
1155  Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
1156  CI->getArgOperand(1),CI->getArgOperand(2),
1157  /*Aligned*/true);
1158  } else if (IsX86 && Name.startswith("xop.vpcom")) {
1159  Intrinsic::ID intID;
1160  if (Name.endswith("ub"))
1161  intID = Intrinsic::x86_xop_vpcomub;
1162  else if (Name.endswith("uw"))
1163  intID = Intrinsic::x86_xop_vpcomuw;
1164  else if (Name.endswith("ud"))
1165  intID = Intrinsic::x86_xop_vpcomud;
1166  else if (Name.endswith("uq"))
1167  intID = Intrinsic::x86_xop_vpcomuq;
1168  else if (Name.endswith("b"))
1169  intID = Intrinsic::x86_xop_vpcomb;
1170  else if (Name.endswith("w"))
1171  intID = Intrinsic::x86_xop_vpcomw;
1172  else if (Name.endswith("d"))
1173  intID = Intrinsic::x86_xop_vpcomd;
1174  else if (Name.endswith("q"))
1175  intID = Intrinsic::x86_xop_vpcomq;
1176  else
1177  llvm_unreachable("Unknown suffix");
1178 
1179  Name = Name.substr(9); // strip off "xop.vpcom"
1180  unsigned Imm;
1181  if (Name.startswith("lt"))
1182  Imm = 0;
1183  else if (Name.startswith("le"))
1184  Imm = 1;
1185  else if (Name.startswith("gt"))
1186  Imm = 2;
1187  else if (Name.startswith("ge"))
1188  Imm = 3;
1189  else if (Name.startswith("eq"))
1190  Imm = 4;
1191  else if (Name.startswith("ne"))
1192  Imm = 5;
1193  else if (Name.startswith("false"))
1194  Imm = 6;
1195  else if (Name.startswith("true"))
1196  Imm = 7;
1197  else
1198  llvm_unreachable("Unknown condition");
1199 
1201  Rep =
1202  Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1),
1203  Builder.getInt8(Imm)});
1204  } else if (IsX86 && Name.startswith("xop.vpcmov")) {
1205  Value *Sel = CI->getArgOperand(2);
1206  Value *NotSel = Builder.CreateNot(Sel);
1207  Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel);
1208  Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel);
1209  Rep = Builder.CreateOr(Sel0, Sel1);
1210  } else if (IsX86 && Name == "sse42.crc32.64.8") {
1212  Intrinsic::x86_sse42_crc32_32_8);
1213  Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C));
1214  Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)});
1215  Rep = Builder.CreateZExt(Rep, CI->getType(), "");
1216  } else if (IsX86 && Name.startswith("avx.vbroadcast.s")) {
1217  // Replace broadcasts with a series of insertelements.
1218  Type *VecTy = CI->getType();
1219  Type *EltTy = VecTy->getVectorElementType();
1220  unsigned EltNum = VecTy->getVectorNumElements();
1221  Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0),
1222  EltTy->getPointerTo());
1223  Value *Load = Builder.CreateLoad(EltTy, Cast);
1224  Type *I32Ty = Type::getInt32Ty(C);
1225  Rep = UndefValue::get(VecTy);
1226  for (unsigned I = 0; I < EltNum; ++I)
1227  Rep = Builder.CreateInsertElement(Rep, Load,
1228  ConstantInt::get(I32Ty, I));
1229  } else if (IsX86 && (Name.startswith("sse41.pmovsx") ||
1230  Name.startswith("sse41.pmovzx") ||
1231  Name.startswith("avx2.pmovsx") ||
1232  Name.startswith("avx2.pmovzx") ||
1233  Name.startswith("avx512.mask.pmovsx") ||
1234  Name.startswith("avx512.mask.pmovzx"))) {
1235  VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType());
1236  VectorType *DstTy = cast<VectorType>(CI->getType());
1237  unsigned NumDstElts = DstTy->getNumElements();
1238 
1239  // Extract a subvector of the first NumDstElts lanes and sign/zero extend.
1240  SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
1241  for (unsigned i = 0; i != NumDstElts; ++i)
1242  ShuffleMask[i] = i;
1243 
1244  Value *SV = Builder.CreateShuffleVector(
1245  CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask);
1246 
1247  bool DoSext = (StringRef::npos != Name.find("pmovsx"));
1248  Rep = DoSext ? Builder.CreateSExt(SV, DstTy)
1249  : Builder.CreateZExt(SV, DstTy);
1250  // If there are 3 arguments, it's a masked intrinsic so we need a select.
1251  if (CI->getNumArgOperands() == 3)
1252  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1253  CI->getArgOperand(1));
1254  } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") ||
1255  Name == "avx2.vbroadcasti128")) {
1256  // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle.
1257  Type *EltTy = CI->getType()->getVectorElementType();
1258  unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits();
1259  Type *VT = VectorType::get(EltTy, NumSrcElts);
1260  Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
1262  Value *Load = Builder.CreateAlignedLoad(Op, 1);
1263  if (NumSrcElts == 2)
1264  Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
1265  { 0, 1, 0, 1 });
1266  else
1267  Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
1268  { 0, 1, 2, 3, 0, 1, 2, 3 });
1269  } else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") ||
1270  Name.startswith("avx512.mask.broadcasti"))) {
1271  unsigned NumSrcElts =
1273  unsigned NumDstElts = CI->getType()->getVectorNumElements();
1274 
1275  SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
1276  for (unsigned i = 0; i != NumDstElts; ++i)
1277  ShuffleMask[i] = i % NumSrcElts;
1278 
1279  Rep = Builder.CreateShuffleVector(CI->getArgOperand(0),
1280  CI->getArgOperand(0),
1281  ShuffleMask);
1282  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1283  CI->getArgOperand(1));
1284  } else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
1285  Name.startswith("avx2.vbroadcast") ||
1286  Name.startswith("avx512.pbroadcast") ||
1287  Name.startswith("avx512.mask.broadcast.s"))) {
1288  // Replace vp?broadcasts with a vector shuffle.
1289  Value *Op = CI->getArgOperand(0);
1290  unsigned NumElts = CI->getType()->getVectorNumElements();
1291  Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts);
1292  Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()),
1293  Constant::getNullValue(MaskTy));
1294 
1295  if (CI->getNumArgOperands() == 3)
1296  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1297  CI->getArgOperand(1));
1298  } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) {
1299  Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0),
1300  CI->getArgOperand(1),
1301  CI->getArgOperand(2),
1302  CI->getArgOperand(3),
1303  CI->getArgOperand(4),
1304  false);
1305  } else if (IsX86 && Name.startswith("avx512.mask.valign.")) {
1306  Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0),
1307  CI->getArgOperand(1),
1308  CI->getArgOperand(2),
1309  CI->getArgOperand(3),
1310  CI->getArgOperand(4),
1311  true);
1312  } else if (IsX86 && (Name == "sse2.psll.dq" ||
1313  Name == "avx2.psll.dq")) {
1314  // 128/256-bit shift left specified in bits.
1315  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1316  Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0),
1317  Shift / 8); // Shift is in bits.
1318  } else if (IsX86 && (Name == "sse2.psrl.dq" ||
1319  Name == "avx2.psrl.dq")) {
1320  // 128/256-bit shift right specified in bits.
1321  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1322  Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0),
1323  Shift / 8); // Shift is in bits.
1324  } else if (IsX86 && (Name == "sse2.psll.dq.bs" ||
1325  Name == "avx2.psll.dq.bs" ||
1326  Name == "avx512.psll.dq.512")) {
1327  // 128/256/512-bit shift left specified in bytes.
1328  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1329  Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
1330  } else if (IsX86 && (Name == "sse2.psrl.dq.bs" ||
1331  Name == "avx2.psrl.dq.bs" ||
1332  Name == "avx512.psrl.dq.512")) {
1333  // 128/256/512-bit shift right specified in bytes.
1334  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1335  Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
1336  } else if (IsX86 && (Name == "sse41.pblendw" ||
1337  Name.startswith("sse41.blendp") ||
1338  Name.startswith("avx.blend.p") ||
1339  Name == "avx2.pblendw" ||
1340  Name.startswith("avx2.pblendd."))) {
1341  Value *Op0 = CI->getArgOperand(0);
1342  Value *Op1 = CI->getArgOperand(1);
1343  unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1344  VectorType *VecTy = cast<VectorType>(CI->getType());
1345  unsigned NumElts = VecTy->getNumElements();
1346 
1347  SmallVector<uint32_t, 16> Idxs(NumElts);
1348  for (unsigned i = 0; i != NumElts; ++i)
1349  Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i;
1350 
1351  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1352  } else if (IsX86 && (Name.startswith("avx.vinsertf128.") ||
1353  Name == "avx2.vinserti128" ||
1354  Name.startswith("avx512.mask.insert"))) {
1355  Value *Op0 = CI->getArgOperand(0);
1356  Value *Op1 = CI->getArgOperand(1);
1357  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1358  unsigned DstNumElts = CI->getType()->getVectorNumElements();
1359  unsigned SrcNumElts = Op1->getType()->getVectorNumElements();
1360  unsigned Scale = DstNumElts / SrcNumElts;
1361 
1362  // Mask off the high bits of the immediate value; hardware ignores those.
1363  Imm = Imm % Scale;
1364 
1365  // Extend the second operand into a vector the size of the destination.
1366  Value *UndefV = UndefValue::get(Op1->getType());
1367  SmallVector<uint32_t, 8> Idxs(DstNumElts);
1368  for (unsigned i = 0; i != SrcNumElts; ++i)
1369  Idxs[i] = i;
1370  for (unsigned i = SrcNumElts; i != DstNumElts; ++i)
1371  Idxs[i] = SrcNumElts;
1372  Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs);
1373 
1374  // Insert the second operand into the first operand.
1375 
1376  // Note that there is no guarantee that instruction lowering will actually
1377  // produce a vinsertf128 instruction for the created shuffles. In
1378  // particular, the 0 immediate case involves no lane changes, so it can
1379  // be handled as a blend.
1380 
1381  // Example of shuffle mask for 32-bit elements:
1382  // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
1383  // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 >
1384 
1385  // First fill with identify mask.
1386  for (unsigned i = 0; i != DstNumElts; ++i)
1387  Idxs[i] = i;
1388  // Then replace the elements where we need to insert.
1389  for (unsigned i = 0; i != SrcNumElts; ++i)
1390  Idxs[i + Imm * SrcNumElts] = i + DstNumElts;
1391  Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs);
1392 
1393  // If the intrinsic has a mask operand, handle that.
1394  if (CI->getNumArgOperands() == 5)
1395  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
1396  CI->getArgOperand(3));
1397  } else if (IsX86 && (Name.startswith("avx.vextractf128.") ||
1398  Name == "avx2.vextracti128" ||
1399  Name.startswith("avx512.mask.vextract"))) {
1400  Value *Op0 = CI->getArgOperand(0);
1401  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1402  unsigned DstNumElts = CI->getType()->getVectorNumElements();
1403  unsigned SrcNumElts = Op0->getType()->getVectorNumElements();
1404  unsigned Scale = SrcNumElts / DstNumElts;
1405 
1406  // Mask off the high bits of the immediate value; hardware ignores those.
1407  Imm = Imm % Scale;
1408 
1409  // Get indexes for the subvector of the input vector.
1410  SmallVector<uint32_t, 8> Idxs(DstNumElts);
1411  for (unsigned i = 0; i != DstNumElts; ++i) {
1412  Idxs[i] = i + (Imm * DstNumElts);
1413  }
1414  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1415 
1416  // If the intrinsic has a mask operand, handle that.
1417  if (CI->getNumArgOperands() == 4)
1418  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1419  CI->getArgOperand(2));
1420  } else if (!IsX86 && Name == "stackprotectorcheck") {
1421  Rep = nullptr;
1422  } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") ||
1423  Name.startswith("avx512.mask.perm.di."))) {
1424  Value *Op0 = CI->getArgOperand(0);
1425  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1426  VectorType *VecTy = cast<VectorType>(CI->getType());
1427  unsigned NumElts = VecTy->getNumElements();
1428 
1429  SmallVector<uint32_t, 8> Idxs(NumElts);
1430  for (unsigned i = 0; i != NumElts; ++i)
1431  Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3);
1432 
1433  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1434 
1435  if (CI->getNumArgOperands() == 4)
1436  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1437  CI->getArgOperand(2));
1438  } else if (IsX86 && (Name.startswith("avx.vperm2f128.") ||
1439  Name == "avx2.vperm2i128")) {
1440  // The immediate permute control byte looks like this:
1441  // [1:0] - select 128 bits from sources for low half of destination
1442  // [2] - ignore
1443  // [3] - zero low half of destination
1444  // [5:4] - select 128 bits from sources for high half of destination
1445  // [6] - ignore
1446  // [7] - zero high half of destination
1447 
1448  uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1449 
1450  unsigned NumElts = CI->getType()->getVectorNumElements();
1451  unsigned HalfSize = NumElts / 2;
1452  SmallVector<uint32_t, 8> ShuffleMask(NumElts);
1453 
1454  // Determine which operand(s) are actually in use for this instruction.
1455  Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0);
1456  Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0);
1457 
1458  // If needed, replace operands based on zero mask.
1459  V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0;
1460  V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1;
1461 
1462  // Permute low half of result.
1463  unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0;
1464  for (unsigned i = 0; i < HalfSize; ++i)
1465  ShuffleMask[i] = StartIndex + i;
1466 
1467  // Permute high half of result.
1468  StartIndex = (Imm & 0x10) ? HalfSize : 0;
1469  for (unsigned i = 0; i < HalfSize; ++i)
1470  ShuffleMask[i + HalfSize] = NumElts + StartIndex + i;
1471 
1472  Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask);
1473 
1474  } else if (IsX86 && (Name.startswith("avx.vpermil.") ||
1475  Name == "sse2.pshuf.d" ||
1476  Name.startswith("avx512.mask.vpermil.p") ||
1477  Name.startswith("avx512.mask.pshuf.d."))) {
1478  Value *Op0 = CI->getArgOperand(0);
1479  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1480  VectorType *VecTy = cast<VectorType>(CI->getType());
1481  unsigned NumElts = VecTy->getNumElements();
1482  // Calculate the size of each index in the immediate.
1483  unsigned IdxSize = 64 / VecTy->getScalarSizeInBits();
1484  unsigned IdxMask = ((1 << IdxSize) - 1);
1485 
1486  SmallVector<uint32_t, 8> Idxs(NumElts);
1487  // Lookup the bits for this element, wrapping around the immediate every
1488  // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need
1489  // to offset by the first index of each group.
1490  for (unsigned i = 0; i != NumElts; ++i)
1491  Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask);
1492 
1493  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1494 
1495  if (CI->getNumArgOperands() == 4)
1496  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1497  CI->getArgOperand(2));
1498  } else if (IsX86 && (Name == "sse2.pshufl.w" ||
1499  Name.startswith("avx512.mask.pshufl.w."))) {
1500  Value *Op0 = CI->getArgOperand(0);
1501  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1502  unsigned NumElts = CI->getType()->getVectorNumElements();
1503 
1504  SmallVector<uint32_t, 16> Idxs(NumElts);
1505  for (unsigned l = 0; l != NumElts; l += 8) {
1506  for (unsigned i = 0; i != 4; ++i)
1507  Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l;
1508  for (unsigned i = 4; i != 8; ++i)
1509  Idxs[i + l] = i + l;
1510  }
1511 
1512  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1513 
1514  if (CI->getNumArgOperands() == 4)
1515  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1516  CI->getArgOperand(2));
1517  } else if (IsX86 && (Name == "sse2.pshufh.w" ||
1518  Name.startswith("avx512.mask.pshufh.w."))) {
1519  Value *Op0 = CI->getArgOperand(0);
1520  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1521  unsigned NumElts = CI->getType()->getVectorNumElements();
1522 
1523  SmallVector<uint32_t, 16> Idxs(NumElts);
1524  for (unsigned l = 0; l != NumElts; l += 8) {
1525  for (unsigned i = 0; i != 4; ++i)
1526  Idxs[i + l] = i + l;
1527  for (unsigned i = 0; i != 4; ++i)
1528  Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l;
1529  }
1530 
1531  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1532 
1533  if (CI->getNumArgOperands() == 4)
1534  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1535  CI->getArgOperand(2));
1536  } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) {
1537  Value *Op0 = CI->getArgOperand(0);
1538  Value *Op1 = CI->getArgOperand(1);
1539  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1540  unsigned NumElts = CI->getType()->getVectorNumElements();
1541 
1542  unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1543  unsigned HalfLaneElts = NumLaneElts / 2;
1544 
1545  SmallVector<uint32_t, 16> Idxs(NumElts);
1546  for (unsigned i = 0; i != NumElts; ++i) {
1547  // Base index is the starting element of the lane.
1548  Idxs[i] = i - (i % NumLaneElts);
1549  // If we are half way through the lane switch to the other source.
1550  if ((i % NumLaneElts) >= HalfLaneElts)
1551  Idxs[i] += NumElts;
1552  // Now select the specific element. By adding HalfLaneElts bits from
1553  // the immediate. Wrapping around the immediate every 8-bits.
1554  Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1);
1555  }
1556 
1557  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1558 
1559  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
1560  CI->getArgOperand(3));
1561  } else if (IsX86 && (Name.startswith("avx512.mask.movddup") ||
1562  Name.startswith("avx512.mask.movshdup") ||
1563  Name.startswith("avx512.mask.movsldup"))) {
1564  Value *Op0 = CI->getArgOperand(0);
1565  unsigned NumElts = CI->getType()->getVectorNumElements();
1566  unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1567 
1568  unsigned Offset = 0;
1569  if (Name.startswith("avx512.mask.movshdup."))
1570  Offset = 1;
1571 
1572  SmallVector<uint32_t, 16> Idxs(NumElts);
1573  for (unsigned l = 0; l != NumElts; l += NumLaneElts)
1574  for (unsigned i = 0; i != NumLaneElts; i += 2) {
1575  Idxs[i + l + 0] = i + l + Offset;
1576  Idxs[i + l + 1] = i + l + Offset;
1577  }
1578 
1579  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1580 
1581  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1582  CI->getArgOperand(1));
1583  } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") ||
1584  Name.startswith("avx512.mask.unpckl."))) {
1585  Value *Op0 = CI->getArgOperand(0);
1586  Value *Op1 = CI->getArgOperand(1);
1587  int NumElts = CI->getType()->getVectorNumElements();
1588  int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1589 
1590  SmallVector<uint32_t, 64> Idxs(NumElts);
1591  for (int l = 0; l != NumElts; l += NumLaneElts)
1592  for (int i = 0; i != NumLaneElts; ++i)
1593  Idxs[i + l] = l + (i / 2) + NumElts * (i % 2);
1594 
1595  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1596 
1597  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1598  CI->getArgOperand(2));
1599  } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") ||
1600  Name.startswith("avx512.mask.unpckh."))) {
1601  Value *Op0 = CI->getArgOperand(0);
1602  Value *Op1 = CI->getArgOperand(1);
1603  int NumElts = CI->getType()->getVectorNumElements();
1604  int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1605 
1606  SmallVector<uint32_t, 64> Idxs(NumElts);
1607  for (int l = 0; l != NumElts; l += NumLaneElts)
1608  for (int i = 0; i != NumLaneElts; ++i)
1609  Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2);
1610 
1611  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1612 
1613  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1614  CI->getArgOperand(2));
1615  } else if (IsX86 && Name.startswith("avx512.mask.pand.")) {
1616  Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1));
1617  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1618  CI->getArgOperand(2));
1619  } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) {
1620  Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)),
1621  CI->getArgOperand(1));
1622  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1623  CI->getArgOperand(2));
1624  } else if (IsX86 && Name.startswith("avx512.mask.por.")) {
1625  Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1));
1626  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1627  CI->getArgOperand(2));
1628  } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) {
1629  Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1));
1630  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1631  CI->getArgOperand(2));
1632  } else if (IsX86 && Name.startswith("avx512.mask.and.")) {
1633  VectorType *FTy = cast<VectorType>(CI->getType());
1634  VectorType *ITy = VectorType::getInteger(FTy);
1635  Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
1636  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1637  Rep = Builder.CreateBitCast(Rep, FTy);
1638  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1639  CI->getArgOperand(2));
1640  } else if (IsX86 && Name.startswith("avx512.mask.andn.")) {
1641  VectorType *FTy = cast<VectorType>(CI->getType());
1642  VectorType *ITy = VectorType::getInteger(FTy);
1643  Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy));
1644  Rep = Builder.CreateAnd(Rep,
1645  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1646  Rep = Builder.CreateBitCast(Rep, FTy);
1647  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1648  CI->getArgOperand(2));
1649  } else if (IsX86 && Name.startswith("avx512.mask.or.")) {
1650  VectorType *FTy = cast<VectorType>(CI->getType());
1651  VectorType *ITy = VectorType::getInteger(FTy);
1652  Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
1653  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1654  Rep = Builder.CreateBitCast(Rep, FTy);
1655  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1656  CI->getArgOperand(2));
1657  } else if (IsX86 && Name.startswith("avx512.mask.xor.")) {
1658  VectorType *FTy = cast<VectorType>(CI->getType());
1659  VectorType *ITy = VectorType::getInteger(FTy);
1660  Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
1661  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1662  Rep = Builder.CreateBitCast(Rep, FTy);
1663  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1664  CI->getArgOperand(2));
1665  } else if (IsX86 && Name.startswith("avx512.mask.padd.")) {
1666  Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1));
1667  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1668  CI->getArgOperand(2));
1669  } else if (IsX86 && Name.startswith("avx512.mask.psub.")) {
1670  Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1));
1671  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1672  CI->getArgOperand(2));
1673  } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) {
1674  Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1));
1675  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1676  CI->getArgOperand(2));
1677  } else if (IsX86 && (Name.startswith("avx512.mask.add.p"))) {
1678  Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1));
1679  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1680  CI->getArgOperand(2));
1681  } else if (IsX86 && Name.startswith("avx512.mask.div.p")) {
1682  Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1));
1683  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1684  CI->getArgOperand(2));
1685  } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) {
1686  Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1));
1687  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1688  CI->getArgOperand(2));
1689  } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) {
1690  Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1));
1691  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1692  CI->getArgOperand(2));
1693  } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) {
1694  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
1695  Intrinsic::ctlz,
1696  CI->getType()),
1697  { CI->getArgOperand(0), Builder.getInt1(false) });
1698  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1699  CI->getArgOperand(1));
1700  } else if (IsX86 && (Name.startswith("avx512.mask.max.p") ||
1701  Name.startswith("avx512.mask.min.p"))) {
1702  bool IsMin = Name[13] == 'i';
1703  VectorType *VecTy = cast<VectorType>(CI->getType());
1704  unsigned VecWidth = VecTy->getPrimitiveSizeInBits();
1705  unsigned EltWidth = VecTy->getScalarSizeInBits();
1706  Intrinsic::ID IID;
1707  if (!IsMin && VecWidth == 128 && EltWidth == 32)
1708  IID = Intrinsic::x86_sse_max_ps;
1709  else if (!IsMin && VecWidth == 128 && EltWidth == 64)
1710  IID = Intrinsic::x86_sse2_max_pd;
1711  else if (!IsMin && VecWidth == 256 && EltWidth == 32)
1712  IID = Intrinsic::x86_avx_max_ps_256;
1713  else if (!IsMin && VecWidth == 256 && EltWidth == 64)
1714  IID = Intrinsic::x86_avx_max_pd_256;
1715  else if (IsMin && VecWidth == 128 && EltWidth == 32)
1716  IID = Intrinsic::x86_sse_min_ps;
1717  else if (IsMin && VecWidth == 128 && EltWidth == 64)
1718  IID = Intrinsic::x86_sse2_min_pd;
1719  else if (IsMin && VecWidth == 256 && EltWidth == 32)
1720  IID = Intrinsic::x86_avx_min_ps_256;
1721  else if (IsMin && VecWidth == 256 && EltWidth == 64)
1722  IID = Intrinsic::x86_avx_min_pd_256;
1723  else
1724  llvm_unreachable("Unexpected intrinsic");
1725 
1726  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1727  { CI->getArgOperand(0), CI->getArgOperand(1) });
1728  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1729  CI->getArgOperand(2));
1730  } else if (IsX86 && Name.startswith("avx512.mask.pshuf.b.")) {
1731  VectorType *VecTy = cast<VectorType>(CI->getType());
1732  Intrinsic::ID IID;
1733  if (VecTy->getPrimitiveSizeInBits() == 128)
1734  IID = Intrinsic::x86_ssse3_pshuf_b_128;
1735  else if (VecTy->getPrimitiveSizeInBits() == 256)
1736  IID = Intrinsic::x86_avx2_pshuf_b;
1737  else if (VecTy->getPrimitiveSizeInBits() == 512)
1738  IID = Intrinsic::x86_avx512_pshuf_b_512;
1739  else
1740  llvm_unreachable("Unexpected intrinsic");
1741 
1742  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1743  { CI->getArgOperand(0), CI->getArgOperand(1) });
1744  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1745  CI->getArgOperand(2));
1746  } else if (IsX86 && (Name.startswith("avx512.mask.pmul.dq.") ||
1747  Name.startswith("avx512.mask.pmulu.dq."))) {
1748  bool IsUnsigned = Name[16] == 'u';
1749  VectorType *VecTy = cast<VectorType>(CI->getType());
1750  Intrinsic::ID IID;
1751  if (!IsUnsigned && VecTy->getPrimitiveSizeInBits() == 128)
1752  IID = Intrinsic::x86_sse41_pmuldq;
1753  else if (!IsUnsigned && VecTy->getPrimitiveSizeInBits() == 256)
1754  IID = Intrinsic::x86_avx2_pmul_dq;
1755  else if (!IsUnsigned && VecTy->getPrimitiveSizeInBits() == 512)
1756  IID = Intrinsic::x86_avx512_pmul_dq_512;
1757  else if (IsUnsigned && VecTy->getPrimitiveSizeInBits() == 128)
1758  IID = Intrinsic::x86_sse2_pmulu_dq;
1759  else if (IsUnsigned && VecTy->getPrimitiveSizeInBits() == 256)
1760  IID = Intrinsic::x86_avx2_pmulu_dq;
1761  else if (IsUnsigned && VecTy->getPrimitiveSizeInBits() == 512)
1762  IID = Intrinsic::x86_avx512_pmulu_dq_512;
1763  else
1764  llvm_unreachable("Unexpected intrinsic");
1765 
1766  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1767  { CI->getArgOperand(0), CI->getArgOperand(1) });
1768  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1769  CI->getArgOperand(2));
1770  } else if (IsX86 && Name.startswith("avx512.mask.pack")) {
1771  bool IsUnsigned = Name[16] == 'u';
1772  bool IsDW = Name[18] == 'd';
1773  VectorType *VecTy = cast<VectorType>(CI->getType());
1774  Intrinsic::ID IID;
1775  if (!IsUnsigned && !IsDW && VecTy->getPrimitiveSizeInBits() == 128)
1776  IID = Intrinsic::x86_sse2_packsswb_128;
1777  else if (!IsUnsigned && !IsDW && VecTy->getPrimitiveSizeInBits() == 256)
1778  IID = Intrinsic::x86_avx2_packsswb;
1779  else if (!IsUnsigned && !IsDW && VecTy->getPrimitiveSizeInBits() == 512)
1780  IID = Intrinsic::x86_avx512_packsswb_512;
1781  else if (!IsUnsigned && IsDW && VecTy->getPrimitiveSizeInBits() == 128)
1782  IID = Intrinsic::x86_sse2_packssdw_128;
1783  else if (!IsUnsigned && IsDW && VecTy->getPrimitiveSizeInBits() == 256)
1784  IID = Intrinsic::x86_avx2_packssdw;
1785  else if (!IsUnsigned && IsDW && VecTy->getPrimitiveSizeInBits() == 512)
1786  IID = Intrinsic::x86_avx512_packssdw_512;
1787  else if (IsUnsigned && !IsDW && VecTy->getPrimitiveSizeInBits() == 128)
1788  IID = Intrinsic::x86_sse2_packuswb_128;
1789  else if (IsUnsigned && !IsDW && VecTy->getPrimitiveSizeInBits() == 256)
1790  IID = Intrinsic::x86_avx2_packuswb;
1791  else if (IsUnsigned && !IsDW && VecTy->getPrimitiveSizeInBits() == 512)
1792  IID = Intrinsic::x86_avx512_packuswb_512;
1793  else if (IsUnsigned && IsDW && VecTy->getPrimitiveSizeInBits() == 128)
1794  IID = Intrinsic::x86_sse41_packusdw;
1795  else if (IsUnsigned && IsDW && VecTy->getPrimitiveSizeInBits() == 256)
1796  IID = Intrinsic::x86_avx2_packusdw;
1797  else if (IsUnsigned && IsDW && VecTy->getPrimitiveSizeInBits() == 512)
1798  IID = Intrinsic::x86_avx512_packusdw_512;
1799  else
1800  llvm_unreachable("Unexpected intrinsic");
1801 
1802  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1803  { CI->getArgOperand(0), CI->getArgOperand(1) });
1804  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1805  CI->getArgOperand(2));
1806  } else if (IsX86 && Name.startswith("avx512.mask.psll")) {
1807  bool IsImmediate = Name[16] == 'i' ||
1808  (Name.size() > 18 && Name[18] == 'i');
1809  bool IsVariable = Name[16] == 'v';
1810  char Size = Name[16] == '.' ? Name[17] :
1811  Name[17] == '.' ? Name[18] :
1812  Name[18] == '.' ? Name[19] :
1813  Name[20];
1814 
1815  Intrinsic::ID IID;
1816  if (IsVariable && Name[17] != '.') {
1817  if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di
1818  IID = Intrinsic::x86_avx2_psllv_q;
1819  else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di
1820  IID = Intrinsic::x86_avx2_psllv_q_256;
1821  else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si
1822  IID = Intrinsic::x86_avx2_psllv_d;
1823  else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si
1824  IID = Intrinsic::x86_avx2_psllv_d_256;
1825  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi
1826  IID = Intrinsic::x86_avx512_psllv_w_128;
1827  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi
1828  IID = Intrinsic::x86_avx512_psllv_w_256;
1829  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi
1830  IID = Intrinsic::x86_avx512_psllv_w_512;
1831  else
1832  llvm_unreachable("Unexpected size");
1833  } else if (Name.endswith(".128")) {
1834  if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128
1835  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d
1836  : Intrinsic::x86_sse2_psll_d;
1837  else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128
1838  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q
1839  : Intrinsic::x86_sse2_psll_q;
1840  else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128
1841  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w
1842  : Intrinsic::x86_sse2_psll_w;
1843  else
1844  llvm_unreachable("Unexpected size");
1845  } else if (Name.endswith(".256")) {
1846  if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256
1847  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d
1848  : Intrinsic::x86_avx2_psll_d;
1849  else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256
1850  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q
1851  : Intrinsic::x86_avx2_psll_q;
1852  else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256
1853  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w
1854  : Intrinsic::x86_avx2_psll_w;
1855  else
1856  llvm_unreachable("Unexpected size");
1857  } else {
1858  if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512
1859  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 :
1860  IsVariable ? Intrinsic::x86_avx512_psllv_d_512 :
1861  Intrinsic::x86_avx512_psll_d_512;
1862  else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512
1863  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 :
1864  IsVariable ? Intrinsic::x86_avx512_psllv_q_512 :
1865  Intrinsic::x86_avx512_psll_q_512;
1866  else if (Size == 'w') // psll.wi.512, pslli.w, psll.w
1867  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512
1868  : Intrinsic::x86_avx512_psll_w_512;
1869  else
1870  llvm_unreachable("Unexpected size");
1871  }
1872 
1873  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
1874  } else if (IsX86 && Name.startswith("avx512.mask.psrl")) {
1875  bool IsImmediate = Name[16] == 'i' ||
1876  (Name.size() > 18 && Name[18] == 'i');
1877  bool IsVariable = Name[16] == 'v';
1878  char Size = Name[16] == '.' ? Name[17] :
1879  Name[17] == '.' ? Name[18] :
1880  Name[18] == '.' ? Name[19] :
1881  Name[20];
1882 
1883  Intrinsic::ID IID;
1884  if (IsVariable && Name[17] != '.') {
1885  if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di
1886  IID = Intrinsic::x86_avx2_psrlv_q;
1887  else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di
1888  IID = Intrinsic::x86_avx2_psrlv_q_256;
1889  else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si
1890  IID = Intrinsic::x86_avx2_psrlv_d;
1891  else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si
1892  IID = Intrinsic::x86_avx2_psrlv_d_256;
1893  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi
1894  IID = Intrinsic::x86_avx512_psrlv_w_128;
1895  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi
1896  IID = Intrinsic::x86_avx512_psrlv_w_256;
1897  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi
1898  IID = Intrinsic::x86_avx512_psrlv_w_512;
1899  else
1900  llvm_unreachable("Unexpected size");
1901  } else if (Name.endswith(".128")) {
1902  if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128
1903  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d
1904  : Intrinsic::x86_sse2_psrl_d;
1905  else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128
1906  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q
1907  : Intrinsic::x86_sse2_psrl_q;
1908  else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128
1909  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w
1910  : Intrinsic::x86_sse2_psrl_w;
1911  else
1912  llvm_unreachable("Unexpected size");
1913  } else if (Name.endswith(".256")) {
1914  if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256
1915  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d
1916  : Intrinsic::x86_avx2_psrl_d;
1917  else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256
1918  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q
1919  : Intrinsic::x86_avx2_psrl_q;
1920  else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256
1921  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w
1922  : Intrinsic::x86_avx2_psrl_w;
1923  else
1924  llvm_unreachable("Unexpected size");
1925  } else {
1926  if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512
1927  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 :
1928  IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 :
1929  Intrinsic::x86_avx512_psrl_d_512;
1930  else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512
1931  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 :
1932  IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 :
1933  Intrinsic::x86_avx512_psrl_q_512;
1934  else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w)
1935  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512
1936  : Intrinsic::x86_avx512_psrl_w_512;
1937  else
1938  llvm_unreachable("Unexpected size");
1939  }
1940 
1941  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
1942  } else if (IsX86 && Name.startswith("avx512.mask.psra")) {
1943  bool IsImmediate = Name[16] == 'i' ||
1944  (Name.size() > 18 && Name[18] == 'i');
1945  bool IsVariable = Name[16] == 'v';
1946  char Size = Name[16] == '.' ? Name[17] :
1947  Name[17] == '.' ? Name[18] :
1948  Name[18] == '.' ? Name[19] :
1949  Name[20];
1950 
1951  Intrinsic::ID IID;
1952  if (IsVariable && Name[17] != '.') {
1953  if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si
1954  IID = Intrinsic::x86_avx2_psrav_d;
1955  else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si
1956  IID = Intrinsic::x86_avx2_psrav_d_256;
1957  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi
1958  IID = Intrinsic::x86_avx512_psrav_w_128;
1959  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi
1960  IID = Intrinsic::x86_avx512_psrav_w_256;
1961  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi
1962  IID = Intrinsic::x86_avx512_psrav_w_512;
1963  else
1964  llvm_unreachable("Unexpected size");
1965  } else if (Name.endswith(".128")) {
1966  if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128
1967  IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d
1968  : Intrinsic::x86_sse2_psra_d;
1969  else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128
1970  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 :
1971  IsVariable ? Intrinsic::x86_avx512_psrav_q_128 :
1972  Intrinsic::x86_avx512_psra_q_128;
1973  else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128
1974  IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w
1975  : Intrinsic::x86_sse2_psra_w;
1976  else
1977  llvm_unreachable("Unexpected size");
1978  } else if (Name.endswith(".256")) {
1979  if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256
1980  IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d
1981  : Intrinsic::x86_avx2_psra_d;
1982  else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256
1983  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 :
1984  IsVariable ? Intrinsic::x86_avx512_psrav_q_256 :
1985  Intrinsic::x86_avx512_psra_q_256;
1986  else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256
1987  IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w
1988  : Intrinsic::x86_avx2_psra_w;
1989  else
1990  llvm_unreachable("Unexpected size");
1991  } else {
1992  if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512
1993  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 :
1994  IsVariable ? Intrinsic::x86_avx512_psrav_d_512 :
1995  Intrinsic::x86_avx512_psra_d_512;
1996  else if (Size == 'q') // psra.qi.512, psrai.q, psra.q
1997  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 :
1998  IsVariable ? Intrinsic::x86_avx512_psrav_q_512 :
1999  Intrinsic::x86_avx512_psra_q_512;
2000  else if (Size == 'w') // psra.wi.512, psrai.w, psra.w
2001  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512
2002  : Intrinsic::x86_avx512_psra_w_512;
2003  else
2004  llvm_unreachable("Unexpected size");
2005  }
2006 
2007  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
2008  } else if (IsX86 && Name.startswith("avx512.mask.move.s")) {
2009  Rep = upgradeMaskedMove(Builder, *CI);
2010  } else if (IsX86 && Name.startswith("avx512.cvtmask2")) {
2011  Rep = UpgradeMaskToInt(Builder, *CI);
2012  } else if (IsX86 && Name.startswith("avx512.mask.vpermilvar.")) {
2013  Intrinsic::ID IID;
2014  if (Name.endswith("ps.128"))
2015  IID = Intrinsic::x86_avx_vpermilvar_ps;
2016  else if (Name.endswith("pd.128"))
2017  IID = Intrinsic::x86_avx_vpermilvar_pd;
2018  else if (Name.endswith("ps.256"))
2019  IID = Intrinsic::x86_avx_vpermilvar_ps_256;
2020  else if (Name.endswith("pd.256"))
2021  IID = Intrinsic::x86_avx_vpermilvar_pd_256;
2022  else if (Name.endswith("ps.512"))
2023  IID = Intrinsic::x86_avx512_vpermilvar_ps_512;
2024  else if (Name.endswith("pd.512"))
2025  IID = Intrinsic::x86_avx512_vpermilvar_pd_512;
2026  else
2027  llvm_unreachable("Unexpected vpermilvar intrinsic");
2028 
2029  Function *Intrin = Intrinsic::getDeclaration(F->getParent(), IID);
2030  Rep = Builder.CreateCall(Intrin,
2031  { CI->getArgOperand(0), CI->getArgOperand(1) });
2032  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2033  CI->getArgOperand(2));
2034  } else if (IsX86 && Name.endswith(".movntdqa")) {
2035  Module *M = F->getParent();
2036  MDNode *Node = MDNode::get(
2038 
2039  Value *Ptr = CI->getArgOperand(0);
2040  VectorType *VTy = cast<VectorType>(CI->getType());
2041 
2042  // Convert the type of the pointer to a pointer to the stored type.
2043  Value *BC =
2044  Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast");
2045  LoadInst *LI = Builder.CreateAlignedLoad(BC, VTy->getBitWidth() / 8);
2046  LI->setMetadata(M->getMDKindID("nontemporal"), Node);
2047  Rep = LI;
2048  } else if (IsX86 &&
2049  (Name.startswith("sse2.pavg") || Name.startswith("avx2.pavg") ||
2050  Name.startswith("avx512.mask.pavg"))) {
2051  // llvm.x86.sse2.pavg.b/w, llvm.x86.avx2.pavg.b/w,
2052  // llvm.x86.avx512.mask.pavg.b/w
2053  Value *A = CI->getArgOperand(0);
2054  Value *B = CI->getArgOperand(1);
2056  cast<VectorType>(A->getType()));
2057  Value *ExtendedA = Builder.CreateZExt(A, ZextType);
2058  Value *ExtendedB = Builder.CreateZExt(B, ZextType);
2059  Value *Sum = Builder.CreateAdd(ExtendedA, ExtendedB);
2060  Value *AddOne = Builder.CreateAdd(Sum, ConstantInt::get(ZextType, 1));
2061  Value *ShiftR = Builder.CreateLShr(AddOne, ConstantInt::get(ZextType, 1));
2062  Rep = Builder.CreateTrunc(ShiftR, A->getType());
2063  if (CI->getNumArgOperands() > 2) {
2064  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2065  CI->getArgOperand(2));
2066  }
2067  } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) {
2068  Value *Arg = CI->getArgOperand(0);
2069  Value *Neg = Builder.CreateNeg(Arg, "neg");
2070  Value *Cmp = Builder.CreateICmpSGE(
2071  Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond");
2072  Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs");
2073  } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" ||
2074  Name == "max.ui" || Name == "max.ull")) {
2075  Value *Arg0 = CI->getArgOperand(0);
2076  Value *Arg1 = CI->getArgOperand(1);
2077  Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
2078  ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond")
2079  : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond");
2080  Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max");
2081  } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" ||
2082  Name == "min.ui" || Name == "min.ull")) {
2083  Value *Arg0 = CI->getArgOperand(0);
2084  Value *Arg1 = CI->getArgOperand(1);
2085  Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
2086  ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond")
2087  : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond");
2088  Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min");
2089  } else if (IsNVVM && Name == "clz.ll") {
2090  // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64.
2091  Value *Arg = CI->getArgOperand(0);
2092  Value *Ctlz = Builder.CreateCall(
2093  Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
2094  {Arg->getType()}),
2095  {Arg, Builder.getFalse()}, "ctlz");
2096  Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc");
2097  } else if (IsNVVM && Name == "popc.ll") {
2098  // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an
2099  // i64.
2100  Value *Arg = CI->getArgOperand(0);
2101  Value *Popc = Builder.CreateCall(
2102  Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
2103  {Arg->getType()}),
2104  Arg, "ctpop");
2105  Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc");
2106  } else if (IsNVVM && Name == "h2f") {
2107  Rep = Builder.CreateCall(Intrinsic::getDeclaration(
2108  F->getParent(), Intrinsic::convert_from_fp16,
2109  {Builder.getFloatTy()}),
2110  CI->getArgOperand(0), "h2f");
2111  } else {
2112  llvm_unreachable("Unknown function for CallInst upgrade.");
2113  }
2114 
2115  if (Rep)
2116  CI->replaceAllUsesWith(Rep);
2117  CI->eraseFromParent();
2118  return;
2119  }
2120 
2121  CallInst *NewCall = nullptr;
2122  switch (NewFn->getIntrinsicID()) {
2123  default: {
2124  // Handle generic mangling change, but nothing else
2125  assert(
2126  (CI->getCalledFunction()->getName() != NewFn->getName()) &&
2127  "Unknown function for CallInst upgrade and isn't just a name change");
2128  CI->setCalledFunction(NewFn);
2129  return;
2130  }
2131 
2132  case Intrinsic::arm_neon_vld1:
2133  case Intrinsic::arm_neon_vld2:
2134  case Intrinsic::arm_neon_vld3:
2135  case Intrinsic::arm_neon_vld4:
2136  case Intrinsic::arm_neon_vld2lane:
2137  case Intrinsic::arm_neon_vld3lane:
2138  case Intrinsic::arm_neon_vld4lane:
2139  case Intrinsic::arm_neon_vst1:
2140  case Intrinsic::arm_neon_vst2:
2141  case Intrinsic::arm_neon_vst3:
2142  case Intrinsic::arm_neon_vst4:
2143  case Intrinsic::arm_neon_vst2lane:
2144  case Intrinsic::arm_neon_vst3lane:
2145  case Intrinsic::arm_neon_vst4lane: {
2147  CI->arg_operands().end());
2148  NewCall = Builder.CreateCall(NewFn, Args);
2149  break;
2150  }
2151 
2152  case Intrinsic::bitreverse:
2153  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
2154  break;
2155 
2156  case Intrinsic::ctlz:
2157  case Intrinsic::cttz:
2158  assert(CI->getNumArgOperands() == 1 &&
2159  "Mismatch between function args and call args");
2160  NewCall =
2161  Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()});
2162  break;
2163 
2164  case Intrinsic::objectsize: {
2165  Value *NullIsUnknownSize = CI->getNumArgOperands() == 2
2166  ? Builder.getFalse()
2167  : CI->getArgOperand(2);
2168  NewCall = Builder.CreateCall(
2169  NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize});
2170  break;
2171  }
2172 
2173  case Intrinsic::ctpop:
2174  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
2175  break;
2176 
2177  case Intrinsic::convert_from_fp16:
2178  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
2179  break;
2180 
2181  case Intrinsic::dbg_value:
2182  // Upgrade from the old version that had an extra offset argument.
2183  assert(CI->getNumArgOperands() == 4);
2184  // Drop nonzero offsets instead of attempting to upgrade them.
2185  if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1)))
2186  if (Offset->isZeroValue()) {
2187  NewCall = Builder.CreateCall(
2188  NewFn,
2189  {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)});
2190  break;
2191  }
2192  CI->eraseFromParent();
2193  return;
2194 
2195  case Intrinsic::x86_xop_vfrcz_ss:
2196  case Intrinsic::x86_xop_vfrcz_sd:
2197  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)});
2198  break;
2199 
2200  case Intrinsic::x86_xop_vpermil2pd:
2201  case Intrinsic::x86_xop_vpermil2ps:
2202  case Intrinsic::x86_xop_vpermil2pd_256:
2203  case Intrinsic::x86_xop_vpermil2ps_256: {
2205  CI->arg_operands().end());
2206  VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType());
2207  VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy);
2208  Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy);
2209  NewCall = Builder.CreateCall(NewFn, Args);
2210  break;
2211  }
2212 
2213  case Intrinsic::x86_sse41_ptestc:
2214  case Intrinsic::x86_sse41_ptestz:
2215  case Intrinsic::x86_sse41_ptestnzc: {
2216  // The arguments for these intrinsics used to be v4f32, and changed
2217  // to v2i64. This is purely a nop, since those are bitwise intrinsics.
2218  // So, the only thing required is a bitcast for both arguments.
2219  // First, check the arguments have the old type.
2220  Value *Arg0 = CI->getArgOperand(0);
2221  if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4))
2222  return;
2223 
2224  // Old intrinsic, add bitcasts
2225  Value *Arg1 = CI->getArgOperand(1);
2226 
2227  Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
2228 
2229  Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast");
2230  Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
2231 
2232  NewCall = Builder.CreateCall(NewFn, {BC0, BC1});
2233  break;
2234  }
2235 
2236  case Intrinsic::x86_sse41_insertps:
2237  case Intrinsic::x86_sse41_dppd:
2238  case Intrinsic::x86_sse41_dpps:
2239  case Intrinsic::x86_sse41_mpsadbw:
2240  case Intrinsic::x86_avx_dp_ps_256:
2241  case Intrinsic::x86_avx2_mpsadbw: {
2242  // Need to truncate the last argument from i32 to i8 -- this argument models
2243  // an inherently 8-bit immediate operand to these x86 instructions.
2245  CI->arg_operands().end());
2246 
2247  // Replace the last argument with a trunc.
2248  Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc");
2249  NewCall = Builder.CreateCall(NewFn, Args);
2250  break;
2251  }
2252 
2253  case Intrinsic::thread_pointer: {
2254  NewCall = Builder.CreateCall(NewFn, {});
2255  break;
2256  }
2257 
2258  case Intrinsic::invariant_start:
2259  case Intrinsic::invariant_end:
2260  case Intrinsic::masked_load:
2261  case Intrinsic::masked_store:
2262  case Intrinsic::masked_gather:
2263  case Intrinsic::masked_scatter: {
2265  CI->arg_operands().end());
2266  NewCall = Builder.CreateCall(NewFn, Args);
2267  break;
2268  }
2269  }
2270  assert(NewCall && "Should have either set this variable or returned through "
2271  "the default case");
2272  std::string Name = CI->getName();
2273  if (!Name.empty()) {
2274  CI->setName(Name + ".old");
2275  NewCall->setName(Name);
2276  }
2277  CI->replaceAllUsesWith(NewCall);
2278  CI->eraseFromParent();
2279 }
2280 
2282  assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
2283 
2284  // Check if this function should be upgraded and get the replacement function
2285  // if there is one.
2286  Function *NewFn;
2287  if (UpgradeIntrinsicFunction(F, NewFn)) {
2288  // Replace all users of the old function with the new function or new
2289  // instructions. This is not a range loop because the call is deleted.
2290  for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; )
2291  if (CallInst *CI = dyn_cast<CallInst>(*UI++))
2292  UpgradeIntrinsicCall(CI, NewFn);
2293 
2294  // Remove old function, no longer used, from the module.
2295  F->eraseFromParent();
2296  }
2297 }
2298 
2300  // Check if the tag uses struct-path aware TBAA format.
2301  if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3)
2302  return &MD;
2303 
2304  auto &Context = MD.getContext();
2305  if (MD.getNumOperands() == 3) {
2306  Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)};
2307  MDNode *ScalarType = MDNode::get(Context, Elts);
2308  // Create a MDNode <ScalarType, ScalarType, offset 0, const>
2309  Metadata *Elts2[] = {ScalarType, ScalarType,
2312  MD.getOperand(2)};
2313  return MDNode::get(Context, Elts2);
2314  }
2315  // Create a MDNode <MD, MD, offset 0>
2318  return MDNode::get(Context, Elts);
2319 }
2320 
2321 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy,
2322  Instruction *&Temp) {
2323  if (Opc != Instruction::BitCast)
2324  return nullptr;
2325 
2326  Temp = nullptr;
2327  Type *SrcTy = V->getType();
2328  if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
2329  SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
2330  LLVMContext &Context = V->getContext();
2331 
2332  // We have no information about target data layout, so we assume that
2333  // the maximum pointer size is 64bit.
2334  Type *MidTy = Type::getInt64Ty(Context);
2335  Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy);
2336 
2337  return CastInst::Create(Instruction::IntToPtr, Temp, DestTy);
2338  }
2339 
2340  return nullptr;
2341 }
2342 
2343 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) {
2344  if (Opc != Instruction::BitCast)
2345  return nullptr;
2346 
2347  Type *SrcTy = C->getType();
2348  if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
2349  SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
2350  LLVMContext &Context = C->getContext();
2351 
2352  // We have no information about target data layout, so we assume that
2353  // the maximum pointer size is 64bit.
2354  Type *MidTy = Type::getInt64Ty(Context);
2355 
2357  DestTy);
2358  }
2359 
2360  return nullptr;
2361 }
2362 
2363 /// Check the debug info version number, if it is out-dated, drop the debug
2364 /// info. Return true if module is modified.
2367  if (Version == DEBUG_METADATA_VERSION)
2368  return false;
2369 
2370  bool RetCode = StripDebugInfo(M);
2371  if (RetCode) {
2372  DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version);
2373  M.getContext().diagnose(DiagVersion);
2374  }
2375  return RetCode;
2376 }
2377 
2379  NamedMDNode *ModFlags = M.getModuleFlagsMetadata();
2380  if (!ModFlags)
2381  return false;
2382 
2383  bool HasObjCFlag = false, HasClassProperties = false, Changed = false;
2384  for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) {
2385  MDNode *Op = ModFlags->getOperand(I);
2386  if (Op->getNumOperands() != 3)
2387  continue;
2388  MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1));
2389  if (!ID)
2390  continue;
2391  if (ID->getString() == "Objective-C Image Info Version")
2392  HasObjCFlag = true;
2393  if (ID->getString() == "Objective-C Class Properties")
2394  HasClassProperties = true;
2395  // Upgrade PIC/PIE Module Flags. The module flag behavior for these two
2396  // field was Error and now they are Max.
2397  if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") {
2398  if (auto *Behavior =
2399  mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) {
2400  if (Behavior->getLimitedValue() == Module::Error) {
2402  Metadata *Ops[3] = {
2404  MDString::get(M.getContext(), ID->getString()),
2405  Op->getOperand(2)};
2406  ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
2407  Changed = true;
2408  }
2409  }
2410  }
2411  // Upgrade Objective-C Image Info Section. Removed the whitespce in the
2412  // section name so that llvm-lto will not complain about mismatching
2413  // module flags that is functionally the same.
2414  if (ID->getString() == "Objective-C Image Info Section") {
2415  if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) {
2416  SmallVector<StringRef, 4> ValueComp;
2417  Value->getString().split(ValueComp, " ");
2418  if (ValueComp.size() != 1) {
2419  std::string NewValue;
2420  for (auto &S : ValueComp)
2421  NewValue += S.str();
2422  Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1),
2423  MDString::get(M.getContext(), NewValue)};
2424  ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
2425  Changed = true;
2426  }
2427  }
2428  }
2429  }
2430 
2431  // "Objective-C Class Properties" is recently added for Objective-C. We
2432  // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module
2433  // flag of value 0, so we can correclty downgrade this flag when trying to
2434  // link an ObjC bitcode without this module flag with an ObjC bitcode with
2435  // this module flag.
2436  if (HasObjCFlag && !HasClassProperties) {
2437  M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties",
2438  (uint32_t)0);
2439  Changed = true;
2440  }
2441 
2442  return Changed;
2443 }
2444 
2445 static bool isOldLoopArgument(Metadata *MD) {
2446  auto *T = dyn_cast_or_null<MDTuple>(MD);
2447  if (!T)
2448  return false;
2449  if (T->getNumOperands() < 1)
2450  return false;
2451  auto *S = dyn_cast_or_null<MDString>(T->getOperand(0));
2452  if (!S)
2453  return false;
2454  return S->getString().startswith("llvm.vectorizer.");
2455 }
2456 
2458  StringRef OldPrefix = "llvm.vectorizer.";
2459  assert(OldTag.startswith(OldPrefix) && "Expected old prefix");
2460 
2461  if (OldTag == "llvm.vectorizer.unroll")
2462  return MDString::get(C, "llvm.loop.interleave.count");
2463 
2464  return MDString::get(
2465  C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size()))
2466  .str());
2467 }
2468 
2470  auto *T = dyn_cast_or_null<MDTuple>(MD);
2471  if (!T)
2472  return MD;
2473  if (T->getNumOperands() < 1)
2474  return MD;
2475  auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0));
2476  if (!OldTag)
2477  return MD;
2478  if (!OldTag->getString().startswith("llvm.vectorizer."))
2479  return MD;
2480 
2481  // This has an old tag. Upgrade it.
2483  Ops.reserve(T->getNumOperands());
2484  Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString()));
2485  for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I)
2486  Ops.push_back(T->getOperand(I));
2487 
2488  return MDTuple::get(T->getContext(), Ops);
2489 }
2490 
2492  auto *T = dyn_cast<MDTuple>(&N);
2493  if (!T)
2494  return &N;
2495 
2496  if (none_of(T->operands(), isOldLoopArgument))
2497  return &N;
2498 
2500  Ops.reserve(T->getNumOperands());
2501  for (Metadata *MD : T->operands())
2502  Ops.push_back(upgradeLoopArgument(MD));
2503 
2504  return MDTuple::get(T->getContext(), Ops);
2505 }
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
Type * getVectorElementType() const
Definition: Type.h:368
const NoneType None
Definition: None.h:24
static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn)
uint64_t CallInst * C
SymbolTableList< Instruction >::iterator eraseFromParent()
This method unlinks &#39;this&#39; from the containing basic block and deletes it.
Definition: Instruction.cpp:69
Value * CreateICmp(CmpInst::Predicate P, Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1634
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1131
static IntegerType * getInt1Ty(LLVMContext &C)
Definition: Type.cpp:173
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
LLVMContext & Context
Value * CreateIsNotNull(Value *Arg, const Twine &Name="")
Return an i1 value testing if Arg is not null.
Definition: IRBuilder.h:1784
Takes the max of the two values, which are required to be integers.
Definition: Module.h:143
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1073
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Type * getParamType(unsigned i) const
Parameter type accessors.
Definition: DerivedTypes.h:135
Value * CreateXor(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1095
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:446
static Value * upgradeAbs(IRBuilder<> &Builder, CallInst &CI)
static ConstantAggregateZero * get(Type *Ty)
Definition: Constants.cpp:1237
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
Definition: StringRef.h:138
This class represents a function call, abstracting a target machine&#39;s calling convention.
unsigned less or equal
Definition: InstrTypes.h:886
unsigned less than
Definition: InstrTypes.h:885
static Constant * getIntToPtr(Constant *C, Type *Ty, bool OnlyIfReduced=false)
Definition: Constants.cpp:1665
unsigned getDebugMetadataVersionFromModule(const Module &M)
Return Debug Info Metadata Version by checking module flags.
Definition: DebugInfo.cpp:666
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:697
Value * CreateSExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1386
Metadata node.
Definition: Metadata.h:862
F(f)
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1067
unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
Definition: DerivedTypes.h:503
An instruction for reading from memory.
Definition: Instructions.h:164
static IntegerType * getInt64Ty(LLVMContext &C)
Definition: Type.cpp:177
Value * CreateICmpULE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1561
void reserve(size_type N)
Definition: SmallVector.h:380
void UpgradeIntrinsicCall(CallInst *CI, Function *NewFn)
This is the complement to the above, replacing a specific call to an intrinsic function with a call t...
static Value * EmitX86Select(IRBuilder<> &Builder, Value *Mask, Value *Op0, Value *Op1)
void setOperand(unsigned I, MDNode *New)
Definition: Metadata.cpp:1081
static Value * upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, ICmpInst::Predicate Pred)
Tuple of metadata.
Definition: Metadata.h:1104
static Constant * getNullValue(Type *Ty)
Constructor to create a &#39;0&#39; constant of arbitrary type.
Definition: Constants.cpp:207
Value * CreateNot(Value *V, const Twine &Name="")
Definition: IRBuilder.h:1142
StoreInst * CreateAlignedStore(Value *Val, Value *Ptr, unsigned Align, bool isVolatile=false)
Definition: IRBuilder.h:1199
IntegerType * getInt32Ty()
Fetch the type representing a 32-bit integer.
Definition: IRBuilder.h:348
Value * CreateFSub(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:925
unsigned getBitWidth() const
Return the number of bits in the Vector type.
Definition: DerivedTypes.h:452
A tuple of MDNodes.
Definition: Metadata.h:1323
static Value * UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, unsigned Shift)
Value * CreateFPExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1433
MDNode * upgradeInstructionLoopAttachment(MDNode &N)
Upgrade the loop attachment metadata node.
StringRef getName(ID id)
Return the LLVM name for an intrinsic, such as "llvm.ppc.altivec.lvx".
Definition: Function.cpp:591
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
void UpgradeCallsToIntrinsic(Function *F)
This is an auto-upgrade hook for any old intrinsic function syntaxes which need to have both the func...
unsigned getNumArgOperands() const
Return the number of call arguments.
static Type * getFloatTy(LLVMContext &C)
Definition: Type.cpp:164
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:451
LLVMContext & getContext() const
Get the global data context.
Definition: Module.h:237
static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name)
Definition: AutoUpgrade.cpp:69
PointerType * getPointerTo(unsigned AddrSpace=0) const
Return a pointer to the current type.
Definition: Type.cpp:639
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:197
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:664
static Constant * AddOne(Constant *C)
Add one to a Constant.
bool none_of(R &&Range, UnaryPredicate P)
Provide wrappers to std::none_of which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:830
unsigned getNumOperands() const
Definition: Metadata.cpp:1069
Value * CreateAdd(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:889
static Value * UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI)
void setName(const Twine &Name)
Change the name of the value.
Definition: Value.cpp:284
uint64_t getNumElements() const
Definition: DerivedTypes.h:359
static Metadata * upgradeLoopArgument(Metadata *MD)
AttributeList getAttributes(LLVMContext &C, ID id)
Return the attributes for an intrinsic.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:267
llvm::Optional< Function * > remangleIntrinsicFunction(Function *F)
Definition: Function.cpp:1172
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Case(const char(&S)[N], const T &Value)
Definition: StringSwitch.h:74
Class to represent function types.
Definition: DerivedTypes.h:103
Value * CreateBitCast(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1444
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
LLVMContext & getContext() const
Definition: Metadata.h:922
bool StripDebugInfo(Module &M)
Strip debug info in the module if it exists.
Definition: DebugInfo.cpp:328
Value * CreateVectorSplat(unsigned NumElts, Value *V, const Twine &Name="")
Return a vector value that contains.
Definition: IRBuilder.h:1835
bool UpgradeIntrinsicFunction(Function *F, Function *&NewFn)
This is a more granular function that simply checks an intrinsic function for upgrading, and returns true if it requires upgrading.
Value * CreateSub(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:911
Value * CreateSIToFP(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1426
An instruction for storing to memory.
Definition: Instructions.h:306
LinkageTypes getLinkage() const
Definition: GlobalValue.h:430
void replaceAllUsesWith(Value *V)
Change all uses of this to point to a new Value.
Definition: Value.cpp:428
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:598
Value * CreateZExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1383
static ConstantAsMetadata * get(Constant *C)
Definition: Metadata.h:408
Function * getDeclaration(Module *M, ID id, ArrayRef< Type *> Tys=None)
Create or insert an LLVM Function declaration for an intrinsic, and return it.
Definition: Function.cpp:975
static Value * UpgradeMaskedLoad(IRBuilder<> &Builder, Value *Ptr, Value *Passthru, Value *Mask, bool Aligned)
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block...
Definition: IRBuilder.h:128
Class to represent pointers.
Definition: DerivedTypes.h:467
static Value * UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, Value *Op, unsigned Shift)
Value * CreateOr(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1079
bool UpgradeModuleFlags(Module &M)
This checks for module flags which should be upgraded.
StringRef getString() const
Definition: Metadata.cpp:456
static Value * UpgradeMaskedStore(IRBuilder<> &Builder, Value *Ptr, Value *Data, Value *Mask, bool Aligned)
LoadInst * CreateLoad(Value *Ptr, const char *Name)
Definition: IRBuilder.h:1164
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1164
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:43
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:150
void getModuleFlagsMetadata(SmallVectorImpl< ModuleFlagEntry > &Flags) const
Returns the module flags in the provided vector.
Definition: Module.cpp:282
Emits an error if two values disagree, otherwise the resulting value is that of the operands...
Definition: Module.h:114
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:421
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
ConstantInt * getInt1(bool V)
Get a constant value representing either true or false.
Definition: IRBuilder.h:283
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Value * CreateSelect(Value *C, Value *True, Value *False, const Twine &Name="", Instruction *MDFrom=nullptr)
Definition: IRBuilder.h:1689
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:139
bool UpgradeDebugInfo(Module &M)
Check the debug info version number, if it is out-dated, drop the debug info.
ArrayRef< Type * > params() const
Definition: DerivedTypes.h:130
static VectorType * getInteger(VectorType *VTy)
This static method gets a VectorType with the same number of elements as the input type...
Definition: DerivedTypes.h:406
void addModuleFlag(ModFlagBehavior Behavior, StringRef Key, Metadata *Val)
Add a module-level flag to the module-level flags metadata.
Definition: Module.cpp:329
Value * CreateNeg(Value *V, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1120
static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, Function *&NewFn)
Definition: AutoUpgrade.cpp:55
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:860
Value * CreateICmpSGE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1567
static FunctionType * get(Type *Result, ArrayRef< Type *> Params, bool isVarArg)
This static method is the primary way of constructing a FunctionType.
Definition: Type.cpp:297
size_t arg_size() const
Definition: Function.h:630
arg_iterator arg_begin()
Definition: Function.h:603
self_iterator getIterator()
Definition: ilist_node.h:82
Value * CreateExtractElement(Value *Vec, Value *Idx, const Twine &Name="")
Definition: IRBuilder.h:1709
static Constant * getAllOnesValue(Type *Ty)
Get the all ones value.
Definition: Constants.cpp:261
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
static UndefValue * get(Type *T)
Static factory methods - Return an &#39;undef&#39; object of the specified type.
Definition: Constants.cpp:1320
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void setMetadata(unsigned KindID, MDNode *Node)
Set the metadata of the specified kind to the specified node.
Definition: Metadata.cpp:1214
Value * CreateMul(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:933
Value * CreateTrunc(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1380
LLVM_ATTRIBUTE_ALWAYS_INLINE R Default(const T &Value) const
Definition: StringSwitch.h:244
static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, Function *&NewFn)
signed greater than
Definition: InstrTypes.h:887
Value * CreateUIToFP(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1423
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef drop_front(size_t N=1) const
Return a StringRef equal to &#39;this&#39; but with the first N elements dropped.
Definition: StringRef.h:645
static Value * getX86MaskVec(IRBuilder<> &Builder, Value *Mask, unsigned NumElts)
bool isPtrOrPtrVectorTy() const
Return true if this is a pointer type or a vector of pointer types.
Definition: Type.h:224
static IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition: Type.cpp:240
static Value * UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, Value *Op1, Value *Shift, Value *Passthru, Value *Mask, bool IsVALIGN)
Instruction * UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, Instruction *&Temp)
This is an auto-upgrade for bitcast between pointers with different address spaces: the instruction i...
Value * CreateFAdd(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:903
static PointerType * getUnqual(Type *ElementType)
This constructs a pointer to an object of the specified type in the generic address space (address sp...
Definition: DerivedTypes.h:482
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type...
Definition: Type.cpp:130
Value * CreateICmpUGE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1555
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
static MDString * upgradeLoopTag(LLVMContext &C, StringRef OldTag)
Module.h This file contains the declarations for the Module class.
bool UpgradeGlobalVariable(GlobalVariable *GV)
This checks for global variables which should be upgraded.
Value * CreateInsertElement(Value *Vec, Value *NewElt, Value *Idx, const Twine &Name="")
Definition: IRBuilder.h:1722
signed less than
Definition: InstrTypes.h:889
CallInst * CreateMaskedStore(Value *Val, Value *Ptr, unsigned Align, Value *Mask)
Create a call to Masked Store intrinsic.
Definition: IRBuilder.cpp:374
Value * CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name="")
Definition: IRBuilder.h:1736
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Definition: Constants.cpp:560
CallInst * CreateMaskedLoad(Value *Ptr, unsigned Align, Value *Mask, Value *PassThru=nullptr, const Twine &Name="")
Create a call to Masked Load intrinsic.
Definition: IRBuilder.cpp:353
static Value * UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, Intrinsic::ID IID)
void setAttributes(AttributeList Attrs)
Set the attribute list for this Function.
Definition: Function.h:208
static VectorType * getExtendedElementVectorType(VectorType *VTy)
This static method is like getInteger except that the element types are twice as wide as the elements...
Definition: DerivedTypes.h:415
Intrinsic::ID getIntrinsicID() const LLVM_READONLY
getIntrinsicID - This method returns the ID number of the specified function, or Intrinsic::not_intri...
Definition: Function.h:175
Uses the specified value, regardless of the behavior or value of the other module.
Definition: Module.h:132
unsigned getVectorNumElements() const
Definition: DerivedTypes.h:462
FunctionType * getFunctionType() const
Returns the FunctionType for me.
Definition: Function.h:145
MDNode * UpgradeTBAANode(MDNode &TBAANode)
If the given TBAA tag uses the scalar TBAA format, create a new node corresponding to the upgrade to ...
signed less or equal
Definition: InstrTypes.h:890
Class to represent vector types.
Definition: DerivedTypes.h:393
Class for arbitrary precision integers.
Definition: APInt.h:69
IntegerType * getInt8Ty()
Fetch the type representing an 8-bit integer.
Definition: IRBuilder.h:338
Value * CreatePointerCast(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1484
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
ConstantInt * getFalse()
Get the constant value for i1 false.
Definition: IRBuilder.h:293
amdgpu Simplify well known AMD library false Value Value * Arg
IntegerType * getInt1Ty()
Fetch the type representing a single bit.
Definition: IRBuilder.h:333
Function * getCalledFunction() const
Return the function called, or null if this is an indirect function invocation.
static CastInst * Create(Instruction::CastOps, Value *S, Type *Ty, const Twine &Name="", Instruction *InsertBefore=nullptr)
Provides a way to construct any of the CastInst subclasses using an opcode instead of the subclass&#39;s ...
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Cases(const char(&S0)[N0], const char(&S1)[N1], const T &Value)
Definition: StringSwitch.h:107
void setCalledFunction(Value *Fn)
Set the function called.
static bool isOldLoopArgument(Metadata *MD)
static const size_t npos
Definition: StringRef.h:51
static IntegerType * getInt32Ty(LLVMContext &C)
Definition: Type.cpp:176
unsigned greater or equal
Definition: InstrTypes.h:884
Value * getArgOperand(unsigned i) const
getArgOperand/setArgOperand - Return/set the i-th call argument.
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:218
static Constant * getPtrToInt(Constant *C, Type *Ty, bool OnlyIfReduced=false)
Definition: Constants.cpp:1652
#define I(x, y, z)
Definition: MD5.cpp:58
#define N
Diagnostic information for debug metadata version reporting.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
static Value * upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI)
static void rename(GlobalValue *GV)
Definition: AutoUpgrade.cpp:35
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
static Value * upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, unsigned CC, bool Signed)
void eraseFromParent()
eraseFromParent - This method unlinks &#39;this&#39; from the containing module and deletes it...
Definition: Function.cpp:202
Type * getFloatTy()
Fetch the type representing a 32-bit floating point value.
Definition: IRBuilder.h:371
void diagnose(const DiagnosticInfo &DI)
Report a message to the currently installed diagnostic handler.
Value * CreateAnd(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1063
static bool UpgradePTESTIntrinsic(Function *F, Intrinsic::ID IID, Function *&NewFn)
Definition: AutoUpgrade.cpp:39
iterator_range< op_iterator > arg_operands()
Iteration adapter for range-for loops.
unsigned getMDKindID(StringRef Name) const
Return a unique non-zero ID for the specified metadata kind.
Definition: Module.cpp:118
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
user_iterator user_begin()
Definition: Value.h:371
LoadInst * CreateAlignedLoad(Value *Ptr, unsigned Align, const char *Name)
Definition: IRBuilder.h:1182
unsigned getPrimitiveSizeInBits() const LLVM_READONLY
Return the basic size of this type if it is a primitive type.
Definition: Type.cpp:115
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:545
LLVM Value Representation.
Definition: Value.h:73
static VectorType * get(Type *ElementType, unsigned NumElements)
This static method is the primary way to construct an VectorType.
Definition: Type.cpp:593
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
Value * CreateLShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Definition: IRBuilder.h:1027
bool match(StringRef String, SmallVectorImpl< StringRef > *Matches=nullptr)
matches - Match the regex against a given String.
Definition: Regex.cpp:68
Value * CreateFDiv(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:979
ConstantInt * getInt8(uint8_t C)
Get a constant 8-bit value.
Definition: IRBuilder.h:298
unsigned greater than
Definition: InstrTypes.h:883
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
A single uniqued string.
Definition: Metadata.h:602
static Function * Create(FunctionType *Ty, LinkageTypes Linkage, const Twine &N="", Module *M=nullptr)
Definition: Function.h:136
Value * UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy)
This is an auto-upgrade for bitcast constant expression between pointers with different address space...
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1073
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:298
Value * CreateFMul(Value *LHS, Value *RHS, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:947
Root of the metadata hierarchy.
Definition: Metadata.h:58
Value * CreateICmpSLE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1573
const uint64_t Version
Definition: InstrProf.h:865
static IntegerType * getInt8Ty(LLVMContext &C)
Definition: Type.cpp:174
signed greater or equal
Definition: InstrTypes.h:888
IntegerType * Int32Ty
const BasicBlock * getParent() const
Definition: Instruction.h:66
CallInst * CreateCall(Value *Callee, ArrayRef< Value *> Args=None, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:1659
user_iterator user_end()
Definition: Value.h:379