LLVM  8.0.0svn
AutoUpgrade.cpp
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1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the auto-upgrade helper functions.
11 // This is where deprecated IR intrinsics and other IR features are updated to
12 // current specifications.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "llvm/IR/AutoUpgrade.h"
17 #include "llvm/ADT/StringSwitch.h"
18 #include "llvm/IR/Constants.h"
19 #include "llvm/IR/DIBuilder.h"
20 #include "llvm/IR/DebugInfo.h"
21 #include "llvm/IR/DiagnosticInfo.h"
22 #include "llvm/IR/Function.h"
23 #include "llvm/IR/IRBuilder.h"
24 #include "llvm/IR/Instruction.h"
25 #include "llvm/IR/IntrinsicInst.h"
26 #include "llvm/IR/LLVMContext.h"
27 #include "llvm/IR/Module.h"
28 #include "llvm/IR/Verifier.h"
30 #include "llvm/Support/Regex.h"
31 #include <cstring>
32 using namespace llvm;
33 
34 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); }
35 
36 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have
37 // changed their type from v4f32 to v2i64.
39  Function *&NewFn) {
40  // Check whether this is an old version of the function, which received
41  // v4f32 arguments.
42  Type *Arg0Type = F->getFunctionType()->getParamType(0);
43  if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4))
44  return false;
45 
46  // Yes, it's old, replace it with new version.
47  rename(F);
48  NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
49  return true;
50 }
51 
52 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask
53 // arguments have changed their type from i32 to i8.
55  Function *&NewFn) {
56  // Check that the last argument is an i32.
57  Type *LastArgType = F->getFunctionType()->getParamType(
58  F->getFunctionType()->getNumParams() - 1);
59  if (!LastArgType->isIntegerTy(32))
60  return false;
61 
62  // Move this function aside and map down.
63  rename(F);
64  NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
65  return true;
66 }
67 
69  // All of the intrinsics matches below should be marked with which llvm
70  // version started autoupgrading them. At some point in the future we would
71  // like to use this information to remove upgrade code for some older
72  // intrinsics. It is currently undecided how we will determine that future
73  // point.
74  if (Name == "addcarryx.u32" || // Added in 8.0
75  Name == "addcarryx.u64" || // Added in 8.0
76  Name == "addcarry.u32" || // Added in 8.0
77  Name == "addcarry.u64" || // Added in 8.0
78  Name == "subborrow.u32" || // Added in 8.0
79  Name == "subborrow.u64" || // Added in 8.0
80  Name.startswith("sse2.paddus.") || // Added in 8.0
81  Name.startswith("sse2.psubus.") || // Added in 8.0
82  Name.startswith("avx2.paddus.") || // Added in 8.0
83  Name.startswith("avx2.psubus.") || // Added in 8.0
84  Name.startswith("avx512.mask.paddus.") || // Added in 8.0
85  Name.startswith("avx512.mask.psubus.") || // Added in 8.0
86  Name=="ssse3.pabs.b.128" || // Added in 6.0
87  Name=="ssse3.pabs.w.128" || // Added in 6.0
88  Name=="ssse3.pabs.d.128" || // Added in 6.0
89  Name.startswith("fma4.vfmadd.s") || // Added in 7.0
90  Name.startswith("fma.vfmadd.") || // Added in 7.0
91  Name.startswith("fma.vfmsub.") || // Added in 7.0
92  Name.startswith("fma.vfmaddsub.") || // Added in 7.0
93  Name.startswith("fma.vfmsubadd.") || // Added in 7.0
94  Name.startswith("fma.vfnmadd.") || // Added in 7.0
95  Name.startswith("fma.vfnmsub.") || // Added in 7.0
96  Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0
97  Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0
98  Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0
99  Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0
100  Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0
101  Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0
102  Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0
103  Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0
104  Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0
105  Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0
106  Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0
107  Name.startswith("avx512.mask.shuf.i") || // Added in 6.0
108  Name.startswith("avx512.mask.shuf.f") || // Added in 6.0
109  Name.startswith("avx512.kunpck") || //added in 6.0
110  Name.startswith("avx2.pabs.") || // Added in 6.0
111  Name.startswith("avx512.mask.pabs.") || // Added in 6.0
112  Name.startswith("avx512.broadcastm") || // Added in 6.0
113  Name == "sse.sqrt.ss" || // Added in 7.0
114  Name == "sse2.sqrt.sd" || // Added in 7.0
115  Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0
116  Name.startswith("avx.sqrt.p") || // Added in 7.0
117  Name.startswith("sse2.sqrt.p") || // Added in 7.0
118  Name.startswith("sse.sqrt.p") || // Added in 7.0
119  Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0
120  Name.startswith("sse2.pcmpeq.") || // Added in 3.1
121  Name.startswith("sse2.pcmpgt.") || // Added in 3.1
122  Name.startswith("avx2.pcmpeq.") || // Added in 3.1
123  Name.startswith("avx2.pcmpgt.") || // Added in 3.1
124  Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9
125  Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9
126  Name.startswith("avx.vperm2f128.") || // Added in 6.0
127  Name == "avx2.vperm2i128" || // Added in 6.0
128  Name == "sse.add.ss" || // Added in 4.0
129  Name == "sse2.add.sd" || // Added in 4.0
130  Name == "sse.sub.ss" || // Added in 4.0
131  Name == "sse2.sub.sd" || // Added in 4.0
132  Name == "sse.mul.ss" || // Added in 4.0
133  Name == "sse2.mul.sd" || // Added in 4.0
134  Name == "sse.div.ss" || // Added in 4.0
135  Name == "sse2.div.sd" || // Added in 4.0
136  Name == "sse41.pmaxsb" || // Added in 3.9
137  Name == "sse2.pmaxs.w" || // Added in 3.9
138  Name == "sse41.pmaxsd" || // Added in 3.9
139  Name == "sse2.pmaxu.b" || // Added in 3.9
140  Name == "sse41.pmaxuw" || // Added in 3.9
141  Name == "sse41.pmaxud" || // Added in 3.9
142  Name == "sse41.pminsb" || // Added in 3.9
143  Name == "sse2.pmins.w" || // Added in 3.9
144  Name == "sse41.pminsd" || // Added in 3.9
145  Name == "sse2.pminu.b" || // Added in 3.9
146  Name == "sse41.pminuw" || // Added in 3.9
147  Name == "sse41.pminud" || // Added in 3.9
148  Name == "avx512.kand.w" || // Added in 7.0
149  Name == "avx512.kandn.w" || // Added in 7.0
150  Name == "avx512.knot.w" || // Added in 7.0
151  Name == "avx512.kor.w" || // Added in 7.0
152  Name == "avx512.kxor.w" || // Added in 7.0
153  Name == "avx512.kxnor.w" || // Added in 7.0
154  Name == "avx512.kortestc.w" || // Added in 7.0
155  Name == "avx512.kortestz.w" || // Added in 7.0
156  Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0
157  Name.startswith("avx2.pmax") || // Added in 3.9
158  Name.startswith("avx2.pmin") || // Added in 3.9
159  Name.startswith("avx512.mask.pmax") || // Added in 4.0
160  Name.startswith("avx512.mask.pmin") || // Added in 4.0
161  Name.startswith("avx2.vbroadcast") || // Added in 3.8
162  Name.startswith("avx2.pbroadcast") || // Added in 3.8
163  Name.startswith("avx.vpermil.") || // Added in 3.1
164  Name.startswith("sse2.pshuf") || // Added in 3.9
165  Name.startswith("avx512.pbroadcast") || // Added in 3.9
166  Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9
167  Name.startswith("avx512.mask.movddup") || // Added in 3.9
168  Name.startswith("avx512.mask.movshdup") || // Added in 3.9
169  Name.startswith("avx512.mask.movsldup") || // Added in 3.9
170  Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9
171  Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9
172  Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9
173  Name.startswith("avx512.mask.shuf.p") || // Added in 4.0
174  Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9
175  Name.startswith("avx512.mask.perm.df.") || // Added in 3.9
176  Name.startswith("avx512.mask.perm.di.") || // Added in 3.9
177  Name.startswith("avx512.mask.punpckl") || // Added in 3.9
178  Name.startswith("avx512.mask.punpckh") || // Added in 3.9
179  Name.startswith("avx512.mask.unpckl.") || // Added in 3.9
180  Name.startswith("avx512.mask.unpckh.") || // Added in 3.9
181  Name.startswith("avx512.mask.pand.") || // Added in 3.9
182  Name.startswith("avx512.mask.pandn.") || // Added in 3.9
183  Name.startswith("avx512.mask.por.") || // Added in 3.9
184  Name.startswith("avx512.mask.pxor.") || // Added in 3.9
185  Name.startswith("avx512.mask.and.") || // Added in 3.9
186  Name.startswith("avx512.mask.andn.") || // Added in 3.9
187  Name.startswith("avx512.mask.or.") || // Added in 3.9
188  Name.startswith("avx512.mask.xor.") || // Added in 3.9
189  Name.startswith("avx512.mask.padd.") || // Added in 4.0
190  Name.startswith("avx512.mask.psub.") || // Added in 4.0
191  Name.startswith("avx512.mask.pmull.") || // Added in 4.0
192  Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0
193  Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0
194  Name == "avx512.mask.cvtudq2ps.128" || // Added in 7.0
195  Name == "avx512.mask.cvtudq2ps.256" || // Added in 7.0
196  Name == "avx512.mask.cvtqq2pd.128" || // Added in 7.0
197  Name == "avx512.mask.cvtqq2pd.256" || // Added in 7.0
198  Name == "avx512.mask.cvtuqq2pd.128" || // Added in 7.0
199  Name == "avx512.mask.cvtuqq2pd.256" || // Added in 7.0
200  Name == "avx512.mask.cvtdq2ps.128" || // Added in 7.0
201  Name == "avx512.mask.cvtdq2ps.256" || // Added in 7.0
202  Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0
203  Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0
204  Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0
205  Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0
206  Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0
207  Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0
208  Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0
209  Name == "avx512.cvtusi2sd" || // Added in 7.0
210  Name.startswith("avx512.mask.permvar.") || // Added in 7.0
211  Name.startswith("avx512.mask.permvar.") || // Added in 7.0
212  Name == "sse2.pmulu.dq" || // Added in 7.0
213  Name == "sse41.pmuldq" || // Added in 7.0
214  Name == "avx2.pmulu.dq" || // Added in 7.0
215  Name == "avx2.pmul.dq" || // Added in 7.0
216  Name == "avx512.pmulu.dq.512" || // Added in 7.0
217  Name == "avx512.pmul.dq.512" || // Added in 7.0
218  Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0
219  Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0
220  Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0
221  Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0
222  Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0
223  Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0
224  Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0
225  Name.startswith("avx512.mask.packsswb.") || // Added in 5.0
226  Name.startswith("avx512.mask.packssdw.") || // Added in 5.0
227  Name.startswith("avx512.mask.packuswb.") || // Added in 5.0
228  Name.startswith("avx512.mask.packusdw.") || // Added in 5.0
229  Name.startswith("avx512.mask.cmp.b") || // Added in 5.0
230  Name.startswith("avx512.mask.cmp.d") || // Added in 5.0
231  Name.startswith("avx512.mask.cmp.q") || // Added in 5.0
232  Name.startswith("avx512.mask.cmp.w") || // Added in 5.0
233  Name.startswith("avx512.mask.cmp.p") || // Added in 7.0
234  Name.startswith("avx512.mask.ucmp.") || // Added in 5.0
235  Name.startswith("avx512.cvtb2mask.") || // Added in 7.0
236  Name.startswith("avx512.cvtw2mask.") || // Added in 7.0
237  Name.startswith("avx512.cvtd2mask.") || // Added in 7.0
238  Name.startswith("avx512.cvtq2mask.") || // Added in 7.0
239  Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0
240  Name.startswith("avx512.mask.psll.d") || // Added in 4.0
241  Name.startswith("avx512.mask.psll.q") || // Added in 4.0
242  Name.startswith("avx512.mask.psll.w") || // Added in 4.0
243  Name.startswith("avx512.mask.psra.d") || // Added in 4.0
244  Name.startswith("avx512.mask.psra.q") || // Added in 4.0
245  Name.startswith("avx512.mask.psra.w") || // Added in 4.0
246  Name.startswith("avx512.mask.psrl.d") || // Added in 4.0
247  Name.startswith("avx512.mask.psrl.q") || // Added in 4.0
248  Name.startswith("avx512.mask.psrl.w") || // Added in 4.0
249  Name.startswith("avx512.mask.pslli") || // Added in 4.0
250  Name.startswith("avx512.mask.psrai") || // Added in 4.0
251  Name.startswith("avx512.mask.psrli") || // Added in 4.0
252  Name.startswith("avx512.mask.psllv") || // Added in 4.0
253  Name.startswith("avx512.mask.psrav") || // Added in 4.0
254  Name.startswith("avx512.mask.psrlv") || // Added in 4.0
255  Name.startswith("sse41.pmovsx") || // Added in 3.8
256  Name.startswith("sse41.pmovzx") || // Added in 3.9
257  Name.startswith("avx2.pmovsx") || // Added in 3.9
258  Name.startswith("avx2.pmovzx") || // Added in 3.9
259  Name.startswith("avx512.mask.pmovsx") || // Added in 4.0
260  Name.startswith("avx512.mask.pmovzx") || // Added in 4.0
261  Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0
262  Name.startswith("avx512.mask.pternlog.") || // Added in 7.0
263  Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0
264  Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0
265  Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0
266  Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0
267  Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0
268  Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0
269  Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0
270  Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0
271  Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0
272  Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0
273  Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0
274  Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0
275  Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0
276  Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0
277  Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0
278  Name.startswith("avx512.mask.vpshld.") || // Added in 7.0
279  Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0
280  Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0
281  Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0
282  Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0
283  Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0
284  Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0
285  Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0
286  Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0
287  Name.startswith("avx512.mask.prorv.") || // Added in 7.0
288  Name.startswith("avx512.mask.pror.") || // Added in 7.0
289  Name.startswith("avx512.mask.prolv.") || // Added in 7.0
290  Name.startswith("avx512.mask.prol.") || // Added in 7.0
291  Name.startswith("avx512.mask.padds.") || // Added in 8.0
292  Name.startswith("avx512.mask.psubs.") || // Added in 8.0
293  Name == "sse.cvtsi2ss" || // Added in 7.0
294  Name == "sse.cvtsi642ss" || // Added in 7.0
295  Name == "sse2.cvtsi2sd" || // Added in 7.0
296  Name == "sse2.cvtsi642sd" || // Added in 7.0
297  Name == "sse2.cvtss2sd" || // Added in 7.0
298  Name == "sse2.cvtdq2pd" || // Added in 3.9
299  Name == "sse2.cvtdq2ps" || // Added in 7.0
300  Name == "sse2.cvtps2pd" || // Added in 3.9
301  Name == "avx.cvtdq2.pd.256" || // Added in 3.9
302  Name == "avx.cvtdq2.ps.256" || // Added in 7.0
303  Name == "avx.cvt.ps2.pd.256" || // Added in 3.9
304  Name.startswith("avx.vinsertf128.") || // Added in 3.7
305  Name == "avx2.vinserti128" || // Added in 3.7
306  Name.startswith("avx512.mask.insert") || // Added in 4.0
307  Name.startswith("avx.vextractf128.") || // Added in 3.7
308  Name == "avx2.vextracti128" || // Added in 3.7
309  Name.startswith("avx512.mask.vextract") || // Added in 4.0
310  Name.startswith("sse4a.movnt.") || // Added in 3.9
311  Name.startswith("avx.movnt.") || // Added in 3.2
312  Name.startswith("avx512.storent.") || // Added in 3.9
313  Name == "sse41.movntdqa" || // Added in 5.0
314  Name == "avx2.movntdqa" || // Added in 5.0
315  Name == "avx512.movntdqa" || // Added in 5.0
316  Name == "sse2.storel.dq" || // Added in 3.9
317  Name.startswith("sse.storeu.") || // Added in 3.9
318  Name.startswith("sse2.storeu.") || // Added in 3.9
319  Name.startswith("avx.storeu.") || // Added in 3.9
320  Name.startswith("avx512.mask.storeu.") || // Added in 3.9
321  Name.startswith("avx512.mask.store.p") || // Added in 3.9
322  Name.startswith("avx512.mask.store.b.") || // Added in 3.9
323  Name.startswith("avx512.mask.store.w.") || // Added in 3.9
324  Name.startswith("avx512.mask.store.d.") || // Added in 3.9
325  Name.startswith("avx512.mask.store.q.") || // Added in 3.9
326  Name == "avx512.mask.store.ss" || // Added in 7.0
327  Name.startswith("avx512.mask.loadu.") || // Added in 3.9
328  Name.startswith("avx512.mask.load.") || // Added in 3.9
329  Name.startswith("avx512.mask.expand.load.") || // Added in 7.0
330  Name.startswith("avx512.mask.compress.store.") || // Added in 7.0
331  Name == "sse42.crc32.64.8" || // Added in 3.4
332  Name.startswith("avx.vbroadcast.s") || // Added in 3.5
333  Name.startswith("avx512.vbroadcast.s") || // Added in 7.0
334  Name.startswith("avx512.mask.palignr.") || // Added in 3.9
335  Name.startswith("avx512.mask.valign.") || // Added in 4.0
336  Name.startswith("sse2.psll.dq") || // Added in 3.7
337  Name.startswith("sse2.psrl.dq") || // Added in 3.7
338  Name.startswith("avx2.psll.dq") || // Added in 3.7
339  Name.startswith("avx2.psrl.dq") || // Added in 3.7
340  Name.startswith("avx512.psll.dq") || // Added in 3.9
341  Name.startswith("avx512.psrl.dq") || // Added in 3.9
342  Name == "sse41.pblendw" || // Added in 3.7
343  Name.startswith("sse41.blendp") || // Added in 3.7
344  Name.startswith("avx.blend.p") || // Added in 3.7
345  Name == "avx2.pblendw" || // Added in 3.7
346  Name.startswith("avx2.pblendd.") || // Added in 3.7
347  Name.startswith("avx.vbroadcastf128") || // Added in 4.0
348  Name == "avx2.vbroadcasti128" || // Added in 3.7
349  Name.startswith("avx512.mask.broadcastf") || // Added in 6.0
350  Name.startswith("avx512.mask.broadcasti") || // Added in 6.0
351  Name == "xop.vpcmov" || // Added in 3.8
352  Name == "xop.vpcmov.256" || // Added in 5.0
353  Name.startswith("avx512.mask.move.s") || // Added in 4.0
354  Name.startswith("avx512.cvtmask2") || // Added in 5.0
355  (Name.startswith("xop.vpcom") && // Added in 3.2
356  F->arg_size() == 2) ||
357  Name.startswith("avx512.ptestm") || //Added in 6.0
358  Name.startswith("avx512.ptestnm") || //Added in 6.0
359  Name.startswith("sse2.pavg") || // Added in 6.0
360  Name.startswith("avx2.pavg") || // Added in 6.0
361  Name.startswith("avx512.mask.pavg")) // Added in 6.0
362  return true;
363 
364  return false;
365 }
366 
368  Function *&NewFn) {
369  // Only handle intrinsics that start with "x86.".
370  if (!Name.startswith("x86."))
371  return false;
372  // Remove "x86." prefix.
373  Name = Name.substr(4);
374 
375  if (ShouldUpgradeX86Intrinsic(F, Name)) {
376  NewFn = nullptr;
377  return true;
378  }
379 
380  if (Name == "rdtscp") { // Added in 8.0
381  // If this intrinsic has 0 operands, it's the new version.
382  if (F->getFunctionType()->getNumParams() == 0)
383  return false;
384 
385  rename(F);
387  Intrinsic::x86_rdtscp);
388  return true;
389  }
390 
391  // SSE4.1 ptest functions may have an old signature.
392  if (Name.startswith("sse41.ptest")) { // Added in 3.2
393  if (Name.substr(11) == "c")
394  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn);
395  if (Name.substr(11) == "z")
396  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn);
397  if (Name.substr(11) == "nzc")
398  return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn);
399  }
400  // Several blend and other instructions with masks used the wrong number of
401  // bits.
402  if (Name == "sse41.insertps") // Added in 3.6
403  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps,
404  NewFn);
405  if (Name == "sse41.dppd") // Added in 3.6
406  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd,
407  NewFn);
408  if (Name == "sse41.dpps") // Added in 3.6
409  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps,
410  NewFn);
411  if (Name == "sse41.mpsadbw") // Added in 3.6
412  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw,
413  NewFn);
414  if (Name == "avx.dp.ps.256") // Added in 3.6
415  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256,
416  NewFn);
417  if (Name == "avx2.mpsadbw") // Added in 3.6
418  return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw,
419  NewFn);
420 
421  // frcz.ss/sd may need to have an argument dropped. Added in 3.2
422  if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) {
423  rename(F);
425  Intrinsic::x86_xop_vfrcz_ss);
426  return true;
427  }
428  if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) {
429  rename(F);
431  Intrinsic::x86_xop_vfrcz_sd);
432  return true;
433  }
434  // Upgrade any XOP PERMIL2 index operand still using a float/double vector.
435  if (Name.startswith("xop.vpermil2")) { // Added in 3.9
436  auto Idx = F->getFunctionType()->getParamType(2);
437  if (Idx->isFPOrFPVectorTy()) {
438  rename(F);
439  unsigned IdxSize = Idx->getPrimitiveSizeInBits();
440  unsigned EltSize = Idx->getScalarSizeInBits();
441  Intrinsic::ID Permil2ID;
442  if (EltSize == 64 && IdxSize == 128)
443  Permil2ID = Intrinsic::x86_xop_vpermil2pd;
444  else if (EltSize == 32 && IdxSize == 128)
445  Permil2ID = Intrinsic::x86_xop_vpermil2ps;
446  else if (EltSize == 64 && IdxSize == 256)
447  Permil2ID = Intrinsic::x86_xop_vpermil2pd_256;
448  else
449  Permil2ID = Intrinsic::x86_xop_vpermil2ps_256;
450  NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID);
451  return true;
452  }
453  }
454 
455  return false;
456 }
457 
459  assert(F && "Illegal to upgrade a non-existent Function.");
460 
461  // Quickly eliminate it, if it's not a candidate.
462  StringRef Name = F->getName();
463  if (Name.size() <= 8 || !Name.startswith("llvm."))
464  return false;
465  Name = Name.substr(5); // Strip off "llvm."
466 
467  switch (Name[0]) {
468  default: break;
469  case 'a': {
470  if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) {
471  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse,
472  F->arg_begin()->getType());
473  return true;
474  }
475  if (Name.startswith("arm.neon.vclz")) {
476  Type* args[2] = {
477  F->arg_begin()->getType(),
479  };
480  // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to
481  // the end of the name. Change name from llvm.arm.neon.vclz.* to
482  // llvm.ctlz.*
483  FunctionType* fType = FunctionType::get(F->getReturnType(), args, false);
484  NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(),
485  "llvm.ctlz." + Name.substr(14), F->getParent());
486  return true;
487  }
488  if (Name.startswith("arm.neon.vcnt")) {
489  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
490  F->arg_begin()->getType());
491  return true;
492  }
493  Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$");
494  if (vldRegex.match(Name)) {
495  auto fArgs = F->getFunctionType()->params();
496  SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end());
497  // Can't use Intrinsic::getDeclaration here as the return types might
498  // then only be structurally equal.
499  FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false);
500  NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(),
501  "llvm." + Name + ".p0i8", F->getParent());
502  return true;
503  }
504  Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
505  if (vstRegex.match(Name)) {
506  static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
507  Intrinsic::arm_neon_vst2,
508  Intrinsic::arm_neon_vst3,
509  Intrinsic::arm_neon_vst4};
510 
511  static const Intrinsic::ID StoreLaneInts[] = {
512  Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
513  Intrinsic::arm_neon_vst4lane
514  };
515 
516  auto fArgs = F->getFunctionType()->params();
517  Type *Tys[] = {fArgs[0], fArgs[1]};
518  if (Name.find("lane") == StringRef::npos)
520  StoreInts[fArgs.size() - 3], Tys);
521  else
523  StoreLaneInts[fArgs.size() - 5], Tys);
524  return true;
525  }
526  if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") {
527  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer);
528  return true;
529  }
530  break;
531  }
532 
533  case 'c': {
534  if (Name.startswith("ctlz.") && F->arg_size() == 1) {
535  rename(F);
536  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
537  F->arg_begin()->getType());
538  return true;
539  }
540  if (Name.startswith("cttz.") && F->arg_size() == 1) {
541  rename(F);
542  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz,
543  F->arg_begin()->getType());
544  return true;
545  }
546  break;
547  }
548  case 'd': {
549  if (Name == "dbg.value" && F->arg_size() == 4) {
550  rename(F);
551  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value);
552  return true;
553  }
554  break;
555  }
556  case 'i':
557  case 'l': {
558  bool IsLifetimeStart = Name.startswith("lifetime.start");
559  if (IsLifetimeStart || Name.startswith("invariant.start")) {
560  Intrinsic::ID ID = IsLifetimeStart ?
561  Intrinsic::lifetime_start : Intrinsic::invariant_start;
562  auto Args = F->getFunctionType()->params();
563  Type* ObjectPtr[1] = {Args[1]};
564  if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) {
565  rename(F);
566  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr);
567  return true;
568  }
569  }
570 
571  bool IsLifetimeEnd = Name.startswith("lifetime.end");
572  if (IsLifetimeEnd || Name.startswith("invariant.end")) {
573  Intrinsic::ID ID = IsLifetimeEnd ?
574  Intrinsic::lifetime_end : Intrinsic::invariant_end;
575 
576  auto Args = F->getFunctionType()->params();
577  Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]};
578  if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) {
579  rename(F);
580  NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr);
581  return true;
582  }
583  }
584  if (Name.startswith("invariant.group.barrier")) {
585  // Rename invariant.group.barrier to launder.invariant.group
586  auto Args = F->getFunctionType()->params();
587  Type* ObjectPtr[1] = {Args[0]};
588  rename(F);
590  Intrinsic::launder_invariant_group, ObjectPtr);
591  return true;
592 
593  }
594 
595  break;
596  }
597  case 'm': {
598  if (Name.startswith("masked.load.")) {
599  Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() };
600  if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) {
601  rename(F);
603  Intrinsic::masked_load,
604  Tys);
605  return true;
606  }
607  }
608  if (Name.startswith("masked.store.")) {
609  auto Args = F->getFunctionType()->params();
610  Type *Tys[] = { Args[0], Args[1] };
611  if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) {
612  rename(F);
614  Intrinsic::masked_store,
615  Tys);
616  return true;
617  }
618  }
619  // Renaming gather/scatter intrinsics with no address space overloading
620  // to the new overload which includes an address space
621  if (Name.startswith("masked.gather.")) {
622  Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()};
623  if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) {
624  rename(F);
626  Intrinsic::masked_gather, Tys);
627  return true;
628  }
629  }
630  if (Name.startswith("masked.scatter.")) {
631  auto Args = F->getFunctionType()->params();
632  Type *Tys[] = {Args[0], Args[1]};
633  if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) {
634  rename(F);
636  Intrinsic::masked_scatter, Tys);
637  return true;
638  }
639  }
640  // Updating the memory intrinsics (memcpy/memmove/memset) that have an
641  // alignment parameter to embedding the alignment as an attribute of
642  // the pointer args.
643  if (Name.startswith("memcpy.") && F->arg_size() == 5) {
644  rename(F);
645  // Get the types of dest, src, and len
646  ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3);
647  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy,
648  ParamTypes);
649  return true;
650  }
651  if (Name.startswith("memmove.") && F->arg_size() == 5) {
652  rename(F);
653  // Get the types of dest, src, and len
654  ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3);
655  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove,
656  ParamTypes);
657  return true;
658  }
659  if (Name.startswith("memset.") && F->arg_size() == 5) {
660  rename(F);
661  // Get the types of dest, and len
662  const auto *FT = F->getFunctionType();
663  Type *ParamTypes[2] = {
664  FT->getParamType(0), // Dest
665  FT->getParamType(2) // len
666  };
667  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset,
668  ParamTypes);
669  return true;
670  }
671  break;
672  }
673  case 'n': {
674  if (Name.startswith("nvvm.")) {
675  Name = Name.substr(5);
676 
677  // The following nvvm intrinsics correspond exactly to an LLVM intrinsic.
679  .Cases("brev32", "brev64", Intrinsic::bitreverse)
680  .Case("clz.i", Intrinsic::ctlz)
681  .Case("popc.i", Intrinsic::ctpop)
683  if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) {
684  NewFn = Intrinsic::getDeclaration(F->getParent(), IID,
685  {F->getReturnType()});
686  return true;
687  }
688 
689  // The following nvvm intrinsics correspond exactly to an LLVM idiom, but
690  // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall.
691  //
692  // TODO: We could add lohi.i2d.
693  bool Expand = StringSwitch<bool>(Name)
694  .Cases("abs.i", "abs.ll", true)
695  .Cases("clz.ll", "popc.ll", "h2f", true)
696  .Cases("max.i", "max.ll", "max.ui", "max.ull", true)
697  .Cases("min.i", "min.ll", "min.ui", "min.ull", true)
698  .Default(false);
699  if (Expand) {
700  NewFn = nullptr;
701  return true;
702  }
703  }
704  break;
705  }
706  case 'o':
707  // We only need to change the name to match the mangling including the
708  // address space.
709  if (Name.startswith("objectsize.")) {
710  Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() };
711  if (F->arg_size() == 2 ||
712  F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) {
713  rename(F);
714  NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize,
715  Tys);
716  return true;
717  }
718  }
719  break;
720 
721  case 's':
722  if (Name == "stackprotectorcheck") {
723  NewFn = nullptr;
724  return true;
725  }
726  break;
727 
728  case 'x':
729  if (UpgradeX86IntrinsicFunction(F, Name, NewFn))
730  return true;
731  }
732  // Remangle our intrinsic since we upgrade the mangling
734  if (Result != None) {
735  NewFn = Result.getValue();
736  return true;
737  }
738 
739  // This may not belong here. This function is effectively being overloaded
740  // to both detect an intrinsic which needs upgrading, and to provide the
741  // upgraded form of the intrinsic. We should perhaps have two separate
742  // functions for this.
743  return false;
744 }
745 
747  NewFn = nullptr;
748  bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn);
749  assert(F != NewFn && "Intrinsic function upgraded to the same function");
750 
751  // Upgrade intrinsic attributes. This does not change the function.
752  if (NewFn)
753  F = NewFn;
754  if (Intrinsic::ID id = F->getIntrinsicID())
756  return Upgraded;
757 }
758 
760  // Nothing to do yet.
761  return false;
762 }
763 
764 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them
765 // to byte shuffles.
767  Value *Op, unsigned Shift) {
768  Type *ResultTy = Op->getType();
769  unsigned NumElts = ResultTy->getVectorNumElements() * 8;
770 
771  // Bitcast from a 64-bit element type to a byte element type.
772  Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
773  Op = Builder.CreateBitCast(Op, VecTy, "cast");
774 
775  // We'll be shuffling in zeroes.
776  Value *Res = Constant::getNullValue(VecTy);
777 
778  // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
779  // we'll just return the zero vector.
780  if (Shift < 16) {
781  uint32_t Idxs[64];
782  // 256/512-bit version is split into 2/4 16-byte lanes.
783  for (unsigned l = 0; l != NumElts; l += 16)
784  for (unsigned i = 0; i != 16; ++i) {
785  unsigned Idx = NumElts + i - Shift;
786  if (Idx < NumElts)
787  Idx -= NumElts - 16; // end of lane, switch operand.
788  Idxs[l + i] = Idx + l;
789  }
790 
791  Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
792  }
793 
794  // Bitcast back to a 64-bit element type.
795  return Builder.CreateBitCast(Res, ResultTy, "cast");
796 }
797 
798 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them
799 // to byte shuffles.
801  unsigned Shift) {
802  Type *ResultTy = Op->getType();
803  unsigned NumElts = ResultTy->getVectorNumElements() * 8;
804 
805  // Bitcast from a 64-bit element type to a byte element type.
806  Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
807  Op = Builder.CreateBitCast(Op, VecTy, "cast");
808 
809  // We'll be shuffling in zeroes.
810  Value *Res = Constant::getNullValue(VecTy);
811 
812  // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
813  // we'll just return the zero vector.
814  if (Shift < 16) {
815  uint32_t Idxs[64];
816  // 256/512-bit version is split into 2/4 16-byte lanes.
817  for (unsigned l = 0; l != NumElts; l += 16)
818  for (unsigned i = 0; i != 16; ++i) {
819  unsigned Idx = i + Shift;
820  if (Idx >= 16)
821  Idx += NumElts - 16; // end of lane, switch operand.
822  Idxs[l + i] = Idx + l;
823  }
824 
825  Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts));
826  }
827 
828  // Bitcast back to a 64-bit element type.
829  return Builder.CreateBitCast(Res, ResultTy, "cast");
830 }
831 
833  unsigned NumElts) {
835  cast<IntegerType>(Mask->getType())->getBitWidth());
836  Mask = Builder.CreateBitCast(Mask, MaskTy);
837 
838  // If we have less than 8 elements, then the starting mask was an i8 and
839  // we need to extract down to the right number of elements.
840  if (NumElts < 8) {
841  uint32_t Indices[4];
842  for (unsigned i = 0; i != NumElts; ++i)
843  Indices[i] = i;
844  Mask = Builder.CreateShuffleVector(Mask, Mask,
845  makeArrayRef(Indices, NumElts),
846  "extract");
847  }
848 
849  return Mask;
850 }
851 
853  Value *Op0, Value *Op1) {
854  // If the mask is all ones just emit the first operation.
855  if (const auto *C = dyn_cast<Constant>(Mask))
856  if (C->isAllOnesValue())
857  return Op0;
858 
859  Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements());
860  return Builder.CreateSelect(Mask, Op0, Op1);
861 }
862 
864  Value *Op0, Value *Op1) {
865  // If the mask is all ones just emit the first operation.
866  if (const auto *C = dyn_cast<Constant>(Mask))
867  if (C->isAllOnesValue())
868  return Op0;
869 
870  llvm::VectorType *MaskTy =
872  Mask->getType()->getIntegerBitWidth());
873  Mask = Builder.CreateBitCast(Mask, MaskTy);
874  Mask = Builder.CreateExtractElement(Mask, (uint64_t)0);
875  return Builder.CreateSelect(Mask, Op0, Op1);
876 }
877 
878 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics.
879 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate
880 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes.
882  Value *Op1, Value *Shift,
883  Value *Passthru, Value *Mask,
884  bool IsVALIGN) {
885  unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue();
886 
887  unsigned NumElts = Op0->getType()->getVectorNumElements();
888  assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!");
889  assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!");
890  assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!");
891 
892  // Mask the immediate for VALIGN.
893  if (IsVALIGN)
894  ShiftVal &= (NumElts - 1);
895 
896  // If palignr is shifting the pair of vectors more than the size of two
897  // lanes, emit zero.
898  if (ShiftVal >= 32)
899  return llvm::Constant::getNullValue(Op0->getType());
900 
901  // If palignr is shifting the pair of input vectors more than one lane,
902  // but less than two lanes, convert to shifting in zeroes.
903  if (ShiftVal > 16) {
904  ShiftVal -= 16;
905  Op1 = Op0;
907  }
908 
909  uint32_t Indices[64];
910  // 256-bit palignr operates on 128-bit lanes so we need to handle that
911  for (unsigned l = 0; l < NumElts; l += 16) {
912  for (unsigned i = 0; i != 16; ++i) {
913  unsigned Idx = ShiftVal + i;
914  if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN.
915  Idx += NumElts - 16; // End of lane, switch operand.
916  Indices[l + i] = Idx + l;
917  }
918  }
919 
920  Value *Align = Builder.CreateShuffleVector(Op1, Op0,
921  makeArrayRef(Indices, NumElts),
922  "palignr");
923 
924  return EmitX86Select(Builder, Mask, Align, Passthru);
925 }
926 
928  bool IsAddition) {
929  Value *Op0 = CI.getOperand(0);
930  Value *Op1 = CI.getOperand(1);
931 
932  // Collect vector elements and type data.
933  Type *ResultType = CI.getType();
934 
935  Value *Res;
936  if (IsAddition) {
937  // ADDUS: a > (a+b) ? ~0 : (a+b)
938  // If Op0 > Add, overflow occured.
939  Value *Add = Builder.CreateAdd(Op0, Op1);
940  Value *ICmp = Builder.CreateICmp(ICmpInst::ICMP_UGT, Op0, Add);
941  Value *Max = llvm::Constant::getAllOnesValue(ResultType);
942  Res = Builder.CreateSelect(ICmp, Max, Add);
943  } else {
944  // SUBUS: max(a, b) - b
945  Value *ICmp = Builder.CreateICmp(ICmpInst::ICMP_UGT, Op0, Op1);
946  Value *Select = Builder.CreateSelect(ICmp, Op0, Op1);
947  Res = Builder.CreateSub(Select, Op1);
948  }
949 
950  if (CI.getNumArgOperands() == 4) { // For masked intrinsics.
951  Value *VecSrc = CI.getOperand(2);
952  Value *Mask = CI.getOperand(3);
953  Res = EmitX86Select(Builder, Mask, Res, VecSrc);
954  }
955  return Res;
956 }
957 
959  Value *Ptr, Value *Data, Value *Mask,
960  bool Aligned) {
961  // Cast the pointer to the right type.
962  Ptr = Builder.CreateBitCast(Ptr,
964  unsigned Align =
965  Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1;
966 
967  // If the mask is all ones just emit a regular store.
968  if (const auto *C = dyn_cast<Constant>(Mask))
969  if (C->isAllOnesValue())
970  return Builder.CreateAlignedStore(Data, Ptr, Align);
971 
972  // Convert the mask from an integer type to a vector of i1.
973  unsigned NumElts = Data->getType()->getVectorNumElements();
974  Mask = getX86MaskVec(Builder, Mask, NumElts);
975  return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
976 }
977 
979  Value *Ptr, Value *Passthru, Value *Mask,
980  bool Aligned) {
981  // Cast the pointer to the right type.
982  Ptr = Builder.CreateBitCast(Ptr,
984  unsigned Align =
985  Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1;
986 
987  // If the mask is all ones just emit a regular store.
988  if (const auto *C = dyn_cast<Constant>(Mask))
989  if (C->isAllOnesValue())
990  return Builder.CreateAlignedLoad(Ptr, Align);
991 
992  // Convert the mask from an integer type to a vector of i1.
993  unsigned NumElts = Passthru->getType()->getVectorNumElements();
994  Mask = getX86MaskVec(Builder, Mask, NumElts);
995  return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
996 }
997 
998 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) {
999  Value *Op0 = CI.getArgOperand(0);
1000  llvm::Type *Ty = Op0->getType();
1001  Value *Zero = llvm::Constant::getNullValue(Ty);
1002  Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero);
1003  Value *Neg = Builder.CreateNeg(Op0);
1004  Value *Res = Builder.CreateSelect(Cmp, Op0, Neg);
1005 
1006  if (CI.getNumArgOperands() == 3)
1007  Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1));
1008 
1009  return Res;
1010 }
1011 
1013  ICmpInst::Predicate Pred) {
1014  Value *Op0 = CI.getArgOperand(0);
1015  Value *Op1 = CI.getArgOperand(1);
1016  Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1);
1017  Value *Res = Builder.CreateSelect(Cmp, Op0, Op1);
1018 
1019  if (CI.getNumArgOperands() == 4)
1020  Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2));
1021 
1022  return Res;
1023 }
1024 
1025 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) {
1026  Type *Ty = CI.getType();
1027 
1028  // Arguments have a vXi32 type so cast to vXi64.
1029  Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty);
1030  Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty);
1031 
1032  if (IsSigned) {
1033  // Shift left then arithmetic shift right.
1034  Constant *ShiftAmt = ConstantInt::get(Ty, 32);
1035  LHS = Builder.CreateShl(LHS, ShiftAmt);
1036  LHS = Builder.CreateAShr(LHS, ShiftAmt);
1037  RHS = Builder.CreateShl(RHS, ShiftAmt);
1038  RHS = Builder.CreateAShr(RHS, ShiftAmt);
1039  } else {
1040  // Clear the upper bits.
1041  Constant *Mask = ConstantInt::get(Ty, 0xffffffff);
1042  LHS = Builder.CreateAnd(LHS, Mask);
1043  RHS = Builder.CreateAnd(RHS, Mask);
1044  }
1045 
1046  Value *Res = Builder.CreateMul(LHS, RHS);
1047 
1048  if (CI.getNumArgOperands() == 4)
1049  Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2));
1050 
1051  return Res;
1052 }
1053 
1054 // Applying mask on vector of i1's and make sure result is at least 8 bits wide.
1056  Value *Mask) {
1057  unsigned NumElts = Vec->getType()->getVectorNumElements();
1058  if (Mask) {
1059  const auto *C = dyn_cast<Constant>(Mask);
1060  if (!C || !C->isAllOnesValue())
1061  Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts));
1062  }
1063 
1064  if (NumElts < 8) {
1065  uint32_t Indices[8];
1066  for (unsigned i = 0; i != NumElts; ++i)
1067  Indices[i] = i;
1068  for (unsigned i = NumElts; i != 8; ++i)
1069  Indices[i] = NumElts + i % NumElts;
1070  Vec = Builder.CreateShuffleVector(Vec,
1072  Indices);
1073  }
1074  return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U)));
1075 }
1076 
1078  unsigned CC, bool Signed) {
1079  Value *Op0 = CI.getArgOperand(0);
1080  unsigned NumElts = Op0->getType()->getVectorNumElements();
1081 
1082  Value *Cmp;
1083  if (CC == 3) {
1084  Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts));
1085  } else if (CC == 7) {
1086  Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts));
1087  } else {
1088  ICmpInst::Predicate Pred;
1089  switch (CC) {
1090  default: llvm_unreachable("Unknown condition code");
1091  case 0: Pred = ICmpInst::ICMP_EQ; break;
1092  case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break;
1093  case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break;
1094  case 4: Pred = ICmpInst::ICMP_NE; break;
1095  case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break;
1096  case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break;
1097  }
1098  Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1));
1099  }
1100 
1101  Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1);
1102 
1103  return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask);
1104 }
1105 
1106 // Replace a masked intrinsic with an older unmasked intrinsic.
1108  Intrinsic::ID IID) {
1109  Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID);
1110  Value *Rep = Builder.CreateCall(Intrin,
1111  { CI.getArgOperand(0), CI.getArgOperand(1) });
1112  return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2));
1113 }
1114 
1116  Value* A = CI.getArgOperand(0);
1117  Value* B = CI.getArgOperand(1);
1118  Value* Src = CI.getArgOperand(2);
1119  Value* Mask = CI.getArgOperand(3);
1120 
1121  Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1));
1122  Value* Cmp = Builder.CreateIsNotNull(AndNode);
1123  Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0);
1124  Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0);
1125  Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2);
1126  return Builder.CreateInsertElement(A, Select, (uint64_t)0);
1127 }
1128 
1129 
1130 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) {
1131  Value* Op = CI.getArgOperand(0);
1132  Type* ReturnOp = CI.getType();
1133  unsigned NumElts = CI.getType()->getVectorNumElements();
1134  Value *Mask = getX86MaskVec(Builder, Op, NumElts);
1135  return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2");
1136 }
1137 
1138 // Replace intrinsic with unmasked version and a select.
1140  CallInst &CI, Value *&Rep) {
1141  Name = Name.substr(12); // Remove avx512.mask.
1142 
1143  unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits();
1144  unsigned EltWidth = CI.getType()->getScalarSizeInBits();
1145  Intrinsic::ID IID;
1146  if (Name.startswith("max.p")) {
1147  if (VecWidth == 128 && EltWidth == 32)
1148  IID = Intrinsic::x86_sse_max_ps;
1149  else if (VecWidth == 128 && EltWidth == 64)
1150  IID = Intrinsic::x86_sse2_max_pd;
1151  else if (VecWidth == 256 && EltWidth == 32)
1152  IID = Intrinsic::x86_avx_max_ps_256;
1153  else if (VecWidth == 256 && EltWidth == 64)
1154  IID = Intrinsic::x86_avx_max_pd_256;
1155  else
1156  llvm_unreachable("Unexpected intrinsic");
1157  } else if (Name.startswith("min.p")) {
1158  if (VecWidth == 128 && EltWidth == 32)
1159  IID = Intrinsic::x86_sse_min_ps;
1160  else if (VecWidth == 128 && EltWidth == 64)
1161  IID = Intrinsic::x86_sse2_min_pd;
1162  else if (VecWidth == 256 && EltWidth == 32)
1163  IID = Intrinsic::x86_avx_min_ps_256;
1164  else if (VecWidth == 256 && EltWidth == 64)
1165  IID = Intrinsic::x86_avx_min_pd_256;
1166  else
1167  llvm_unreachable("Unexpected intrinsic");
1168  } else if (Name.startswith("pshuf.b.")) {
1169  if (VecWidth == 128)
1170  IID = Intrinsic::x86_ssse3_pshuf_b_128;
1171  else if (VecWidth == 256)
1172  IID = Intrinsic::x86_avx2_pshuf_b;
1173  else if (VecWidth == 512)
1174  IID = Intrinsic::x86_avx512_pshuf_b_512;
1175  else
1176  llvm_unreachable("Unexpected intrinsic");
1177  } else if (Name.startswith("pmul.hr.sw.")) {
1178  if (VecWidth == 128)
1179  IID = Intrinsic::x86_ssse3_pmul_hr_sw_128;
1180  else if (VecWidth == 256)
1181  IID = Intrinsic::x86_avx2_pmul_hr_sw;
1182  else if (VecWidth == 512)
1183  IID = Intrinsic::x86_avx512_pmul_hr_sw_512;
1184  else
1185  llvm_unreachable("Unexpected intrinsic");
1186  } else if (Name.startswith("pmulh.w.")) {
1187  if (VecWidth == 128)
1188  IID = Intrinsic::x86_sse2_pmulh_w;
1189  else if (VecWidth == 256)
1190  IID = Intrinsic::x86_avx2_pmulh_w;
1191  else if (VecWidth == 512)
1192  IID = Intrinsic::x86_avx512_pmulh_w_512;
1193  else
1194  llvm_unreachable("Unexpected intrinsic");
1195  } else if (Name.startswith("pmulhu.w.")) {
1196  if (VecWidth == 128)
1197  IID = Intrinsic::x86_sse2_pmulhu_w;
1198  else if (VecWidth == 256)
1199  IID = Intrinsic::x86_avx2_pmulhu_w;
1200  else if (VecWidth == 512)
1201  IID = Intrinsic::x86_avx512_pmulhu_w_512;
1202  else
1203  llvm_unreachable("Unexpected intrinsic");
1204  } else if (Name.startswith("pmaddw.d.")) {
1205  if (VecWidth == 128)
1206  IID = Intrinsic::x86_sse2_pmadd_wd;
1207  else if (VecWidth == 256)
1208  IID = Intrinsic::x86_avx2_pmadd_wd;
1209  else if (VecWidth == 512)
1210  IID = Intrinsic::x86_avx512_pmaddw_d_512;
1211  else
1212  llvm_unreachable("Unexpected intrinsic");
1213  } else if (Name.startswith("pmaddubs.w.")) {
1214  if (VecWidth == 128)
1215  IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128;
1216  else if (VecWidth == 256)
1217  IID = Intrinsic::x86_avx2_pmadd_ub_sw;
1218  else if (VecWidth == 512)
1219  IID = Intrinsic::x86_avx512_pmaddubs_w_512;
1220  else
1221  llvm_unreachable("Unexpected intrinsic");
1222  } else if (Name.startswith("packsswb.")) {
1223  if (VecWidth == 128)
1224  IID = Intrinsic::x86_sse2_packsswb_128;
1225  else if (VecWidth == 256)
1226  IID = Intrinsic::x86_avx2_packsswb;
1227  else if (VecWidth == 512)
1228  IID = Intrinsic::x86_avx512_packsswb_512;
1229  else
1230  llvm_unreachable("Unexpected intrinsic");
1231  } else if (Name.startswith("packssdw.")) {
1232  if (VecWidth == 128)
1233  IID = Intrinsic::x86_sse2_packssdw_128;
1234  else if (VecWidth == 256)
1235  IID = Intrinsic::x86_avx2_packssdw;
1236  else if (VecWidth == 512)
1237  IID = Intrinsic::x86_avx512_packssdw_512;
1238  else
1239  llvm_unreachable("Unexpected intrinsic");
1240  } else if (Name.startswith("packuswb.")) {
1241  if (VecWidth == 128)
1242  IID = Intrinsic::x86_sse2_packuswb_128;
1243  else if (VecWidth == 256)
1244  IID = Intrinsic::x86_avx2_packuswb;
1245  else if (VecWidth == 512)
1246  IID = Intrinsic::x86_avx512_packuswb_512;
1247  else
1248  llvm_unreachable("Unexpected intrinsic");
1249  } else if (Name.startswith("packusdw.")) {
1250  if (VecWidth == 128)
1251  IID = Intrinsic::x86_sse41_packusdw;
1252  else if (VecWidth == 256)
1253  IID = Intrinsic::x86_avx2_packusdw;
1254  else if (VecWidth == 512)
1255  IID = Intrinsic::x86_avx512_packusdw_512;
1256  else
1257  llvm_unreachable("Unexpected intrinsic");
1258  } else if (Name.startswith("vpermilvar.")) {
1259  if (VecWidth == 128 && EltWidth == 32)
1260  IID = Intrinsic::x86_avx_vpermilvar_ps;
1261  else if (VecWidth == 128 && EltWidth == 64)
1262  IID = Intrinsic::x86_avx_vpermilvar_pd;
1263  else if (VecWidth == 256 && EltWidth == 32)
1264  IID = Intrinsic::x86_avx_vpermilvar_ps_256;
1265  else if (VecWidth == 256 && EltWidth == 64)
1266  IID = Intrinsic::x86_avx_vpermilvar_pd_256;
1267  else if (VecWidth == 512 && EltWidth == 32)
1268  IID = Intrinsic::x86_avx512_vpermilvar_ps_512;
1269  else if (VecWidth == 512 && EltWidth == 64)
1270  IID = Intrinsic::x86_avx512_vpermilvar_pd_512;
1271  else
1272  llvm_unreachable("Unexpected intrinsic");
1273  } else if (Name == "cvtpd2dq.256") {
1274  IID = Intrinsic::x86_avx_cvt_pd2dq_256;
1275  } else if (Name == "cvtpd2ps.256") {
1276  IID = Intrinsic::x86_avx_cvt_pd2_ps_256;
1277  } else if (Name == "cvttpd2dq.256") {
1278  IID = Intrinsic::x86_avx_cvtt_pd2dq_256;
1279  } else if (Name == "cvttps2dq.128") {
1280  IID = Intrinsic::x86_sse2_cvttps2dq;
1281  } else if (Name == "cvttps2dq.256") {
1282  IID = Intrinsic::x86_avx_cvtt_ps2dq_256;
1283  } else if (Name.startswith("permvar.")) {
1284  bool IsFloat = CI.getType()->isFPOrFPVectorTy();
1285  if (VecWidth == 256 && EltWidth == 32 && IsFloat)
1286  IID = Intrinsic::x86_avx2_permps;
1287  else if (VecWidth == 256 && EltWidth == 32 && !IsFloat)
1288  IID = Intrinsic::x86_avx2_permd;
1289  else if (VecWidth == 256 && EltWidth == 64 && IsFloat)
1290  IID = Intrinsic::x86_avx512_permvar_df_256;
1291  else if (VecWidth == 256 && EltWidth == 64 && !IsFloat)
1292  IID = Intrinsic::x86_avx512_permvar_di_256;
1293  else if (VecWidth == 512 && EltWidth == 32 && IsFloat)
1294  IID = Intrinsic::x86_avx512_permvar_sf_512;
1295  else if (VecWidth == 512 && EltWidth == 32 && !IsFloat)
1296  IID = Intrinsic::x86_avx512_permvar_si_512;
1297  else if (VecWidth == 512 && EltWidth == 64 && IsFloat)
1298  IID = Intrinsic::x86_avx512_permvar_df_512;
1299  else if (VecWidth == 512 && EltWidth == 64 && !IsFloat)
1300  IID = Intrinsic::x86_avx512_permvar_di_512;
1301  else if (VecWidth == 128 && EltWidth == 16)
1302  IID = Intrinsic::x86_avx512_permvar_hi_128;
1303  else if (VecWidth == 256 && EltWidth == 16)
1304  IID = Intrinsic::x86_avx512_permvar_hi_256;
1305  else if (VecWidth == 512 && EltWidth == 16)
1306  IID = Intrinsic::x86_avx512_permvar_hi_512;
1307  else if (VecWidth == 128 && EltWidth == 8)
1308  IID = Intrinsic::x86_avx512_permvar_qi_128;
1309  else if (VecWidth == 256 && EltWidth == 8)
1310  IID = Intrinsic::x86_avx512_permvar_qi_256;
1311  else if (VecWidth == 512 && EltWidth == 8)
1312  IID = Intrinsic::x86_avx512_permvar_qi_512;
1313  else
1314  llvm_unreachable("Unexpected intrinsic");
1315  } else if (Name.startswith("dbpsadbw.")) {
1316  if (VecWidth == 128)
1317  IID = Intrinsic::x86_avx512_dbpsadbw_128;
1318  else if (VecWidth == 256)
1319  IID = Intrinsic::x86_avx512_dbpsadbw_256;
1320  else if (VecWidth == 512)
1321  IID = Intrinsic::x86_avx512_dbpsadbw_512;
1322  else
1323  llvm_unreachable("Unexpected intrinsic");
1324  } else if (Name.startswith("vpshld.")) {
1325  if (VecWidth == 128 && Name[7] == 'q')
1326  IID = Intrinsic::x86_avx512_vpshld_q_128;
1327  else if (VecWidth == 128 && Name[7] == 'd')
1328  IID = Intrinsic::x86_avx512_vpshld_d_128;
1329  else if (VecWidth == 128 && Name[7] == 'w')
1330  IID = Intrinsic::x86_avx512_vpshld_w_128;
1331  else if (VecWidth == 256 && Name[7] == 'q')
1332  IID = Intrinsic::x86_avx512_vpshld_q_256;
1333  else if (VecWidth == 256 && Name[7] == 'd')
1334  IID = Intrinsic::x86_avx512_vpshld_d_256;
1335  else if (VecWidth == 256 && Name[7] == 'w')
1336  IID = Intrinsic::x86_avx512_vpshld_w_256;
1337  else if (VecWidth == 512 && Name[7] == 'q')
1338  IID = Intrinsic::x86_avx512_vpshld_q_512;
1339  else if (VecWidth == 512 && Name[7] == 'd')
1340  IID = Intrinsic::x86_avx512_vpshld_d_512;
1341  else if (VecWidth == 512 && Name[7] == 'w')
1342  IID = Intrinsic::x86_avx512_vpshld_w_512;
1343  else
1344  llvm_unreachable("Unexpected intrinsic");
1345  } else if (Name.startswith("vpshrd.")) {
1346  if (VecWidth == 128 && Name[7] == 'q')
1347  IID = Intrinsic::x86_avx512_vpshrd_q_128;
1348  else if (VecWidth == 128 && Name[7] == 'd')
1349  IID = Intrinsic::x86_avx512_vpshrd_d_128;
1350  else if (VecWidth == 128 && Name[7] == 'w')
1351  IID = Intrinsic::x86_avx512_vpshrd_w_128;
1352  else if (VecWidth == 256 && Name[7] == 'q')
1353  IID = Intrinsic::x86_avx512_vpshrd_q_256;
1354  else if (VecWidth == 256 && Name[7] == 'd')
1355  IID = Intrinsic::x86_avx512_vpshrd_d_256;
1356  else if (VecWidth == 256 && Name[7] == 'w')
1357  IID = Intrinsic::x86_avx512_vpshrd_w_256;
1358  else if (VecWidth == 512 && Name[7] == 'q')
1359  IID = Intrinsic::x86_avx512_vpshrd_q_512;
1360  else if (VecWidth == 512 && Name[7] == 'd')
1361  IID = Intrinsic::x86_avx512_vpshrd_d_512;
1362  else if (VecWidth == 512 && Name[7] == 'w')
1363  IID = Intrinsic::x86_avx512_vpshrd_w_512;
1364  else
1365  llvm_unreachable("Unexpected intrinsic");
1366  } else if (Name.startswith("prorv.")) {
1367  if (VecWidth == 128 && EltWidth == 32)
1368  IID = Intrinsic::x86_avx512_prorv_d_128;
1369  else if (VecWidth == 256 && EltWidth == 32)
1370  IID = Intrinsic::x86_avx512_prorv_d_256;
1371  else if (VecWidth == 512 && EltWidth == 32)
1372  IID = Intrinsic::x86_avx512_prorv_d_512;
1373  else if (VecWidth == 128 && EltWidth == 64)
1374  IID = Intrinsic::x86_avx512_prorv_q_128;
1375  else if (VecWidth == 256 && EltWidth == 64)
1376  IID = Intrinsic::x86_avx512_prorv_q_256;
1377  else if (VecWidth == 512 && EltWidth == 64)
1378  IID = Intrinsic::x86_avx512_prorv_q_512;
1379  else
1380  llvm_unreachable("Unexpected intrinsic");
1381  } else if (Name.startswith("prolv.")) {
1382  if (VecWidth == 128 && EltWidth == 32)
1383  IID = Intrinsic::x86_avx512_prolv_d_128;
1384  else if (VecWidth == 256 && EltWidth == 32)
1385  IID = Intrinsic::x86_avx512_prolv_d_256;
1386  else if (VecWidth == 512 && EltWidth == 32)
1387  IID = Intrinsic::x86_avx512_prolv_d_512;
1388  else if (VecWidth == 128 && EltWidth == 64)
1389  IID = Intrinsic::x86_avx512_prolv_q_128;
1390  else if (VecWidth == 256 && EltWidth == 64)
1391  IID = Intrinsic::x86_avx512_prolv_q_256;
1392  else if (VecWidth == 512 && EltWidth == 64)
1393  IID = Intrinsic::x86_avx512_prolv_q_512;
1394  else
1395  llvm_unreachable("Unexpected intrinsic");
1396  } else if (Name.startswith("pror.")) {
1397  if (VecWidth == 128 && EltWidth == 32)
1398  IID = Intrinsic::x86_avx512_pror_d_128;
1399  else if (VecWidth == 256 && EltWidth == 32)
1400  IID = Intrinsic::x86_avx512_pror_d_256;
1401  else if (VecWidth == 512 && EltWidth == 32)
1402  IID = Intrinsic::x86_avx512_pror_d_512;
1403  else if (VecWidth == 128 && EltWidth == 64)
1404  IID = Intrinsic::x86_avx512_pror_q_128;
1405  else if (VecWidth == 256 && EltWidth == 64)
1406  IID = Intrinsic::x86_avx512_pror_q_256;
1407  else if (VecWidth == 512 && EltWidth == 64)
1408  IID = Intrinsic::x86_avx512_pror_q_512;
1409  else
1410  llvm_unreachable("Unexpected intrinsic");
1411  } else if (Name.startswith("prol.")) {
1412  if (VecWidth == 128 && EltWidth == 32)
1413  IID = Intrinsic::x86_avx512_prol_d_128;
1414  else if (VecWidth == 256 && EltWidth == 32)
1415  IID = Intrinsic::x86_avx512_prol_d_256;
1416  else if (VecWidth == 512 && EltWidth == 32)
1417  IID = Intrinsic::x86_avx512_prol_d_512;
1418  else if (VecWidth == 128 && EltWidth == 64)
1419  IID = Intrinsic::x86_avx512_prol_q_128;
1420  else if (VecWidth == 256 && EltWidth == 64)
1421  IID = Intrinsic::x86_avx512_prol_q_256;
1422  else if (VecWidth == 512 && EltWidth == 64)
1423  IID = Intrinsic::x86_avx512_prol_q_512;
1424  else
1425  llvm_unreachable("Unexpected intrinsic");
1426  } else if (Name.startswith("padds.")) {
1427  if (VecWidth == 128 && EltWidth == 8)
1428  IID = Intrinsic::x86_sse2_padds_b;
1429  else if (VecWidth == 256 && EltWidth == 8)
1430  IID = Intrinsic::x86_avx2_padds_b;
1431  else if (VecWidth == 512 && EltWidth == 8)
1432  IID = Intrinsic::x86_avx512_padds_b_512;
1433  else if (VecWidth == 128 && EltWidth == 16)
1434  IID = Intrinsic::x86_sse2_padds_w;
1435  else if (VecWidth == 256 && EltWidth == 16)
1436  IID = Intrinsic::x86_avx2_padds_w;
1437  else if (VecWidth == 512 && EltWidth == 16)
1438  IID = Intrinsic::x86_avx512_padds_w_512;
1439  else
1440  llvm_unreachable("Unexpected intrinsic");
1441  } else if (Name.startswith("psubs.")) {
1442  if (VecWidth == 128 && EltWidth == 8)
1443  IID = Intrinsic::x86_sse2_psubs_b;
1444  else if (VecWidth == 256 && EltWidth == 8)
1445  IID = Intrinsic::x86_avx2_psubs_b;
1446  else if (VecWidth == 512 && EltWidth == 8)
1447  IID = Intrinsic::x86_avx512_psubs_b_512;
1448  else if (VecWidth == 128 && EltWidth == 16)
1449  IID = Intrinsic::x86_sse2_psubs_w;
1450  else if (VecWidth == 256 && EltWidth == 16)
1451  IID = Intrinsic::x86_avx2_psubs_w;
1452  else if (VecWidth == 512 && EltWidth == 16)
1453  IID = Intrinsic::x86_avx512_psubs_w_512;
1454  else
1455  llvm_unreachable("Unexpected intrinsic");
1456  } else
1457  return false;
1458 
1460  CI.arg_operands().end());
1461  Args.pop_back();
1462  Args.pop_back();
1463  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID),
1464  Args);
1465  unsigned NumArgs = CI.getNumArgOperands();
1466  Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep,
1467  CI.getArgOperand(NumArgs - 2));
1468  return true;
1469 }
1470 
1471 /// Upgrade comment in call to inline asm that represents an objc retain release
1472 /// marker.
1473 void llvm::UpgradeInlineAsmString(std::string *AsmStr) {
1474  size_t Pos;
1475  if (AsmStr->find("mov\tfp") == 0 &&
1476  AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos &&
1477  (Pos = AsmStr->find("# marker")) != std::string::npos) {
1478  AsmStr->replace(Pos, 1, ";");
1479  }
1480  return;
1481 }
1482 
1483 /// Upgrade a call to an old intrinsic. All argument and return casting must be
1484 /// provided to seamlessly integrate with existing context.
1486  Function *F = CI->getCalledFunction();
1487  LLVMContext &C = CI->getContext();
1488  IRBuilder<> Builder(C);
1489  Builder.SetInsertPoint(CI->getParent(), CI->getIterator());
1490 
1491  assert(F && "Intrinsic call is not direct?");
1492 
1493  if (!NewFn) {
1494  // Get the Function's name.
1495  StringRef Name = F->getName();
1496 
1497  assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'");
1498  Name = Name.substr(5);
1499 
1500  bool IsX86 = Name.startswith("x86.");
1501  if (IsX86)
1502  Name = Name.substr(4);
1503  bool IsNVVM = Name.startswith("nvvm.");
1504  if (IsNVVM)
1505  Name = Name.substr(5);
1506 
1507  if (IsX86 && Name.startswith("sse4a.movnt.")) {
1508  Module *M = F->getParent();
1510  Elts.push_back(
1512  MDNode *Node = MDNode::get(C, Elts);
1513 
1514  Value *Arg0 = CI->getArgOperand(0);
1515  Value *Arg1 = CI->getArgOperand(1);
1516 
1517  // Nontemporal (unaligned) store of the 0'th element of the float/double
1518  // vector.
1519  Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType();
1520  PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy);
1521  Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast");
1522  Value *Extract =
1523  Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement");
1524 
1525  StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1);
1526  SI->setMetadata(M->getMDKindID("nontemporal"), Node);
1527 
1528  // Remove intrinsic.
1529  CI->eraseFromParent();
1530  return;
1531  }
1532 
1533  if (IsX86 && (Name.startswith("avx.movnt.") ||
1534  Name.startswith("avx512.storent."))) {
1535  Module *M = F->getParent();
1537  Elts.push_back(
1539  MDNode *Node = MDNode::get(C, Elts);
1540 
1541  Value *Arg0 = CI->getArgOperand(0);
1542  Value *Arg1 = CI->getArgOperand(1);
1543 
1544  // Convert the type of the pointer to a pointer to the stored type.
1545  Value *BC = Builder.CreateBitCast(Arg0,
1547  "cast");
1548  VectorType *VTy = cast<VectorType>(Arg1->getType());
1549  StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC,
1550  VTy->getBitWidth() / 8);
1551  SI->setMetadata(M->getMDKindID("nontemporal"), Node);
1552 
1553  // Remove intrinsic.
1554  CI->eraseFromParent();
1555  return;
1556  }
1557 
1558  if (IsX86 && Name == "sse2.storel.dq") {
1559  Value *Arg0 = CI->getArgOperand(0);
1560  Value *Arg1 = CI->getArgOperand(1);
1561 
1562  Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
1563  Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
1564  Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0);
1565  Value *BC = Builder.CreateBitCast(Arg0,
1567  "cast");
1568  Builder.CreateAlignedStore(Elt, BC, 1);
1569 
1570  // Remove intrinsic.
1571  CI->eraseFromParent();
1572  return;
1573  }
1574 
1575  if (IsX86 && (Name.startswith("sse.storeu.") ||
1576  Name.startswith("sse2.storeu.") ||
1577  Name.startswith("avx.storeu."))) {
1578  Value *Arg0 = CI->getArgOperand(0);
1579  Value *Arg1 = CI->getArgOperand(1);
1580 
1581  Arg0 = Builder.CreateBitCast(Arg0,
1583  "cast");
1584  Builder.CreateAlignedStore(Arg1, Arg0, 1);
1585 
1586  // Remove intrinsic.
1587  CI->eraseFromParent();
1588  return;
1589  }
1590 
1591  if (IsX86 && Name == "avx512.mask.store.ss") {
1592  Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1));
1593  UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
1594  Mask, false);
1595 
1596  // Remove intrinsic.
1597  CI->eraseFromParent();
1598  return;
1599  }
1600 
1601  if (IsX86 && (Name.startswith("avx512.mask.store"))) {
1602  // "avx512.mask.storeu." or "avx512.mask.store."
1603  bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu".
1604  UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
1605  CI->getArgOperand(2), Aligned);
1606 
1607  // Remove intrinsic.
1608  CI->eraseFromParent();
1609  return;
1610  }
1611 
1612  Value *Rep;
1613  // Upgrade packed integer vector compare intrinsics to compare instructions.
1614  if (IsX86 && (Name.startswith("sse2.pcmp") ||
1615  Name.startswith("avx2.pcmp"))) {
1616  // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt."
1617  bool CmpEq = Name[9] == 'e';
1618  Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT,
1619  CI->getArgOperand(0), CI->getArgOperand(1));
1620  Rep = Builder.CreateSExt(Rep, CI->getType(), "");
1621  } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) {
1622  Type *ExtTy = Type::getInt32Ty(C);
1623  if (CI->getOperand(0)->getType()->isIntegerTy(8))
1624  ExtTy = Type::getInt64Ty(C);
1625  unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() /
1626  ExtTy->getPrimitiveSizeInBits();
1627  Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy);
1628  Rep = Builder.CreateVectorSplat(NumElts, Rep);
1629  } else if (IsX86 && (Name == "sse.sqrt.ss" ||
1630  Name == "sse2.sqrt.sd")) {
1631  Value *Vec = CI->getArgOperand(0);
1632  Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0);
1634  Intrinsic::sqrt, Elt0->getType());
1635  Elt0 = Builder.CreateCall(Intr, Elt0);
1636  Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0);
1637  } else if (IsX86 && (Name.startswith("avx.sqrt.p") ||
1638  Name.startswith("sse2.sqrt.p") ||
1639  Name.startswith("sse.sqrt.p"))) {
1640  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
1641  Intrinsic::sqrt,
1642  CI->getType()),
1643  {CI->getArgOperand(0)});
1644  } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) {
1645  if (CI->getNumArgOperands() == 4 &&
1646  (!isa<ConstantInt>(CI->getArgOperand(3)) ||
1647  cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) {
1648  Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512
1649  : Intrinsic::x86_avx512_sqrt_pd_512;
1650 
1651  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) };
1652  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(),
1653  IID), Args);
1654  } else {
1655  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
1656  Intrinsic::sqrt,
1657  CI->getType()),
1658  {CI->getArgOperand(0)});
1659  }
1660  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1661  CI->getArgOperand(1));
1662  } else if (IsX86 && (Name.startswith("avx512.ptestm") ||
1663  Name.startswith("avx512.ptestnm"))) {
1664  Value *Op0 = CI->getArgOperand(0);
1665  Value *Op1 = CI->getArgOperand(1);
1666  Value *Mask = CI->getArgOperand(2);
1667  Rep = Builder.CreateAnd(Op0, Op1);
1668  llvm::Type *Ty = Op0->getType();
1669  Value *Zero = llvm::Constant::getNullValue(Ty);
1670  ICmpInst::Predicate Pred =
1671  Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ;
1672  Rep = Builder.CreateICmp(Pred, Rep, Zero);
1673  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask);
1674  } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){
1675  unsigned NumElts =
1677  Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0));
1678  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1679  CI->getArgOperand(1));
1680  } else if (IsX86 && (Name.startswith("avx512.kunpck"))) {
1681  unsigned NumElts = CI->getType()->getScalarSizeInBits();
1682  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts);
1683  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts);
1684  uint32_t Indices[64];
1685  for (unsigned i = 0; i != NumElts; ++i)
1686  Indices[i] = i;
1687 
1688  // First extract half of each vector. This gives better codegen than
1689  // doing it in a single shuffle.
1690  LHS = Builder.CreateShuffleVector(LHS, LHS,
1691  makeArrayRef(Indices, NumElts / 2));
1692  RHS = Builder.CreateShuffleVector(RHS, RHS,
1693  makeArrayRef(Indices, NumElts / 2));
1694  // Concat the vectors.
1695  // NOTE: Operands have to be swapped to match intrinsic definition.
1696  Rep = Builder.CreateShuffleVector(RHS, LHS,
1697  makeArrayRef(Indices, NumElts));
1698  Rep = Builder.CreateBitCast(Rep, CI->getType());
1699  } else if (IsX86 && Name == "avx512.kand.w") {
1700  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1701  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1702  Rep = Builder.CreateAnd(LHS, RHS);
1703  Rep = Builder.CreateBitCast(Rep, CI->getType());
1704  } else if (IsX86 && Name == "avx512.kandn.w") {
1705  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1706  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1707  LHS = Builder.CreateNot(LHS);
1708  Rep = Builder.CreateAnd(LHS, RHS);
1709  Rep = Builder.CreateBitCast(Rep, CI->getType());
1710  } else if (IsX86 && Name == "avx512.kor.w") {
1711  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1712  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1713  Rep = Builder.CreateOr(LHS, RHS);
1714  Rep = Builder.CreateBitCast(Rep, CI->getType());
1715  } else if (IsX86 && Name == "avx512.kxor.w") {
1716  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1717  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1718  Rep = Builder.CreateXor(LHS, RHS);
1719  Rep = Builder.CreateBitCast(Rep, CI->getType());
1720  } else if (IsX86 && Name == "avx512.kxnor.w") {
1721  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1722  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1723  LHS = Builder.CreateNot(LHS);
1724  Rep = Builder.CreateXor(LHS, RHS);
1725  Rep = Builder.CreateBitCast(Rep, CI->getType());
1726  } else if (IsX86 && Name == "avx512.knot.w") {
1727  Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1728  Rep = Builder.CreateNot(Rep);
1729  Rep = Builder.CreateBitCast(Rep, CI->getType());
1730  } else if (IsX86 &&
1731  (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) {
1732  Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16);
1733  Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16);
1734  Rep = Builder.CreateOr(LHS, RHS);
1735  Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty());
1736  Value *C;
1737  if (Name[14] == 'c')
1739  else
1740  C = ConstantInt::getNullValue(Builder.getInt16Ty());
1741  Rep = Builder.CreateICmpEQ(Rep, C);
1742  Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty());
1743  } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" ||
1744  Name == "sse.sub.ss" || Name == "sse2.sub.sd" ||
1745  Name == "sse.mul.ss" || Name == "sse2.mul.sd" ||
1746  Name == "sse.div.ss" || Name == "sse2.div.sd")) {
1747  Type *I32Ty = Type::getInt32Ty(C);
1748  Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0),
1749  ConstantInt::get(I32Ty, 0));
1750  Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1),
1751  ConstantInt::get(I32Ty, 0));
1752  Value *EltOp;
1753  if (Name.contains(".add."))
1754  EltOp = Builder.CreateFAdd(Elt0, Elt1);
1755  else if (Name.contains(".sub."))
1756  EltOp = Builder.CreateFSub(Elt0, Elt1);
1757  else if (Name.contains(".mul."))
1758  EltOp = Builder.CreateFMul(Elt0, Elt1);
1759  else
1760  EltOp = Builder.CreateFDiv(Elt0, Elt1);
1761  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp,
1762  ConstantInt::get(I32Ty, 0));
1763  } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) {
1764  // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt."
1765  bool CmpEq = Name[16] == 'e';
1766  Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true);
1767  } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) {
1768  Type *OpTy = CI->getArgOperand(0)->getType();
1769  unsigned VecWidth = OpTy->getPrimitiveSizeInBits();
1770  unsigned EltWidth = OpTy->getScalarSizeInBits();
1771  Intrinsic::ID IID;
1772  if (VecWidth == 128 && EltWidth == 32)
1773  IID = Intrinsic::x86_avx512_fpclass_ps_128;
1774  else if (VecWidth == 256 && EltWidth == 32)
1775  IID = Intrinsic::x86_avx512_fpclass_ps_256;
1776  else if (VecWidth == 512 && EltWidth == 32)
1777  IID = Intrinsic::x86_avx512_fpclass_ps_512;
1778  else if (VecWidth == 128 && EltWidth == 64)
1779  IID = Intrinsic::x86_avx512_fpclass_pd_128;
1780  else if (VecWidth == 256 && EltWidth == 64)
1781  IID = Intrinsic::x86_avx512_fpclass_pd_256;
1782  else if (VecWidth == 512 && EltWidth == 64)
1783  IID = Intrinsic::x86_avx512_fpclass_pd_512;
1784  else
1785  llvm_unreachable("Unexpected intrinsic");
1786 
1787  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1788  { CI->getOperand(0), CI->getArgOperand(1) });
1789  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2));
1790  } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) {
1791  Type *OpTy = CI->getArgOperand(0)->getType();
1792  unsigned VecWidth = OpTy->getPrimitiveSizeInBits();
1793  unsigned EltWidth = OpTy->getScalarSizeInBits();
1794  Intrinsic::ID IID;
1795  if (VecWidth == 128 && EltWidth == 32)
1796  IID = Intrinsic::x86_avx512_cmp_ps_128;
1797  else if (VecWidth == 256 && EltWidth == 32)
1798  IID = Intrinsic::x86_avx512_cmp_ps_256;
1799  else if (VecWidth == 512 && EltWidth == 32)
1800  IID = Intrinsic::x86_avx512_cmp_ps_512;
1801  else if (VecWidth == 128 && EltWidth == 64)
1802  IID = Intrinsic::x86_avx512_cmp_pd_128;
1803  else if (VecWidth == 256 && EltWidth == 64)
1804  IID = Intrinsic::x86_avx512_cmp_pd_256;
1805  else if (VecWidth == 512 && EltWidth == 64)
1806  IID = Intrinsic::x86_avx512_cmp_pd_512;
1807  else
1808  llvm_unreachable("Unexpected intrinsic");
1809 
1811  Args.push_back(CI->getArgOperand(0));
1812  Args.push_back(CI->getArgOperand(1));
1813  Args.push_back(CI->getArgOperand(2));
1814  if (CI->getNumArgOperands() == 5)
1815  Args.push_back(CI->getArgOperand(4));
1816 
1817  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
1818  Args);
1819  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3));
1820  } else if (IsX86 && Name.startswith("avx512.mask.cmp.") &&
1821  Name[16] != 'p') {
1822  // Integer compare intrinsics.
1823  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1824  Rep = upgradeMaskedCompare(Builder, *CI, Imm, true);
1825  } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) {
1826  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1827  Rep = upgradeMaskedCompare(Builder, *CI, Imm, false);
1828  } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") ||
1829  Name.startswith("avx512.cvtw2mask.") ||
1830  Name.startswith("avx512.cvtd2mask.") ||
1831  Name.startswith("avx512.cvtq2mask."))) {
1832  Value *Op = CI->getArgOperand(0);
1834  Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero);
1835  Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr);
1836  } else if(IsX86 && (Name == "ssse3.pabs.b.128" ||
1837  Name == "ssse3.pabs.w.128" ||
1838  Name == "ssse3.pabs.d.128" ||
1839  Name.startswith("avx2.pabs") ||
1840  Name.startswith("avx512.mask.pabs"))) {
1841  Rep = upgradeAbs(Builder, *CI);
1842  } else if (IsX86 && (Name == "sse41.pmaxsb" ||
1843  Name == "sse2.pmaxs.w" ||
1844  Name == "sse41.pmaxsd" ||
1845  Name.startswith("avx2.pmaxs") ||
1846  Name.startswith("avx512.mask.pmaxs"))) {
1847  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT);
1848  } else if (IsX86 && (Name == "sse2.pmaxu.b" ||
1849  Name == "sse41.pmaxuw" ||
1850  Name == "sse41.pmaxud" ||
1851  Name.startswith("avx2.pmaxu") ||
1852  Name.startswith("avx512.mask.pmaxu"))) {
1853  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT);
1854  } else if (IsX86 && (Name == "sse41.pminsb" ||
1855  Name == "sse2.pmins.w" ||
1856  Name == "sse41.pminsd" ||
1857  Name.startswith("avx2.pmins") ||
1858  Name.startswith("avx512.mask.pmins"))) {
1859  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT);
1860  } else if (IsX86 && (Name == "sse2.pminu.b" ||
1861  Name == "sse41.pminuw" ||
1862  Name == "sse41.pminud" ||
1863  Name.startswith("avx2.pminu") ||
1864  Name.startswith("avx512.mask.pminu"))) {
1865  Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT);
1866  } else if (IsX86 && (Name == "sse2.pmulu.dq" ||
1867  Name == "avx2.pmulu.dq" ||
1868  Name == "avx512.pmulu.dq.512" ||
1869  Name.startswith("avx512.mask.pmulu.dq."))) {
1870  Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false);
1871  } else if (IsX86 && (Name == "sse41.pmuldq" ||
1872  Name == "avx2.pmul.dq" ||
1873  Name == "avx512.pmul.dq.512" ||
1874  Name.startswith("avx512.mask.pmul.dq."))) {
1875  Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true);
1876  } else if (IsX86 && (Name == "sse.cvtsi2ss" ||
1877  Name == "sse2.cvtsi2sd" ||
1878  Name == "sse.cvtsi642ss" ||
1879  Name == "sse2.cvtsi642sd")) {
1880  Rep = Builder.CreateSIToFP(CI->getArgOperand(1),
1881  CI->getType()->getVectorElementType());
1882  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
1883  } else if (IsX86 && Name == "avx512.cvtusi2sd") {
1884  Rep = Builder.CreateUIToFP(CI->getArgOperand(1),
1885  CI->getType()->getVectorElementType());
1886  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
1887  } else if (IsX86 && Name == "sse2.cvtss2sd") {
1888  Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0);
1889  Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType());
1890  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
1891  } else if (IsX86 && (Name == "sse2.cvtdq2pd" ||
1892  Name == "sse2.cvtdq2ps" ||
1893  Name == "avx.cvtdq2.pd.256" ||
1894  Name == "avx.cvtdq2.ps.256" ||
1895  Name.startswith("avx512.mask.cvtdq2pd.") ||
1896  Name.startswith("avx512.mask.cvtudq2pd.") ||
1897  Name == "avx512.mask.cvtdq2ps.128" ||
1898  Name == "avx512.mask.cvtdq2ps.256" ||
1899  Name == "avx512.mask.cvtudq2ps.128" ||
1900  Name == "avx512.mask.cvtudq2ps.256" ||
1901  Name == "avx512.mask.cvtqq2pd.128" ||
1902  Name == "avx512.mask.cvtqq2pd.256" ||
1903  Name == "avx512.mask.cvtuqq2pd.128" ||
1904  Name == "avx512.mask.cvtuqq2pd.256" ||
1905  Name == "sse2.cvtps2pd" ||
1906  Name == "avx.cvt.ps2.pd.256" ||
1907  Name == "avx512.mask.cvtps2pd.128" ||
1908  Name == "avx512.mask.cvtps2pd.256")) {
1909  Type *DstTy = CI->getType();
1910  Rep = CI->getArgOperand(0);
1911 
1912  unsigned NumDstElts = DstTy->getVectorNumElements();
1913  if (NumDstElts < Rep->getType()->getVectorNumElements()) {
1914  assert(NumDstElts == 2 && "Unexpected vector size");
1915  uint32_t ShuffleMask[2] = { 0, 1 };
1916  Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask);
1917  }
1918 
1919  bool IsPS2PD = (StringRef::npos != Name.find("ps2"));
1920  bool IsUnsigned = (StringRef::npos != Name.find("cvtu"));
1921  if (IsPS2PD)
1922  Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd");
1923  else if (IsUnsigned)
1924  Rep = Builder.CreateUIToFP(Rep, DstTy, "cvt");
1925  else
1926  Rep = Builder.CreateSIToFP(Rep, DstTy, "cvt");
1927 
1928  if (CI->getNumArgOperands() == 3)
1929  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1930  CI->getArgOperand(1));
1931  } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) {
1932  Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
1933  CI->getArgOperand(1), CI->getArgOperand(2),
1934  /*Aligned*/false);
1935  } else if (IsX86 && (Name.startswith("avx512.mask.load."))) {
1936  Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
1937  CI->getArgOperand(1),CI->getArgOperand(2),
1938  /*Aligned*/true);
1939  } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) {
1940  Type *ResultTy = CI->getType();
1941  Type *PtrTy = ResultTy->getVectorElementType();
1942 
1943  // Cast the pointer to element type.
1944  Value *Ptr = Builder.CreateBitCast(CI->getOperand(0),
1946 
1947  Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2),
1948  ResultTy->getVectorNumElements());
1949 
1951  Intrinsic::masked_expandload,
1952  ResultTy);
1953  Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) });
1954  } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) {
1955  Type *ResultTy = CI->getArgOperand(1)->getType();
1956  Type *PtrTy = ResultTy->getVectorElementType();
1957 
1958  // Cast the pointer to element type.
1959  Value *Ptr = Builder.CreateBitCast(CI->getOperand(0),
1961 
1962  Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2),
1963  ResultTy->getVectorNumElements());
1964 
1966  Intrinsic::masked_compressstore,
1967  ResultTy);
1968  Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec });
1969  } else if (IsX86 && Name.startswith("xop.vpcom")) {
1970  Intrinsic::ID intID;
1971  if (Name.endswith("ub"))
1972  intID = Intrinsic::x86_xop_vpcomub;
1973  else if (Name.endswith("uw"))
1974  intID = Intrinsic::x86_xop_vpcomuw;
1975  else if (Name.endswith("ud"))
1976  intID = Intrinsic::x86_xop_vpcomud;
1977  else if (Name.endswith("uq"))
1978  intID = Intrinsic::x86_xop_vpcomuq;
1979  else if (Name.endswith("b"))
1980  intID = Intrinsic::x86_xop_vpcomb;
1981  else if (Name.endswith("w"))
1982  intID = Intrinsic::x86_xop_vpcomw;
1983  else if (Name.endswith("d"))
1984  intID = Intrinsic::x86_xop_vpcomd;
1985  else if (Name.endswith("q"))
1986  intID = Intrinsic::x86_xop_vpcomq;
1987  else
1988  llvm_unreachable("Unknown suffix");
1989 
1990  Name = Name.substr(9); // strip off "xop.vpcom"
1991  unsigned Imm;
1992  if (Name.startswith("lt"))
1993  Imm = 0;
1994  else if (Name.startswith("le"))
1995  Imm = 1;
1996  else if (Name.startswith("gt"))
1997  Imm = 2;
1998  else if (Name.startswith("ge"))
1999  Imm = 3;
2000  else if (Name.startswith("eq"))
2001  Imm = 4;
2002  else if (Name.startswith("ne"))
2003  Imm = 5;
2004  else if (Name.startswith("false"))
2005  Imm = 6;
2006  else if (Name.startswith("true"))
2007  Imm = 7;
2008  else
2009  llvm_unreachable("Unknown condition");
2010 
2012  Rep =
2013  Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1),
2014  Builder.getInt8(Imm)});
2015  } else if (IsX86 && Name.startswith("xop.vpcmov")) {
2016  Value *Sel = CI->getArgOperand(2);
2017  Value *NotSel = Builder.CreateNot(Sel);
2018  Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel);
2019  Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel);
2020  Rep = Builder.CreateOr(Sel0, Sel1);
2021  } else if (IsX86 && Name == "sse42.crc32.64.8") {
2023  Intrinsic::x86_sse42_crc32_32_8);
2024  Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C));
2025  Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)});
2026  Rep = Builder.CreateZExt(Rep, CI->getType(), "");
2027  } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") ||
2028  Name.startswith("avx512.vbroadcast.s"))) {
2029  // Replace broadcasts with a series of insertelements.
2030  Type *VecTy = CI->getType();
2031  Type *EltTy = VecTy->getVectorElementType();
2032  unsigned EltNum = VecTy->getVectorNumElements();
2033  Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0),
2034  EltTy->getPointerTo());
2035  Value *Load = Builder.CreateLoad(EltTy, Cast);
2036  Type *I32Ty = Type::getInt32Ty(C);
2037  Rep = UndefValue::get(VecTy);
2038  for (unsigned I = 0; I < EltNum; ++I)
2039  Rep = Builder.CreateInsertElement(Rep, Load,
2040  ConstantInt::get(I32Ty, I));
2041  } else if (IsX86 && (Name.startswith("sse41.pmovsx") ||
2042  Name.startswith("sse41.pmovzx") ||
2043  Name.startswith("avx2.pmovsx") ||
2044  Name.startswith("avx2.pmovzx") ||
2045  Name.startswith("avx512.mask.pmovsx") ||
2046  Name.startswith("avx512.mask.pmovzx"))) {
2047  VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType());
2048  VectorType *DstTy = cast<VectorType>(CI->getType());
2049  unsigned NumDstElts = DstTy->getNumElements();
2050 
2051  // Extract a subvector of the first NumDstElts lanes and sign/zero extend.
2052  SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
2053  for (unsigned i = 0; i != NumDstElts; ++i)
2054  ShuffleMask[i] = i;
2055 
2056  Value *SV = Builder.CreateShuffleVector(
2057  CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask);
2058 
2059  bool DoSext = (StringRef::npos != Name.find("pmovsx"));
2060  Rep = DoSext ? Builder.CreateSExt(SV, DstTy)
2061  : Builder.CreateZExt(SV, DstTy);
2062  // If there are 3 arguments, it's a masked intrinsic so we need a select.
2063  if (CI->getNumArgOperands() == 3)
2064  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2065  CI->getArgOperand(1));
2066  } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") ||
2067  Name == "avx2.vbroadcasti128")) {
2068  // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle.
2069  Type *EltTy = CI->getType()->getVectorElementType();
2070  unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits();
2071  Type *VT = VectorType::get(EltTy, NumSrcElts);
2072  Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
2074  Value *Load = Builder.CreateAlignedLoad(Op, 1);
2075  if (NumSrcElts == 2)
2076  Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
2077  { 0, 1, 0, 1 });
2078  else
2079  Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
2080  { 0, 1, 2, 3, 0, 1, 2, 3 });
2081  } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") ||
2082  Name.startswith("avx512.mask.shuf.f"))) {
2083  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2084  Type *VT = CI->getType();
2085  unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128;
2086  unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits();
2087  unsigned ControlBitsMask = NumLanes - 1;
2088  unsigned NumControlBits = NumLanes / 2;
2089  SmallVector<uint32_t, 8> ShuffleMask(0);
2090 
2091  for (unsigned l = 0; l != NumLanes; ++l) {
2092  unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask;
2093  // We actually need the other source.
2094  if (l >= NumLanes / 2)
2095  LaneMask += NumLanes;
2096  for (unsigned i = 0; i != NumElementsInLane; ++i)
2097  ShuffleMask.push_back(LaneMask * NumElementsInLane + i);
2098  }
2099  Rep = Builder.CreateShuffleVector(CI->getArgOperand(0),
2100  CI->getArgOperand(1), ShuffleMask);
2101  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
2102  CI->getArgOperand(3));
2103  }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") ||
2104  Name.startswith("avx512.mask.broadcasti"))) {
2105  unsigned NumSrcElts =
2107  unsigned NumDstElts = CI->getType()->getVectorNumElements();
2108 
2109  SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
2110  for (unsigned i = 0; i != NumDstElts; ++i)
2111  ShuffleMask[i] = i % NumSrcElts;
2112 
2113  Rep = Builder.CreateShuffleVector(CI->getArgOperand(0),
2114  CI->getArgOperand(0),
2115  ShuffleMask);
2116  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2117  CI->getArgOperand(1));
2118  } else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
2119  Name.startswith("avx2.vbroadcast") ||
2120  Name.startswith("avx512.pbroadcast") ||
2121  Name.startswith("avx512.mask.broadcast.s"))) {
2122  // Replace vp?broadcasts with a vector shuffle.
2123  Value *Op = CI->getArgOperand(0);
2124  unsigned NumElts = CI->getType()->getVectorNumElements();
2125  Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts);
2126  Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()),
2127  Constant::getNullValue(MaskTy));
2128 
2129  if (CI->getNumArgOperands() == 3)
2130  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2131  CI->getArgOperand(1));
2132  } else if (IsX86 && (Name.startswith("sse2.paddus.") ||
2133  Name.startswith("sse2.psubus.") ||
2134  Name.startswith("avx2.paddus.") ||
2135  Name.startswith("avx2.psubus.") ||
2136  Name.startswith("avx512.mask.paddus.") ||
2137  Name.startswith("avx512.mask.psubus."))) {
2138  bool IsAdd = Name.contains(".paddus");
2139  Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, IsAdd);
2140  } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) {
2141  Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0),
2142  CI->getArgOperand(1),
2143  CI->getArgOperand(2),
2144  CI->getArgOperand(3),
2145  CI->getArgOperand(4),
2146  false);
2147  } else if (IsX86 && Name.startswith("avx512.mask.valign.")) {
2148  Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0),
2149  CI->getArgOperand(1),
2150  CI->getArgOperand(2),
2151  CI->getArgOperand(3),
2152  CI->getArgOperand(4),
2153  true);
2154  } else if (IsX86 && (Name == "sse2.psll.dq" ||
2155  Name == "avx2.psll.dq")) {
2156  // 128/256-bit shift left specified in bits.
2157  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2158  Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0),
2159  Shift / 8); // Shift is in bits.
2160  } else if (IsX86 && (Name == "sse2.psrl.dq" ||
2161  Name == "avx2.psrl.dq")) {
2162  // 128/256-bit shift right specified in bits.
2163  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2164  Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0),
2165  Shift / 8); // Shift is in bits.
2166  } else if (IsX86 && (Name == "sse2.psll.dq.bs" ||
2167  Name == "avx2.psll.dq.bs" ||
2168  Name == "avx512.psll.dq.512")) {
2169  // 128/256/512-bit shift left specified in bytes.
2170  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2171  Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
2172  } else if (IsX86 && (Name == "sse2.psrl.dq.bs" ||
2173  Name == "avx2.psrl.dq.bs" ||
2174  Name == "avx512.psrl.dq.512")) {
2175  // 128/256/512-bit shift right specified in bytes.
2176  unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2177  Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
2178  } else if (IsX86 && (Name == "sse41.pblendw" ||
2179  Name.startswith("sse41.blendp") ||
2180  Name.startswith("avx.blend.p") ||
2181  Name == "avx2.pblendw" ||
2182  Name.startswith("avx2.pblendd."))) {
2183  Value *Op0 = CI->getArgOperand(0);
2184  Value *Op1 = CI->getArgOperand(1);
2185  unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2186  VectorType *VecTy = cast<VectorType>(CI->getType());
2187  unsigned NumElts = VecTy->getNumElements();
2188 
2189  SmallVector<uint32_t, 16> Idxs(NumElts);
2190  for (unsigned i = 0; i != NumElts; ++i)
2191  Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i;
2192 
2193  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2194  } else if (IsX86 && (Name.startswith("avx.vinsertf128.") ||
2195  Name == "avx2.vinserti128" ||
2196  Name.startswith("avx512.mask.insert"))) {
2197  Value *Op0 = CI->getArgOperand(0);
2198  Value *Op1 = CI->getArgOperand(1);
2199  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2200  unsigned DstNumElts = CI->getType()->getVectorNumElements();
2201  unsigned SrcNumElts = Op1->getType()->getVectorNumElements();
2202  unsigned Scale = DstNumElts / SrcNumElts;
2203 
2204  // Mask off the high bits of the immediate value; hardware ignores those.
2205  Imm = Imm % Scale;
2206 
2207  // Extend the second operand into a vector the size of the destination.
2208  Value *UndefV = UndefValue::get(Op1->getType());
2209  SmallVector<uint32_t, 8> Idxs(DstNumElts);
2210  for (unsigned i = 0; i != SrcNumElts; ++i)
2211  Idxs[i] = i;
2212  for (unsigned i = SrcNumElts; i != DstNumElts; ++i)
2213  Idxs[i] = SrcNumElts;
2214  Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs);
2215 
2216  // Insert the second operand into the first operand.
2217 
2218  // Note that there is no guarantee that instruction lowering will actually
2219  // produce a vinsertf128 instruction for the created shuffles. In
2220  // particular, the 0 immediate case involves no lane changes, so it can
2221  // be handled as a blend.
2222 
2223  // Example of shuffle mask for 32-bit elements:
2224  // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
2225  // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 >
2226 
2227  // First fill with identify mask.
2228  for (unsigned i = 0; i != DstNumElts; ++i)
2229  Idxs[i] = i;
2230  // Then replace the elements where we need to insert.
2231  for (unsigned i = 0; i != SrcNumElts; ++i)
2232  Idxs[i + Imm * SrcNumElts] = i + DstNumElts;
2233  Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs);
2234 
2235  // If the intrinsic has a mask operand, handle that.
2236  if (CI->getNumArgOperands() == 5)
2237  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
2238  CI->getArgOperand(3));
2239  } else if (IsX86 && (Name.startswith("avx.vextractf128.") ||
2240  Name == "avx2.vextracti128" ||
2241  Name.startswith("avx512.mask.vextract"))) {
2242  Value *Op0 = CI->getArgOperand(0);
2243  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2244  unsigned DstNumElts = CI->getType()->getVectorNumElements();
2245  unsigned SrcNumElts = Op0->getType()->getVectorNumElements();
2246  unsigned Scale = SrcNumElts / DstNumElts;
2247 
2248  // Mask off the high bits of the immediate value; hardware ignores those.
2249  Imm = Imm % Scale;
2250 
2251  // Get indexes for the subvector of the input vector.
2252  SmallVector<uint32_t, 8> Idxs(DstNumElts);
2253  for (unsigned i = 0; i != DstNumElts; ++i) {
2254  Idxs[i] = i + (Imm * DstNumElts);
2255  }
2256  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2257 
2258  // If the intrinsic has a mask operand, handle that.
2259  if (CI->getNumArgOperands() == 4)
2260  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2261  CI->getArgOperand(2));
2262  } else if (!IsX86 && Name == "stackprotectorcheck") {
2263  Rep = nullptr;
2264  } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") ||
2265  Name.startswith("avx512.mask.perm.di."))) {
2266  Value *Op0 = CI->getArgOperand(0);
2267  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2268  VectorType *VecTy = cast<VectorType>(CI->getType());
2269  unsigned NumElts = VecTy->getNumElements();
2270 
2271  SmallVector<uint32_t, 8> Idxs(NumElts);
2272  for (unsigned i = 0; i != NumElts; ++i)
2273  Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3);
2274 
2275  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2276 
2277  if (CI->getNumArgOperands() == 4)
2278  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2279  CI->getArgOperand(2));
2280  } else if (IsX86 && (Name.startswith("avx.vperm2f128.") ||
2281  Name == "avx2.vperm2i128")) {
2282  // The immediate permute control byte looks like this:
2283  // [1:0] - select 128 bits from sources for low half of destination
2284  // [2] - ignore
2285  // [3] - zero low half of destination
2286  // [5:4] - select 128 bits from sources for high half of destination
2287  // [6] - ignore
2288  // [7] - zero high half of destination
2289 
2290  uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2291 
2292  unsigned NumElts = CI->getType()->getVectorNumElements();
2293  unsigned HalfSize = NumElts / 2;
2294  SmallVector<uint32_t, 8> ShuffleMask(NumElts);
2295 
2296  // Determine which operand(s) are actually in use for this instruction.
2297  Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0);
2298  Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0);
2299 
2300  // If needed, replace operands based on zero mask.
2301  V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0;
2302  V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1;
2303 
2304  // Permute low half of result.
2305  unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0;
2306  for (unsigned i = 0; i < HalfSize; ++i)
2307  ShuffleMask[i] = StartIndex + i;
2308 
2309  // Permute high half of result.
2310  StartIndex = (Imm & 0x10) ? HalfSize : 0;
2311  for (unsigned i = 0; i < HalfSize; ++i)
2312  ShuffleMask[i + HalfSize] = NumElts + StartIndex + i;
2313 
2314  Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask);
2315 
2316  } else if (IsX86 && (Name.startswith("avx.vpermil.") ||
2317  Name == "sse2.pshuf.d" ||
2318  Name.startswith("avx512.mask.vpermil.p") ||
2319  Name.startswith("avx512.mask.pshuf.d."))) {
2320  Value *Op0 = CI->getArgOperand(0);
2321  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2322  VectorType *VecTy = cast<VectorType>(CI->getType());
2323  unsigned NumElts = VecTy->getNumElements();
2324  // Calculate the size of each index in the immediate.
2325  unsigned IdxSize = 64 / VecTy->getScalarSizeInBits();
2326  unsigned IdxMask = ((1 << IdxSize) - 1);
2327 
2328  SmallVector<uint32_t, 8> Idxs(NumElts);
2329  // Lookup the bits for this element, wrapping around the immediate every
2330  // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need
2331  // to offset by the first index of each group.
2332  for (unsigned i = 0; i != NumElts; ++i)
2333  Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask);
2334 
2335  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2336 
2337  if (CI->getNumArgOperands() == 4)
2338  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2339  CI->getArgOperand(2));
2340  } else if (IsX86 && (Name == "sse2.pshufl.w" ||
2341  Name.startswith("avx512.mask.pshufl.w."))) {
2342  Value *Op0 = CI->getArgOperand(0);
2343  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2344  unsigned NumElts = CI->getType()->getVectorNumElements();
2345 
2346  SmallVector<uint32_t, 16> Idxs(NumElts);
2347  for (unsigned l = 0; l != NumElts; l += 8) {
2348  for (unsigned i = 0; i != 4; ++i)
2349  Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l;
2350  for (unsigned i = 4; i != 8; ++i)
2351  Idxs[i + l] = i + l;
2352  }
2353 
2354  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2355 
2356  if (CI->getNumArgOperands() == 4)
2357  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2358  CI->getArgOperand(2));
2359  } else if (IsX86 && (Name == "sse2.pshufh.w" ||
2360  Name.startswith("avx512.mask.pshufh.w."))) {
2361  Value *Op0 = CI->getArgOperand(0);
2362  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
2363  unsigned NumElts = CI->getType()->getVectorNumElements();
2364 
2365  SmallVector<uint32_t, 16> Idxs(NumElts);
2366  for (unsigned l = 0; l != NumElts; l += 8) {
2367  for (unsigned i = 0; i != 4; ++i)
2368  Idxs[i + l] = i + l;
2369  for (unsigned i = 0; i != 4; ++i)
2370  Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l;
2371  }
2372 
2373  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2374 
2375  if (CI->getNumArgOperands() == 4)
2376  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2377  CI->getArgOperand(2));
2378  } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) {
2379  Value *Op0 = CI->getArgOperand(0);
2380  Value *Op1 = CI->getArgOperand(1);
2381  unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
2382  unsigned NumElts = CI->getType()->getVectorNumElements();
2383 
2384  unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2385  unsigned HalfLaneElts = NumLaneElts / 2;
2386 
2387  SmallVector<uint32_t, 16> Idxs(NumElts);
2388  for (unsigned i = 0; i != NumElts; ++i) {
2389  // Base index is the starting element of the lane.
2390  Idxs[i] = i - (i % NumLaneElts);
2391  // If we are half way through the lane switch to the other source.
2392  if ((i % NumLaneElts) >= HalfLaneElts)
2393  Idxs[i] += NumElts;
2394  // Now select the specific element. By adding HalfLaneElts bits from
2395  // the immediate. Wrapping around the immediate every 8-bits.
2396  Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1);
2397  }
2398 
2399  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2400 
2401  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep,
2402  CI->getArgOperand(3));
2403  } else if (IsX86 && (Name.startswith("avx512.mask.movddup") ||
2404  Name.startswith("avx512.mask.movshdup") ||
2405  Name.startswith("avx512.mask.movsldup"))) {
2406  Value *Op0 = CI->getArgOperand(0);
2407  unsigned NumElts = CI->getType()->getVectorNumElements();
2408  unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2409 
2410  unsigned Offset = 0;
2411  if (Name.startswith("avx512.mask.movshdup."))
2412  Offset = 1;
2413 
2414  SmallVector<uint32_t, 16> Idxs(NumElts);
2415  for (unsigned l = 0; l != NumElts; l += NumLaneElts)
2416  for (unsigned i = 0; i != NumLaneElts; i += 2) {
2417  Idxs[i + l + 0] = i + l + Offset;
2418  Idxs[i + l + 1] = i + l + Offset;
2419  }
2420 
2421  Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
2422 
2423  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2424  CI->getArgOperand(1));
2425  } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") ||
2426  Name.startswith("avx512.mask.unpckl."))) {
2427  Value *Op0 = CI->getArgOperand(0);
2428  Value *Op1 = CI->getArgOperand(1);
2429  int NumElts = CI->getType()->getVectorNumElements();
2430  int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2431 
2432  SmallVector<uint32_t, 64> Idxs(NumElts);
2433  for (int l = 0; l != NumElts; l += NumLaneElts)
2434  for (int i = 0; i != NumLaneElts; ++i)
2435  Idxs[i + l] = l + (i / 2) + NumElts * (i % 2);
2436 
2437  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2438 
2439  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2440  CI->getArgOperand(2));
2441  } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") ||
2442  Name.startswith("avx512.mask.unpckh."))) {
2443  Value *Op0 = CI->getArgOperand(0);
2444  Value *Op1 = CI->getArgOperand(1);
2445  int NumElts = CI->getType()->getVectorNumElements();
2446  int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
2447 
2448  SmallVector<uint32_t, 64> Idxs(NumElts);
2449  for (int l = 0; l != NumElts; l += NumLaneElts)
2450  for (int i = 0; i != NumLaneElts; ++i)
2451  Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2);
2452 
2453  Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
2454 
2455  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2456  CI->getArgOperand(2));
2457  } else if (IsX86 && Name.startswith("avx512.mask.pand.")) {
2458  Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1));
2459  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2460  CI->getArgOperand(2));
2461  } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) {
2462  Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)),
2463  CI->getArgOperand(1));
2464  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2465  CI->getArgOperand(2));
2466  } else if (IsX86 && Name.startswith("avx512.mask.por.")) {
2467  Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1));
2468  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2469  CI->getArgOperand(2));
2470  } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) {
2471  Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1));
2472  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2473  CI->getArgOperand(2));
2474  } else if (IsX86 && Name.startswith("avx512.mask.and.")) {
2475  VectorType *FTy = cast<VectorType>(CI->getType());
2476  VectorType *ITy = VectorType::getInteger(FTy);
2477  Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
2478  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2479  Rep = Builder.CreateBitCast(Rep, FTy);
2480  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2481  CI->getArgOperand(2));
2482  } else if (IsX86 && Name.startswith("avx512.mask.andn.")) {
2483  VectorType *FTy = cast<VectorType>(CI->getType());
2484  VectorType *ITy = VectorType::getInteger(FTy);
2485  Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy));
2486  Rep = Builder.CreateAnd(Rep,
2487  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2488  Rep = Builder.CreateBitCast(Rep, FTy);
2489  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2490  CI->getArgOperand(2));
2491  } else if (IsX86 && Name.startswith("avx512.mask.or.")) {
2492  VectorType *FTy = cast<VectorType>(CI->getType());
2493  VectorType *ITy = VectorType::getInteger(FTy);
2494  Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
2495  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2496  Rep = Builder.CreateBitCast(Rep, FTy);
2497  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2498  CI->getArgOperand(2));
2499  } else if (IsX86 && Name.startswith("avx512.mask.xor.")) {
2500  VectorType *FTy = cast<VectorType>(CI->getType());
2501  VectorType *ITy = VectorType::getInteger(FTy);
2502  Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
2503  Builder.CreateBitCast(CI->getArgOperand(1), ITy));
2504  Rep = Builder.CreateBitCast(Rep, FTy);
2505  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2506  CI->getArgOperand(2));
2507  } else if (IsX86 && Name.startswith("avx512.mask.padd.")) {
2508  Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1));
2509  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2510  CI->getArgOperand(2));
2511  } else if (IsX86 && Name.startswith("avx512.mask.psub.")) {
2512  Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1));
2513  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2514  CI->getArgOperand(2));
2515  } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) {
2516  Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1));
2517  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2518  CI->getArgOperand(2));
2519  } else if (IsX86 && Name.startswith("avx512.mask.add.p")) {
2520  if (Name.endswith(".512")) {
2521  Intrinsic::ID IID;
2522  if (Name[17] == 's')
2523  IID = Intrinsic::x86_avx512_add_ps_512;
2524  else
2525  IID = Intrinsic::x86_avx512_add_pd_512;
2526 
2527  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2528  { CI->getArgOperand(0), CI->getArgOperand(1),
2529  CI->getArgOperand(4) });
2530  } else {
2531  Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1));
2532  }
2533  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2534  CI->getArgOperand(2));
2535  } else if (IsX86 && Name.startswith("avx512.mask.div.p")) {
2536  if (Name.endswith(".512")) {
2537  Intrinsic::ID IID;
2538  if (Name[17] == 's')
2539  IID = Intrinsic::x86_avx512_div_ps_512;
2540  else
2541  IID = Intrinsic::x86_avx512_div_pd_512;
2542 
2543  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2544  { CI->getArgOperand(0), CI->getArgOperand(1),
2545  CI->getArgOperand(4) });
2546  } else {
2547  Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1));
2548  }
2549  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2550  CI->getArgOperand(2));
2551  } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) {
2552  if (Name.endswith(".512")) {
2553  Intrinsic::ID IID;
2554  if (Name[17] == 's')
2555  IID = Intrinsic::x86_avx512_mul_ps_512;
2556  else
2557  IID = Intrinsic::x86_avx512_mul_pd_512;
2558 
2559  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2560  { CI->getArgOperand(0), CI->getArgOperand(1),
2561  CI->getArgOperand(4) });
2562  } else {
2563  Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1));
2564  }
2565  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2566  CI->getArgOperand(2));
2567  } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) {
2568  if (Name.endswith(".512")) {
2569  Intrinsic::ID IID;
2570  if (Name[17] == 's')
2571  IID = Intrinsic::x86_avx512_sub_ps_512;
2572  else
2573  IID = Intrinsic::x86_avx512_sub_pd_512;
2574 
2575  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2576  { CI->getArgOperand(0), CI->getArgOperand(1),
2577  CI->getArgOperand(4) });
2578  } else {
2579  Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1));
2580  }
2581  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2582  CI->getArgOperand(2));
2583  } else if (IsX86 && Name.startswith("avx512.mask.max.p") &&
2584  Name.drop_front(18) == ".512") {
2585  Intrinsic::ID IID;
2586  if (Name[17] == 's')
2587  IID = Intrinsic::x86_avx512_max_ps_512;
2588  else
2589  IID = Intrinsic::x86_avx512_max_pd_512;
2590 
2591  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2592  { CI->getArgOperand(0), CI->getArgOperand(1),
2593  CI->getArgOperand(4) });
2594  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2595  CI->getArgOperand(2));
2596  } else if (IsX86 && Name.startswith("avx512.mask.min.p") &&
2597  Name.drop_front(18) == ".512") {
2598  Intrinsic::ID IID;
2599  if (Name[17] == 's')
2600  IID = Intrinsic::x86_avx512_min_ps_512;
2601  else
2602  IID = Intrinsic::x86_avx512_min_pd_512;
2603 
2604  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2605  { CI->getArgOperand(0), CI->getArgOperand(1),
2606  CI->getArgOperand(4) });
2607  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2608  CI->getArgOperand(2));
2609  } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) {
2610  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(),
2611  Intrinsic::ctlz,
2612  CI->getType()),
2613  { CI->getArgOperand(0), Builder.getInt1(false) });
2614  Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
2615  CI->getArgOperand(1));
2616  } else if (IsX86 && Name.startswith("avx512.mask.psll")) {
2617  bool IsImmediate = Name[16] == 'i' ||
2618  (Name.size() > 18 && Name[18] == 'i');
2619  bool IsVariable = Name[16] == 'v';
2620  char Size = Name[16] == '.' ? Name[17] :
2621  Name[17] == '.' ? Name[18] :
2622  Name[18] == '.' ? Name[19] :
2623  Name[20];
2624 
2625  Intrinsic::ID IID;
2626  if (IsVariable && Name[17] != '.') {
2627  if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di
2628  IID = Intrinsic::x86_avx2_psllv_q;
2629  else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di
2630  IID = Intrinsic::x86_avx2_psllv_q_256;
2631  else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si
2632  IID = Intrinsic::x86_avx2_psllv_d;
2633  else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si
2634  IID = Intrinsic::x86_avx2_psllv_d_256;
2635  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi
2636  IID = Intrinsic::x86_avx512_psllv_w_128;
2637  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi
2638  IID = Intrinsic::x86_avx512_psllv_w_256;
2639  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi
2640  IID = Intrinsic::x86_avx512_psllv_w_512;
2641  else
2642  llvm_unreachable("Unexpected size");
2643  } else if (Name.endswith(".128")) {
2644  if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128
2645  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d
2646  : Intrinsic::x86_sse2_psll_d;
2647  else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128
2648  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q
2649  : Intrinsic::x86_sse2_psll_q;
2650  else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128
2651  IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w
2652  : Intrinsic::x86_sse2_psll_w;
2653  else
2654  llvm_unreachable("Unexpected size");
2655  } else if (Name.endswith(".256")) {
2656  if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256
2657  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d
2658  : Intrinsic::x86_avx2_psll_d;
2659  else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256
2660  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q
2661  : Intrinsic::x86_avx2_psll_q;
2662  else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256
2663  IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w
2664  : Intrinsic::x86_avx2_psll_w;
2665  else
2666  llvm_unreachable("Unexpected size");
2667  } else {
2668  if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512
2669  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 :
2670  IsVariable ? Intrinsic::x86_avx512_psllv_d_512 :
2671  Intrinsic::x86_avx512_psll_d_512;
2672  else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512
2673  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 :
2674  IsVariable ? Intrinsic::x86_avx512_psllv_q_512 :
2675  Intrinsic::x86_avx512_psll_q_512;
2676  else if (Size == 'w') // psll.wi.512, pslli.w, psll.w
2677  IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512
2678  : Intrinsic::x86_avx512_psll_w_512;
2679  else
2680  llvm_unreachable("Unexpected size");
2681  }
2682 
2683  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
2684  } else if (IsX86 && Name.startswith("avx512.mask.psrl")) {
2685  bool IsImmediate = Name[16] == 'i' ||
2686  (Name.size() > 18 && Name[18] == 'i');
2687  bool IsVariable = Name[16] == 'v';
2688  char Size = Name[16] == '.' ? Name[17] :
2689  Name[17] == '.' ? Name[18] :
2690  Name[18] == '.' ? Name[19] :
2691  Name[20];
2692 
2693  Intrinsic::ID IID;
2694  if (IsVariable && Name[17] != '.') {
2695  if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di
2696  IID = Intrinsic::x86_avx2_psrlv_q;
2697  else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di
2698  IID = Intrinsic::x86_avx2_psrlv_q_256;
2699  else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si
2700  IID = Intrinsic::x86_avx2_psrlv_d;
2701  else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si
2702  IID = Intrinsic::x86_avx2_psrlv_d_256;
2703  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi
2704  IID = Intrinsic::x86_avx512_psrlv_w_128;
2705  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi
2706  IID = Intrinsic::x86_avx512_psrlv_w_256;
2707  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi
2708  IID = Intrinsic::x86_avx512_psrlv_w_512;
2709  else
2710  llvm_unreachable("Unexpected size");
2711  } else if (Name.endswith(".128")) {
2712  if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128
2713  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d
2714  : Intrinsic::x86_sse2_psrl_d;
2715  else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128
2716  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q
2717  : Intrinsic::x86_sse2_psrl_q;
2718  else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128
2719  IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w
2720  : Intrinsic::x86_sse2_psrl_w;
2721  else
2722  llvm_unreachable("Unexpected size");
2723  } else if (Name.endswith(".256")) {
2724  if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256
2725  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d
2726  : Intrinsic::x86_avx2_psrl_d;
2727  else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256
2728  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q
2729  : Intrinsic::x86_avx2_psrl_q;
2730  else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256
2731  IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w
2732  : Intrinsic::x86_avx2_psrl_w;
2733  else
2734  llvm_unreachable("Unexpected size");
2735  } else {
2736  if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512
2737  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 :
2738  IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 :
2739  Intrinsic::x86_avx512_psrl_d_512;
2740  else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512
2741  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 :
2742  IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 :
2743  Intrinsic::x86_avx512_psrl_q_512;
2744  else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w)
2745  IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512
2746  : Intrinsic::x86_avx512_psrl_w_512;
2747  else
2748  llvm_unreachable("Unexpected size");
2749  }
2750 
2751  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
2752  } else if (IsX86 && Name.startswith("avx512.mask.psra")) {
2753  bool IsImmediate = Name[16] == 'i' ||
2754  (Name.size() > 18 && Name[18] == 'i');
2755  bool IsVariable = Name[16] == 'v';
2756  char Size = Name[16] == '.' ? Name[17] :
2757  Name[17] == '.' ? Name[18] :
2758  Name[18] == '.' ? Name[19] :
2759  Name[20];
2760 
2761  Intrinsic::ID IID;
2762  if (IsVariable && Name[17] != '.') {
2763  if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si
2764  IID = Intrinsic::x86_avx2_psrav_d;
2765  else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si
2766  IID = Intrinsic::x86_avx2_psrav_d_256;
2767  else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi
2768  IID = Intrinsic::x86_avx512_psrav_w_128;
2769  else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi
2770  IID = Intrinsic::x86_avx512_psrav_w_256;
2771  else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi
2772  IID = Intrinsic::x86_avx512_psrav_w_512;
2773  else
2774  llvm_unreachable("Unexpected size");
2775  } else if (Name.endswith(".128")) {
2776  if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128
2777  IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d
2778  : Intrinsic::x86_sse2_psra_d;
2779  else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128
2780  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 :
2781  IsVariable ? Intrinsic::x86_avx512_psrav_q_128 :
2782  Intrinsic::x86_avx512_psra_q_128;
2783  else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128
2784  IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w
2785  : Intrinsic::x86_sse2_psra_w;
2786  else
2787  llvm_unreachable("Unexpected size");
2788  } else if (Name.endswith(".256")) {
2789  if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256
2790  IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d
2791  : Intrinsic::x86_avx2_psra_d;
2792  else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256
2793  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 :
2794  IsVariable ? Intrinsic::x86_avx512_psrav_q_256 :
2795  Intrinsic::x86_avx512_psra_q_256;
2796  else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256
2797  IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w
2798  : Intrinsic::x86_avx2_psra_w;
2799  else
2800  llvm_unreachable("Unexpected size");
2801  } else {
2802  if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512
2803  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 :
2804  IsVariable ? Intrinsic::x86_avx512_psrav_d_512 :
2805  Intrinsic::x86_avx512_psra_d_512;
2806  else if (Size == 'q') // psra.qi.512, psrai.q, psra.q
2807  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 :
2808  IsVariable ? Intrinsic::x86_avx512_psrav_q_512 :
2809  Intrinsic::x86_avx512_psra_q_512;
2810  else if (Size == 'w') // psra.wi.512, psrai.w, psra.w
2811  IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512
2812  : Intrinsic::x86_avx512_psra_w_512;
2813  else
2814  llvm_unreachable("Unexpected size");
2815  }
2816 
2817  Rep = UpgradeX86MaskedShift(Builder, *CI, IID);
2818  } else if (IsX86 && Name.startswith("avx512.mask.move.s")) {
2819  Rep = upgradeMaskedMove(Builder, *CI);
2820  } else if (IsX86 && Name.startswith("avx512.cvtmask2")) {
2821  Rep = UpgradeMaskToInt(Builder, *CI);
2822  } else if (IsX86 && Name.endswith(".movntdqa")) {
2823  Module *M = F->getParent();
2824  MDNode *Node = MDNode::get(
2826 
2827  Value *Ptr = CI->getArgOperand(0);
2828  VectorType *VTy = cast<VectorType>(CI->getType());
2829 
2830  // Convert the type of the pointer to a pointer to the stored type.
2831  Value *BC =
2832  Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast");
2833  LoadInst *LI = Builder.CreateAlignedLoad(BC, VTy->getBitWidth() / 8);
2834  LI->setMetadata(M->getMDKindID("nontemporal"), Node);
2835  Rep = LI;
2836  } else if (IsX86 &&
2837  (Name.startswith("sse2.pavg") || Name.startswith("avx2.pavg") ||
2838  Name.startswith("avx512.mask.pavg"))) {
2839  // llvm.x86.sse2.pavg.b/w, llvm.x86.avx2.pavg.b/w,
2840  // llvm.x86.avx512.mask.pavg.b/w
2841  Value *A = CI->getArgOperand(0);
2842  Value *B = CI->getArgOperand(1);
2844  cast<VectorType>(A->getType()));
2845  Value *ExtendedA = Builder.CreateZExt(A, ZextType);
2846  Value *ExtendedB = Builder.CreateZExt(B, ZextType);
2847  Value *Sum = Builder.CreateAdd(ExtendedA, ExtendedB);
2848  Value *AddOne = Builder.CreateAdd(Sum, ConstantInt::get(ZextType, 1));
2849  Value *ShiftR = Builder.CreateLShr(AddOne, ConstantInt::get(ZextType, 1));
2850  Rep = Builder.CreateTrunc(ShiftR, A->getType());
2851  if (CI->getNumArgOperands() > 2) {
2852  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
2853  CI->getArgOperand(2));
2854  }
2855  } else if (IsX86 && (Name.startswith("fma.vfmadd.") ||
2856  Name.startswith("fma.vfmsub.") ||
2857  Name.startswith("fma.vfnmadd.") ||
2858  Name.startswith("fma.vfnmsub."))) {
2859  bool NegMul = Name[6] == 'n';
2860  bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's';
2861  bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's';
2862 
2863  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
2864  CI->getArgOperand(2) };
2865 
2866  if (IsScalar) {
2867  Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0);
2868  Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0);
2869  Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0);
2870  }
2871 
2872  if (NegMul && !IsScalar)
2873  Ops[0] = Builder.CreateFNeg(Ops[0]);
2874  if (NegMul && IsScalar)
2875  Ops[1] = Builder.CreateFNeg(Ops[1]);
2876  if (NegAcc)
2877  Ops[2] = Builder.CreateFNeg(Ops[2]);
2878 
2879  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(),
2880  Intrinsic::fma,
2881  Ops[0]->getType()),
2882  Ops);
2883 
2884  if (IsScalar)
2885  Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep,
2886  (uint64_t)0);
2887  } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) {
2888  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
2889  CI->getArgOperand(2) };
2890 
2891  Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0);
2892  Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0);
2893  Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0);
2894 
2895  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(),
2896  Intrinsic::fma,
2897  Ops[0]->getType()),
2898  Ops);
2899 
2900  Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()),
2901  Rep, (uint64_t)0);
2902  } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") ||
2903  Name.startswith("avx512.maskz.vfmadd.s") ||
2904  Name.startswith("avx512.mask3.vfmadd.s") ||
2905  Name.startswith("avx512.mask3.vfmsub.s") ||
2906  Name.startswith("avx512.mask3.vfnmsub.s"))) {
2907  bool IsMask3 = Name[11] == '3';
2908  bool IsMaskZ = Name[11] == 'z';
2909  // Drop the "avx512.mask." to make it easier.
2910  Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12);
2911  bool NegMul = Name[2] == 'n';
2912  bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's';
2913 
2914  Value *A = CI->getArgOperand(0);
2915  Value *B = CI->getArgOperand(1);
2916  Value *C = CI->getArgOperand(2);
2917 
2918  if (NegMul && (IsMask3 || IsMaskZ))
2919  A = Builder.CreateFNeg(A);
2920  if (NegMul && !(IsMask3 || IsMaskZ))
2921  B = Builder.CreateFNeg(B);
2922  if (NegAcc)
2923  C = Builder.CreateFNeg(C);
2924 
2925  A = Builder.CreateExtractElement(A, (uint64_t)0);
2926  B = Builder.CreateExtractElement(B, (uint64_t)0);
2927  C = Builder.CreateExtractElement(C, (uint64_t)0);
2928 
2929  if (!isa<ConstantInt>(CI->getArgOperand(4)) ||
2930  cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) {
2931  Value *Ops[] = { A, B, C, CI->getArgOperand(4) };
2932 
2933  Intrinsic::ID IID;
2934  if (Name.back() == 'd')
2935  IID = Intrinsic::x86_avx512_vfmadd_f64;
2936  else
2937  IID = Intrinsic::x86_avx512_vfmadd_f32;
2939  Rep = Builder.CreateCall(FMA, Ops);
2940  } else {
2942  Intrinsic::fma,
2943  A->getType());
2944  Rep = Builder.CreateCall(FMA, { A, B, C });
2945  }
2946 
2947  Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) :
2948  IsMask3 ? C : A;
2949 
2950  // For Mask3 with NegAcc, we need to create a new extractelement that
2951  // avoids the negation above.
2952  if (NegAcc && IsMask3)
2953  PassThru = Builder.CreateExtractElement(CI->getArgOperand(2),
2954  (uint64_t)0);
2955 
2956  Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3),
2957  Rep, PassThru);
2958  Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0),
2959  Rep, (uint64_t)0);
2960  } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") ||
2961  Name.startswith("avx512.mask.vfnmadd.p") ||
2962  Name.startswith("avx512.mask.vfnmsub.p") ||
2963  Name.startswith("avx512.mask3.vfmadd.p") ||
2964  Name.startswith("avx512.mask3.vfmsub.p") ||
2965  Name.startswith("avx512.mask3.vfnmsub.p") ||
2966  Name.startswith("avx512.maskz.vfmadd.p"))) {
2967  bool IsMask3 = Name[11] == '3';
2968  bool IsMaskZ = Name[11] == 'z';
2969  // Drop the "avx512.mask." to make it easier.
2970  Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12);
2971  bool NegMul = Name[2] == 'n';
2972  bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's';
2973 
2974  Value *A = CI->getArgOperand(0);
2975  Value *B = CI->getArgOperand(1);
2976  Value *C = CI->getArgOperand(2);
2977 
2978  if (NegMul && (IsMask3 || IsMaskZ))
2979  A = Builder.CreateFNeg(A);
2980  if (NegMul && !(IsMask3 || IsMaskZ))
2981  B = Builder.CreateFNeg(B);
2982  if (NegAcc)
2983  C = Builder.CreateFNeg(C);
2984 
2985  if (CI->getNumArgOperands() == 5 &&
2986  (!isa<ConstantInt>(CI->getArgOperand(4)) ||
2987  cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) {
2988  Intrinsic::ID IID;
2989  // Check the character before ".512" in string.
2990  if (Name[Name.size()-5] == 's')
2991  IID = Intrinsic::x86_avx512_vfmadd_ps_512;
2992  else
2993  IID = Intrinsic::x86_avx512_vfmadd_pd_512;
2994 
2995  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
2996  { A, B, C, CI->getArgOperand(4) });
2997  } else {
2999  Intrinsic::fma,
3000  A->getType());
3001  Rep = Builder.CreateCall(FMA, { A, B, C });
3002  }
3003 
3004  Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) :
3005  IsMask3 ? CI->getArgOperand(2) :
3006  CI->getArgOperand(0);
3007 
3008  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3009  } else if (IsX86 && (Name.startswith("fma.vfmaddsub.p") ||
3010  Name.startswith("fma.vfmsubadd.p"))) {
3011  bool IsSubAdd = Name[7] == 's';
3012  int NumElts = CI->getType()->getVectorNumElements();
3013 
3014  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3015  CI->getArgOperand(2) };
3016 
3017  Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma,
3018  Ops[0]->getType());
3019  Value *Odd = Builder.CreateCall(FMA, Ops);
3020  Ops[2] = Builder.CreateFNeg(Ops[2]);
3021  Value *Even = Builder.CreateCall(FMA, Ops);
3022 
3023  if (IsSubAdd)
3024  std::swap(Even, Odd);
3025 
3026  SmallVector<uint32_t, 32> Idxs(NumElts);
3027  for (int i = 0; i != NumElts; ++i)
3028  Idxs[i] = i + (i % 2) * NumElts;
3029 
3030  Rep = Builder.CreateShuffleVector(Even, Odd, Idxs);
3031  } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") ||
3032  Name.startswith("avx512.mask3.vfmaddsub.p") ||
3033  Name.startswith("avx512.maskz.vfmaddsub.p") ||
3034  Name.startswith("avx512.mask3.vfmsubadd.p"))) {
3035  bool IsMask3 = Name[11] == '3';
3036  bool IsMaskZ = Name[11] == 'z';
3037  // Drop the "avx512.mask." to make it easier.
3038  Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12);
3039  bool IsSubAdd = Name[3] == 's';
3040  if (CI->getNumArgOperands() == 5 &&
3041  (!isa<ConstantInt>(CI->getArgOperand(4)) ||
3042  cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) {
3043  Intrinsic::ID IID;
3044  // Check the character before ".512" in string.
3045  if (Name[Name.size()-5] == 's')
3046  IID = Intrinsic::x86_avx512_vfmaddsub_ps_512;
3047  else
3048  IID = Intrinsic::x86_avx512_vfmaddsub_pd_512;
3049 
3050  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3051  CI->getArgOperand(2), CI->getArgOperand(4) };
3052  if (IsSubAdd)
3053  Ops[2] = Builder.CreateFNeg(Ops[2]);
3054 
3055  Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
3056  {CI->getArgOperand(0), CI->getArgOperand(1),
3057  CI->getArgOperand(2), CI->getArgOperand(4)});
3058  } else {
3059  int NumElts = CI->getType()->getVectorNumElements();
3060 
3061  Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3062  CI->getArgOperand(2) };
3063 
3064  Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma,
3065  Ops[0]->getType());
3066  Value *Odd = Builder.CreateCall(FMA, Ops);
3067  Ops[2] = Builder.CreateFNeg(Ops[2]);
3068  Value *Even = Builder.CreateCall(FMA, Ops);
3069 
3070  if (IsSubAdd)
3071  std::swap(Even, Odd);
3072 
3073  SmallVector<uint32_t, 32> Idxs(NumElts);
3074  for (int i = 0; i != NumElts; ++i)
3075  Idxs[i] = i + (i % 2) * NumElts;
3076 
3077  Rep = Builder.CreateShuffleVector(Even, Odd, Idxs);
3078  }
3079 
3080  Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) :
3081  IsMask3 ? CI->getArgOperand(2) :
3082  CI->getArgOperand(0);
3083 
3084  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3085  } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") ||
3086  Name.startswith("avx512.maskz.pternlog."))) {
3087  bool ZeroMask = Name[11] == 'z';
3088  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3089  unsigned EltWidth = CI->getType()->getScalarSizeInBits();
3090  Intrinsic::ID IID;
3091  if (VecWidth == 128 && EltWidth == 32)
3092  IID = Intrinsic::x86_avx512_pternlog_d_128;
3093  else if (VecWidth == 256 && EltWidth == 32)
3094  IID = Intrinsic::x86_avx512_pternlog_d_256;
3095  else if (VecWidth == 512 && EltWidth == 32)
3096  IID = Intrinsic::x86_avx512_pternlog_d_512;
3097  else if (VecWidth == 128 && EltWidth == 64)
3098  IID = Intrinsic::x86_avx512_pternlog_q_128;
3099  else if (VecWidth == 256 && EltWidth == 64)
3100  IID = Intrinsic::x86_avx512_pternlog_q_256;
3101  else if (VecWidth == 512 && EltWidth == 64)
3102  IID = Intrinsic::x86_avx512_pternlog_q_512;
3103  else
3104  llvm_unreachable("Unexpected intrinsic");
3105 
3106  Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1),
3107  CI->getArgOperand(2), CI->getArgOperand(3) };
3108  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3109  Args);
3110  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3111  : CI->getArgOperand(0);
3112  Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru);
3113  } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") ||
3114  Name.startswith("avx512.maskz.vpmadd52"))) {
3115  bool ZeroMask = Name[11] == 'z';
3116  bool High = Name[20] == 'h' || Name[21] == 'h';
3117  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3118  Intrinsic::ID IID;
3119  if (VecWidth == 128 && !High)
3120  IID = Intrinsic::x86_avx512_vpmadd52l_uq_128;
3121  else if (VecWidth == 256 && !High)
3122  IID = Intrinsic::x86_avx512_vpmadd52l_uq_256;
3123  else if (VecWidth == 512 && !High)
3124  IID = Intrinsic::x86_avx512_vpmadd52l_uq_512;
3125  else if (VecWidth == 128 && High)
3126  IID = Intrinsic::x86_avx512_vpmadd52h_uq_128;
3127  else if (VecWidth == 256 && High)
3128  IID = Intrinsic::x86_avx512_vpmadd52h_uq_256;
3129  else if (VecWidth == 512 && High)
3130  IID = Intrinsic::x86_avx512_vpmadd52h_uq_512;
3131  else
3132  llvm_unreachable("Unexpected intrinsic");
3133 
3134  Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1),
3135  CI->getArgOperand(2) };
3136  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3137  Args);
3138  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3139  : CI->getArgOperand(0);
3140  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3141  } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") ||
3142  Name.startswith("avx512.mask.vpermt2var.") ||
3143  Name.startswith("avx512.maskz.vpermt2var."))) {
3144  bool ZeroMask = Name[11] == 'z';
3145  bool IndexForm = Name[17] == 'i';
3146  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3147  unsigned EltWidth = CI->getType()->getScalarSizeInBits();
3148  bool IsFloat = CI->getType()->isFPOrFPVectorTy();
3149  Intrinsic::ID IID;
3150  if (VecWidth == 128 && EltWidth == 32 && IsFloat)
3151  IID = Intrinsic::x86_avx512_vpermi2var_ps_128;
3152  else if (VecWidth == 128 && EltWidth == 32 && !IsFloat)
3153  IID = Intrinsic::x86_avx512_vpermi2var_d_128;
3154  else if (VecWidth == 128 && EltWidth == 64 && IsFloat)
3155  IID = Intrinsic::x86_avx512_vpermi2var_pd_128;
3156  else if (VecWidth == 128 && EltWidth == 64 && !IsFloat)
3157  IID = Intrinsic::x86_avx512_vpermi2var_q_128;
3158  else if (VecWidth == 256 && EltWidth == 32 && IsFloat)
3159  IID = Intrinsic::x86_avx512_vpermi2var_ps_256;
3160  else if (VecWidth == 256 && EltWidth == 32 && !IsFloat)
3161  IID = Intrinsic::x86_avx512_vpermi2var_d_256;
3162  else if (VecWidth == 256 && EltWidth == 64 && IsFloat)
3163  IID = Intrinsic::x86_avx512_vpermi2var_pd_256;
3164  else if (VecWidth == 256 && EltWidth == 64 && !IsFloat)
3165  IID = Intrinsic::x86_avx512_vpermi2var_q_256;
3166  else if (VecWidth == 512 && EltWidth == 32 && IsFloat)
3167  IID = Intrinsic::x86_avx512_vpermi2var_ps_512;
3168  else if (VecWidth == 512 && EltWidth == 32 && !IsFloat)
3169  IID = Intrinsic::x86_avx512_vpermi2var_d_512;
3170  else if (VecWidth == 512 && EltWidth == 64 && IsFloat)
3171  IID = Intrinsic::x86_avx512_vpermi2var_pd_512;
3172  else if (VecWidth == 512 && EltWidth == 64 && !IsFloat)
3173  IID = Intrinsic::x86_avx512_vpermi2var_q_512;
3174  else if (VecWidth == 128 && EltWidth == 16)
3175  IID = Intrinsic::x86_avx512_vpermi2var_hi_128;
3176  else if (VecWidth == 256 && EltWidth == 16)
3177  IID = Intrinsic::x86_avx512_vpermi2var_hi_256;
3178  else if (VecWidth == 512 && EltWidth == 16)
3179  IID = Intrinsic::x86_avx512_vpermi2var_hi_512;
3180  else if (VecWidth == 128 && EltWidth == 8)
3181  IID = Intrinsic::x86_avx512_vpermi2var_qi_128;
3182  else if (VecWidth == 256 && EltWidth == 8)
3183  IID = Intrinsic::x86_avx512_vpermi2var_qi_256;
3184  else if (VecWidth == 512 && EltWidth == 8)
3185  IID = Intrinsic::x86_avx512_vpermi2var_qi_512;
3186  else
3187  llvm_unreachable("Unexpected intrinsic");
3188 
3189  Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1),
3190  CI->getArgOperand(2) };
3191 
3192  // If this isn't index form we need to swap operand 0 and 1.
3193  if (!IndexForm)
3194  std::swap(Args[0], Args[1]);
3195 
3196  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3197  Args);
3198  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3199  : Builder.CreateBitCast(CI->getArgOperand(1),
3200  CI->getType());
3201  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3202  } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") ||
3203  Name.startswith("avx512.maskz.vpdpbusd.") ||
3204  Name.startswith("avx512.mask.vpdpbusds.") ||
3205  Name.startswith("avx512.maskz.vpdpbusds."))) {
3206  bool ZeroMask = Name[11] == 'z';
3207  bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's';
3208  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3209  Intrinsic::ID IID;
3210  if (VecWidth == 128 && !IsSaturating)
3211  IID = Intrinsic::x86_avx512_vpdpbusd_128;
3212  else if (VecWidth == 256 && !IsSaturating)
3213  IID = Intrinsic::x86_avx512_vpdpbusd_256;
3214  else if (VecWidth == 512 && !IsSaturating)
3215  IID = Intrinsic::x86_avx512_vpdpbusd_512;
3216  else if (VecWidth == 128 && IsSaturating)
3217  IID = Intrinsic::x86_avx512_vpdpbusds_128;
3218  else if (VecWidth == 256 && IsSaturating)
3219  IID = Intrinsic::x86_avx512_vpdpbusds_256;
3220  else if (VecWidth == 512 && IsSaturating)
3221  IID = Intrinsic::x86_avx512_vpdpbusds_512;
3222  else
3223  llvm_unreachable("Unexpected intrinsic");
3224 
3225  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3226  CI->getArgOperand(2) };
3227  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3228  Args);
3229  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3230  : CI->getArgOperand(0);
3231  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3232  } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") ||
3233  Name.startswith("avx512.maskz.vpdpwssd.") ||
3234  Name.startswith("avx512.mask.vpdpwssds.") ||
3235  Name.startswith("avx512.maskz.vpdpwssds."))) {
3236  bool ZeroMask = Name[11] == 'z';
3237  bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's';
3238  unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits();
3239  Intrinsic::ID IID;
3240  if (VecWidth == 128 && !IsSaturating)
3241  IID = Intrinsic::x86_avx512_vpdpwssd_128;
3242  else if (VecWidth == 256 && !IsSaturating)
3243  IID = Intrinsic::x86_avx512_vpdpwssd_256;
3244  else if (VecWidth == 512 && !IsSaturating)
3245  IID = Intrinsic::x86_avx512_vpdpwssd_512;
3246  else if (VecWidth == 128 && IsSaturating)
3247  IID = Intrinsic::x86_avx512_vpdpwssds_128;
3248  else if (VecWidth == 256 && IsSaturating)
3249  IID = Intrinsic::x86_avx512_vpdpwssds_256;
3250  else if (VecWidth == 512 && IsSaturating)
3251  IID = Intrinsic::x86_avx512_vpdpwssds_512;
3252  else
3253  llvm_unreachable("Unexpected intrinsic");
3254 
3255  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3256  CI->getArgOperand(2) };
3257  Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID),
3258  Args);
3259  Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType())
3260  : CI->getArgOperand(0);
3261  Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru);
3262  } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" ||
3263  Name == "addcarry.u32" || Name == "addcarry.u64" ||
3264  Name == "subborrow.u32" || Name == "subborrow.u64")) {
3265  Intrinsic::ID IID;
3266  if (Name[0] == 'a' && Name.back() == '2')
3267  IID = Intrinsic::x86_addcarry_32;
3268  else if (Name[0] == 'a' && Name.back() == '4')
3269  IID = Intrinsic::x86_addcarry_64;
3270  else if (Name[0] == 's' && Name.back() == '2')
3271  IID = Intrinsic::x86_subborrow_32;
3272  else if (Name[0] == 's' && Name.back() == '4')
3273  IID = Intrinsic::x86_subborrow_64;
3274  else
3275  llvm_unreachable("Unexpected intrinsic");
3276 
3277  // Make a call with 3 operands.
3278  Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1),
3279  CI->getArgOperand(2)};
3280  Value *NewCall = Builder.CreateCall(
3282  Args);
3283 
3284  // Extract the second result and store it.
3285  Value *Data = Builder.CreateExtractValue(NewCall, 1);
3286  // Cast the pointer to the right type.
3287  Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3),
3289  Builder.CreateAlignedStore(Data, Ptr, 1);
3290  // Replace the original call result with the first result of the new call.
3291  Value *CF = Builder.CreateExtractValue(NewCall, 0);
3292 
3293  CI->replaceAllUsesWith(CF);
3294  Rep = nullptr;
3295  } else if (IsX86 && Name.startswith("avx512.mask.") &&
3296  upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) {
3297  // Rep will be updated by the call in the condition.
3298  } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) {
3299  Value *Arg = CI->getArgOperand(0);
3300  Value *Neg = Builder.CreateNeg(Arg, "neg");
3301  Value *Cmp = Builder.CreateICmpSGE(
3302  Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond");
3303  Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs");
3304  } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" ||
3305  Name == "max.ui" || Name == "max.ull")) {
3306  Value *Arg0 = CI->getArgOperand(0);
3307  Value *Arg1 = CI->getArgOperand(1);
3308  Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
3309  ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond")
3310  : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond");
3311  Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max");
3312  } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" ||
3313  Name == "min.ui" || Name == "min.ull")) {
3314  Value *Arg0 = CI->getArgOperand(0);
3315  Value *Arg1 = CI->getArgOperand(1);
3316  Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull")
3317  ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond")
3318  : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond");
3319  Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min");
3320  } else if (IsNVVM && Name == "clz.ll") {
3321  // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64.
3322  Value *Arg = CI->getArgOperand(0);
3323  Value *Ctlz = Builder.CreateCall(
3324  Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
3325  {Arg->getType()}),
3326  {Arg, Builder.getFalse()}, "ctlz");
3327  Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc");
3328  } else if (IsNVVM && Name == "popc.ll") {
3329  // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an
3330  // i64.
3331  Value *Arg = CI->getArgOperand(0);
3332  Value *Popc = Builder.CreateCall(
3333  Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
3334  {Arg->getType()}),
3335  Arg, "ctpop");
3336  Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc");
3337  } else if (IsNVVM && Name == "h2f") {
3338  Rep = Builder.CreateCall(Intrinsic::getDeclaration(
3339  F->getParent(), Intrinsic::convert_from_fp16,
3340  {Builder.getFloatTy()}),
3341  CI->getArgOperand(0), "h2f");
3342  } else {
3343  llvm_unreachable("Unknown function for CallInst upgrade.");
3344  }
3345 
3346  if (Rep)
3347  CI->replaceAllUsesWith(Rep);
3348  CI->eraseFromParent();
3349  return;
3350  }
3351 
3352  const auto &DefaultCase = [&NewFn, &CI]() -> void {
3353  // Handle generic mangling change, but nothing else
3354  assert(
3355  (CI->getCalledFunction()->getName() != NewFn->getName()) &&
3356  "Unknown function for CallInst upgrade and isn't just a name change");
3357  CI->setCalledFunction(NewFn);
3358  };
3359  CallInst *NewCall = nullptr;
3360  switch (NewFn->getIntrinsicID()) {
3361  default: {
3362  DefaultCase();
3363  return;
3364  }
3365 
3366  case Intrinsic::arm_neon_vld1:
3367  case Intrinsic::arm_neon_vld2:
3368  case Intrinsic::arm_neon_vld3:
3369  case Intrinsic::arm_neon_vld4:
3370  case Intrinsic::arm_neon_vld2lane:
3371  case Intrinsic::arm_neon_vld3lane:
3372  case Intrinsic::arm_neon_vld4lane:
3373  case Intrinsic::arm_neon_vst1:
3374  case Intrinsic::arm_neon_vst2:
3375  case Intrinsic::arm_neon_vst3:
3376  case Intrinsic::arm_neon_vst4:
3377  case Intrinsic::arm_neon_vst2lane:
3378  case Intrinsic::arm_neon_vst3lane:
3379  case Intrinsic::arm_neon_vst4lane: {
3381  CI->arg_operands().end());
3382  NewCall = Builder.CreateCall(NewFn, Args);
3383  break;
3384  }
3385 
3386  case Intrinsic::bitreverse:
3387  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
3388  break;
3389 
3390  case Intrinsic::ctlz:
3391  case Intrinsic::cttz:
3392  assert(CI->getNumArgOperands() == 1 &&
3393  "Mismatch between function args and call args");
3394  NewCall =
3395  Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()});
3396  break;
3397 
3398  case Intrinsic::objectsize: {
3399  Value *NullIsUnknownSize = CI->getNumArgOperands() == 2
3400  ? Builder.getFalse()
3401  : CI->getArgOperand(2);
3402  NewCall = Builder.CreateCall(
3403  NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize});
3404  break;
3405  }
3406 
3407  case Intrinsic::ctpop:
3408  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
3409  break;
3410 
3411  case Intrinsic::convert_from_fp16:
3412  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
3413  break;
3414 
3415  case Intrinsic::dbg_value:
3416  // Upgrade from the old version that had an extra offset argument.
3417  assert(CI->getNumArgOperands() == 4);
3418  // Drop nonzero offsets instead of attempting to upgrade them.
3419  if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1)))
3420  if (Offset->isZeroValue()) {
3421  NewCall = Builder.CreateCall(
3422  NewFn,
3423  {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)});
3424  break;
3425  }
3426  CI->eraseFromParent();
3427  return;
3428 
3429  case Intrinsic::x86_xop_vfrcz_ss:
3430  case Intrinsic::x86_xop_vfrcz_sd:
3431  NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)});
3432  break;
3433 
3434  case Intrinsic::x86_xop_vpermil2pd:
3435  case Intrinsic::x86_xop_vpermil2ps:
3436  case Intrinsic::x86_xop_vpermil2pd_256:
3437  case Intrinsic::x86_xop_vpermil2ps_256: {
3439  CI->arg_operands().end());
3440  VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType());
3441  VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy);
3442  Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy);
3443  NewCall = Builder.CreateCall(NewFn, Args);
3444  break;
3445  }
3446 
3447  case Intrinsic::x86_sse41_ptestc:
3448  case Intrinsic::x86_sse41_ptestz:
3449  case Intrinsic::x86_sse41_ptestnzc: {
3450  // The arguments for these intrinsics used to be v4f32, and changed
3451  // to v2i64. This is purely a nop, since those are bitwise intrinsics.
3452  // So, the only thing required is a bitcast for both arguments.
3453  // First, check the arguments have the old type.
3454  Value *Arg0 = CI->getArgOperand(0);
3455  if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4))
3456  return;
3457 
3458  // Old intrinsic, add bitcasts
3459  Value *Arg1 = CI->getArgOperand(1);
3460 
3461  Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
3462 
3463  Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast");
3464  Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
3465 
3466  NewCall = Builder.CreateCall(NewFn, {BC0, BC1});
3467  break;
3468  }
3469 
3470  case Intrinsic::x86_rdtscp: {
3471  // This used to take 1 arguments. If we have no arguments, it is already
3472  // upgraded.
3473  if (CI->getNumOperands() == 0)
3474  return;
3475 
3476  NewCall = Builder.CreateCall(NewFn);
3477  // Extract the second result and store it.
3478  Value *Data = Builder.CreateExtractValue(NewCall, 1);
3479  // Cast the pointer to the right type.
3480  Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0),
3482  Builder.CreateAlignedStore(Data, Ptr, 1);
3483  // Replace the original call result with the first result of the new call.
3484  Value *TSC = Builder.CreateExtractValue(NewCall, 0);
3485 
3486  std::string Name = CI->getName();
3487  if (!Name.empty()) {
3488  CI->setName(Name + ".old");
3489  NewCall->setName(Name);
3490  }
3491  CI->replaceAllUsesWith(TSC);
3492  CI->eraseFromParent();
3493  return;
3494  }
3495 
3496  case Intrinsic::x86_sse41_insertps:
3497  case Intrinsic::x86_sse41_dppd:
3498  case Intrinsic::x86_sse41_dpps:
3499  case Intrinsic::x86_sse41_mpsadbw:
3500  case Intrinsic::x86_avx_dp_ps_256:
3501  case Intrinsic::x86_avx2_mpsadbw: {
3502  // Need to truncate the last argument from i32 to i8 -- this argument models
3503  // an inherently 8-bit immediate operand to these x86 instructions.
3505  CI->arg_operands().end());
3506 
3507  // Replace the last argument with a trunc.
3508  Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc");
3509  NewCall = Builder.CreateCall(NewFn, Args);
3510  break;
3511  }
3512 
3513  case Intrinsic::thread_pointer: {
3514  NewCall = Builder.CreateCall(NewFn, {});
3515  break;
3516  }
3517 
3518  case Intrinsic::invariant_start:
3519  case Intrinsic::invariant_end:
3520  case Intrinsic::masked_load:
3521  case Intrinsic::masked_store:
3522  case Intrinsic::masked_gather:
3523  case Intrinsic::masked_scatter: {
3525  CI->arg_operands().end());
3526  NewCall = Builder.CreateCall(NewFn, Args);
3527  break;
3528  }
3529 
3530  case Intrinsic::memcpy:
3531  case Intrinsic::memmove:
3532  case Intrinsic::memset: {
3533  // We have to make sure that the call signature is what we're expecting.
3534  // We only want to change the old signatures by removing the alignment arg:
3535  // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1)
3536  // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1)
3537  // @llvm.memset...(i8*, i8, i[32|64], i32, i1)
3538  // -> @llvm.memset...(i8*, i8, i[32|64], i1)
3539  // Note: i8*'s in the above can be any pointer type
3540  if (CI->getNumArgOperands() != 5) {
3541  DefaultCase();
3542  return;
3543  }
3544  // Remove alignment argument (3), and add alignment attributes to the
3545  // dest/src pointers.
3546  Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1),
3547  CI->getArgOperand(2), CI->getArgOperand(4)};
3548  NewCall = Builder.CreateCall(NewFn, Args);
3549  auto *MemCI = cast<MemIntrinsic>(NewCall);
3550  // All mem intrinsics support dest alignment.
3551  const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3));
3552  MemCI->setDestAlignment(Align->getZExtValue());
3553  // Memcpy/Memmove also support source alignment.
3554  if (auto *MTI = dyn_cast<MemTransferInst>(MemCI))
3555  MTI->setSourceAlignment(Align->getZExtValue());
3556  break;
3557  }
3558  }
3559  assert(NewCall && "Should have either set this variable or returned through "
3560  "the default case");
3561  std::string Name = CI->getName();
3562  if (!Name.empty()) {
3563  CI->setName(Name + ".old");
3564  NewCall->setName(Name);
3565  }
3566  CI->replaceAllUsesWith(NewCall);
3567  CI->eraseFromParent();
3568 }
3569 
3571  assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
3572 
3573  // Check if this function should be upgraded and get the replacement function
3574  // if there is one.
3575  Function *NewFn;
3576  if (UpgradeIntrinsicFunction(F, NewFn)) {
3577  // Replace all users of the old function with the new function or new
3578  // instructions. This is not a range loop because the call is deleted.
3579  for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; )
3580  if (CallInst *CI = dyn_cast<CallInst>(*UI++))
3581  UpgradeIntrinsicCall(CI, NewFn);
3582 
3583  // Remove old function, no longer used, from the module.
3584  F->eraseFromParent();
3585  }
3586 }
3587 
3589  // Check if the tag uses struct-path aware TBAA format.
3590  if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3)
3591  return &MD;
3592 
3593  auto &Context = MD.getContext();
3594  if (MD.getNumOperands() == 3) {
3595  Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)};
3596  MDNode *ScalarType = MDNode::get(Context, Elts);
3597  // Create a MDNode <ScalarType, ScalarType, offset 0, const>
3598  Metadata *Elts2[] = {ScalarType, ScalarType,
3601  MD.getOperand(2)};
3602  return MDNode::get(Context, Elts2);
3603  }
3604  // Create a MDNode <MD, MD, offset 0>
3607  return MDNode::get(Context, Elts);
3608 }
3609 
3610 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy,
3611  Instruction *&Temp) {
3612  if (Opc != Instruction::BitCast)
3613  return nullptr;
3614 
3615  Temp = nullptr;
3616  Type *SrcTy = V->getType();
3617  if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
3618  SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
3619  LLVMContext &Context = V->getContext();
3620 
3621  // We have no information about target data layout, so we assume that
3622  // the maximum pointer size is 64bit.
3623  Type *MidTy = Type::getInt64Ty(Context);
3624  Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy);
3625 
3626  return CastInst::Create(Instruction::IntToPtr, Temp, DestTy);
3627  }
3628 
3629  return nullptr;
3630 }
3631 
3632 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) {
3633  if (Opc != Instruction::BitCast)
3634  return nullptr;
3635 
3636  Type *SrcTy = C->getType();
3637  if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
3638  SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
3639  LLVMContext &Context = C->getContext();
3640 
3641  // We have no information about target data layout, so we assume that
3642  // the maximum pointer size is 64bit.
3643  Type *MidTy = Type::getInt64Ty(Context);
3644 
3646  DestTy);
3647  }
3648 
3649  return nullptr;
3650 }
3651 
3652 /// Check the debug info version number, if it is out-dated, drop the debug
3653 /// info. Return true if module is modified.
3656  if (Version == DEBUG_METADATA_VERSION) {
3657  bool BrokenDebugInfo = false;
3658  if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo))
3659  report_fatal_error("Broken module found, compilation aborted!");
3660  if (!BrokenDebugInfo)
3661  // Everything is ok.
3662  return false;
3663  else {
3664  // Diagnose malformed debug info.
3666  M.getContext().diagnose(Diag);
3667  }
3668  }
3669  bool Modified = StripDebugInfo(M);
3670  if (Modified && Version != DEBUG_METADATA_VERSION) {
3671  // Diagnose a version mismatch.
3672  DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version);
3673  M.getContext().diagnose(DiagVersion);
3674  }
3675  return Modified;
3676 }
3677 
3679  bool Changed = false;
3680  NamedMDNode *ModRetainReleaseMarker =
3681  M.getNamedMetadata("clang.arc.retainAutoreleasedReturnValueMarker");
3682  if (ModRetainReleaseMarker) {
3683  MDNode *Op = ModRetainReleaseMarker->getOperand(0);
3684  if (Op) {
3685  MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0));
3686  if (ID) {
3687  SmallVector<StringRef, 4> ValueComp;
3688  ID->getString().split(ValueComp, "#");
3689  if (ValueComp.size() == 2) {
3690  std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str();
3691  Metadata *Ops[1] = {MDString::get(M.getContext(), NewValue)};
3692  ModRetainReleaseMarker->setOperand(0,
3693  MDNode::get(M.getContext(), Ops));
3694  Changed = true;
3695  }
3696  }
3697  }
3698  }
3699  return Changed;
3700 }
3701 
3703  NamedMDNode *ModFlags = M.getModuleFlagsMetadata();
3704  if (!ModFlags)
3705  return false;
3706 
3707  bool HasObjCFlag = false, HasClassProperties = false, Changed = false;
3708  for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) {
3709  MDNode *Op = ModFlags->getOperand(I);
3710  if (Op->getNumOperands() != 3)
3711  continue;
3712  MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1));
3713  if (!ID)
3714  continue;
3715  if (ID->getString() == "Objective-C Image Info Version")
3716  HasObjCFlag = true;
3717  if (ID->getString() == "Objective-C Class Properties")
3718  HasClassProperties = true;
3719  // Upgrade PIC/PIE Module Flags. The module flag behavior for these two
3720  // field was Error and now they are Max.
3721  if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") {
3722  if (auto *Behavior =
3723  mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) {
3724  if (Behavior->getLimitedValue() == Module::Error) {
3726  Metadata *Ops[3] = {
3728  MDString::get(M.getContext(), ID->getString()),
3729  Op->getOperand(2)};
3730  ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
3731  Changed = true;
3732  }
3733  }
3734  }
3735  // Upgrade Objective-C Image Info Section. Removed the whitespce in the
3736  // section name so that llvm-lto will not complain about mismatching
3737  // module flags that is functionally the same.
3738  if (ID->getString() == "Objective-C Image Info Section") {
3739  if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) {
3740  SmallVector<StringRef, 4> ValueComp;
3741  Value->getString().split(ValueComp, " ");
3742  if (ValueComp.size() != 1) {
3743  std::string NewValue;
3744  for (auto &S : ValueComp)
3745  NewValue += S.str();
3746  Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1),
3747  MDString::get(M.getContext(), NewValue)};
3748  ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops));
3749  Changed = true;
3750  }
3751  }
3752  }
3753  }
3754 
3755  // "Objective-C Class Properties" is recently added for Objective-C. We
3756  // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module
3757  // flag of value 0, so we can correclty downgrade this flag when trying to
3758  // link an ObjC bitcode without this module flag with an ObjC bitcode with
3759  // this module flag.
3760  if (HasObjCFlag && !HasClassProperties) {
3761  M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties",
3762  (uint32_t)0);
3763  Changed = true;
3764  }
3765 
3766  return Changed;
3767 }
3768 
3770  auto TrimSpaces = [](StringRef Section) -> std::string {
3771  SmallVector<StringRef, 5> Components;
3772  Section.split(Components, ',');
3773 
3774  SmallString<32> Buffer;
3775  raw_svector_ostream OS(Buffer);
3776 
3777  for (auto Component : Components)
3778  OS << ',' << Component.trim();
3779 
3780  return OS.str().substr(1);
3781  };
3782 
3783  for (auto &GV : M.globals()) {
3784  if (!GV.hasSection())
3785  continue;
3786 
3787  StringRef Section = GV.getSection();
3788 
3789  if (!Section.startswith("__DATA, __objc_catlist"))
3790  continue;
3791 
3792  // __DATA, __objc_catlist, regular, no_dead_strip
3793  // __DATA,__objc_catlist,regular,no_dead_strip
3794  GV.setSection(TrimSpaces(Section));
3795  }
3796 }
3797 
3798 static bool isOldLoopArgument(Metadata *MD) {
3799  auto *T = dyn_cast_or_null<MDTuple>(MD);
3800  if (!T)
3801  return false;
3802  if (T->getNumOperands() < 1)
3803  return false;
3804  auto *S = dyn_cast_or_null<MDString>(T->getOperand(0));
3805  if (!S)
3806  return false;
3807  return S->getString().startswith("llvm.vectorizer.");
3808 }
3809 
3811  StringRef OldPrefix = "llvm.vectorizer.";
3812  assert(OldTag.startswith(OldPrefix) && "Expected old prefix");
3813 
3814  if (OldTag == "llvm.vectorizer.unroll")
3815  return MDString::get(C, "llvm.loop.interleave.count");
3816 
3817  return MDString::get(
3818  C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size()))
3819  .str());
3820 }
3821 
3823  auto *T = dyn_cast_or_null<MDTuple>(MD);
3824  if (!T)
3825  return MD;
3826  if (T->getNumOperands() < 1)
3827  return MD;
3828  auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0));
3829  if (!OldTag)
3830  return MD;
3831  if (!OldTag->getString().startswith("llvm.vectorizer."))
3832  return MD;
3833 
3834  // This has an old tag. Upgrade it.
3836  Ops.reserve(T->getNumOperands());
3837  Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString()));
3838  for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I)
3839  Ops.push_back(T->getOperand(I));
3840 
3841  return MDTuple::get(T->getContext(), Ops);
3842 }
3843 
3845  auto *T = dyn_cast<MDTuple>(&N);
3846  if (!T)
3847  return &N;
3848 
3849  if (none_of(T->operands(), isOldLoopArgument))
3850  return &N;
3851 
3853  Ops.reserve(T->getNumOperands());
3854  for (Metadata *MD : T->operands())
3855  Ops.push_back(upgradeLoopArgument(MD));
3856 
3857  return MDTuple::get(T->getContext(), Ops);
3858 }
IntegerType * getInt16Ty()
Fetch the type representing a 16-bit integer.
Definition: IRBuilder.h:342
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
Type * getVectorElementType() const
Definition: Type.h:371
const NoneType None
Definition: None.h:24
static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn)
uint64_t CallInst * C
SymbolTableList< Instruction >::iterator eraseFromParent()
This method unlinks &#39;this&#39; from the containing basic block and deletes it.
Definition: Instruction.cpp:68
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
Value * CreateICmp(CmpInst::Predicate P, Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1858
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1133
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
static IntegerType * getInt1Ty(LLVMContext &C)
Definition: Type.cpp:173
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
LLVMContext & Context
Value * CreateIsNotNull(Value *Arg, const Twine &Name="")
Return an i1 value testing if Arg is not null.
Definition: IRBuilder.h:2008
void UpgradeSectionAttributes(Module &M)
Takes the max of the two values, which are required to be integers.
Definition: Module.h:144
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1081
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
This class represents lattice values for constants.
Definition: AllocatorList.h:24
Type * getParamType(unsigned i) const
Parameter type accessors.
Definition: DerivedTypes.h:135
Value * CreateXor(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1160
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:454
bool UpgradeRetainReleaseMarker(Module &M)
This checks for objc retain release marker which should be upgraded.
static Value * upgradeAbs(IRBuilder<> &Builder, CallInst &CI)
static ConstantAggregateZero * get(Type *Ty)
Definition: Constants.cpp:1332
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
Definition: StringRef.h:138
static Value * ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, Value *Mask)
This class represents a function call, abstracting a target machine&#39;s calling convention.
unsigned less or equal
Definition: InstrTypes.h:668
unsigned less than
Definition: InstrTypes.h:667
static Constant * getIntToPtr(Constant *C, Type *Ty, bool OnlyIfReduced=false)
Definition: Constants.cpp:1760
void UpgradeInlineAsmString(std::string *AsmStr)
Upgrade comment in call to inline asm that represents an objc retain release marker.
unsigned getDebugMetadataVersionFromModule(const Module &M)
Return Debug Info Metadata Version by checking module flags.
Definition: DebugInfo.cpp:682
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:705
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:510
Value * CreateSExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1572
Metadata node.
Definition: Metadata.h:864
F(f)
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1069
unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
Definition: DerivedTypes.h:503
An instruction for reading from memory.
Definition: Instructions.h:168
static IntegerType * getInt64Ty(LLVMContext &C)
Definition: Type.cpp:177
Value * CreateICmpULE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1768
void reserve(size_type N)
Definition: SmallVector.h:376
void UpgradeIntrinsicCall(CallInst *CI, Function *NewFn)
This is the complement to the above, replacing a specific call to an intrinsic function with a call t...
static Value * EmitX86Select(IRBuilder<> &Builder, Value *Mask, Value *Op0, Value *Op1)
void setOperand(unsigned I, MDNode *New)
Definition: Metadata.cpp:1089
static Value * UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, bool IsAddition)
static Value * upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, ICmpInst::Predicate Pred)
uint64_t High
Diagnostic information for stripping invalid debug metadata.
Tuple of metadata.
Definition: Metadata.h:1106
static Constant * getNullValue(Type *Ty)
Constructor to create a &#39;0&#39; constant of arbitrary type.
Definition: Constants.cpp:265
Value * CreateNot(Value *V, const Twine &Name="")
Definition: IRBuilder.h:1294
StoreInst * CreateAlignedStore(Value *Val, Value *Ptr, unsigned Align, bool isVolatile=false)
Definition: IRBuilder.h:1358
IntegerType * getInt32Ty()
Fetch the type representing a 32-bit integer.
Definition: IRBuilder.h:347
Value * getArgOperand(unsigned i) const
Definition: InstrTypes.h:1079
unsigned getBitWidth() const
Return the number of bits in the Vector type.
Definition: DerivedTypes.h:452
A tuple of MDNodes.
Definition: Metadata.h:1326
amdgpu Simplify well known AMD library false Value Value const Twine & Name
static Value * UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, unsigned Shift)
Value * CreateFPExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1627
MDNode * upgradeInstructionLoopAttachment(MDNode &N)
Upgrade the loop attachment metadata node.
StringRef getName(ID id)
Return the LLVM name for an intrinsic, such as "llvm.ppc.altivec.lvx".
Definition: Function.cpp:627
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
void UpgradeCallsToIntrinsic(Function *F)
This is an auto-upgrade hook for any old intrinsic function syntaxes which need to have both the func...
static Type * getFloatTy(LLVMContext &C)
Definition: Type.cpp:164
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:451
LLVMContext & getContext() const
Get the global data context.
Definition: Module.h:243
static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name)
Definition: AutoUpgrade.cpp:68
PointerType * getPointerTo(unsigned AddrSpace=0) const
Return a pointer to the current type.
Definition: Type.cpp:652
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:197
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:743
static Constant * AddOne(Constant *C)
Add one to a Constant.
bool none_of(R &&Range, UnaryPredicate P)
Provide wrappers to std::none_of which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1194
void setCalledFunction(Value *Fn)
Sets the function called, including updating the function type.
Definition: InstrTypes.h:1119
unsigned Intr
unsigned getNumOperands() const
Definition: Metadata.cpp:1077
Value * CreateAdd(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:974
static Value * UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI)
void setName(const Twine &Name)
Change the name of the value.
Definition: Value.cpp:286
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE R Default(T Value)
Definition: StringSwitch.h:203
uint64_t getNumElements() const
Definition: DerivedTypes.h:359
static Metadata * upgradeLoopArgument(Metadata *MD)
AttributeList getAttributes(LLVMContext &C, ID id)
Return the attributes for an intrinsic.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:267
llvm::Optional< Function * > remangleIntrinsicFunction(Function *F)
Definition: Function.cpp:1219
Class to represent function types.
Definition: DerivedTypes.h:103
Value * CreateBitCast(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1641
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
LLVMContext & getContext() const
Definition: Metadata.h:924
bool StripDebugInfo(Module &M)
Strip debug info in the module if it exists.
Definition: DebugInfo.cpp:351
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
Definition: Module.cpp:245
static Value * EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, Value *Op0, Value *Op1)
Value * CreateVectorSplat(unsigned NumElts, Value *V, const Twine &Name="")
Return a vector value that contains.
Definition: IRBuilder.h:2088
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
bool UpgradeIntrinsicFunction(Function *F, Function *&NewFn)
This is a more granular function that simply checks an intrinsic function for upgrading, and returns true if it requires upgrading.
iterator_range< User::op_iterator > arg_operands()
Iteration adapter for range-for loops.
Definition: InstrTypes.h:1070
Value * CreateSub(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:991
Value * CreateSIToFP(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1618
An instruction for storing to memory.
Definition: Instructions.h:310
LinkageTypes getLinkage() const
Definition: GlobalValue.h:451
void replaceAllUsesWith(Value *V)
Change all uses of this to point to a new Value.
Definition: Value.cpp:430
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:598
Value * CreateZExt(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1568
static ConstantAsMetadata * get(Constant *C)
Definition: Metadata.h:410
Function * getDeclaration(Module *M, ID id, ArrayRef< Type *> Tys=None)
Create or insert an LLVM Function declaration for an intrinsic, and return it.
Definition: Function.cpp:1021
static Value * UpgradeMaskedLoad(IRBuilder<> &Builder, Value *Ptr, Value *Passthru, Value *Mask, bool Aligned)
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block...
Definition: IRBuilder.h:127
Value * getOperand(unsigned i) const
Definition: User.h:170
Class to represent pointers.
Definition: DerivedTypes.h:467
static Value * UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, Value *Op, unsigned Shift)
Value * CreateOr(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1142
bool UpgradeModuleFlags(Module &M)
This checks for module flags which should be upgraded.
StringRef getString() const
Definition: Metadata.cpp:464
static Value * UpgradeMaskedStore(IRBuilder<> &Builder, Value *Ptr, Value *Data, Value *Mask, bool Aligned)
LoadInst * CreateLoad(Value *Ptr, const char *Name)
Provided to resolve &#39;CreateLoad(Ptr, "...")&#39; correctly, instead of converting the string to &#39;bool&#39; fo...
Definition: IRBuilder.h:1317
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1166
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:43
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:169
void getModuleFlagsMetadata(SmallVectorImpl< ModuleFlagEntry > &Flags) const
Returns the module flags in the provided vector.
Definition: Module.cpp:285
static Function * Create(FunctionType *Ty, LinkageTypes Linkage, unsigned AddrSpace, const Twine &N="", Module *M=nullptr)
Definition: Function.h:136
Emits an error if two values disagree, otherwise the resulting value is that of the operands...
Definition: Module.h:115
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Value * CreateFMul(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1207
Value * CreateAShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Definition: IRBuilder.h:1104
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:429
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
ConstantInt * getInt1(bool V)
Get a constant value representing either true or false.
Definition: IRBuilder.h:282
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Value * CreateSelect(Value *C, Value *True, Value *False, const Twine &Name="", Instruction *MDFrom=nullptr)
Definition: IRBuilder.h:1913
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:139
bool UpgradeDebugInfo(Module &M)
Check the debug info version number, if it is out-dated, drop the debug info.
ArrayRef< Type * > params() const
Definition: DerivedTypes.h:130
static VectorType * getInteger(VectorType *VTy)
This static method gets a VectorType with the same number of elements as the input type...
Definition: DerivedTypes.h:406
void addModuleFlag(ModFlagBehavior Behavior, StringRef Key, Metadata *Val)
Add a module-level flag to the module-level flags metadata.
Definition: Module.cpp:332
Value * CreateNeg(Value *V, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1268
static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, Function *&NewFn)
Definition: AutoUpgrade.cpp:54
unsigned getAddressSpace() const
Definition: Globals.cpp:111
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:642
Value * CreateICmpSGE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1776
static FunctionType * get(Type *Result, ArrayRef< Type *> Params, bool isVarArg)
This static method is the primary way of constructing a FunctionType.
Definition: Type.cpp:297
size_t arg_size() const
Definition: Function.h:698
arg_iterator arg_begin()
Definition: Function.h:671
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1748
self_iterator getIterator()
Definition: ilist_node.h:82
IntegerType * getIntNTy(unsigned N)
Fetch the type representing an N-bit integer.
Definition: IRBuilder.h:360
Value * CreateExtractElement(Value *Vec, Value *Idx, const Twine &Name="")
Definition: IRBuilder.h:1933
static Constant * getAllOnesValue(Type *Ty)
Definition: Constants.cpp:319
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
static UndefValue * get(Type *T)
Static factory methods - Return an &#39;undef&#39; object of the specified type.
Definition: Constants.cpp:1415
Value * CreateExtractValue(Value *Agg, ArrayRef< unsigned > Idxs, const Twine &Name="")
Definition: IRBuilder.h:1975
size_t size() const
Definition: SmallVector.h:53
static wasm::ValType getType(const TargetRegisterClass *RC)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void setMetadata(unsigned KindID, MDNode *Node)
Set the metadata of the specified kind to the specified node.
Definition: Metadata.cpp:1226
Value * CreateMul(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1008
Value * CreateTrunc(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1564
static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, Function *&NewFn)
signed greater than
Definition: InstrTypes.h:669
Value * CreateUIToFP(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1614
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef drop_front(size_t N=1) const
Return a StringRef equal to &#39;this&#39; but with the first N elements dropped.
Definition: StringRef.h:645
static Value * getX86MaskVec(IRBuilder<> &Builder, Value *Mask, unsigned NumElts)
bool isPtrOrPtrVectorTy() const
Return true if this is a pointer type or a vector of pointer types.
Definition: Type.h:227
static Value * UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, Value *Op1, Value *Shift, Value *Passthru, Value *Mask, bool IsVALIGN)
Instruction * UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, Instruction *&Temp)
This is an auto-upgrade for bitcast between pointers with different address spaces: the instruction i...
static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, CallInst &CI, Value *&Rep)
unsigned getNumOperands() const
Definition: User.h:192
static PointerType * getUnqual(Type *ElementType)
This constructs a pointer to an object of the specified type in the generic address space (address sp...
Definition: DerivedTypes.h:482
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type...
Definition: Type.cpp:130
Value * CreateICmpUGE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1760
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
static MDString * upgradeLoopTag(LLVMContext &C, StringRef OldTag)
Module.h This file contains the declarations for the Module class.
bool UpgradeGlobalVariable(GlobalVariable *GV)
This checks for global variables which should be upgraded.
Value * CreateInsertElement(Value *Vec, Value *NewElt, Value *Idx, const Twine &Name="")
Definition: IRBuilder.h:1946
LLVM_NODISCARD std::pair< StringRef, StringRef > split(char Separator) const
Split into two substrings around the first occurrence of a separator character.
Definition: StringRef.h:727
signed less than
Definition: InstrTypes.h:671
CallInst * CreateMaskedStore(Value *Val, Value *Ptr, unsigned Align, Value *Mask)
Create a call to Masked Store intrinsic.
Definition: IRBuilder.cpp:492
Value * CreateShuffleVector(Value *V1, Value *V2, Value *Mask, const Twine &Name="")
Definition: IRBuilder.h:1960
StringRef str()
Return a StringRef for the vector contents.
Definition: raw_ostream.h:535
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Definition: Constants.cpp:622
CallInst * CreateMaskedLoad(Value *Ptr, unsigned Align, Value *Mask, Value *PassThru=nullptr, const Twine &Name="")
Create a call to Masked Load intrinsic.
Definition: IRBuilder.cpp:471
static Value * UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, Intrinsic::ID IID)
void setAttributes(AttributeList Attrs)
Set the attribute list for this Function.
Definition: Function.h:227
static VectorType * getExtendedElementVectorType(VectorType *VTy)
This static method is like getInteger except that the element types are twice as wide as the elements...
Definition: DerivedTypes.h:415
Intrinsic::ID getIntrinsicID() const LLVM_READONLY
getIntrinsicID - This method returns the ID number of the specified function, or Intrinsic::not_intri...
Definition: Function.h:194
Uses the specified value, regardless of the behavior or value of the other module.
Definition: Module.h:133
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:941
unsigned getVectorNumElements() const
Definition: DerivedTypes.h:462
FunctionType * getFunctionType() const
Returns the FunctionType for me.
Definition: Function.h:164
MDNode * UpgradeTBAANode(MDNode &TBAANode)
If the given TBAA tag uses the scalar TBAA format, create a new node corresponding to the upgrade to ...
signed less or equal
Definition: InstrTypes.h:672
Class to represent vector types.
Definition: DerivedTypes.h:393
const Module * getModule() const
Return the module owning the function this instruction belongs to or nullptr it the function does not...
Definition: Instruction.cpp:56
Class for arbitrary precision integers.
Definition: APInt.h:70
IntegerType * getInt8Ty()
Fetch the type representing an 8-bit integer.
Definition: IRBuilder.h:337
Value * CreateShl(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1063
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:70
Value * CreatePointerCast(Value *V, Type *DestTy, const Twine &Name="")
Definition: IRBuilder.h:1687
bool verifyModule(const Module &M, raw_ostream *OS=nullptr, bool *BrokenDebugInfo=nullptr)
Check a module for errors.
Definition: Verifier.cpp:4798
ConstantInt * getFalse()
Get the constant value for i1 false.
Definition: IRBuilder.h:292
amdgpu Simplify well known AMD library false Value Value * Arg
IntegerType * getInt1Ty()
Fetch the type representing a single bit.
Definition: IRBuilder.h:332
static CastInst * Create(Instruction::CastOps, Value *S, Type *Ty, const Twine &Name="", Instruction *InsertBefore=nullptr)
Provides a way to construct any of the CastInst subclasses using an opcode instead of the subclass&#39;s ...
unsigned getNumArgOperands() const
Definition: InstrTypes.h:1077
static bool isOldLoopArgument(Metadata *MD)
static const size_t npos
Definition: StringRef.h:51
static IntegerType * getInt32Ty(LLVMContext &C)
Definition: Type.cpp:176
unsigned getIntegerBitWidth() const
Definition: DerivedTypes.h:97
unsigned greater or equal
Definition: InstrTypes.h:666
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:215
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation.
Definition: InstrTypes.h:1112
static Constant * getPtrToInt(Constant *C, Type *Ty, bool OnlyIfReduced=false)
Definition: Constants.cpp:1747
#define I(x, y, z)
Definition: MD5.cpp:58
#define N
Value * CreateFSub(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1190
Diagnostic information for debug metadata version reporting.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static Value * upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI)
static void rename(GlobalValue *GV)
Definition: AutoUpgrade.cpp:34
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
Definition: StringSwitch.h:94
static Value * upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, unsigned CC, bool Signed)
uint32_t Size
Definition: Profile.cpp:47
void eraseFromParent()
eraseFromParent - This method unlinks &#39;this&#39; from the containing module and deletes it...
Definition: Function.cpp:215
Type * getFloatTy()
Fetch the type representing a 32-bit floating point value.
Definition: IRBuilder.h:370
void diagnose(const DiagnosticInfo &DI)
Report a message to the currently installed diagnostic handler.
Value * CreateFAdd(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1173
Value * CreateAnd(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1124
Value * CreateFDiv(Value *L, Value *R, const Twine &Name="", MDNode *FPMD=nullptr)
Definition: IRBuilder.h:1224
static bool UpgradePTESTIntrinsic(Function *F, Intrinsic::ID IID, Function *&NewFn)
Definition: AutoUpgrade.cpp:38
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition: Type.h:185
unsigned getMDKindID(StringRef Name) const
Return a unique non-zero ID for the specified metadata kind.
Definition: Module.cpp:119
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
user_iterator user_begin()
Definition: Value.h:376
LoadInst * CreateAlignedLoad(Value *Ptr, unsigned Align, const char *Name)
Provided to resolve &#39;CreateAlignedLoad(Ptr, Align, "...")&#39; correctly, instead of converting the strin...
Definition: IRBuilder.h:1340
unsigned getPrimitiveSizeInBits() const LLVM_READONLY
Return the basic size of this type if it is a primitive type.
Definition: Type.cpp:115
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
LLVM Value Representation.
Definition: Value.h:73
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:302
static VectorType * get(Type *ElementType, unsigned NumElements)
This static method is the primary way to construct an VectorType.
Definition: Type.cpp:606
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
Value * CreateLShr(Value *LHS, Value *RHS, const Twine &Name="", bool isExact=false)
Definition: IRBuilder.h:1084
bool match(StringRef String, SmallVectorImpl< StringRef > *Matches=nullptr)
matches - Match the regex against a given String.
Definition: Regex.cpp:73
ConstantInt * getInt8(uint8_t C)
Get a constant 8-bit value.
Definition: IRBuilder.h:297
iterator_range< global_iterator > globals()
Definition: Module.h:574
unsigned greater than
Definition: InstrTypes.h:665
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
A single uniqued string.
Definition: Metadata.h:604
static Value * upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned)
Value * UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy)
This is an auto-upgrade for bitcast constant expression between pointers with different address space...
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1075
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:298
Root of the metadata hierarchy.
Definition: Metadata.h:58
Value * CreateICmpSLE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1784
const uint64_t Version
Definition: InstrProf.h:895
static IntegerType * getInt8Ty(LLVMContext &C)
Definition: Type.cpp:174
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Value * CreateFNeg(Value *V, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:1286
signed greater or equal
Definition: InstrTypes.h:670
IntegerType * Int32Ty
const BasicBlock * getParent() const
Definition: Instruction.h:67
CallInst * CreateCall(Value *Callee, ArrayRef< Value *> Args=None, const Twine &Name="", MDNode *FPMathTag=nullptr)
Definition: IRBuilder.h:1883
user_iterator user_end()
Definition: Value.h:384