LLVM  7.0.0svn
HexagonMCShuffler.cpp
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1 //===----- HexagonMCShuffler.cpp - MC bundle shuffling --------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the shuffling of insns inside a bundle according to the
11 // packet formation rules of the Hexagon ISA.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #define DEBUG_TYPE "hexagon-shuffle"
16 
18 #include "Hexagon.h"
21 #include "llvm/MC/MCInst.h"
22 #include "llvm/MC/MCInstrDesc.h"
23 #include "llvm/MC/MCInstrInfo.h"
25 #include "llvm/Support/Debug.h"
27 #include <cassert>
28 
29 using namespace llvm;
30 
31 static cl::opt<bool>
32  DisableShuffle("disable-hexagon-shuffle", cl::Hidden, cl::init(false),
33  cl::desc("Disable Hexagon instruction shuffling"));
34 
35 void HexagonMCShuffler::init(MCInst &MCB) {
37  MCInst const *Extender = nullptr;
38  // Copy the bundle for the shuffling.
39  for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCB)) {
40  MCInst &MI = *const_cast<MCInst *>(I.getInst());
41  LLVM_DEBUG(dbgs() << "Shuffling: " << MCII.getName(MI.getOpcode())
42  << '\n');
43  assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo());
44 
46  append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, MI));
47  Extender = nullptr;
48  } else
49  Extender = &MI;
50  }
51  }
52 
53  Loc = MCB.getLoc();
54  BundleFlags = MCB.getOperand(0).getImm();
55 }
56 
57 void HexagonMCShuffler::init(MCInst &MCB, MCInst const &AddMI,
58  bool bInsertAtFront) {
60  if (bInsertAtFront)
61  append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI));
62  MCInst const *Extender = nullptr;
63  // Copy the bundle for the shuffling.
64  for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCB)) {
65  assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo());
66  MCInst &MI = *const_cast<MCInst *>(I.getInst());
68  append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, MI));
69  Extender = nullptr;
70  } else
71  Extender = &MI;
72  }
73  if (!bInsertAtFront)
74  append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI));
75  }
76 
77  Loc = MCB.getLoc();
78  BundleFlags = MCB.getOperand(0).getImm();
79 }
80 
82  MCB.clear();
84  MCB.setLoc(Loc);
85  // Copy the results into the bundle.
86  for (HexagonShuffler::iterator I = begin(); I != end(); ++I) {
87 
88  MCInst const &MI = I->getDesc();
89  MCInst const *Extender = I->getExtender();
90  if (Extender)
91  MCB.addOperand(MCOperand::createInst(Extender));
93  }
94 }
95 
97  if (shuffle()) {
98  // Copy the results into the bundle.
99  copyTo(MCB);
100  return true;
101  }
102  LLVM_DEBUG(MCB.dump());
103  return false;
104 }
105 
107  MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
108  MCInst &MCB) {
109  HexagonMCShuffler MCS(Context, Fatal, MCII, STI, MCB);
110 
111  if (DisableShuffle)
112  // Ignore if user chose so.
113  return false;
114 
115  if (!HexagonMCInstrInfo::bundleSize(MCB)) {
116  // There once was a bundle:
117  // BUNDLE implicit-def %d2, implicit-def %r4, implicit-def %r5,
118  // implicit-def %d7, ...
119  // * %d2 = IMPLICIT_DEF; flags:
120  // * %d7 = IMPLICIT_DEF; flags:
121  // After the IMPLICIT_DEFs were removed by the asm printer, the bundle
122  // became empty.
123  LLVM_DEBUG(dbgs() << "Skipping empty bundle");
124  return false;
125  } else if (!HexagonMCInstrInfo::isBundle(MCB)) {
126  LLVM_DEBUG(dbgs() << "Skipping stand-alone insn");
127  return false;
128  }
129 
130  return MCS.reshuffleTo(MCB);
131 }
132 
133 bool
135  MCSubtargetInfo const &STI, MCInst &MCB,
136  SmallVector<DuplexCandidate, 8> possibleDuplexes) {
137  if (DisableShuffle)
138  return false;
139 
140  if (!HexagonMCInstrInfo::bundleSize(MCB)) {
141  // There once was a bundle:
142  // BUNDLE implicit-def %d2, implicit-def %r4, implicit-def %r5,
143  // implicit-def %d7, ...
144  // * %d2 = IMPLICIT_DEF; flags:
145  // * %d7 = IMPLICIT_DEF; flags:
146  // After the IMPLICIT_DEFs were removed by the asm printer, the bundle
147  // became empty.
148  LLVM_DEBUG(dbgs() << "Skipping empty bundle");
149  return false;
150  } else if (!HexagonMCInstrInfo::isBundle(MCB)) {
151  LLVM_DEBUG(dbgs() << "Skipping stand-alone insn");
152  return false;
153  }
154 
155  bool doneShuffling = false;
156  while (possibleDuplexes.size() > 0 && (!doneShuffling)) {
157  // case of Duplex Found
158  DuplexCandidate duplexToTry = possibleDuplexes.pop_back_val();
159  MCInst Attempt(MCB);
160  HexagonMCInstrInfo::replaceDuplex(Context, Attempt, duplexToTry);
161  HexagonMCShuffler MCS(Context, false, MCII, STI, Attempt); // copy packet to the shuffler
162  if (MCS.size() == 1) { // case of one duplex
163  // copy the created duplex in the shuffler to the bundle
164  MCS.copyTo(MCB);
165  return false;
166  }
167  // try shuffle with this duplex
168  doneShuffling = MCS.reshuffleTo(MCB);
169 
170  if (doneShuffling)
171  break;
172  }
173 
174  if (!doneShuffling) {
175  HexagonMCShuffler MCS(Context, false, MCII, STI, MCB);
176  doneShuffling = MCS.reshuffleTo(MCB); // shuffle
177  }
178  if (!doneShuffling)
179  return true;
180 
181  return false;
182 }
183 
185  MCSubtargetInfo const &STI, MCInst &MCB,
186  MCInst const &AddMI, int fixupCount) {
188  return false;
189 
190  // if fixups present, make sure we don't insert too many nops that would
191  // later prevent an extender from being inserted.
192  unsigned int bundleSize = HexagonMCInstrInfo::bundleSize(MCB);
193  if (bundleSize >= HEXAGON_PACKET_SIZE)
194  return false;
195  bool bhasDuplex = HexagonMCInstrInfo::hasDuplex(MCII, MCB);
196  if (fixupCount >= 2) {
197  if (bhasDuplex) {
198  if (bundleSize >= HEXAGON_PACKET_SIZE - 1) {
199  return false;
200  }
201  } else {
202  return false;
203  }
204  } else {
205  if (bundleSize == HEXAGON_PACKET_SIZE - 1 && fixupCount)
206  return false;
207  }
208 
209  if (DisableShuffle)
210  return false;
211 
212  // mgl: temporary code (shuffler doesn't take into account the fact that
213  // a duplex takes up two slots. for example, 3 nops can be put into a packet
214  // containing a duplex oversubscribing slots by 1).
215  unsigned maxBundleSize = (HexagonMCInstrInfo::hasImmExt(MCB))
217  : HEXAGON_PACKET_SIZE - 1;
218  if (bhasDuplex && bundleSize >= maxBundleSize)
219  return false;
220 
221  HexagonMCShuffler MCS(Context, false, MCII, STI, MCB, AddMI, false);
222  return MCS.reshuffleTo(MCB);
223 }
void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void clear()
Definition: MCInst.h:191
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:137
void append(MCInst const &ID, MCInst const *Extender, unsigned S)
bool isBundle(MCInst const &MCI)
unsigned size() const
bool isImmext(MCInst const &MCI)
bool reshuffleTo(MCInst &MCB)
#define HEXAGON_PACKET_SIZE
Definition: Hexagon.h:33
iterator_range< Hexagon::PacketIterator > bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI)
Context object for machine code objects.
Definition: MCContext.h:63
HexagonPacket::iterator iterator
bool HexagonMCShuffle(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &MCB)
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:161
int64_t getImm() const
Definition: MCInst.h:76
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:410
MCSubtargetInfo const & STI
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
MCInstrDesc const & getDesc(MCInstrInfo const &MCII, MCInst const &MCI)
StringRef getName(unsigned Opcode) const
Returns the name for the instructions with the given opcode.
Definition: MCInstrInfo.h:51
void setLoc(SMLoc loc)
Definition: MCInst.h:179
void dump() const
Definition: MCInst.cpp:89
MCInstrInfo const & MCII
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:861
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:182
LLVM_NODISCARD T pop_back_val()
Definition: SmallVector.h:382
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
SMLoc getLoc() const
Definition: MCInst.h:180
static MCOperand createInst(const MCInst *Val)
Definition: MCInst.h:144
#define I(x, y, z)
Definition: MD5.cpp:58
Generic base class for all target subtargets.
size_t bundleSize(MCInst const &MCI)
static cl::opt< bool > DisableShuffle("disable-hexagon-shuffle", cl::Hidden, cl::init(false), cl::desc("Disable Hexagon instruction shuffling"))
bool hasImmExt(MCInst const &MCI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
Return the slots used by the insn.
IRTranslator LLVM IR MI
void addOperand(const MCOperand &Op)
Definition: MCInst.h:186
unsigned getOpcode() const
Definition: MCInst.h:174
#define LLVM_DEBUG(X)
Definition: Debug.h:119
static MCOperand createImm(int64_t Val)
Definition: MCInst.h:123