33#define GET_GICOMBINER_DEPS
34#include "RISCVGenPostLegalizeGICombiner.inc"
35#undef GET_GICOMBINER_DEPS
37#define DEBUG_TYPE "riscv-postlegalizer-combiner"
43#define GET_GICOMBINER_TYPES
44#include "RISCVGenPostLegalizeGICombiner.inc"
45#undef GET_GICOMBINER_TYPES
47class RISCVPostLegalizerCombinerImpl :
public Combiner {
51 const RISCVPostLegalizerCombinerImplRuleConfig &RuleConfig;
55 RISCVPostLegalizerCombinerImpl(
58 const RISCVPostLegalizerCombinerImplRuleConfig &RuleConfig,
62 static const char *
getName() {
return "RISCVPostLegalizerCombiner"; }
67#define GET_GICOMBINER_CLASS_MEMBERS
68#include "RISCVGenPostLegalizeGICombiner.inc"
69#undef GET_GICOMBINER_CLASS_MEMBERS
72#define GET_GICOMBINER_IMPL
73#include "RISCVGenPostLegalizeGICombiner.inc"
74#undef GET_GICOMBINER_IMPL
76RISCVPostLegalizerCombinerImpl::RISCVPostLegalizerCombinerImpl(
79 const RISCVPostLegalizerCombinerImplRuleConfig &RuleConfig,
82 :
Combiner(MF, CInfo, TPC, &KB, CSEInfo),
83 Helper(Observer,
B,
false, &KB, MDT, LI),
84 RuleConfig(RuleConfig), STI(STI),
86#include
"RISCVGenPostLegalizeGICombiner.inc"
95 RISCVPostLegalizerCombiner();
98 return "RISCVPostLegalizerCombiner";
105 RISCVPostLegalizerCombinerImplRuleConfig RuleConfig;
109void RISCVPostLegalizerCombiner::getAnalysisUsage(
AnalysisUsage &AU)
const {
122RISCVPostLegalizerCombiner::RISCVPostLegalizerCombiner()
126 if (!RuleConfig.parseCommandLineOption())
130bool RISCVPostLegalizerCombiner::runOnMachineFunction(
MachineFunction &MF) {
132 MachineFunctionProperties::Property::FailedISel))
135 MachineFunctionProperties::Property::Legalized) &&
136 "Expected a legalized function?");
137 auto *TPC = &getAnalysis<TargetPassConfig>();
143 const auto *LI =
ST.getLegalizerInfo();
145 GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
147 &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
149 getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEWrapper();
150 auto *CSEInfo = &
Wrapper.get(TPC->getCSEConfig());
153 nullptr, EnableOpt,
F.hasOptSize(),
155 RISCVPostLegalizerCombinerImpl Impl(MF, CInfo, TPC, *KB, CSEInfo,
156 RuleConfig, ST, MDT, LI);
157 return Impl.combineMachineInstrs();
160char RISCVPostLegalizerCombiner::ID = 0;
162 "Combine RISC-V MachineInstrs after legalization",
false,
172 return new RISCVPostLegalizerCombiner();
amdgpu aa AMDGPU Address space based Alias Analysis Wrapper
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Provides analysis for continuously CSEing during GISel passes.
This contains common combine transformations that may be used in a combine pass,or by the target else...
Option class for Targets to specify which operations are combined how and when.
This contains the base class for all Combiners generated by TableGen.
Provides analysis for querying information about KnownBits during GISel passes.
Declares convenience wrapper classes for interpreting MachineInstr instances as specific generic oper...
This file declares the MachineIRBuilder class.
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
static StringRef getName(Value *V)
#define GET_GICOMBINER_CONSTRUCTOR_INITS
Combine RISC V MachineInstrs after legalization
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Target-Independent Code Generator Pass Configuration Options pass.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
virtual bool tryCombineAll(MachineInstr &I) const =0
FunctionPass class - This class is used to implement most global optimizations.
The actual analysis pass wrapper.
Simple wrapper that does the following.
To use KnownBitsInfo analysis in a pass, KnownBitsInfo &Info = getAnalysis<GISelKnownBitsInfoAnalysis...
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
bool hasProperty(Property P) const
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const MachineFunctionProperties & getProperties() const
Get the function properties.
Representation of each machine instruction.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
StringRef - Represent a constant reference to a string, i.e.
CodeGenOptLevel getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
Target-Independent Code Generator Pass Configuration Options.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
FunctionPass * createRISCVPostLegalizerCombiner()
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.
void initializeRISCVPostLegalizerCombinerPass(PassRegistry &)