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static uint32_t | llvm::convertCharsToWord (const StringRef &Str, unsigned i) |
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static size_t | llvm::getPaddedLen (const StringRef &Str) |
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void | llvm::addStringImm (const StringRef &Str, MCInst &Inst) |
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void | llvm::addStringImm (const StringRef &Str, MachineInstrBuilder &MIB) |
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void | llvm::addStringImm (const StringRef &Str, IRBuilder<> &B, std::vector< Value * > &Args) |
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std::string | llvm::getStringImm (const MachineInstr &MI, unsigned StartIndex) |
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void | llvm::addNumImm (const APInt &Imm, MachineInstrBuilder &MIB) |
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void | llvm::buildOpName (Register Target, const StringRef &Name, MachineIRBuilder &MIRBuilder) |
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void | llvm::buildOpName (Register Target, const StringRef &Name, MachineInstr &I, const SPIRVInstrInfo &TII) |
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static void | llvm::finishBuildOpDecorate (MachineInstrBuilder &MIB, const std::vector< uint32_t > &DecArgs, StringRef StrImm) |
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void | llvm::buildOpDecorate (Register Reg, MachineIRBuilder &MIRBuilder, SPIRV::Decoration::Decoration Dec, const std::vector< uint32_t > &DecArgs, StringRef StrImm) |
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void | llvm::buildOpDecorate (Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII, SPIRV::Decoration::Decoration Dec, const std::vector< uint32_t > &DecArgs, StringRef StrImm) |
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void | llvm::buildOpSpirvDecorations (Register Reg, MachineIRBuilder &MIRBuilder, const MDNode *GVarMD) |
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MachineBasicBlock::iterator | llvm::getOpVariableMBBIt (MachineInstr &I) |
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MachineBasicBlock::iterator | llvm::getInsertPtValidEnd (MachineBasicBlock *MBB) |
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SPIRV::StorageClass::StorageClass | llvm::addressSpaceToStorageClass (unsigned AddrSpace, const SPIRVSubtarget &STI) |
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SPIRV::MemorySemantics::MemorySemantics | llvm::getMemSemanticsForStorageClass (SPIRV::StorageClass::StorageClass SC) |
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SPIRV::MemorySemantics::MemorySemantics | llvm::getMemSemantics (AtomicOrdering Ord) |
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SPIRV::Scope::Scope | llvm::getMemScope (LLVMContext &Ctx, SyncScope::ID Id) |
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MachineInstr * | llvm::getDefInstrMaybeConstant (Register &ConstReg, const MachineRegisterInfo *MRI) |
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uint64_t | llvm::getIConstVal (Register ConstReg, const MachineRegisterInfo *MRI) |
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bool | llvm::isSpvIntrinsic (const MachineInstr &MI, Intrinsic::ID IntrinsicID) |
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Type * | llvm::getMDOperandAsType (const MDNode *N, unsigned I) |
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static bool | llvm::isPipeOrAddressSpaceCastBI (const StringRef MangledName) |
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static bool | llvm::isEnqueueKernelBI (const StringRef MangledName) |
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static bool | llvm::isKernelQueryBI (const StringRef MangledName) |
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static bool | llvm::isNonMangledOCLBuiltin (StringRef Name) |
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std::string | llvm::getOclOrSpirvBuiltinDemangledName (StringRef Name) |
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bool | llvm::hasBuiltinTypePrefix (StringRef Name) |
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bool | llvm::isSpecialOpaqueType (const Type *Ty) |
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bool | llvm::isEntryPoint (const Function &F) |
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Type * | llvm::parseBasicTypeName (StringRef &TypeName, LLVMContext &Ctx) |
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bool | llvm::sortBlocks (Function &F) |
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MachineInstr * | llvm::getVRegDef (MachineRegisterInfo &MRI, Register Reg) |
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bool | llvm::getVacantFunctionName (Module &M, std::string &Name) |
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void | llvm::setRegClassType (Register Reg, SPIRVType *SpvType, SPIRVGlobalRegistry *GR, MachineRegisterInfo *MRI, const MachineFunction &MF, bool Force) |
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void | llvm::setRegClassType (Register Reg, const Type *Ty, SPIRVGlobalRegistry *GR, MachineIRBuilder &MIRBuilder, bool Force) |
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Register | llvm::createVirtualRegister (SPIRVType *SpvType, SPIRVGlobalRegistry *GR, MachineRegisterInfo *MRI, const MachineFunction &MF) |
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Register | llvm::createVirtualRegister (SPIRVType *SpvType, SPIRVGlobalRegistry *GR, MachineIRBuilder &MIRBuilder) |
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Register | llvm::createVirtualRegister (const Type *Ty, SPIRVGlobalRegistry *GR, MachineIRBuilder &MIRBuilder) |
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bool | llvm::isNestedPointer (const Type *Ty) |
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bool | llvm::isSpvIntrinsic (const Value *Arg) |
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