LLVM 20.0.0git
SPIRVGlobalRegistry.h
Go to the documentation of this file.
1//===-- SPIRVGlobalRegistry.h - SPIR-V Global Registry ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// SPIRVGlobalRegistry is used to maintain rich type information required for
10// SPIR-V even after lowering from LLVM IR to GMIR. It can convert an llvm::Type
11// into an OpTypeXXX instruction, and map it to a virtual register. Also it
12// builds and supports consistency of constants and global variables.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
17#define LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
18
21#include "SPIRVInstrInfo.h"
23#include "llvm/IR/Constant.h"
25
26namespace llvm {
27class SPIRVSubtarget;
28using SPIRVType = const MachineInstr;
29
31 // Registers holding values which have types associated with them.
32 // Initialized upon VReg definition in IRTranslator.
33 // Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
34 // where Reg = OpType...
35 // while VRegToTypeMap tracks SPIR-V type assigned to other regs (i.e. not
36 // type-declaring ones).
38 VRegToTypeMap;
39
40 // Map LLVM Type* to <MF, Reg>
42
44
45 // map a Function to its definition (as a machine instruction operand)
48 // map function pointer (as a machine instruction operand) to the used
49 // Function
51 // Maps Functions to their calls (in a form of the machine instruction,
52 // OpFunctionCall) that happened before the definition is available
54 // map a Function to its original return type before the clone function was
55 // created during substitution of aggregate arguments
56 // (see `SPIRVPrepareFunctions::removeAggregateTypesFromSignature()`)
57 DenseMap<Value *, Type *> MutatedAggRet;
58 // map an instruction to its value's attributes (type, name)
60
61 // Look for an equivalent of the newType in the map. Return the equivalent
62 // if it's found, otherwise insert newType to the map and return the type.
63 const MachineInstr *checkSpecialInstr(const SPIRV::SpecialTypeDescriptor &TD,
64 MachineIRBuilder &MIRBuilder);
65
66 SmallPtrSet<const Type *, 4> TypesInProcessing;
67 DenseMap<const Type *, SPIRVType *> ForwardPointerTypes;
68
69 // Stores for each function the last inserted SPIR-V Type.
70 // See: SPIRVGlobalRegistry::createOpType.
72
73 // if a function returns a pointer, this is to map it into TypedPointerType
75
76 // Number of bits pointers and size_t integers require.
77 const unsigned PointerSize;
78
79 // Holds the maximum ID we have in the module.
80 unsigned Bound;
81
82 // Maps values associated with untyped pointers into deduced element types of
83 // untyped pointers.
84 DenseMap<Value *, Type *> DeducedElTys;
85 // Maps composite values to deduced types where untyped pointers are replaced
86 // with typed ones.
87 DenseMap<Value *, Type *> DeducedNestedTys;
88 // Maps values to "assign type" calls, thus being a registry of created
89 // Intrinsic::spv_assign_ptr_type instructions.
90 DenseMap<Value *, CallInst *> AssignPtrTypeInstr;
91
92 // Add a new OpTypeXXX instruction without checking for duplicates.
93 SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
94 SPIRV::AccessQualifier::AccessQualifier AQ =
95 SPIRV::AccessQualifier::ReadWrite,
96 bool EmitIR = true);
97 SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
98 SPIRV::AccessQualifier::AccessQualifier accessQual =
99 SPIRV::AccessQualifier::ReadWrite,
100 bool EmitIR = true);
101 SPIRVType *
102 restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
103 SPIRV::AccessQualifier::AccessQualifier AccessQual,
104 bool EmitIR);
105
106 // Internal function creating the an OpType at the correct position in the
107 // function by tweaking the passed "MIRBuilder" insertion point and restoring
108 // it to the correct position. "Op" should be the function creating the
109 // specific OpType you need, and should return the newly created instruction.
110 SPIRVType *createOpType(MachineIRBuilder &MIRBuilder,
111 std::function<MachineInstr *(MachineIRBuilder &)> Op);
112
113public:
114 SPIRVGlobalRegistry(unsigned PointerSize);
115
117
118 void add(const Constant *C, MachineFunction *MF, Register R) {
119 DT.add(C, MF, R);
120 }
121
122 void add(const GlobalVariable *GV, MachineFunction *MF, Register R) {
123 DT.add(GV, MF, R);
124 }
125
126 void add(const Function *F, MachineFunction *MF, Register R) {
127 DT.add(F, MF, R);
128 }
129
130 void add(const Argument *Arg, MachineFunction *MF, Register R) {
131 DT.add(Arg, MF, R);
132 }
133
135 DT.add(MI, MF, R);
136 }
137
139 return DT.find(MI, MF);
140 }
141
143 return DT.find(C, MF);
144 }
145
147 return DT.find(GV, MF);
148 }
149
151 return DT.find(F, MF);
152 }
153
154 void buildDepsGraph(std::vector<SPIRV::DTSortableEntry *> &Graph,
155 const SPIRVInstrInfo *TII,
156 MachineModuleInfo *MMI = nullptr) {
157 DT.buildDepsGraph(Graph, TII, MMI);
158 }
159
160 void setBound(unsigned V) { Bound = V; }
161 unsigned getBound() { return Bound; }
162
163 // Add a record to the map of function return pointer types.
164 void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy) {
165 FunResPointerTypes[ArgF] = DerivedTy;
166 }
167 // Find a record in the map of function return pointer types.
169 auto It = FunResPointerTypes.find(ArgF);
170 return It == FunResPointerTypes.end() ? nullptr : It->second;
171 }
172
173 // A registry of "assign type" records:
174 // - Add a record.
175 void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI) {
176 AssignPtrTypeInstr[Val] = AssignPtrTyCI;
177 }
178 // - Find a record.
180 auto It = AssignPtrTypeInstr.find(Val);
181 return It == AssignPtrTypeInstr.end() ? nullptr : It->second;
182 }
183 // - Find a record and update its key or add a new record, if found.
185 bool DeleteOld) {
186 if (CallInst *CI = findAssignPtrTypeInstr(OldVal)) {
187 if (DeleteOld)
188 AssignPtrTypeInstr.erase(OldVal);
189 AssignPtrTypeInstr[NewVal] = CI;
190 }
191 }
192
193 // A registry of mutated values
194 // (see `SPIRVPrepareFunctions::removeAggregateTypesFromSignature()`):
195 // - Add a record.
196 void addMutated(Value *Val, Type *Ty) { MutatedAggRet[Val] = Ty; }
197 // - Find a record.
198 Type *findMutated(const Value *Val) {
199 auto It = MutatedAggRet.find(Val);
200 return It == MutatedAggRet.end() ? nullptr : It->second;
201 }
202
203 // A registry of value's attributes (type, name)
204 // - Add a record.
205 void addValueAttrs(MachineInstr *Key, std::pair<Type *, std::string> Val) {
206 ValueAttrs[Key] = Val;
207 }
208 // - Find a record.
209 bool findValueAttrs(const MachineInstr *Key, Type *&Ty, StringRef &Name) {
210 auto It = ValueAttrs.find(Key);
211 if (It == ValueAttrs.end())
212 return false;
213 Ty = It->second.first;
214 Name = It->second.second;
215 return true;
216 }
217
218 // Deduced element types of untyped pointers and composites:
219 // - Add a record to the map of deduced element types.
220 void addDeducedElementType(Value *Val, Type *Ty) { DeducedElTys[Val] = Ty; }
221 // - Find a record in the map of deduced element types.
223 auto It = DeducedElTys.find(Val);
224 return It == DeducedElTys.end() ? nullptr : It->second;
225 }
226 // - Find a record and update its key or add a new record, if found.
228 bool DeleteOld) {
229 if (Type *Ty = findDeducedElementType(OldVal)) {
230 if (DeleteOld)
231 DeducedElTys.erase(OldVal);
232 DeducedElTys[NewVal] = Ty;
233 }
234 }
235 // - Add a record to the map of deduced composite types.
237 DeducedNestedTys[Val] = Ty;
238 }
239 // - Find a record in the map of deduced composite types.
241 auto It = DeducedNestedTys.find(Val);
242 return It == DeducedNestedTys.end() ? nullptr : It->second;
243 }
244 // - Find a type of the given Global value
246 // we may know element type if it was deduced earlier
247 Type *ElementTy = findDeducedElementType(Global);
248 if (!ElementTy) {
249 // or we may know element type if it's associated with a composite
250 // value
251 if (Value *GlobalElem =
252 Global->getNumOperands() > 0 ? Global->getOperand(0) : nullptr)
253 ElementTy = findDeducedCompositeType(GlobalElem);
254 }
255 return ElementTy ? ElementTy : Global->getValueType();
256 }
257
258 // Map a machine operand that represents a use of a function via function
259 // pointer to a machine operand that represents the function definition.
260 // Return either the register or invalid value, because we have no context for
261 // a good diagnostic message in case of unexpectedly missing references.
263 auto ResF = InstrToFunction.find(Use);
264 if (ResF == InstrToFunction.end())
265 return nullptr;
266 auto ResReg = FunctionToInstr.find(ResF->second);
267 return ResReg == FunctionToInstr.end() ? nullptr : ResReg->second;
268 }
269
270 // Map a Function to a machine instruction that represents the function
271 // definition.
273 if (!F)
274 return nullptr;
275 auto MOIt = FunctionToInstr.find(F);
276 return MOIt == FunctionToInstr.end() ? nullptr : MOIt->second->getParent();
277 }
278
279 // Map a Function to a machine instruction that represents the function
280 // definition.
282 if (!MI)
283 return nullptr;
284 auto FIt = FunctionToInstrRev.find(MI);
285 return FIt == FunctionToInstrRev.end() ? nullptr : FIt->second;
286 }
287
288 // map function pointer (as a machine instruction operand) to the used
289 // Function
291 InstrToFunction[MO] = F;
292 }
293
294 // map a Function to its definition (as a machine instruction)
296 FunctionToInstr[F] = MO;
297 FunctionToInstrRev[MO->getParent()] = F;
298 }
299
300 // Return true if any OpConstantFunctionPointerINTEL were generated
301 bool hasConstFunPtr() { return !InstrToFunction.empty(); }
302
303 // Add a record about forward function call.
305 ForwardCalls[F].insert(MI);
306 }
307
308 // Map a Function to the vector of machine instructions that represents
309 // forward function calls or to nullptr if not found.
311 auto It = ForwardCalls.find(F);
312 return It == ForwardCalls.end() ? nullptr : &It->second;
313 }
314
315 // Get or create a SPIR-V type corresponding the given LLVM IR type,
316 // and map it to the given VReg by creating an ASSIGN_TYPE instruction.
318 MachineIRBuilder &MIRBuilder,
319 SPIRV::AccessQualifier::AccessQualifier AQ =
320 SPIRV::AccessQualifier::ReadWrite,
321 bool EmitIR = true);
326 SPIRVType *assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements,
327 Register VReg, MachineInstr &I,
328 const SPIRVInstrInfo &TII);
329
330 // In cases where the SPIR-V type is already known, this function can be
331 // used to map it to the given VReg via an ASSIGN_TYPE instruction.
333 const MachineFunction &MF);
334
335 // Either generate a new OpTypeXXX instruction or return an existing one
336 // corresponding to the given LLVM IR type.
337 // EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes)
338 // because this method may be called from InstructionSelector and we don't
339 // want to emit extra IR instructions there.
341 MachineIRBuilder &MIRBuilder,
342 SPIRV::AccessQualifier::AccessQualifier AQ =
343 SPIRV::AccessQualifier::ReadWrite,
344 bool EmitIR = true);
345
346 const Type *getTypeForSPIRVType(const SPIRVType *Ty) const {
347 auto Res = SPIRVToLLVMType.find(Ty);
348 assert(Res != SPIRVToLLVMType.end());
349 return Res->second;
350 }
351
352 // Return a pointee's type, or nullptr otherwise.
354 // Return a pointee's type op code, or 0 otherwise.
355 unsigned getPointeeTypeOp(Register PtrReg);
356
357 // Either generate a new OpTypeXXX instruction or return an existing one
358 // corresponding to the given string containing the name of the builtin type.
359 // Return nullptr if unable to recognize SPIRV type name from `TypeStr`.
361 StringRef TypeStr, MachineIRBuilder &MIRBuilder,
362 SPIRV::StorageClass::StorageClass SC = SPIRV::StorageClass::Function,
363 SPIRV::AccessQualifier::AccessQualifier AQ =
364 SPIRV::AccessQualifier::ReadWrite);
365
366 // Return the SPIR-V type instruction corresponding to the given VReg, or
367 // nullptr if no such type instruction exists. The second argument MF
368 // allows to search for the association in a context of the machine functions
369 // than the current one, without switching between different "current" machine
370 // functions.
372 const MachineFunction *MF = nullptr) const;
373
374 // Return the result type of the instruction defining the register.
376
377 // Whether the given VReg has a SPIR-V type mapped to it yet.
378 bool hasSPIRVTypeForVReg(Register VReg) const {
379 return getSPIRVTypeForVReg(VReg) != nullptr;
380 }
381
382 // Return the VReg holding the result of the given OpTypeXXX instruction.
383 Register getSPIRVTypeID(const SPIRVType *SpirvType) const;
384
385 // Return previous value of the current machine function
387 MachineFunction *Ret = CurMF;
388 CurMF = &MF;
389 return Ret;
390 }
391
392 // Return true if the type is an aggregate type.
394 return Type && (Type->getOpcode() == SPIRV::OpTypeStruct &&
395 Type->getOpcode() == SPIRV::OpTypeArray);
396 }
397
398 // Whether the given VReg has an OpTypeXXX instruction mapped to it with the
399 // given opcode (e.g. OpTypeFloat).
400 bool isScalarOfType(Register VReg, unsigned TypeOpcode) const;
401
402 // Return true if the given VReg's assigned SPIR-V type is either a scalar
403 // matching the given opcode, or a vector with an element type matching that
404 // opcode (e.g. OpTypeBool, or OpTypeVector %x 4, where %x is OpTypeBool).
405 bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const;
406
407 // Return number of elements in a vector if the argument is associated with
408 // a vector type. Return 1 for a scalar type, and 0 for a missing type.
409 unsigned getScalarOrVectorComponentCount(Register VReg) const;
411
412 // Return the component type in a vector if the argument is associated with
413 // a vector type. Returns the argument itself for other types, and nullptr
414 // for a missing type.
417
418 // For vectors or scalars of booleans, integers and floats, return the scalar
419 // type's bitwidth. Otherwise calls llvm_unreachable().
420 unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const;
421
422 // For vectors or scalars of integers and floats, return total bitwidth of the
423 // argument. Otherwise returns 0.
424 unsigned getNumScalarOrVectorTotalBitWidth(const SPIRVType *Type) const;
425
426 // Returns either pointer to integer type, that may be a type of vector
427 // elements or an original type, or nullptr if the argument is niether
428 // an integer scalar, nor an integer vector
430
431 // For integer vectors or scalars, return whether the integers are signed.
432 bool isScalarOrVectorSigned(const SPIRVType *Type) const;
433
434 // Gets the storage class of the pointer type assigned to this vreg.
435 SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const;
436 SPIRV::StorageClass::StorageClass
438
439 // Return the number of bits SPIR-V pointers and size_t variables require.
440 unsigned getPointerSize() const { return PointerSize; }
441
442 // Returns true if two types are defined and are compatible in a sense of
443 // OpBitcast instruction
444 bool isBitcastCompatible(const SPIRVType *Type1,
445 const SPIRVType *Type2) const;
446
447 // Informs about removal of the machine instruction and invalidates data
448 // structures referring this instruction.
450
451private:
452 SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
453
454 const Type *adjustIntTypeByWidth(const Type *Ty) const;
455 unsigned adjustOpTypeIntWidth(unsigned Width) const;
456
457 SPIRVType *getOpTypeInt(unsigned Width, MachineIRBuilder &MIRBuilder,
458 bool IsSigned = false);
459
460 SPIRVType *getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder);
461
462 SPIRVType *getOpTypeVoid(MachineIRBuilder &MIRBuilder);
463
464 SPIRVType *getOpTypeVector(uint32_t NumElems, SPIRVType *ElemType,
465 MachineIRBuilder &MIRBuilder);
466
467 SPIRVType *getOpTypeArray(uint32_t NumElems, SPIRVType *ElemType,
468 MachineIRBuilder &MIRBuilder, bool EmitIR = true);
469
470 SPIRVType *getOpTypeOpaque(const StructType *Ty,
471 MachineIRBuilder &MIRBuilder);
472
473 SPIRVType *getOpTypeStruct(const StructType *Ty, MachineIRBuilder &MIRBuilder,
474 bool EmitIR = true);
475
476 SPIRVType *getOpTypePointer(SPIRV::StorageClass::StorageClass SC,
477 SPIRVType *ElemType, MachineIRBuilder &MIRBuilder,
478 Register Reg);
479
480 SPIRVType *getOpTypeForwardPointer(SPIRV::StorageClass::StorageClass SC,
481 MachineIRBuilder &MIRBuilder);
482
483 SPIRVType *getOpTypeFunction(SPIRVType *RetType,
484 const SmallVectorImpl<SPIRVType *> &ArgTypes,
485 MachineIRBuilder &MIRBuilder);
486
487 SPIRVType *
488 getOrCreateSpecialType(const Type *Ty, MachineIRBuilder &MIRBuilder,
489 SPIRV::AccessQualifier::AccessQualifier AccQual);
490
491 std::tuple<Register, ConstantInt *, bool, unsigned> getOrCreateConstIntReg(
492 uint64_t Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
493 MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
494 std::tuple<Register, ConstantFP *, bool, unsigned> getOrCreateConstFloatReg(
495 APFloat Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
496 MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
497 SPIRVType *finishCreatingSPIRVType(const Type *LLVMTy, SPIRVType *SpirvType);
498 Register getOrCreateBaseRegister(Constant *Val, MachineInstr &I,
499 SPIRVType *SpvType,
500 const SPIRVInstrInfo &TII, unsigned BitWidth,
501 bool ZeroAsNull);
502 Register getOrCreateCompositeOrNull(Constant *Val, MachineInstr &I,
503 SPIRVType *SpvType,
504 const SPIRVInstrInfo &TII, Constant *CA,
505 unsigned BitWidth, unsigned ElemCnt,
506 bool ZeroAsNull = true);
507
508 Register getOrCreateIntCompositeOrNull(uint64_t Val,
509 MachineIRBuilder &MIRBuilder,
510 SPIRVType *SpvType, bool EmitIR,
511 Constant *CA, unsigned BitWidth,
512 unsigned ElemCnt);
513
514public:
516 SPIRVType *SpvType, bool EmitIR = true,
517 bool ZeroAsNull = true);
519 SPIRVType *SpvType, const SPIRVInstrInfo &TII,
520 bool ZeroAsNull = true);
522 const SPIRVInstrInfo &TII,
523 bool ZeroAsNull = true);
525 SPIRVType *SpvType = nullptr);
526
528 SPIRVType *SpvType, const SPIRVInstrInfo &TII,
529 bool ZeroAsNull = true);
531 SPIRVType *SpvType, const SPIRVInstrInfo &TII,
532 bool ZeroAsNull = true);
534 SPIRVType *SpvType,
535 const SPIRVInstrInfo &TII);
537 SPIRVType *SpvType, bool EmitIR = true);
539 SPIRVType *SpvType);
540 Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param,
541 unsigned FilerMode,
542 MachineIRBuilder &MIRBuilder,
543 SPIRVType *SpvType);
545 const SPIRVInstrInfo &TII);
547 StringRef Name, const GlobalValue *GV,
548 SPIRV::StorageClass::StorageClass Storage,
549 const MachineInstr *Init, bool IsConst,
550 bool HasLinkageTy,
551 SPIRV::LinkageType::LinkageType LinkageType,
552 MachineIRBuilder &MIRBuilder,
553 bool IsInstSelector);
555 uint32_t Set, uint32_t Binding,
556 MachineIRBuilder &MIRBuilder);
557
558 // Convenient helpers for getting types with check for duplicates.
560 MachineIRBuilder &MIRBuilder);
562 const SPIRVInstrInfo &TII);
564 const SPIRVInstrInfo &TII,
565 unsigned SPIRVOPcode, Type *LLVMTy);
567 const SPIRVInstrInfo &TII);
570 const SPIRVInstrInfo &TII);
572 unsigned NumElements,
573 MachineIRBuilder &MIRBuilder);
575 unsigned NumElements, MachineInstr &I,
576 const SPIRVInstrInfo &TII);
578 unsigned NumElements, MachineInstr &I,
579 const SPIRVInstrInfo &TII);
580
582 SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
583 SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
586 SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
587
588 SPIRVType *
589 getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder, SPIRVType *SampledType,
590 SPIRV::Dim::Dim Dim, uint32_t Depth, uint32_t Arrayed,
591 uint32_t Multisampled, uint32_t Sampled,
592 SPIRV::ImageFormat::ImageFormat ImageFormat,
593 SPIRV::AccessQualifier::AccessQualifier AccQual);
594
596
598 MachineIRBuilder &MIRBuilder);
600 const TargetExtType *ExtensionType,
601 const SPIRVType *ElemType,
602 uint32_t Scope, uint32_t Rows,
603 uint32_t Columns, uint32_t Use);
604 SPIRVType *
606 SPIRV::AccessQualifier::AccessQualifier AccQual);
609 const Type *Ty, SPIRVType *RetType,
610 const SmallVectorImpl<SPIRVType *> &ArgTypes,
611 MachineIRBuilder &MIRBuilder);
613 MachineIRBuilder &MIRBuilder,
614 unsigned Opcode);
615
616 const TargetRegisterClass *getRegClass(SPIRVType *SpvType) const;
617 LLT getRegType(SPIRVType *SpvType) const;
618};
619} // end namespace llvm
620#endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
std::string Name
ELFYAML::ELF_REL Type2
Definition: ELFYAML.cpp:1833
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
This file declares the MachineIRBuilder class.
unsigned Reg
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class represents an incoming formal argument to a Function.
Definition: Argument.h:31
This class represents a function call, abstracting a target machine's calling convention.
This is an important base class in LLVM.
Definition: Constant.h:42
This class represents an Operation in the Expression.
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:156
bool erase(const KeyT &Val)
Definition: DenseMap.h:321
bool empty() const
Definition: DenseMap.h:98
iterator end()
Definition: DenseMap.h:84
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:211
Helper class to build MachineInstr.
Representation of each machine instruction.
Definition: MachineInstr.h:69
This class contains meta information specific to a module.
MachineOperand class - Representation of each machine instruction operand.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
SPIRVType * getOrCreateOpTypePipe(MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AccQual)
void recordFunctionDefinition(const Function *F, const MachineOperand *MO)
unsigned getNumScalarOrVectorTotalBitWidth(const SPIRVType *Type) const
SPIRVType * getSPIRVTypeForVReg(Register VReg, const MachineFunction *MF=nullptr) const
const TypedPointerType * findReturnType(const Function *ArgF)
void addForwardCall(const Function *F, MachineInstr *MI)
Register getOrCreateConstInt(uint64_t Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI)
Register getOrCreateGlobalVariableWithBinding(const SPIRVType *VarType, uint32_t Set, uint32_t Binding, MachineIRBuilder &MIRBuilder)
SPIRVType * assignFloatTypeToVReg(unsigned BitWidth, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg, const MachineFunction &MF)
SPIRVType * assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
Register getOrCreateUndef(MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII)
void add(const Constant *C, MachineFunction *MF, Register R)
Type * findDeducedCompositeType(const Value *Val)
void add(const MachineInstr *MI, MachineFunction *MF, Register R)
SPIRVType * getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder)
Register getOrCreateConsIntVector(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType, bool EmitIR=true)
const Type * getTypeForSPIRVType(const SPIRVType *Ty) const
Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param, unsigned FilerMode, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType)
bool isBitcastCompatible(const SPIRVType *Type1, const SPIRVType *Type2) const
unsigned getScalarOrVectorComponentCount(Register VReg) const
SPIRVType * getOrCreateSPIRVFloatType(unsigned BitWidth, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRVType * getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder, SPIRVType *SampledType, SPIRV::Dim::Dim Dim, uint32_t Depth, uint32_t Arrayed, uint32_t Multisampled, uint32_t Sampled, SPIRV::ImageFormat::ImageFormat ImageFormat, SPIRV::AccessQualifier::AccessQualifier AccQual)
bool isScalarOrVectorSigned(const SPIRVType *Type) const
void addDeducedElementType(Value *Val, Type *Ty)
void add(const GlobalVariable *GV, MachineFunction *MF, Register R)
Register find(const Constant *C, MachineFunction *MF)
void add(const Argument *Arg, MachineFunction *MF, Register R)
const MachineInstr * getFunctionDefinition(const Function *F)
void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy)
const MachineOperand * getFunctionDefinitionByUse(const MachineOperand *Use)
SPIRVType * getOrCreateOpTypeByOpcode(const Type *Ty, MachineIRBuilder &MIRBuilder, unsigned Opcode)
Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType=nullptr)
SPIRVType * getPointeeType(SPIRVType *PtrType)
void invalidateMachineInstr(MachineInstr *MI)
Register getSPIRVTypeID(const SPIRVType *SpirvType) const
SPIRVType * getOrCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite, bool EmitIR=true)
void addMutated(Value *Val, Type *Ty)
void updateIfExistDeducedElementType(Value *OldVal, Value *NewVal, bool DeleteOld)
bool isScalarOfType(Register VReg, unsigned TypeOpcode) const
void buildDepsGraph(std::vector< SPIRV::DTSortableEntry * > &Graph, const SPIRVInstrInfo *TII, MachineModuleInfo *MMI=nullptr)
Register find(const Function *F, MachineFunction *MF)
Register buildGlobalVariable(Register Reg, SPIRVType *BaseType, StringRef Name, const GlobalValue *GV, SPIRV::StorageClass::StorageClass Storage, const MachineInstr *Init, bool IsConst, bool HasLinkageTy, SPIRV::LinkageType::LinkageType LinkageType, MachineIRBuilder &MIRBuilder, bool IsInstSelector)
void add(const Function *F, MachineFunction *MF, Register R)
SPIRVType * assignIntTypeToVReg(unsigned BitWidth, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
bool findValueAttrs(const MachineInstr *Key, Type *&Ty, StringRef &Name)
unsigned getPointeeTypeOp(Register PtrReg)
SPIRVType * getOrCreateOpTypeSampledImage(SPIRVType *ImageType, MachineIRBuilder &MIRBuilder)
SPIRVType * getOrCreateSPIRVTypeByName(StringRef TypeStr, MachineIRBuilder &MIRBuilder, SPIRV::StorageClass::StorageClass SC=SPIRV::StorageClass::Function, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite)
Type * findMutated(const Value *Val)
SPIRVType * getScalarOrVectorComponentType(Register VReg) const
Register find(const GlobalVariable *GV, MachineFunction *MF)
bool hasSPIRVTypeForVReg(Register VReg) const
void addDeducedCompositeType(Value *Val, Type *Ty)
SPIRVType * assignTypeToVReg(const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite, bool EmitIR=true)
SPIRVType * getOrCreateOpTypeFunctionWithArgs(const Type *Ty, SPIRVType *RetType, const SmallVectorImpl< SPIRVType * > &ArgTypes, MachineIRBuilder &MIRBuilder)
void recordFunctionPointer(const MachineOperand *MO, const Function *F)
SmallPtrSet< MachineInstr *, 8 > * getForwardCalls(const Function *F)
bool isAggregateType(SPIRVType *Type) const
const TargetRegisterClass * getRegClass(SPIRVType *SpvType) const
void updateIfExistAssignPtrTypeInstr(Value *OldVal, Value *NewVal, bool DeleteOld)
bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const
Register getOrCreateConstIntArray(uint64_t Val, size_t Num, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII)
MachineFunction * setCurrentFunc(MachineFunction &MF)
Register getOrCreateConstVector(uint64_t Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
SPIRVType * getOrCreateOpTypeDeviceEvent(MachineIRBuilder &MIRBuilder)
Register find(const MachineInstr *MI, MachineFunction *MF)
SPIRVType * getOrCreateSPIRVPointerType(SPIRVType *BaseType, MachineIRBuilder &MIRBuilder, SPIRV::StorageClass::StorageClass SClass=SPIRV::StorageClass::Function)
SPIRVType * getOrCreateOpTypeCoopMatr(MachineIRBuilder &MIRBuilder, const TargetExtType *ExtensionType, const SPIRVType *ElemType, uint32_t Scope, uint32_t Rows, uint32_t Columns, uint32_t Use)
SPIRVType * getResultType(Register VReg)
SPIRVType * getOrCreateSPIRVVectorType(SPIRVType *BaseType, unsigned NumElements, MachineIRBuilder &MIRBuilder)
SPIRVType * getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineIRBuilder &MIRBuilder)
Type * getDeducedGlobalValueType(const GlobalValue *Global)
LLT getRegType(SPIRVType *SpvType) const
void addValueAttrs(MachineInstr *Key, std::pair< Type *, std::string > Val)
const Function * getFunctionByDefinition(const MachineInstr *MI)
SPIRVType * getOrCreateSPIRVArrayType(SPIRVType *BaseType, unsigned NumElements, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const
SPIRVType * getOrCreateOpTypeSampler(MachineIRBuilder &MIRBuilder)
Type * findDeducedElementType(const Value *Val)
Register getOrCreateConstFP(APFloat Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
CallInst * findAssignPtrTypeInstr(const Value *Val)
Register getOrCreateConstNullPtr(MachineIRBuilder &MIRBuilder, SPIRVType *SpvType)
unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const
Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType, bool EmitIR=true, bool ZeroAsNull=true)
const SPIRVType * retrieveScalarOrVectorIntType(const SPIRVType *Type) const
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:519
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:573
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
Class to represent struct types.
Definition: DerivedTypes.h:218
Class to represent target extensions types, which are generally unintrospectable from target-independ...
Definition: DerivedTypes.h:744
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
A few GPU targets, such as DXIL and SPIR-V, have typed pointers.
A Use represents the edge between a Value definition and its users.
Definition: Use.h:43
LLVM Value Representation.
Definition: Value.h:74
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
std::tuple< const Type *, unsigned, unsigned > SpecialTypeDescriptor
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Global
Append to llvm.global_dtors.
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:217