LLVM 23.0.0git
SPIRVGlobalRegistry.h
Go to the documentation of this file.
1//===-- SPIRVGlobalRegistry.h - SPIR-V Global Registry ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// SPIRVGlobalRegistry is used to maintain rich type information required for
10// SPIR-V even after lowering from LLVM IR to GMIR. It can convert an llvm::Type
11// into an OpTypeXXX instruction, and map it to a virtual register. Also it
12// builds and supports consistency of constants and global variables.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
17#define LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
18
20#include "SPIRVIRMapping.h"
21#include "SPIRVInstrInfo.h"
22#include "SPIRVTypeInst.h"
24#include "llvm/IR/Constant.h"
26
27namespace llvm {
28class SPIRVSubtarget;
29
30using StructOffsetDecorator = std::function<void(Register)>;
31
33 // Registers holding values which have types associated with them.
34 // Initialized upon VReg definition in IRTranslator.
35 // Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
36 // where Reg = OpType...
37 // while VRegToTypeMap tracks SPIR-V type assigned to other regs (i.e. not
38 // type-declaring ones).
40 VRegToTypeMap;
41
43
44 // map a Function to its definition (as a machine instruction operand)
47 // map function pointer (as a machine instruction operand) to the used
48 // Function
50 // Maps Functions to their calls (in a form of the machine instruction,
51 // OpFunctionCall) that happened before the definition is available
53 // map a Function to its original return type before the clone function was
54 // created during substitution of aggregate arguments
55 // (see `SPIRVPrepareFunctions::removeAggregateTypesFromSignature()`)
56 DenseMap<Value *, Type *> MutatedAggRet;
57 // map an instruction to its value's attributes (type, name)
59
60 SmallPtrSet<const Type *, 4> TypesInProcessing;
61 DenseMap<const Type *, SPIRVTypeInst> ForwardPointerTypes;
62
63 // Stores for each function the last inserted SPIR-V Type.
64 // See: SPIRVGlobalRegistry::createOpType.
66
67 // if a function returns a pointer, this is to map it into TypedPointerType
69
70 // Number of bits pointers and size_t integers require.
71 const unsigned PointerSize;
72
73 // Holds the maximum ID we have in the module.
74 unsigned Bound;
75
76 // Maps values associated with untyped pointers into deduced element types of
77 // untyped pointers.
78 DenseMap<Value *, Type *> DeducedElTys;
79 // Maps composite values to deduced types where untyped pointers are replaced
80 // with typed ones.
81 DenseMap<Value *, Type *> DeducedNestedTys;
82 // Maps values to "assign type" calls, thus being a registry of created
83 // Intrinsic::spv_assign_ptr_type instructions.
84 DenseMap<Value *, CallInst *> AssignPtrTypeInstr;
85
86 // Maps OpVariable and OpFunction-related v-regs to its LLVM IR definition.
88
89 // map of aliasing decorations to aliasing metadata
90 std::unordered_map<const MDNode *, MachineInstr *> AliasInstMDMap;
91
92 // Add a new OpTypeXXX instruction without checking for duplicates.
93 SPIRVTypeInst createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
94 SPIRV::AccessQualifier::AccessQualifier AQ,
95 bool ExplicitLayoutRequired, bool EmitIR);
97 findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
98 SPIRV::AccessQualifier::AccessQualifier accessQual,
99 bool ExplicitLayoutRequired, bool EmitIR);
101 restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
102 SPIRV::AccessQualifier::AccessQualifier AccessQual,
103 bool ExplicitLayoutRequired, bool EmitIR);
104
105 // Internal function creating the Types/Constants at the correct position
106 // in the function by tweaking the passed "MIRBuilder" insertion point and
107 // restoring it to the correct position. "Op" should be the function creating
108 // the specific operation you need, and should return the newly created
109 // instruction.
110 const MachineInstr *createConstOrTypeAtFunctionEntry(
111 MachineIRBuilder &MIRBuilder,
112 std::function<MachineInstr *(MachineIRBuilder &)> Op);
113
114public:
115 SPIRVGlobalRegistry(unsigned PointerSize);
116
118
119 void setBound(unsigned V) { Bound = V; }
120 unsigned getBound() { return Bound; }
121
122 void addGlobalObject(const Value *V, const MachineFunction *MF, Register R) {
123 Reg2GO[std::make_pair(MF, R)] = V;
124 }
126 auto It = Reg2GO.find(std::make_pair(MF, R));
127 return It == Reg2GO.end() ? nullptr : It->second;
128 }
129
130 // Add a record to the map of function return pointer types.
131 void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy) {
132 FunResPointerTypes[ArgF] = DerivedTy;
133 }
134 // Find a record in the map of function return pointer types.
136 auto It = FunResPointerTypes.find(ArgF);
137 return It == FunResPointerTypes.end() ? nullptr : It->second;
138 }
139
140 // A registry of "assign type" records:
141 // - Add a record.
142 void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI) {
143 AssignPtrTypeInstr[Val] = AssignPtrTyCI;
144 }
145 // - Find a record.
147 auto It = AssignPtrTypeInstr.find(Val);
148 return It == AssignPtrTypeInstr.end() ? nullptr : It->second;
149 }
150 // - Find a record and update its key or add a new record, if found.
152 bool DeleteOld) {
153 if (CallInst *CI = findAssignPtrTypeInstr(OldVal)) {
154 if (DeleteOld)
155 AssignPtrTypeInstr.erase(OldVal);
156 AssignPtrTypeInstr[NewVal] = CI;
157 }
158 }
159
160 // A registry of mutated values
161 // (see `SPIRVPrepareFunctions::removeAggregateTypesFromSignature()`):
162 // - Add a record.
163 void addMutated(Value *Val, Type *Ty) { MutatedAggRet[Val] = Ty; }
164 // - Find a record.
165 Type *findMutated(const Value *Val) {
166 auto It = MutatedAggRet.find(Val);
167 return It == MutatedAggRet.end() ? nullptr : It->second;
168 }
169
170 // A registry of value's attributes (type, name)
171 // - Add a record.
172 void addValueAttrs(MachineInstr *Key, std::pair<Type *, std::string> Val) {
173 ValueAttrs[Key] = Val;
174 }
175 // - Find a record.
176 bool findValueAttrs(const MachineInstr *Key, Type *&Ty, StringRef &Name) {
177 auto It = ValueAttrs.find(Key);
178 if (It == ValueAttrs.end())
179 return false;
180 Ty = It->second.first;
181 Name = It->second.second;
182 return true;
183 }
184
185 // Deduced element types of untyped pointers and composites:
186 // - Add a record to the map of deduced element types.
187 void addDeducedElementType(Value *Val, Type *Ty) { DeducedElTys[Val] = Ty; }
188 // - Find a record in the map of deduced element types.
190 auto It = DeducedElTys.find(Val);
191 return It == DeducedElTys.end() ? nullptr : It->second;
192 }
193 // - Find a record and update its key or add a new record, if found.
195 bool DeleteOld) {
196 if (Type *Ty = findDeducedElementType(OldVal)) {
197 if (DeleteOld)
198 DeducedElTys.erase(OldVal);
199 DeducedElTys[NewVal] = Ty;
200 }
201 }
202 // - Add a record to the map of deduced composite types.
204 DeducedNestedTys[Val] = Ty;
205 }
206 // - Find a record in the map of deduced composite types.
208 auto It = DeducedNestedTys.find(Val);
209 return It == DeducedNestedTys.end() ? nullptr : It->second;
210 }
211 // - Find a type of the given Global value
213 // we may know element type if it was deduced earlier
214 Type *ElementTy = findDeducedElementType(Global);
215 if (!ElementTy) {
216 // or we may know element type if it's associated with a composite
217 // value
218 if (Value *GlobalElem =
219 Global->getNumOperands() > 0 ? Global->getOperand(0) : nullptr)
220 ElementTy = findDeducedCompositeType(GlobalElem);
221 else if (const Function *Fn = dyn_cast<Function>(Global))
222 ElementTy = SPIRV::getOriginalFunctionType(*Fn);
223 }
224 return ElementTy ? ElementTy : Global->getValueType();
225 }
226
227 // Map a machine operand that represents a use of a function via function
228 // pointer to a machine operand that represents the function definition.
229 // Return either the register or invalid value, because we have no context for
230 // a good diagnostic message in case of unexpectedly missing references.
232 auto ResF = InstrToFunction.find(Use);
233 if (ResF == InstrToFunction.end())
234 return nullptr;
235 auto ResReg = FunctionToInstr.find(ResF->second);
236 return ResReg == FunctionToInstr.end() ? nullptr : ResReg->second;
237 }
238
239 // Map a Function to a machine instruction that represents the function
240 // definition.
242 if (!F)
243 return nullptr;
244 auto MOIt = FunctionToInstr.find(F);
245 return MOIt == FunctionToInstr.end() ? nullptr : MOIt->second->getParent();
246 }
247
248 // Map a Function to a machine instruction that represents the function
249 // definition.
251 if (!MI)
252 return nullptr;
253 auto FIt = FunctionToInstrRev.find(MI);
254 return FIt == FunctionToInstrRev.end() ? nullptr : FIt->second;
255 }
256
257 // map function pointer (as a machine instruction operand) to the used
258 // Function
260 InstrToFunction[MO] = F;
261 }
262
263 // map a Function to its definition (as a machine instruction)
265 FunctionToInstr[F] = MO;
266 FunctionToInstrRev[MO->getParent()] = F;
267 }
268
269 // Return true if any OpConstantFunctionPointerINTEL were generated
270 bool hasConstFunPtr() { return !InstrToFunction.empty(); }
271
272 // Add a record about forward function call.
274 ForwardCalls[F].insert(MI);
275 }
276
277 // Map a Function to the vector of machine instructions that represents
278 // forward function calls or to nullptr if not found.
280 auto It = ForwardCalls.find(F);
281 return It == ForwardCalls.end() ? nullptr : &It->second;
282 }
283
284 // Get or create a SPIR-V type corresponding the given LLVM IR type,
285 // and map it to the given VReg.
287 MachineIRBuilder &MIRBuilder,
288 SPIRV::AccessQualifier::AccessQualifier AQ,
289 bool EmitIR);
294 const SPIRVInstrInfo &TII);
296 unsigned NumElements, Register VReg,
298 const SPIRVInstrInfo &TII);
299
300 // In cases where the SPIR-V type is already known, this function can be
301 // used to map it to the given VReg.
303 const MachineFunction &MF);
304
305 // Either generate a new OpTypeXXX instruction or return an existing one
306 // corresponding to the given LLVM IR type.
307 // EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes)
308 // because this method may be called from InstructionSelector and we don't
309 // want to emit extra IR instructions there.
311 SPIRV::AccessQualifier::AccessQualifier AQ,
312 bool EmitIR) {
313 MachineIRBuilder MIRBuilder(I);
314 return getOrCreateSPIRVType(Type, MIRBuilder, AQ, EmitIR);
315 }
316
318 MachineIRBuilder &MIRBuilder,
319 SPIRV::AccessQualifier::AccessQualifier AQ,
320 bool EmitIR) {
321 return getOrCreateSPIRVType(Type, MIRBuilder, AQ, false, EmitIR);
322 }
323
325 auto Res = SPIRVToLLVMType.find(Ty);
326 assert(Res != SPIRVToLLVMType.end());
327 return Res->second;
328 }
329
330 // Return a pointee's type, or nullptr otherwise.
332 // Return a pointee's type op code, or 0 otherwise.
333 unsigned getPointeeTypeOp(Register PtrReg);
334
335 // Either generate a new OpTypeXXX instruction or return an existing one
336 // corresponding to the given string containing the name of the builtin type.
337 // Return nullptr if unable to recognize SPIRV type name from `TypeStr`.
339 StringRef TypeStr, MachineIRBuilder &MIRBuilder, bool EmitIR,
340 SPIRV::StorageClass::StorageClass SC = SPIRV::StorageClass::Function,
341 SPIRV::AccessQualifier::AccessQualifier AQ =
342 SPIRV::AccessQualifier::ReadWrite);
343
344 // Return the SPIR-V type instruction corresponding to the given VReg, or
345 // nullptr if no such type instruction exists. The second argument MF
346 // allows to search for the association in a context of the machine functions
347 // than the current one, without switching between different "current" machine
348 // functions.
350 const MachineFunction *MF = nullptr) const;
351
352 // Return the result type of the instruction defining the register.
354
355 // Whether the given VReg has a SPIR-V type mapped to it yet.
356 bool hasSPIRVTypeForVReg(Register VReg) const {
357 return getSPIRVTypeForVReg(VReg) != nullptr;
358 }
359
360 // Return the VReg holding the result of the given OpTypeXXX instruction.
361 Register getSPIRVTypeID(SPIRVTypeInst SpirvType) const;
362
363 // Return previous value of the current machine function
365 MachineFunction *Ret = CurMF;
366 CurMF = &MF;
367 return Ret;
368 }
369
370 // Return true if the type is an aggregate type.
372 return Type && (Type->getOpcode() == SPIRV::OpTypeStruct &&
373 Type->getOpcode() == SPIRV::OpTypeArray);
374 }
375
376 // Whether the given VReg has an OpTypeXXX instruction mapped to it with the
377 // given opcode (e.g. OpTypeFloat).
378 bool isScalarOfType(Register VReg, unsigned TypeOpcode) const;
379
380 // Return true if the given VReg's assigned SPIR-V type is either a scalar
381 // matching the given opcode, or a vector with an element type matching that
382 // opcode (e.g. OpTypeBool, or OpTypeVector %x 4, where %x is OpTypeBool).
383 bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const;
384
385 // Returns true if `Type` is a resource type. This could be an image type
386 // or a struct for a buffer decorated with the block decoration.
388
389 // Return number of elements in a vector if the argument is associated with
390 // a vector type. Return 1 for a scalar type, and 0 for a missing type.
391 unsigned getScalarOrVectorComponentCount(Register VReg) const;
393
394 // Return the component type in a vector if the argument is associated with
395 // a vector type. Returns the argument itself for other types, and nullptr
396 // for a missing type.
398
399 // For vectors or scalars of booleans, integers and floats, return the scalar
400 // type's bitwidth. Otherwise calls llvm_unreachable().
402
403 // For vectors or scalars of integers and floats, return total bitwidth of the
404 // argument. Otherwise returns 0.
406
407 // Returns either pointer to integer type, that may be a type of vector
408 // elements or an original type, or nullptr if the argument is niether
409 // an integer scalar, nor an integer vector
411
412 // For integer vectors or scalars, return whether the integers are signed.
414
415 // Gets the storage class of the pointer type assigned to this vreg.
416 SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const;
417 SPIRV::StorageClass::StorageClass
419
420 // Return the number of bits SPIR-V pointers and size_t variables require.
421 unsigned getPointerSize() const { return PointerSize; }
422
423 // Returns true if two types are defined and are compatible in a sense of
424 // OpBitcast instruction
425 bool isBitcastCompatible(SPIRVTypeInst Type1, SPIRVTypeInst Type2) const;
426
427 // Informs about removal of the machine instruction and invalidates data
428 // structures referring this instruction.
430
431private:
432 SPIRVTypeInst getOpTypeBool(MachineIRBuilder &MIRBuilder);
433
434 const Type *adjustIntTypeByWidth(const Type *Ty) const;
435 unsigned adjustOpTypeIntWidth(unsigned Width) const;
436
438 MachineIRBuilder &MIRBuilder,
439 SPIRV::AccessQualifier::AccessQualifier AQ,
440 bool ExplicitLayoutRequired, bool EmitIR);
441
442 SPIRVTypeInst getOpTypeInt(unsigned Width, MachineIRBuilder &MIRBuilder,
443 bool IsSigned = false);
444
445 SPIRVTypeInst getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder);
446
447 SPIRVTypeInst getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder,
448 SPIRV::FPEncoding::FPEncoding FPEncode);
449
450 SPIRVTypeInst getOpTypeVoid(MachineIRBuilder &MIRBuilder);
451
452 SPIRVTypeInst getOpTypeVector(uint32_t NumElems, SPIRVTypeInst ElemType,
453 MachineIRBuilder &MIRBuilder);
454
455 SPIRVTypeInst getOpTypeArray(uint32_t NumElems, SPIRVTypeInst ElemType,
456 MachineIRBuilder &MIRBuilder,
457 bool ExplicitLayoutRequired, bool EmitIR);
458
459 SPIRVTypeInst getOpTypeOpaque(const StructType *Ty,
460 MachineIRBuilder &MIRBuilder);
461
462 SPIRVTypeInst getOpTypeStruct(const StructType *Ty,
463 MachineIRBuilder &MIRBuilder,
464 SPIRV::AccessQualifier::AccessQualifier AccQual,
465 StructOffsetDecorator Decorator, bool EmitIR);
466
467 SPIRVTypeInst getOpTypePointer(SPIRV::StorageClass::StorageClass SC,
468 SPIRVTypeInst ElemType,
469 MachineIRBuilder &MIRBuilder, Register Reg);
470
471 SPIRVTypeInst getOpTypeForwardPointer(SPIRV::StorageClass::StorageClass SC,
472 MachineIRBuilder &MIRBuilder);
473
475 getOpTypeFunction(const FunctionType *Ty, SPIRVTypeInst RetType,
476 const SmallVectorImpl<SPIRVTypeInst> &ArgTypes,
477 MachineIRBuilder &MIRBuilder);
478
480 getOrCreateSpecialType(const Type *Ty, MachineIRBuilder &MIRBuilder,
481 SPIRV::AccessQualifier::AccessQualifier AccQual);
482
483 SPIRVTypeInst finishCreatingSPIRVType(const Type *LLVMTy,
484 SPIRVTypeInst SpirvType);
485 Register getOrCreateBaseRegister(Constant *Val, MachineInstr &I,
486 SPIRVTypeInst SpvType,
487 const SPIRVInstrInfo &TII, unsigned BitWidth,
488 bool ZeroAsNull);
489 Register getOrCreateCompositeOrNull(Constant *Val, MachineInstr &I,
490 SPIRVTypeInst SpvType,
491 const SPIRVInstrInfo &TII, Constant *CA,
492 unsigned BitWidth, unsigned ElemCnt,
493 bool ZeroAsNull = true);
494
495 Register getOrCreateIntCompositeOrNull(uint64_t Val,
496 MachineIRBuilder &MIRBuilder,
497 SPIRVTypeInst SpvType, bool EmitIR,
498 Constant *CA, unsigned BitWidth,
499 unsigned ElemCnt);
500
501 // Returns a pointer to a SPIR-V pointer type with the given base type and
502 // storage class. It is the responsibility of the caller to make sure the
503 // decorations on the base type are valid for the given storage class. For
504 // example, it has the correct offset and stride decorations.
506 getOrCreateSPIRVPointerTypeInternal(SPIRVTypeInst BaseType,
507 MachineIRBuilder &MIRBuilder,
508 SPIRV::StorageClass::StorageClass SC);
509
510 void addStructOffsetDecorations(Register Reg, StructType *Ty,
511 MachineIRBuilder &MIRBuilder);
512 void addArrayStrideDecorations(Register Reg, Type *ElementType,
513 MachineIRBuilder &MIRBuilder);
514 bool hasBlockDecoration(SPIRVTypeInst Type) const;
515
517 getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder,
518 SPIRVTypeInst SampledType, SPIRV::Dim::Dim Dim,
519 uint32_t Depth, uint32_t Arrayed,
520 uint32_t Multisampled, uint32_t Sampled,
521 SPIRV::ImageFormat::ImageFormat ImageFormat,
522 SPIRV::AccessQualifier::AccessQualifier AccQual);
523
524public:
526 SPIRVTypeInst SpvType, bool EmitIR,
527 bool ZeroAsNull = true);
529 SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII,
530 bool ZeroAsNull = true);
532 SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII,
533 bool ZeroAsNull = true);
535 SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII,
536 bool ZeroAsNull);
538 SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII,
539 bool ZeroAsNull = true);
541 SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII,
542 bool ZeroAsNull);
544 SPIRVTypeInst SpvType = nullptr);
545
547 SPIRVTypeInst SpvType,
548 const SPIRVInstrInfo &TII,
549 bool ZeroAsNull = true);
551 SPIRVTypeInst SpvType,
552 const SPIRVInstrInfo &TII,
553 bool ZeroAsNull = true);
555 SPIRVTypeInst SpvType,
556 const SPIRVInstrInfo &TII,
557 bool ZeroAsNull = true);
559 SPIRVTypeInst SpvType,
560 const SPIRVInstrInfo &TII);
562 SPIRVTypeInst SpvType, bool EmitIR);
564 SPIRVTypeInst SpvType);
565 Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param,
566 unsigned FilerMode,
567 MachineIRBuilder &MIRBuilder);
569 const SPIRVInstrInfo &TII);
572 const GlobalValue *GV, SPIRV::StorageClass::StorageClass Storage,
573 const MachineInstr *Init, bool IsConst,
574 const std::optional<SPIRV::LinkageType::LinkageType> &LinkageType,
575 MachineIRBuilder &MIRBuilder, bool IsInstSelector);
578 StringRef Name,
579 MachineIRBuilder &MIRBuilder);
580
581 // Convenient helpers for getting types with check for duplicates.
583 MachineIRBuilder &MIRBuilder);
585 const SPIRVInstrInfo &TII);
587 const SPIRVInstrInfo &TII,
588 unsigned SPIRVOPcode, Type *LLVMTy);
590 const SPIRVInstrInfo &TII);
592 bool EmitIR);
594 const SPIRVInstrInfo &TII);
596 unsigned NumElements,
597 MachineIRBuilder &MIRBuilder,
598 bool EmitIR);
600 unsigned NumElements,
602 const SPIRVInstrInfo &TII);
603
604 // Returns a pointer to a SPIR-V pointer type with the given base type and
605 // storage class. The base type will be translated to a SPIR-V type, and the
606 // appropriate layout decorations will be added to the base type.
609 MachineIRBuilder &MIRBuilder,
610 SPIRV::StorageClass::StorageClass SC);
613 SPIRV::StorageClass::StorageClass SC);
614
615 // Returns a pointer to a SPIR-V pointer type with the given base type and
616 // storage class. It is the responsibility of the caller to make sure the
617 // decorations on the base type are valid for the given storage class. For
618 // example, it has the correct offset and stride decorations.
621 MachineIRBuilder &MIRBuilder,
622 SPIRV::StorageClass::StorageClass SC);
623
624 // Returns a pointer to a SPIR-V pointer type that is the same as `PtrType`
625 // except the stroage class has been changed to `SC`. It is the responsibility
626 // of the caller to be sure that the original and new storage class have the
627 // same layout requirements.
629 SPIRV::StorageClass::StorageClass SC,
630 MachineInstr &I);
631
634 SPIRV::StorageClass::StorageClass SC,
635 bool IsWritable, bool EmitIr = false);
636
638
640 Type *ElemType);
641
643 const TargetExtType *T,
644 bool EmitIr = false);
645
647 getImageType(const TargetExtType *ExtensionType,
648 const SPIRV::AccessQualifier::AccessQualifier Qualifier,
649 MachineIRBuilder &MIRBuilder);
650
652
654 MachineIRBuilder &MIRBuilder);
656 const TargetExtType *ExtensionType,
657 SPIRVTypeInst ElemType,
658 uint32_t Scope, uint32_t Rows,
659 uint32_t Columns, uint32_t Use,
660 bool EmitIR);
663 SPIRV::AccessQualifier::AccessQualifier AccQual);
666 const Type *Ty, SPIRVTypeInst RetType,
667 const SmallVectorImpl<SPIRVTypeInst> &ArgTypes,
668 MachineIRBuilder &MIRBuilder);
670 MachineIRBuilder &MIRBuilder,
671 unsigned Opcode);
672
674 MachineIRBuilder &MIRBuilder,
675 unsigned Opcode,
676 const ArrayRef<MCOperand> Operands);
677
678 const TargetRegisterClass *getRegClass(SPIRVTypeInst SpvType) const;
679 LLT getRegType(SPIRVTypeInst SpvType) const;
680
682 const MDNode *AliasingListMD);
684 uint32_t Dec, const MDNode *GVarMD);
685 // Replace all uses of a |Old| with |New| updates the global registry type
686 // mappings.
687 void replaceAllUsesWith(Value *Old, Value *New, bool DeleteOld = true);
688
689 void buildAssignType(IRBuilder<> &B, Type *Ty, Value *Arg);
690 void buildAssignPtr(IRBuilder<> &B, Type *ElemTy, Value *Arg);
691 void updateAssignType(CallInst *AssignCI, Value *Arg, Value *OfType);
692};
693} // end namespace llvm
694#endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
DXIL Resource Implicit Binding
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
This file declares the MachineIRBuilder class.
Register Reg
#define T
BaseType
A given derived pointer can have multiple base pointers through phi/selects.
Class for arbitrary precision integers.
Definition APInt.h:78
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
This class represents a function call, abstracting a target machine's calling convention.
ConstantFP - Floating Point Values [float, double].
Definition Constants.h:282
This is the shared class of boolean and integer constants.
Definition Constants.h:87
This is an important base class in LLVM.
Definition Constant.h:43
Class to represent function types.
iterator end()
Definition Function.h:855
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition IRBuilder.h:2788
Metadata node.
Definition Metadata.h:1080
Helper class to build MachineInstr.
Representation of each machine instruction.
const MachineBasicBlock * getParent() const
MachineOperand class - Representation of each machine instruction operand.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Wrapper class representing virtual and physical registers.
Definition Register.h:20
void recordFunctionDefinition(const Function *F, const MachineOperand *MO)
SPIRVTypeInst getImageType(const TargetExtType *ExtensionType, const SPIRV::AccessQualifier::AccessQualifier Qualifier, MachineIRBuilder &MIRBuilder)
const TypedPointerType * findReturnType(const Function *ArgF)
bool isScalarOrVectorSigned(SPIRVTypeInst Type) const
void addForwardCall(const Function *F, MachineInstr *MI)
void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI)
const Value * getGlobalObject(const MachineFunction *MF, Register R)
SPIRVTypeInst getOrCreateOpTypeSampledImage(SPIRVTypeInst ImageType, MachineIRBuilder &MIRBuilder)
unsigned getNumScalarOrVectorTotalBitWidth(SPIRVTypeInst Type) const
SPIRVTypeInst getOrCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ, bool EmitIR)
SPIRVTypeInst assignVectTypeToVReg(SPIRVTypeInst BaseType, unsigned NumElements, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
void assignSPIRVTypeToVReg(SPIRVTypeInst Type, Register VReg, const MachineFunction &MF)
SPIRVTypeInst getOrCreateOpTypeFunctionWithArgs(const Type *Ty, SPIRVTypeInst RetType, const SmallVectorImpl< SPIRVTypeInst > &ArgTypes, MachineIRBuilder &MIRBuilder)
void buildAssignPtr(IRBuilder<> &B, Type *ElemTy, Value *Arg)
const TargetRegisterClass * getRegClass(SPIRVTypeInst SpvType) const
MachineInstr * getOrAddMemAliasingINTELInst(MachineIRBuilder &MIRBuilder, const MDNode *AliasingListMD)
bool isAggregateType(SPIRVTypeInst Type) const
unsigned getScalarOrVectorBitWidth(SPIRVTypeInst Type) const
SPIRVTypeInst getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineIRBuilder &MIRBuilder)
SPIRVTypeInst getOrCreateSPIRVVectorType(SPIRVTypeInst BaseType, unsigned NumElements, MachineIRBuilder &MIRBuilder, bool EmitIR)
SPIRVTypeInst getOrCreateSPIRVTypeByName(StringRef TypeStr, MachineIRBuilder &MIRBuilder, bool EmitIR, SPIRV::StorageClass::StorageClass SC=SPIRV::StorageClass::Function, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite)
Register buildGlobalVariable(Register Reg, SPIRVTypeInst BaseType, StringRef Name, const GlobalValue *GV, SPIRV::StorageClass::StorageClass Storage, const MachineInstr *Init, bool IsConst, const std::optional< SPIRV::LinkageType::LinkageType > &LinkageType, MachineIRBuilder &MIRBuilder, bool IsInstSelector)
SPIRVTypeInst assignIntTypeToVReg(unsigned BitWidth, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRVTypeInst getResultType(Register VReg, MachineFunction *MF=nullptr)
Type * findDeducedCompositeType(const Value *Val)
void replaceAllUsesWith(Value *Old, Value *New, bool DeleteOld=true)
SPIRVTypeInst getOrCreateOpTypeByOpcode(const Type *Ty, MachineIRBuilder &MIRBuilder, unsigned Opcode)
unsigned getScalarOrVectorComponentCount(Register VReg) const
SPIRVTypeInst assignFloatTypeToVReg(unsigned BitWidth, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
const Type * getTypeForSPIRVType(SPIRVTypeInst Ty) const
bool isBitcastCompatible(SPIRVTypeInst Type1, SPIRVTypeInst Type2) const
void addDeducedElementType(Value *Val, Type *Ty)
SPIRVGlobalRegistry(unsigned PointerSize)
SPIRVTypeInst getOrCreatePaddingType(MachineIRBuilder &MIRBuilder)
Register getOrCreateConstFP(APFloat Val, MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
const MachineInstr * getFunctionDefinition(const Function *F)
LLT getRegType(SPIRVTypeInst SpvType) const
void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy)
const MachineOperand * getFunctionDefinitionByUse(const MachineOperand *Use)
void invalidateMachineInstr(MachineInstr *MI)
bool isResourceType(SPIRVTypeInst Type) const
SPIRVTypeInst getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder, bool EmitIR)
SPIRVTypeInst getOrCreateSPIRVPointerType(const Type *BaseType, MachineIRBuilder &MIRBuilder, SPIRV::StorageClass::StorageClass SC)
void addMutated(Value *Val, Type *Ty)
void updateIfExistDeducedElementType(Value *OldVal, Value *NewVal, bool DeleteOld)
bool isScalarOfType(Register VReg, unsigned TypeOpcode) const
Register getSPIRVTypeID(SPIRVTypeInst SpirvType) const
Register getOrCreateConstInt(uint64_t Val, MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
Register getOrCreateConstIntArray(uint64_t Val, size_t Num, MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII)
bool findValueAttrs(const MachineInstr *Key, Type *&Ty, StringRef &Name)
unsigned getPointeeTypeOp(Register PtrReg)
SPIRVTypeInst retrieveScalarOrVectorIntType(SPIRVTypeInst Type) const
Register getOrCreateGlobalVariableWithBinding(SPIRVTypeInst VarType, uint32_t Set, uint32_t Binding, StringRef Name, MachineIRBuilder &MIRBuilder)
SPIRVTypeInst getOrCreateOpTypeCoopMatr(MachineIRBuilder &MIRBuilder, const TargetExtType *ExtensionType, SPIRVTypeInst ElemType, uint32_t Scope, uint32_t Rows, uint32_t Columns, uint32_t Use, bool EmitIR)
SPIRVTypeInst changePointerStorageClass(SPIRVTypeInst PtrType, SPIRV::StorageClass::StorageClass SC, MachineInstr &I)
Type * findMutated(const Value *Val)
SPIRVTypeInst getOrCreateUnknownType(const Type *Ty, MachineIRBuilder &MIRBuilder, unsigned Opcode, const ArrayRef< MCOperand > Operands)
Register getOrCreateConstVector(uint64_t Val, MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder, SPIRVTypeInst SpvType=nullptr)
SPIRVTypeInst getOrCreateOpTypePipe(MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AccQual)
void addGlobalObject(const Value *V, const MachineFunction *MF, Register R)
SPIRVTypeInst getScalarOrVectorComponentType(SPIRVTypeInst Type) const
bool hasSPIRVTypeForVReg(Register VReg) const
void addDeducedCompositeType(Value *Val, Type *Ty)
void buildAssignType(IRBuilder<> &B, Type *Ty, Value *Arg)
void recordFunctionPointer(const MachineOperand *MO, const Function *F)
SPIRVTypeInst getOrCreateSPIRVFloatType(unsigned BitWidth, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRVTypeInst getOrCreateVulkanBufferType(MachineIRBuilder &MIRBuilder, Type *ElemType, SPIRV::StorageClass::StorageClass SC, bool IsWritable, bool EmitIr=false)
SPIRVTypeInst getPointeeType(SPIRVTypeInst PtrType)
SmallPtrSet< MachineInstr *, 8 > * getForwardCalls(const Function *F)
SPIRVTypeInst getOrCreateSPIRVType(const Type *Type, MachineInstr &I, SPIRV::AccessQualifier::AccessQualifier AQ, bool EmitIR)
Register getOrCreateConsIntVector(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVTypeInst SpvType, bool EmitIR)
void updateIfExistAssignPtrTypeInstr(Value *OldVal, Value *NewVal, bool DeleteOld)
SPIRVTypeInst assignTypeToVReg(const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ, bool EmitIR)
bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const
SPIRVTypeInst getOrCreateLayoutType(MachineIRBuilder &MIRBuilder, const TargetExtType *T, bool EmitIr=false)
MachineFunction * setCurrentFunc(MachineFunction &MF)
Register createConstInt(const ConstantInt *CI, MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull)
Register getOrCreateConstNullPtr(MachineIRBuilder &MIRBuilder, SPIRVTypeInst SpvType)
SPIRVTypeInst getSPIRVTypeForVReg(Register VReg, const MachineFunction *MF=nullptr) const
Type * getDeducedGlobalValueType(const GlobalValue *Global)
Register getOrCreateUndef(MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII)
SPIRVTypeInst getOrCreateOpTypeSampler(MachineIRBuilder &MIRBuilder)
void addValueAttrs(MachineInstr *Key, std::pair< Type *, std::string > Val)
const Function * getFunctionByDefinition(const MachineInstr *MI)
void buildMemAliasingOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder, uint32_t Dec, const MDNode *GVarMD)
SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const
Type * findDeducedElementType(const Value *Val)
Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param, unsigned FilerMode, MachineIRBuilder &MIRBuilder)
void updateAssignType(CallInst *AssignCI, Value *Arg, Value *OfType)
CallInst * findAssignPtrTypeInstr(const Value *Val)
Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVTypeInst SpvType, bool EmitIR, bool ZeroAsNull=true)
SPIRVTypeInst getOrCreateVulkanPushConstantType(MachineIRBuilder &MIRBuilder, Type *ElemType)
Register createConstFP(const ConstantFP *CF, MachineInstr &I, SPIRVTypeInst SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull)
SPIRVTypeInst getOrCreateOpTypeDeviceEvent(MachineIRBuilder &MIRBuilder)
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StringRef - Represent a constant reference to a string, i.e.
Definition StringRef.h:55
Class to represent struct types.
Class to represent target extensions types, which are generally unintrospectable from target-independ...
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:45
A few GPU targets, such as DXIL and SPIR-V, have typed pointers.
A Use represents the edge between a Value definition and its users.
Definition Use.h:35
LLVM Value Representation.
Definition Value.h:75
FunctionType * getOriginalFunctionType(const Function &F)
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
LLVM_ATTRIBUTE_VISIBILITY_DEFAULT AnalysisKey InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key
std::function< void(Register)> StructOffsetDecorator
@ Global
Append to llvm.global_dtors.
DWARFExpression::Operation Op
constexpr unsigned BitWidth