LLVM  7.0.0svn
AVRAsmParser.cpp
Go to the documentation of this file.
1 //===---- AVRAsmParser.cpp - Parse AVR assembly to MCInst instructions ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "AVR.h"
11 #include "AVRRegisterInfo.h"
13 #include "MCTargetDesc/AVRMCExpr.h"
15 
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/ADT/StringSwitch.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/MC/MCInstBuilder.h"
25 #include "llvm/MC/MCStreamer.h"
27 #include "llvm/MC/MCSymbol.h"
28 #include "llvm/MC/MCValue.h"
29 #include "llvm/Support/Debug.h"
32 
33 #include <sstream>
34 
35 #define DEBUG_TYPE "avr-asm-parser"
36 
37 namespace llvm {
38 
39 /// Parses AVR assembly from a stream.
41  const MCSubtargetInfo &STI;
42  MCAsmParser &Parser;
43  const MCRegisterInfo *MRI;
44  const std::string GENERATE_STUBS = "gs";
45 
46 #define GET_ASSEMBLER_HEADER
47 #include "AVRGenAsmMatcher.inc"
48 
49  bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
50  OperandVector &Operands, MCStreamer &Out,
51  uint64_t &ErrorInfo,
52  bool MatchingInlineAsm) override;
53 
54  bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
55 
56  bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
57  SMLoc NameLoc, OperandVector &Operands) override;
58 
59  bool ParseDirective(AsmToken DirectiveID) override;
60 
61  OperandMatchResultTy parseMemriOperand(OperandVector &Operands);
62 
63  bool parseOperand(OperandVector &Operands);
64  int parseRegisterName(unsigned (*matchFn)(StringRef));
65  int parseRegisterName();
66  int parseRegister();
67  bool tryParseRegisterOperand(OperandVector &Operands);
68  bool tryParseExpression(OperandVector &Operands);
69  bool tryParseRelocExpression(OperandVector &Operands);
70  void eatComma();
71 
72  unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
73  unsigned Kind) override;
74 
75  unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) {
76  MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID];
77  return MRI->getMatchingSuperReg(Reg, From, Class);
78  }
79 
80  bool emit(MCInst &Instruction, SMLoc const &Loc, MCStreamer &Out) const;
81  bool invalidOperand(SMLoc const &Loc, OperandVector const &Operands,
82  uint64_t const &ErrorInfo);
83  bool missingFeature(SMLoc const &Loc, uint64_t const &ErrorInfo);
84 
85  bool parseLiteralValues(unsigned SizeInBytes, SMLoc L);
86 
87 public:
89  const MCInstrInfo &MII, const MCTargetOptions &Options)
90  : MCTargetAsmParser(Options, STI, MII), STI(STI), Parser(Parser) {
92  MRI = getContext().getRegisterInfo();
93 
94  setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
95  }
96 
97  MCAsmParser &getParser() const { return Parser; }
98  MCAsmLexer &getLexer() const { return Parser.getLexer(); }
99 };
100 
101 /// An parsed AVR assembly operand.
103  typedef MCParsedAsmOperand Base;
104  enum KindTy { k_Immediate, k_Register, k_Token, k_Memri } Kind;
105 
106 public:
107  AVROperand(StringRef Tok, SMLoc const &S)
108  : Base(), Kind(k_Token), Tok(Tok), Start(S), End(S) {}
109  AVROperand(unsigned Reg, SMLoc const &S, SMLoc const &E)
110  : Base(), Kind(k_Register), RegImm({Reg, nullptr}), Start(S), End(E) {}
111  AVROperand(MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
112  : Base(), Kind(k_Immediate), RegImm({0, Imm}), Start(S), End(E) {}
113  AVROperand(unsigned Reg, MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
114  : Base(), Kind(k_Memri), RegImm({Reg, Imm}), Start(S), End(E) {}
115 
117  unsigned Reg;
118  MCExpr const *Imm;
119  };
120  union {
123  };
124 
126 
127 public:
128  void addRegOperands(MCInst &Inst, unsigned N) const {
129  assert(Kind == k_Register && "Unexpected operand kind");
130  assert(N == 1 && "Invalid number of operands!");
131 
133  }
134 
135  void addExpr(MCInst &Inst, const MCExpr *Expr) const {
136  // Add as immediate when possible
137  if (!Expr)
139  else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
140  Inst.addOperand(MCOperand::createImm(CE->getValue()));
141  else
142  Inst.addOperand(MCOperand::createExpr(Expr));
143  }
144 
145  void addImmOperands(MCInst &Inst, unsigned N) const {
146  assert(Kind == k_Immediate && "Unexpected operand kind");
147  assert(N == 1 && "Invalid number of operands!");
148 
149  const MCExpr *Expr = getImm();
150  addExpr(Inst, Expr);
151  }
152 
153  /// Adds the contained reg+imm operand to an instruction.
154  void addMemriOperands(MCInst &Inst, unsigned N) const {
155  assert(Kind == k_Memri && "Unexpected operand kind");
156  assert(N == 2 && "Invalid number of operands");
157 
159  addExpr(Inst, getImm());
160  }
161 
162  bool isReg() const { return Kind == k_Register; }
163  bool isImm() const { return Kind == k_Immediate; }
164  bool isToken() const { return Kind == k_Token; }
165  bool isMem() const { return Kind == k_Memri; }
166  bool isMemri() const { return Kind == k_Memri; }
167 
168  StringRef getToken() const {
169  assert(Kind == k_Token && "Invalid access!");
170  return Tok;
171  }
172 
173  unsigned getReg() const {
174  assert((Kind == k_Register || Kind == k_Memri) && "Invalid access!");
175 
176  return RegImm.Reg;
177  }
178 
179  const MCExpr *getImm() const {
180  assert((Kind == k_Immediate || Kind == k_Memri) && "Invalid access!");
181  return RegImm.Imm;
182  }
183 
184  static std::unique_ptr<AVROperand> CreateToken(StringRef Str, SMLoc S) {
185  return make_unique<AVROperand>(Str, S);
186  }
187 
188  static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S,
189  SMLoc E) {
190  return make_unique<AVROperand>(RegNum, S, E);
191  }
192 
193  static std::unique_ptr<AVROperand> CreateImm(const MCExpr *Val, SMLoc S,
194  SMLoc E) {
195  return make_unique<AVROperand>(Val, S, E);
196  }
197 
198  static std::unique_ptr<AVROperand>
199  CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) {
200  return make_unique<AVROperand>(RegNum, Val, S, E);
201  }
202 
203  void makeToken(StringRef Token) {
204  Kind = k_Token;
205  Tok = Token;
206  }
207 
208  void makeReg(unsigned RegNo) {
209  Kind = k_Register;
210  RegImm = {RegNo, nullptr};
211  }
212 
213  void makeImm(MCExpr const *Ex) {
214  Kind = k_Immediate;
215  RegImm = {0, Ex};
216  }
217 
218  void makeMemri(unsigned RegNo, MCExpr const *Imm) {
219  Kind = k_Memri;
220  RegImm = {RegNo, Imm};
221  }
222 
223  SMLoc getStartLoc() const { return Start; }
224  SMLoc getEndLoc() const { return End; }
225 
226  virtual void print(raw_ostream &O) const {
227  switch (Kind) {
228  case k_Token:
229  O << "Token: \"" << getToken() << "\"";
230  break;
231  case k_Register:
232  O << "Register: " << getReg();
233  break;
234  case k_Immediate:
235  O << "Immediate: \"" << *getImm() << "\"";
236  break;
237  case k_Memri: {
238  // only manually print the size for non-negative values,
239  // as the sign is inserted automatically.
240  O << "Memri: \"" << getReg() << '+' << *getImm() << "\"";
241  break;
242  }
243  }
244  O << "\n";
245  }
246 };
247 
248 // Auto-generated Match Functions
249 
250 /// Maps from the set of all register names to a register number.
251 /// \note Generated by TableGen.
252 static unsigned MatchRegisterName(StringRef Name);
253 
254 /// Maps from the set of all alternative registernames to a register number.
255 /// \note Generated by TableGen.
256 static unsigned MatchRegisterAltName(StringRef Name);
257 
258 bool AVRAsmParser::invalidOperand(SMLoc const &Loc,
259  OperandVector const &Operands,
260  uint64_t const &ErrorInfo) {
261  SMLoc ErrorLoc = Loc;
262  char const *Diag = 0;
263 
264  if (ErrorInfo != ~0U) {
265  if (ErrorInfo >= Operands.size()) {
266  Diag = "too few operands for instruction.";
267  } else {
268  AVROperand const &Op = (AVROperand const &)*Operands[ErrorInfo];
269 
270  // TODO: See if we can do a better error than just "invalid ...".
271  if (Op.getStartLoc() != SMLoc()) {
272  ErrorLoc = Op.getStartLoc();
273  }
274  }
275  }
276 
277  if (!Diag) {
278  Diag = "invalid operand for instruction";
279  }
280 
281  return Error(ErrorLoc, Diag);
282 }
283 
284 bool AVRAsmParser::missingFeature(llvm::SMLoc const &Loc,
285  uint64_t const &ErrorInfo) {
286  return Error(Loc, "instruction requires a CPU feature not currently enabled");
287 }
288 
289 bool AVRAsmParser::emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const {
290  Inst.setLoc(Loc);
291  Out.EmitInstruction(Inst, STI);
292 
293  return false;
294 }
295 
296 bool AVRAsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
297  OperandVector &Operands,
298  MCStreamer &Out, uint64_t &ErrorInfo,
299  bool MatchingInlineAsm) {
300  MCInst Inst;
301  unsigned MatchResult =
302  MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm);
303 
304  switch (MatchResult) {
305  case Match_Success: return emit(Inst, Loc, Out);
306  case Match_MissingFeature: return missingFeature(Loc, ErrorInfo);
307  case Match_InvalidOperand: return invalidOperand(Loc, Operands, ErrorInfo);
308  case Match_MnemonicFail: return Error(Loc, "invalid instruction");
309  default: return true;
310  }
311 }
312 
313 /// Parses a register name using a given matching function.
314 /// Checks for lowercase or uppercase if necessary.
315 int AVRAsmParser::parseRegisterName(unsigned (*matchFn)(StringRef)) {
316  StringRef Name = Parser.getTok().getString();
317 
318  int RegNum = matchFn(Name);
319 
320  // GCC supports case insensitive register names. Some of the AVR registers
321  // are all lower case, some are all upper case but non are mixed. We prefer
322  // to use the original names in the register definitions. That is why we
323  // have to test both upper and lower case here.
324  if (RegNum == AVR::NoRegister) {
325  RegNum = matchFn(Name.lower());
326  }
327  if (RegNum == AVR::NoRegister) {
328  RegNum = matchFn(Name.upper());
329  }
330 
331  return RegNum;
332 }
333 
334 int AVRAsmParser::parseRegisterName() {
335  int RegNum = parseRegisterName(&MatchRegisterName);
336 
337  if (RegNum == AVR::NoRegister)
338  RegNum = parseRegisterName(&MatchRegisterAltName);
339 
340  return RegNum;
341 }
342 
343 int AVRAsmParser::parseRegister() {
344  int RegNum = AVR::NoRegister;
345 
346  if (Parser.getTok().is(AsmToken::Identifier)) {
347  // Check for register pair syntax
348  if (Parser.getLexer().peekTok().is(AsmToken::Colon)) {
349  Parser.Lex();
350  Parser.Lex(); // Eat high (odd) register and colon
351 
352  if (Parser.getTok().is(AsmToken::Identifier)) {
353  // Convert lower (even) register to DREG
354  RegNum = toDREG(parseRegisterName());
355  }
356  } else {
357  RegNum = parseRegisterName();
358  }
359  }
360  return RegNum;
361 }
362 
363 bool AVRAsmParser::tryParseRegisterOperand(OperandVector &Operands) {
364  int RegNo = parseRegister();
365 
366  if (RegNo == AVR::NoRegister)
367  return true;
368 
369  AsmToken const &T = Parser.getTok();
370  Operands.push_back(AVROperand::CreateReg(RegNo, T.getLoc(), T.getEndLoc()));
371  Parser.Lex(); // Eat register token.
372 
373  return false;
374 }
375 
376 bool AVRAsmParser::tryParseExpression(OperandVector &Operands) {
377  SMLoc S = Parser.getTok().getLoc();
378 
379  if (!tryParseRelocExpression(Operands))
380  return false;
381 
382  if ((Parser.getTok().getKind() == AsmToken::Plus ||
383  Parser.getTok().getKind() == AsmToken::Minus) &&
384  Parser.getLexer().peekTok().getKind() == AsmToken::Identifier) {
385  // Don't handle this case - it should be split into two
386  // separate tokens.
387  return true;
388  }
389 
390  // Parse (potentially inner) expression
391  MCExpr const *Expression;
392  if (getParser().parseExpression(Expression))
393  return true;
394 
395  SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
396  Operands.push_back(AVROperand::CreateImm(Expression, S, E));
397  return false;
398 }
399 
400 bool AVRAsmParser::tryParseRelocExpression(OperandVector &Operands) {
401  bool isNegated = false;
403 
404  SMLoc S = Parser.getTok().getLoc();
405 
406  // Check for sign
407  AsmToken tokens[2];
408  size_t ReadCount = Parser.getLexer().peekTokens(tokens);
409 
410  if (ReadCount == 2) {
411  if ((tokens[0].getKind() == AsmToken::Identifier &&
412  tokens[1].getKind() == AsmToken::LParen) ||
413  (tokens[0].getKind() == AsmToken::LParen &&
414  tokens[1].getKind() == AsmToken::Minus)) {
415 
416  AsmToken::TokenKind CurTok = Parser.getLexer().getKind();
417  if (CurTok == AsmToken::Minus ||
418  tokens[1].getKind() == AsmToken::Minus) {
419  isNegated = true;
420  } else {
421  assert(CurTok == AsmToken::Plus);
422  isNegated = false;
423  }
424 
425  // Eat the sign
426  if (CurTok == AsmToken::Minus || CurTok == AsmToken::Plus)
427  Parser.Lex();
428  }
429  }
430 
431  // Check if we have a target specific modifier (lo8, hi8, &c)
432  if (Parser.getTok().getKind() != AsmToken::Identifier ||
433  Parser.getLexer().peekTok().getKind() != AsmToken::LParen) {
434  // Not a reloc expr
435  return true;
436  }
437  StringRef ModifierName = Parser.getTok().getString();
438  ModifierKind = AVRMCExpr::getKindByName(ModifierName.str().c_str());
439 
440  if (ModifierKind != AVRMCExpr::VK_AVR_None) {
441  Parser.Lex();
442  Parser.Lex(); // Eat modifier name and parenthesis
443  if (Parser.getTok().getString() == GENERATE_STUBS &&
444  Parser.getTok().getKind() == AsmToken::Identifier) {
445  std::string GSModName = ModifierName.str() + "_" + GENERATE_STUBS;
446  ModifierKind = AVRMCExpr::getKindByName(GSModName.c_str());
447  if (ModifierKind != AVRMCExpr::VK_AVR_None)
448  Parser.Lex(); // Eat gs modifier name
449  }
450  } else {
451  return Error(Parser.getTok().getLoc(), "unknown modifier");
452  }
453 
454  if (tokens[1].getKind() == AsmToken::Minus ||
455  tokens[1].getKind() == AsmToken::Plus) {
456  Parser.Lex();
457  assert(Parser.getTok().getKind() == AsmToken::LParen);
458  Parser.Lex(); // Eat the sign and parenthesis
459  }
460 
461  MCExpr const *InnerExpression;
462  if (getParser().parseExpression(InnerExpression))
463  return true;
464 
465  if (tokens[1].getKind() == AsmToken::Minus ||
466  tokens[1].getKind() == AsmToken::Plus) {
467  assert(Parser.getTok().getKind() == AsmToken::RParen);
468  Parser.Lex(); // Eat closing parenthesis
469  }
470 
471  // If we have a modifier wrap the inner expression
472  assert(Parser.getTok().getKind() == AsmToken::RParen);
473  Parser.Lex(); // Eat closing parenthesis
474 
475  MCExpr const *Expression = AVRMCExpr::create(ModifierKind, InnerExpression,
476  isNegated, getContext());
477 
478  SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
479  Operands.push_back(AVROperand::CreateImm(Expression, S, E));
480 
481  return false;
482 }
483 
484 bool AVRAsmParser::parseOperand(OperandVector &Operands) {
485  DEBUG(dbgs() << "parseOperand\n");
486 
487  switch (getLexer().getKind()) {
488  default:
489  return Error(Parser.getTok().getLoc(), "unexpected token in operand");
490 
492  // Try to parse a register, if it fails,
493  // fall through to the next case.
494  if (!tryParseRegisterOperand(Operands)) {
495  return false;
496  }
498  case AsmToken::LParen:
499  case AsmToken::Integer:
500  case AsmToken::Dot:
501  return tryParseExpression(Operands);
502  case AsmToken::Plus:
503  case AsmToken::Minus: {
504  // If the sign preceeds a number, parse the number,
505  // otherwise treat the sign a an independent token.
506  switch (getLexer().peekTok().getKind()) {
507  case AsmToken::Integer:
508  case AsmToken::BigNum:
510  case AsmToken::Real:
511  if (!tryParseExpression(Operands))
512  return false;
513  default:
514  break;
515  }
516  // Treat the token as an independent token.
518  Parser.getTok().getLoc()));
519  Parser.Lex(); // Eat the token.
520  return false;
521  }
522  }
523 
524  // Could not parse operand
525  return true;
526 }
527 
529 AVRAsmParser::parseMemriOperand(OperandVector &Operands) {
530  DEBUG(dbgs() << "parseMemriOperand()\n");
531 
532  SMLoc E, S;
533  MCExpr const *Expression;
534  int RegNo;
535 
536  // Parse register.
537  {
538  RegNo = parseRegister();
539 
540  if (RegNo == AVR::NoRegister)
541  return MatchOperand_ParseFail;
542 
543  S = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
544  Parser.Lex(); // Eat register token.
545  }
546 
547  // Parse immediate;
548  {
549  if (getParser().parseExpression(Expression))
550  return MatchOperand_ParseFail;
551 
552  E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
553  }
554 
555  Operands.push_back(AVROperand::CreateMemri(RegNo, Expression, S, E));
556 
557  return MatchOperand_Success;
558 }
559 
560 bool AVRAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
561  SMLoc &EndLoc) {
562  StartLoc = Parser.getTok().getLoc();
563  RegNo = parseRegister();
564  EndLoc = Parser.getTok().getLoc();
565 
566  return (RegNo == AVR::NoRegister);
567 }
568 
569 void AVRAsmParser::eatComma() {
570  if (getLexer().is(AsmToken::Comma)) {
571  Parser.Lex();
572  } else {
573  // GCC allows commas to be omitted.
574  }
575 }
576 
577 bool AVRAsmParser::ParseInstruction(ParseInstructionInfo &Info,
578  StringRef Mnemonic, SMLoc NameLoc,
579  OperandVector &Operands) {
580  Operands.push_back(AVROperand::CreateToken(Mnemonic, NameLoc));
581 
582  bool first = true;
583  while (getLexer().isNot(AsmToken::EndOfStatement)) {
584  if (!first) eatComma();
585 
586  first = false;
587 
588  auto MatchResult = MatchOperandParserImpl(Operands, Mnemonic);
589 
590  if (MatchResult == MatchOperand_Success) {
591  continue;
592  }
593 
594  if (MatchResult == MatchOperand_ParseFail) {
595  SMLoc Loc = getLexer().getLoc();
596  Parser.eatToEndOfStatement();
597 
598  return Error(Loc, "failed to parse register and immediate pair");
599  }
600 
601  if (parseOperand(Operands)) {
602  SMLoc Loc = getLexer().getLoc();
603  Parser.eatToEndOfStatement();
604  return Error(Loc, "unexpected token in argument list");
605  }
606  }
607  Parser.Lex(); // Consume the EndOfStatement
608  return false;
609 }
610 
611 bool AVRAsmParser::ParseDirective(llvm::AsmToken DirectiveID) {
612  StringRef IDVal = DirectiveID.getIdentifier();
613  if (IDVal.lower() == ".long") {
614  parseLiteralValues(SIZE_LONG, DirectiveID.getLoc());
615  } else if (IDVal.lower() == ".word" || IDVal.lower() == ".short") {
616  parseLiteralValues(SIZE_WORD, DirectiveID.getLoc());
617  } else if (IDVal.lower() == ".byte") {
618  parseLiteralValues(1, DirectiveID.getLoc());
619  }
620  return true;
621 }
622 
623 bool AVRAsmParser::parseLiteralValues(unsigned SizeInBytes, SMLoc L) {
624  MCAsmParser &Parser = getParser();
625  AVRMCELFStreamer &AVRStreamer =
626  static_cast<AVRMCELFStreamer &>(Parser.getStreamer());
627  AsmToken Tokens[2];
628  size_t ReadCount = Parser.getLexer().peekTokens(Tokens);
629  if (ReadCount == 2 && Parser.getTok().getKind() == AsmToken::Identifier &&
630  Tokens[0].getKind() == AsmToken::Minus &&
631  Tokens[1].getKind() == AsmToken::Identifier) {
633  AVRStreamer.EmitValueForModiferKind(Symbol, SizeInBytes, L,
635  return false;
636  }
637 
638  if (Parser.getTok().getKind() == AsmToken::Identifier &&
639  Parser.getLexer().peekTok().getKind() == AsmToken::LParen) {
640  StringRef ModifierName = Parser.getTok().getString();
641  AVRMCExpr::VariantKind ModifierKind =
642  AVRMCExpr::getKindByName(ModifierName.str().c_str());
643  if (ModifierKind != AVRMCExpr::VK_AVR_None) {
644  Parser.Lex();
645  Parser.Lex(); // Eat the modifier and parenthesis
646  } else {
647  return Error(Parser.getTok().getLoc(), "unknown modifier");
648  }
649  MCSymbol *Symbol =
651  AVRStreamer.EmitValueForModiferKind(Symbol, SizeInBytes, L, ModifierKind);
652  return false;
653  }
654 
655  auto parseOne = [&]() -> bool {
656  const MCExpr *Value;
657  if (Parser.parseExpression(Value))
658  return true;
659  Parser.getStreamer().EmitValue(Value, SizeInBytes, L);
660  return false;
661  };
662  return (parseMany(parseOne));
663 }
664 
665 extern "C" void LLVMInitializeAVRAsmParser() {
667 }
668 
669 #define GET_REGISTER_MATCHER
670 #define GET_MATCHER_IMPLEMENTATION
671 #include "AVRGenAsmMatcher.inc"
672 
673 // Uses enums defined in AVRGenAsmMatcher.inc
674 unsigned AVRAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
675  unsigned ExpectedKind) {
676  AVROperand &Op = static_cast<AVROperand &>(AsmOp);
677  MatchClassKind Expected = static_cast<MatchClassKind>(ExpectedKind);
678 
679  // If need be, GCC converts bare numbers to register names
680  // It's ugly, but GCC supports it.
681  if (Op.isImm()) {
682  if (MCConstantExpr const *Const = dyn_cast<MCConstantExpr>(Op.getImm())) {
683  int64_t RegNum = Const->getValue();
684  std::ostringstream RegName;
685  RegName << "r" << RegNum;
686  RegNum = MatchRegisterName(RegName.str().c_str());
687  if (RegNum != AVR::NoRegister) {
688  Op.makeReg(RegNum);
689  if (validateOperandClass(Op, Expected) == Match_Success) {
690  return Match_Success;
691  }
692  }
693  // Let the other quirks try their magic.
694  }
695  }
696 
697  if (Op.isReg()) {
698  // If the instruction uses a register pair but we got a single, lower
699  // register we perform a "class cast".
700  if (isSubclass(Expected, MCK_DREGS)) {
701  unsigned correspondingDREG = toDREG(Op.getReg());
702 
703  if (correspondingDREG != AVR::NoRegister) {
704  Op.makeReg(correspondingDREG);
705  return validateOperandClass(Op, Expected);
706  }
707  }
708  }
709  return Match_InvalidOperand;
710 }
711 
712 } // end of namespace llvm
void push_back(const T &Elt)
Definition: SmallVector.h:212
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
StringRef getString() const
Get the string for the current token, this includes all characters (for example, the quotes on string...
Definition: MCAsmMacro.h:111
An parsed AVR assembly operand.
bool parseMany(function_ref< bool()> parseOne, bool hasComma=true)
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:228
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
void makeReg(unsigned RegNo)
AVROperand(unsigned Reg, MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:235
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
Generic assembler parser interface, for use by target specific assembly parsers.
Definition: MCAsmParser.h:110
virtual void Initialize(MCAsmParser &Parser)
Initialize the extension for parsing using the given Parser.
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:137
MCTargetAsmParser - Generic interface to target specific assembly parsers.
bool isToken() const
isToken - Is this a token operand?
const int SIZE_WORD
virtual const AsmToken & Lex()=0
Get the next AsmToken in the stream, possibly handling file inclusion first.
bool isImm() const
isImm - Is this an immediate operand?
const int SIZE_LONG
AVROperand(unsigned Reg, SMLoc const &S, SMLoc const &E)
const AsmToken & getTok() const
Get the current AsmToken from the stream.
Definition: MCAsmParser.cpp:33
void makeImm(MCExpr const *Ex)
bool isMem() const
isMem - Is this a memory operand?
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, bool PrintSchedInfo=false)
Emit the given Instruction into the current section.
Definition: MCStreamer.cpp:887
Parses AVR assembly from a stream.
bool Error(SMLoc L, const Twine &Msg, SMRange Range=SMRange())
Target & getTheAVRTarget()
StringRef getIdentifier() const
Get the identifier string for the current token, which should be an identifier or a string...
Definition: MCAsmMacro.h:100
SMLoc getLoc() const
Get the current source location.
Definition: MCAsmLexer.cpp:24
VariantKind
Specifies the type of an expression.
Definition: AVRMCExpr.h:23
const MCExpr * getImm() const
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:116
const FeatureBitset & getFeatureBits() const
Generic assembler lexer interface, for use by target specific assembly lexers.
Definition: MCAsmLexer.h:40
static unsigned MatchRegisterAltName(StringRef Name)
Maps from the set of all alternative registernames to a register number.
RegisterImmediate RegImm
static std::unique_ptr< AVROperand > CreateReg(unsigned RegNum, SMLoc S, SMLoc E)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
Reg
All possible values of the reg field in the ModR/M byte.
Target independent representation for an assembler token.
Definition: MCAsmMacro.h:22
SMLoc getStartLoc() const
getStartLoc - Get the location of the first token of this operand.
void addRegOperands(MCInst &Inst, unsigned N) const
virtual void print(raw_ostream &O) const
print - Print a debug representation of the operand to the given stream.
MCParsedAsmOperand - This abstract class represents a source-level assembly instruction operand...
This file implements a class to represent arbitrary precision integral constant values and operations...
virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc)=0
Parse an arbitrary expression.
std::pair< StringRef, StringRef > getToken(StringRef Source, StringRef Delimiters=" \\\)
getToken - This function extracts one token from source, ignoring any leading characters that appear ...
RegisterMCAsmParser - Helper template for registering a target specific assembly parser, for use in the target machine initialization function.
AVROperand(MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
SMLoc getLoc() const
Definition: MCAsmLexer.cpp:28
LLVM_NODISCARD std::string upper() const
Convert the given ASCII string to uppercase.
Definition: StringRef.cpp:116
void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc=SMLoc())
Definition: MCStreamer.cpp:142
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:161
virtual void eatToEndOfStatement()=0
Skip to the end of the current statement, for error recovery.
void makeMemri(unsigned RegNo, MCExpr const *Imm)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const char * getPointer() const
Definition: SMLoc.h:35
Streaming machine code generation interface.
Definition: MCStreamer.h:183
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg...
SMLoc getEndLoc() const
Definition: MCAsmLexer.cpp:32
bool isMemri() const
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
static std::unique_ptr< AVROperand > CreateImm(const MCExpr *Val, SMLoc S, SMLoc E)
static std::unique_ptr< AVROperand > CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E)
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
virtual MCAsmLexer & getLexer()=0
void addMemriOperands(MCInst &Inst, unsigned N) const
Adds the contained reg+imm operand to an instruction.
static const unsigned End
const AsmToken peekTok(bool ShouldSkipSpace=true)
Look ahead at the next token to be lexed.
Definition: MCAsmLexer.h:114
void addImmOperands(MCInst &Inst, unsigned N) const
SmallVectorImpl< std::unique_ptr< MCParsedAsmOperand > > OperandVector
void setLoc(SMLoc loc)
Definition: MCInst.h:179
AVROperand(StringRef Tok, SMLoc const &S)
unsigned first
AsmToken::TokenKind getKind() const
Get the kind of current token.
Definition: MCAsmLexer.h:141
bool isReg() const
isReg - Is this a register operand?
const MCInstrInfo & MII
void makeToken(StringRef Token)
virtual MCStreamer & getStreamer()=0
Return the output streamer for the assembler.
SMLoc getEndLoc() const
getEndLoc - Get the location of the last token of this operand.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
bool is(TokenKind K) const
Definition: MCAsmMacro.h:83
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
static std::unique_ptr< AVROperand > CreateToken(StringRef Str, SMLoc S)
Base class for user error types.
Definition: Error.h:331
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:37
StringRef getToken() const
void setAvailableFeatures(uint64_t Value)
void addExpr(MCInst &Inst, const MCExpr *Expr) const
unsigned getReg() const
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:122
#define N
Generic base class for all target subtargets.
static const AVRMCExpr * create(VariantKind Kind, const MCExpr *Expr, bool isNegated, MCContext &Ctx)
Creates an AVR machine code expression.
Definition: AVRMCExpr.cpp:39
MCAsmParser & getParser() const
static VariantKind getKindByName(StringRef Name)
Definition: AVRMCExpr.cpp:203
const unsigned Kind
MCAsmLexer & getLexer() const
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:108
void EmitValueForModiferKind(const MCSymbol *Sym, unsigned SizeInBytes, SMLoc Loc=SMLoc(), AVRMCExpr::VariantKind ModifierKind=AVRMCExpr::VK_AVR_None)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:292
LLVM Value Representation.
Definition: Value.h:73
static unsigned MatchRegisterName(StringRef Name)
Maps from the set of all register names to a register number.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
#define DEBUG(X)
Definition: Debug.h:118
void addOperand(const MCOperand &Op)
Definition: MCInst.h:186
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
AVRAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser, const MCInstrInfo &MII, const MCTargetOptions &Options)
virtual size_t peekTokens(MutableArrayRef< AsmToken > Buf, bool ShouldSkipSpace=true)=0
Look ahead an arbitrary number of tokens.
Represents a location in source code.
Definition: SMLoc.h:24
void LLVMInitializeAVRAsmParser()
static MCOperand createImm(int64_t Val)
Definition: MCInst.h:123
TokenKind getKind() const
Definition: MCAsmMacro.h:82