LLVM  6.0.0svn
Passes.h
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1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
17 
18 #include <functional>
19 #include <string>
20 
21 namespace llvm {
22 
23 class FunctionPass;
24 class MachineFunction;
25 class MachineFunctionPass;
26 class ModulePass;
27 class Pass;
28 class TargetMachine;
29 class TargetRegisterClass;
30 class raw_ostream;
31 
32 } // End llvm namespace
33 
34 /// List of target independent CodeGen pass IDs.
35 namespace llvm {
36  FunctionPass *createAtomicExpandPass();
37 
38  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
39  /// work well with unreachable basic blocks (what live ranges make sense for a
40  /// block that cannot be reached?). As such, a code generator should either
41  /// not instruction select unreachable blocks, or run this pass as its
42  /// last LLVM modifying pass to clean up blocks that are not reachable from
43  /// the entry block.
45 
46  /// MachineFunctionPrinter pass - This pass prints out the machine function to
47  /// the given stream as a debugging tool.
48  MachineFunctionPass *
49  createMachineFunctionPrinterPass(raw_ostream &OS,
50  const std::string &Banner ="");
51 
52  /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
53  /// using the MIR serialization format.
54  MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
55 
56  /// This pass resets a MachineFunction when it has the FailedISel property
57  /// as if it was just created.
58  /// If EmitFallbackDiag is true, the pass will emit a
59  /// DiagnosticInfoISelFallback for every MachineFunction it resets.
60  /// If AbortOnFailedISel is true, abort compilation instead of resetting.
61  MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
62  bool AbortOnFailedISel);
63 
64  /// createCodeGenPreparePass - Transform the code to expose more pattern
65  /// matching during instruction selection.
66  FunctionPass *createCodeGenPreparePass();
67 
68  /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather
69  /// and scatter intrinsics with scalar code when target doesn't support them.
70  FunctionPass *createScalarizeMaskedMemIntrinPass();
71 
72  /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
73  /// load-linked/store-conditional loops.
74  extern char &AtomicExpandID;
75 
76  /// MachineLoopInfo - This pass is a loop analysis pass.
77  extern char &MachineLoopInfoID;
78 
79  /// MachineDominators - This pass is a machine dominators analysis pass.
80  extern char &MachineDominatorsID;
81 
82 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
83  extern char &MachineDominanceFrontierID;
84 
85  /// MachineRegionInfo - This pass computes SESE regions for machine functions.
86  extern char &MachineRegionInfoPassID;
87 
88  /// EdgeBundles analysis - Bundle machine CFG edges.
89  extern char &EdgeBundlesID;
90 
91  /// LiveVariables pass - This pass computes the set of blocks in which each
92  /// variable is life and sets machine operand kill flags.
93  extern char &LiveVariablesID;
94 
95  /// PHIElimination - This pass eliminates machine instruction PHI nodes
96  /// by inserting copy instructions. This destroys SSA information, but is the
97  /// desired input for some register allocators. This pass is "required" by
98  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
99  extern char &PHIEliminationID;
100 
101  /// LiveIntervals - This analysis keeps track of the live ranges of virtual
102  /// and physical registers.
103  extern char &LiveIntervalsID;
104 
105  /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
106  extern char &LiveStacksID;
107 
108  /// TwoAddressInstruction - This pass reduces two-address instructions to
109  /// use two operands. This destroys SSA information but it is desired by
110  /// register allocators.
111  extern char &TwoAddressInstructionPassID;
112 
113  /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
114  extern char &ProcessImplicitDefsID;
115 
116  /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
117  extern char &RegisterCoalescerID;
118 
119  /// MachineScheduler - This pass schedules machine instructions.
120  extern char &MachineSchedulerID;
121 
122  /// PostMachineScheduler - This pass schedules machine instructions postRA.
123  extern char &PostMachineSchedulerID;
124 
125  /// SpillPlacement analysis. Suggest optimal placement of spill code between
126  /// basic blocks.
127  extern char &SpillPlacementID;
128 
129  /// ShrinkWrap pass. Look for the best place to insert save and restore
130  // instruction and update the MachineFunctionInfo with that information.
131  extern char &ShrinkWrapID;
132 
133  /// LiveRangeShrink pass. Move instruction close to its definition to shrink
134  /// the definition's live range.
135  extern char &LiveRangeShrinkID;
136 
137  /// Greedy register allocator.
138  extern char &RAGreedyID;
139 
140  /// Basic register allocator.
141  extern char &RABasicID;
142 
143  /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
144  /// assigned in VirtRegMap.
145  extern char &VirtRegRewriterID;
146 
147  /// UnreachableMachineBlockElimination - This pass removes unreachable
148  /// machine basic blocks.
149  extern char &UnreachableMachineBlockElimID;
150 
151  /// DeadMachineInstructionElim - This pass removes dead machine instructions.
152  extern char &DeadMachineInstructionElimID;
153 
154  /// This pass adds dead/undef flags after analyzing subregister lanes.
155  extern char &DetectDeadLanesID;
156 
157  /// FastRegisterAllocation Pass - This pass register allocates as fast as
158  /// possible. It is best suited for debug code where live ranges are short.
159  ///
160  FunctionPass *createFastRegisterAllocator();
161 
162  /// BasicRegisterAllocation Pass - This pass implements a degenerate global
163  /// register allocator using the basic regalloc framework.
164  ///
165  FunctionPass *createBasicRegisterAllocator();
166 
167  /// Greedy register allocation pass - This pass implements a global register
168  /// allocator for optimized builds.
169  ///
170  FunctionPass *createGreedyRegisterAllocator();
171 
172  /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
173  /// Quadratic Prograaming (PBQP) based register allocator.
174  ///
175  FunctionPass *createDefaultPBQPRegisterAllocator();
176 
177  /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
178  /// and eliminates abstract frame references.
179  extern char &PrologEpilogCodeInserterID;
180  MachineFunctionPass *createPrologEpilogInserterPass();
181 
182  /// ExpandPostRAPseudos - This pass expands pseudo instructions after
183  /// register allocation.
184  extern char &ExpandPostRAPseudosID;
185 
186  /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
187  /// recognizer.
188  extern char &PostRAHazardRecognizerID;
189 
190  /// createPostRAScheduler - This pass performs post register allocation
191  /// scheduling.
192  extern char &PostRASchedulerID;
193 
194  /// BranchFolding - This pass performs machine code CFG based
195  /// optimizations to delete branches to branches, eliminate branches to
196  /// successor blocks (creating fall throughs), and eliminating branches over
197  /// branches.
198  extern char &BranchFolderPassID;
199 
200  /// BranchRelaxation - This pass replaces branches that need to jump further
201  /// than is supported by a branch instruction.
202  extern char &BranchRelaxationPassID;
203 
204  /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
205  extern char &MachineFunctionPrinterPassID;
206 
207  /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
208  /// serialization format.
209  extern char &MIRPrintingPassID;
210 
211  /// TailDuplicate - Duplicate blocks with unconditional branches
212  /// into tails of their predecessors.
213  extern char &TailDuplicateID;
214 
215  /// MachineTraceMetrics - This pass computes critical path and CPU resource
216  /// usage in an ensemble of traces.
217  extern char &MachineTraceMetricsID;
218 
219  /// EarlyIfConverter - This pass performs if-conversion on SSA form by
220  /// inserting cmov instructions.
221  extern char &EarlyIfConverterID;
222 
223  /// This pass performs instruction combining using trace metrics to estimate
224  /// critical-path and resource depth.
225  extern char &MachineCombinerID;
226 
227  /// StackSlotColoring - This pass performs stack coloring and merging.
228  /// It merges disjoint allocas to reduce the stack size.
229  extern char &StackColoringID;
230 
231  /// IfConverter - This pass performs machine code if conversion.
232  extern char &IfConverterID;
233 
234  FunctionPass *createIfConverter(
235  std::function<bool(const MachineFunction &)> Ftor);
236 
237  /// MachineBlockPlacement - This pass places basic blocks based on branch
238  /// probabilities.
239  extern char &MachineBlockPlacementID;
240 
241  /// MachineBlockPlacementStats - This pass collects statistics about the
242  /// basic block placement using branch probabilities and block frequency
243  /// information.
244  extern char &MachineBlockPlacementStatsID;
245 
246  /// GCLowering Pass - Used by gc.root to perform its default lowering
247  /// operations.
248  FunctionPass *createGCLoweringPass();
249 
250  /// ShadowStackGCLowering - Implements the custom lowering mechanism
251  /// used by the shadow stack GC. Only runs on functions which opt in to
252  /// the shadow stack collector.
253  FunctionPass *createShadowStackGCLoweringPass();
254 
255  /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
256  /// in machine code. Must be added very late during code generation, just
257  /// prior to output, and importantly after all CFG transformations (such as
258  /// branch folding).
259  extern char &GCMachineCodeAnalysisID;
260 
261  /// Creates a pass to print GC metadata.
262  ///
263  FunctionPass *createGCInfoPrinter(raw_ostream &OS);
264 
265  /// MachineCSE - This pass performs global CSE on machine instructions.
266  extern char &MachineCSEID;
267 
268  /// ImplicitNullChecks - This pass folds null pointer checks into nearby
269  /// memory operations.
270  extern char &ImplicitNullChecksID;
271 
272  /// MachineLICM - This pass performs LICM on machine instructions.
273  extern char &MachineLICMID;
274 
275  /// MachineSinking - This pass performs sinking on machine instructions.
276  extern char &MachineSinkingID;
277 
278  /// MachineCopyPropagation - This pass performs copy propagation on
279  /// machine instructions.
280  extern char &MachineCopyPropagationID;
281 
282  /// PeepholeOptimizer - This pass performs peephole optimizations -
283  /// like extension and comparison eliminations.
284  extern char &PeepholeOptimizerID;
285 
286  /// OptimizePHIs - This pass optimizes machine instruction PHIs
287  /// to take advantage of opportunities created during DAG legalization.
288  extern char &OptimizePHIsID;
289 
290  /// StackSlotColoring - This pass performs stack slot coloring.
291  extern char &StackSlotColoringID;
292 
293  /// \brief This pass lays out funclets contiguously.
294  extern char &FuncletLayoutID;
295 
296  /// This pass inserts the XRay instrumentation sleds if they are supported by
297  /// the target platform.
298  extern char &XRayInstrumentationID;
299 
300  /// This pass inserts FEntry calls
301  extern char &FEntryInserterID;
302 
303  /// \brief This pass implements the "patchable-function" attribute.
304  extern char &PatchableFunctionID;
305 
306  /// createStackProtectorPass - This pass adds stack protectors to functions.
307  ///
308  FunctionPass *createStackProtectorPass();
309 
310  /// createMachineVerifierPass - This pass verifies cenerated machine code
311  /// instructions for correctness.
312  ///
313  FunctionPass *createMachineVerifierPass(const std::string& Banner);
314 
315  /// createDwarfEHPass - This pass mulches exception handling code into a form
316  /// adapted to code generation. Required if using dwarf exception handling.
317  FunctionPass *createDwarfEHPass();
318 
319  /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
320  /// in addition to the Itanium LSDA based personalities.
321  FunctionPass *createWinEHPass();
322 
323  /// createSjLjEHPreparePass - This pass adapts exception handling code to use
324  /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
325  ///
326  FunctionPass *createSjLjEHPreparePass();
327 
328  /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
329  /// slots relative to one another and allocates base registers to access them
330  /// when it is estimated by the target to be out of range of normal frame
331  /// pointer or stack pointer index addressing.
332  extern char &LocalStackSlotAllocationID;
333 
334  /// ExpandISelPseudos - This pass expands pseudo-instructions.
335  extern char &ExpandISelPseudosID;
336 
337  /// UnpackMachineBundles - This pass unpack machine instruction bundles.
338  extern char &UnpackMachineBundlesID;
339 
340  FunctionPass *
341  createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
342 
343  /// FinalizeMachineBundles - This pass finalize machine instruction
344  /// bundles (created earlier, e.g. during pre-RA scheduling).
345  extern char &FinalizeMachineBundlesID;
346 
347  /// StackMapLiveness - This pass analyses the register live-out set of
348  /// stackmap/patchpoint intrinsics and attaches the calculated information to
349  /// the intrinsic for later emission to the StackMap.
350  extern char &StackMapLivenessID;
351 
352  /// LiveDebugValues pass
353  extern char &LiveDebugValuesID;
354 
355  /// createJumpInstrTables - This pass creates jump-instruction tables.
356  ModulePass *createJumpInstrTablesPass();
357 
358  /// createForwardControlFlowIntegrityPass - This pass adds control-flow
359  /// integrity.
361 
362  /// InterleavedAccess Pass - This pass identifies and matches interleaved
363  /// memory accesses to target specific intrinsics.
364  ///
365  FunctionPass *createInterleavedAccessPass();
366 
367  /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
368  /// TLS variables for the emulated TLS model.
369  ///
370  ModulePass *createLowerEmuTLSPass();
371 
372  /// This pass lowers the @llvm.load.relative intrinsic to instructions.
373  /// This is unsafe to do earlier because a pass may combine the constant
374  /// initializer into the load, which may result in an overflowing evaluation.
376 
377  /// GlobalMerge - This pass merges internal (by default) globals into structs
378  /// to enable reuse of a base pointer by indexed addressing modes.
379  /// It can also be configured to focus on size optimizations only.
380  ///
381  Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
382  bool OnlyOptimizeForSize = false,
383  bool MergeExternalByDefault = false);
384 
385  /// This pass splits the stack into a safe stack and an unsafe stack to
386  /// protect against stack-based overflow vulnerabilities.
387  FunctionPass *createSafeStackPass();
388 
389  /// This pass detects subregister lanes in a virtual register that are used
390  /// independently of other lanes and splits them into separate virtual
391  /// registers.
392  extern char &RenameIndependentSubregsID;
393 
394  /// This pass is executed POST-RA to collect which physical registers are
395  /// preserved by given machine function.
396  FunctionPass *createRegUsageInfoCollector();
397 
398  /// Return a MachineFunction pass that identifies call sites
399  /// and propagates register usage information of callee to caller
400  /// if available with PysicalRegisterUsageInfo pass.
401  FunctionPass *createRegUsageInfoPropPass();
402 
403  /// This pass performs software pipelining on machine instructions.
404  extern char &MachinePipelinerID;
405 
406  /// This pass frees the memory occupied by the MachineFunction.
407  FunctionPass *createFreeMachineFunctionPass();
408 
409  /// This pass performs outlining on machine instructions directly before
410  /// printing assembly.
411  ModulePass *createMachineOutlinerPass(bool OutlineFromLinkOnceODRs = false);
412 
413  /// This pass expands the experimental reduction intrinsics into sequences of
414  /// shuffles.
415  FunctionPass *createExpandReductionsPass();
416 
417  // This pass expands memcmp() to load/stores.
418  FunctionPass *createExpandMemCmpPass();
419 
420 } // End llvm namespace
421 
422 #endif
FunctionPass * createExpandReductionsPass()
This pass expands the experimental reduction intrinsics into sequences of shuffles.
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
char & RenameIndependentSubregsID
This pass detects subregister lanes in a virtual register that are used independently of other lanes ...
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
char & FEntryInserterID
This pass inserts FEntry calls.
char & MachineLICMID
MachineLICM - This pass performs LICM on machine instructions.
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
char & FuncletLayoutID
This pass lays out funclets contiguously.
FunctionPass * createExpandMemCmpPass()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions...
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false, bool MergeExternalByDefault=false)
GlobalMerge - This pass merges internal (by default) globals into structs to enable reuse of a base p...
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional l...
char & RAGreedyID
Greedy register allocator.
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC...
char & DetectDeadLanesID
This pass adds dead/undef flags after analyzing subregister lanes.
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr&#39;s.
FunctionPass * createScalarizeMaskedMemIntrinPass()
createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather and scatter intrinsics with s...
MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag, bool AbortOnFailedISel)
This pass resets a MachineFunction when it has the FailedISel property as if it was just created...
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness...
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
char & MachineRegionInfoPassID
MachineRegionInfo - This pass computes SESE regions for machine functions.
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
FunctionPass * createSafeStackPass()
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
Definition: SafeStack.cpp:851
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier, e.g.
MachineFunctionPass * createPrologEpilogInserterPass()
char & XRayInstrumentationID
This pass inserts the XRay instrumentation sleds if they are supported by the target platform...
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
Definition: MachineCSE.cpp:134
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
char & ExpandISelPseudosID
ExpandISelPseudos - This pass expands pseudo-instructions.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers...
char & RABasicID
Basic register allocator.
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
Definition: GCMetadata.cpp:92
char & SpillPlacementID
SpillPlacement analysis.
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
char & LiveRangeShrinkID
LiveRangeShrink pass.
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
ModulePass * createForwardControlFlowIntegrityPass()
createForwardControlFlowIntegrityPass - This pass adds control-flow integrity.
FunctionPass * createRegUsageInfoPropPass()
Return a MachineFunction pass that identifies call sites and propagates register usage information of...
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
FunctionPass * createInterleavedAccessPass()
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
FunctionPass * createFreeMachineFunctionPass()
This pass frees the memory occupied by the MachineFunction.
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
char & LiveDebugValuesID
LiveDebugValues pass.
FunctionPass * createWinEHPass()
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
FunctionPass * createStackProtectorPass()
createStackProtectorPass - This pass adds stack protectors to functions.
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
ModulePass * createLowerEmuTLSPass()
LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...
print lazy value Lazy Value Info Printer Pass
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
char & MachinePipelinerID
This pass performs software pipelining on machine instructions.
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
FunctionPass * createUnpackMachineBundles(std::function< bool(const MachineFunction &)> Ftor)
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
FunctionPass * createCodeGenPreparePass()
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
FunctionPass * createSjLjEHPreparePass()
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
char & PostRAHazardRecognizerID
createPostRAHazardRecognizer - This pass runs the post-ra hazard recognizer.
ModulePass * createPreISelIntrinsicLoweringPass()
This pass lowers the .load.relative intrinsic to instructions.
char & VirtRegRewriterID
VirtRegRewriter pass.
Definition: VirtRegMap.cpp:212
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
ModulePass * createMachineOutlinerPass(bool OutlineFromLinkOnceODRs=false)
This pass performs outlining on machine instructions directly before printing assembly.
print Print MemDeps of function
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:232
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
FunctionPass * createAtomicExpandPass()
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.
FunctionPass * createDwarfEHPass()
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation...