LLVM  8.0.0svn
BranchFolding.cpp
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1 //===- BranchFolding.cpp - Fold machine code branch instructions ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass forwards branches to unconditional branches to make them branch
11 // directly to the target block. This pass often results in dead MBB's, which
12 // it then removes.
13 //
14 // Note that this pass must be run after register allocation, it cannot handle
15 // SSA form. It also must handle virtual registers for targets that emit virtual
16 // ISA (e.g. NVPTX).
17 //
18 //===----------------------------------------------------------------------===//
19 
20 #include "BranchFolding.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/STLExtras.h"
24 #include "llvm/ADT/SmallPtrSet.h"
25 #include "llvm/ADT/SmallSet.h"
26 #include "llvm/ADT/SmallVector.h"
27 #include "llvm/ADT/Statistic.h"
28 #include "llvm/CodeGen/Analysis.h"
48 #include "llvm/IR/DebugLoc.h"
49 #include "llvm/IR/Function.h"
50 #include "llvm/MC/LaneBitmask.h"
51 #include "llvm/MC/MCRegisterInfo.h"
52 #include "llvm/Pass.h"
56 #include "llvm/Support/Debug.h"
60 #include <cassert>
61 #include <cstddef>
62 #include <iterator>
63 #include <numeric>
64 #include <vector>
65 
66 using namespace llvm;
67 
68 #define DEBUG_TYPE "branch-folder"
69 
70 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
71 STATISTIC(NumBranchOpts, "Number of branches optimized");
72 STATISTIC(NumTailMerge , "Number of block tails merged");
73 STATISTIC(NumHoist , "Number of times common instructions are hoisted");
74 STATISTIC(NumTailCalls, "Number of tail calls optimized");
75 
76 static cl::opt<cl::boolOrDefault> FlagEnableTailMerge("enable-tail-merge",
78 
79 // Throttle for huge numbers of predecessors (compile speed problems)
80 static cl::opt<unsigned>
81 TailMergeThreshold("tail-merge-threshold",
82  cl::desc("Max number of predecessors to consider tail merging"),
83  cl::init(150), cl::Hidden);
84 
85 // Heuristic for tail merging (and, inversely, tail duplication).
86 // TODO: This should be replaced with a target query.
87 static cl::opt<unsigned>
88 TailMergeSize("tail-merge-size",
89  cl::desc("Min number of instructions to consider tail merging"),
90  cl::init(3), cl::Hidden);
91 
92 namespace {
93 
94  /// BranchFolderPass - Wrap branch folder in a machine function pass.
95  class BranchFolderPass : public MachineFunctionPass {
96  public:
97  static char ID;
98 
99  explicit BranchFolderPass(): MachineFunctionPass(ID) {}
100 
101  bool runOnMachineFunction(MachineFunction &MF) override;
102 
103  void getAnalysisUsage(AnalysisUsage &AU) const override {
108  }
109  };
110 
111 } // end anonymous namespace
112 
113 char BranchFolderPass::ID = 0;
114 
116 
117 INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
118  "Control Flow Optimizer", false, false)
119 
120 bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
121  if (skipFunction(MF.getFunction()))
122  return false;
123 
124  TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
125  // TailMerge can create jump into if branches that make CFG irreducible for
126  // HW that requires structurized CFG.
127  bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
128  PassConfig->getEnableTailMerge();
129  BranchFolder::MBFIWrapper MBBFreqInfo(
130  getAnalysis<MachineBlockFrequencyInfo>());
131  BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
132  getAnalysis<MachineBranchProbabilityInfo>());
133  return Folder.OptimizeFunction(MF, MF.getSubtarget().getInstrInfo(),
134  MF.getSubtarget().getRegisterInfo(),
135  getAnalysisIfAvailable<MachineModuleInfo>());
136 }
137 
138 BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,
139  MBFIWrapper &FreqInfo,
140  const MachineBranchProbabilityInfo &ProbInfo,
141  unsigned MinTailLength)
142  : EnableHoistCommonCode(CommonHoist), MinCommonTailLength(MinTailLength),
143  MBBFreqInfo(FreqInfo), MBPI(ProbInfo) {
144  if (MinCommonTailLength == 0)
145  MinCommonTailLength = TailMergeSize;
146  switch (FlagEnableTailMerge) {
147  case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
148  case cl::BOU_TRUE: EnableTailMerge = true; break;
149  case cl::BOU_FALSE: EnableTailMerge = false; break;
150  }
151 }
152 
153 void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
154  assert(MBB->pred_empty() && "MBB must be dead!");
155  LLVM_DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
156 
157  MachineFunction *MF = MBB->getParent();
158  // drop all successors.
159  while (!MBB->succ_empty())
160  MBB->removeSuccessor(MBB->succ_end()-1);
161 
162  // Avoid matching if this pointer gets reused.
163  TriedMerging.erase(MBB);
164 
165  // Remove the block.
166  MF->erase(MBB);
167  EHScopeMembership.erase(MBB);
168  if (MLI)
169  MLI->removeBlock(MBB);
170 }
171 
173  const TargetInstrInfo *tii,
174  const TargetRegisterInfo *tri,
175  MachineModuleInfo *mmi,
176  MachineLoopInfo *mli, bool AfterPlacement) {
177  if (!tii) return false;
178 
179  TriedMerging.clear();
180 
181  MachineRegisterInfo &MRI = MF.getRegInfo();
182  AfterBlockPlacement = AfterPlacement;
183  TII = tii;
184  TRI = tri;
185  MMI = mmi;
186  MLI = mli;
187  this->MRI = &MRI;
188 
189  UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
190  if (!UpdateLiveIns)
191  MRI.invalidateLiveness();
192 
193  // Fix CFG. The later algorithms expect it to be right.
194  bool MadeChange = false;
195  for (MachineBasicBlock &MBB : MF) {
196  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
198  if (!TII->analyzeBranch(MBB, TBB, FBB, Cond, true))
199  MadeChange |= MBB.CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
200  }
201 
202  // Recalculate EH scope membership.
203  EHScopeMembership = getEHScopeMembership(MF);
204 
205  bool MadeChangeThisIteration = true;
206  while (MadeChangeThisIteration) {
207  MadeChangeThisIteration = TailMergeBlocks(MF);
208  // No need to clean up if tail merging does not change anything after the
209  // block placement.
210  if (!AfterBlockPlacement || MadeChangeThisIteration)
211  MadeChangeThisIteration |= OptimizeBranches(MF);
212  if (EnableHoistCommonCode)
213  MadeChangeThisIteration |= HoistCommonCode(MF);
214  MadeChange |= MadeChangeThisIteration;
215  }
216 
217  // See if any jump tables have become dead as the code generator
218  // did its thing.
219  MachineJumpTableInfo *JTI = MF.getJumpTableInfo();
220  if (!JTI)
221  return MadeChange;
222 
223  // Walk the function to find jump tables that are live.
224  BitVector JTIsLive(JTI->getJumpTables().size());
225  for (const MachineBasicBlock &BB : MF) {
226  for (const MachineInstr &I : BB)
227  for (const MachineOperand &Op : I.operands()) {
228  if (!Op.isJTI()) continue;
229 
230  // Remember that this JT is live.
231  JTIsLive.set(Op.getIndex());
232  }
233  }
234 
235  // Finally, remove dead jump tables. This happens when the
236  // indirect jump was unreachable (and thus deleted).
237  for (unsigned i = 0, e = JTIsLive.size(); i != e; ++i)
238  if (!JTIsLive.test(i)) {
239  JTI->RemoveJumpTable(i);
240  MadeChange = true;
241  }
242 
243  return MadeChange;
244 }
245 
246 //===----------------------------------------------------------------------===//
247 // Tail Merging of Blocks
248 //===----------------------------------------------------------------------===//
249 
250 /// HashMachineInstr - Compute a hash value for MI and its operands.
251 static unsigned HashMachineInstr(const MachineInstr &MI) {
252  unsigned Hash = MI.getOpcode();
253  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
254  const MachineOperand &Op = MI.getOperand(i);
255 
256  // Merge in bits from the operand if easy. We can't use MachineOperand's
257  // hash_code here because it's not deterministic and we sort by hash value
258  // later.
259  unsigned OperandHash = 0;
260  switch (Op.getType()) {
262  OperandHash = Op.getReg();
263  break;
265  OperandHash = Op.getImm();
266  break;
268  OperandHash = Op.getMBB()->getNumber();
269  break;
273  OperandHash = Op.getIndex();
274  break;
277  // Global address / external symbol are too hard, don't bother, but do
278  // pull in the offset.
279  OperandHash = Op.getOffset();
280  break;
281  default:
282  break;
283  }
284 
285  Hash += ((OperandHash << 3) | Op.getType()) << (i & 31);
286  }
287  return Hash;
288 }
289 
290 /// HashEndOfMBB - Hash the last instruction in the MBB.
291 static unsigned HashEndOfMBB(const MachineBasicBlock &MBB) {
293  if (I == MBB.end())
294  return 0;
295 
296  return HashMachineInstr(*I);
297 }
298 
299 /// Whether MI should be counted as an instruction when calculating common tail.
300 static bool countsAsInstruction(const MachineInstr &MI) {
301  return !(MI.isDebugValue() || MI.isCFIInstruction());
302 }
303 
304 /// ComputeCommonTailLength - Given two machine basic blocks, compute the number
305 /// of instructions they actually have in common together at their end. Return
306 /// iterators for the first shared instruction in each block.
308  MachineBasicBlock *MBB2,
311  I1 = MBB1->end();
312  I2 = MBB2->end();
313 
314  unsigned TailLen = 0;
315  while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
316  --I1; --I2;
317  // Skip debugging pseudos; necessary to avoid changing the code.
318  while (!countsAsInstruction(*I1)) {
319  if (I1==MBB1->begin()) {
320  while (!countsAsInstruction(*I2)) {
321  if (I2==MBB2->begin()) {
322  // I1==DBG at begin; I2==DBG at begin
323  goto SkipTopCFIAndReturn;
324  }
325  --I2;
326  }
327  ++I2;
328  // I1==DBG at begin; I2==non-DBG, or first of DBGs not at begin
329  goto SkipTopCFIAndReturn;
330  }
331  --I1;
332  }
333  // I1==first (untested) non-DBG preceding known match
334  while (!countsAsInstruction(*I2)) {
335  if (I2==MBB2->begin()) {
336  ++I1;
337  // I1==non-DBG, or first of DBGs not at begin; I2==DBG at begin
338  goto SkipTopCFIAndReturn;
339  }
340  --I2;
341  }
342  // I1, I2==first (untested) non-DBGs preceding known match
343  if (!I1->isIdenticalTo(*I2) ||
344  // FIXME: This check is dubious. It's used to get around a problem where
345  // people incorrectly expect inline asm directives to remain in the same
346  // relative order. This is untenable because normal compiler
347  // optimizations (like this one) may reorder and/or merge these
348  // directives.
349  I1->isInlineAsm()) {
350  ++I1; ++I2;
351  break;
352  }
353  ++TailLen;
354  }
355  // Back past possible debugging pseudos at beginning of block. This matters
356  // when one block differs from the other only by whether debugging pseudos
357  // are present at the beginning. (This way, the various checks later for
358  // I1==MBB1->begin() work as expected.)
359  if (I1 == MBB1->begin() && I2 != MBB2->begin()) {
360  --I2;
361  while (I2->isDebugInstr()) {
362  if (I2 == MBB2->begin())
363  return TailLen;
364  --I2;
365  }
366  ++I2;
367  }
368  if (I2 == MBB2->begin() && I1 != MBB1->begin()) {
369  --I1;
370  while (I1->isDebugInstr()) {
371  if (I1 == MBB1->begin())
372  return TailLen;
373  --I1;
374  }
375  ++I1;
376  }
377 
378 SkipTopCFIAndReturn:
379  // Ensure that I1 and I2 do not point to a CFI_INSTRUCTION. This can happen if
380  // I1 and I2 are non-identical when compared and then one or both of them ends
381  // up pointing to a CFI instruction after being incremented. For example:
382  /*
383  BB1:
384  ...
385  INSTRUCTION_A
386  ADD32ri8 <- last common instruction
387  ...
388  BB2:
389  ...
390  INSTRUCTION_B
391  CFI_INSTRUCTION
392  ADD32ri8 <- last common instruction
393  ...
394  */
395  // When INSTRUCTION_A and INSTRUCTION_B are compared as not equal, after
396  // incrementing the iterators, I1 will point to ADD, however I2 will point to
397  // the CFI instruction. Later on, this leads to BB2 being 'hacked off' at the
398  // wrong place (in ReplaceTailWithBranchTo()) which results in losing this CFI
399  // instruction.
400  while (I1 != MBB1->end() && I1->isCFIInstruction()) {
401  ++I1;
402  }
403 
404  while (I2 != MBB2->end() && I2->isCFIInstruction()) {
405  ++I2;
406  }
407 
408  return TailLen;
409 }
410 
411 void BranchFolder::replaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
412  MachineBasicBlock &NewDest) {
413  if (UpdateLiveIns) {
414  // OldInst should always point to an instruction.
415  MachineBasicBlock &OldMBB = *OldInst->getParent();
416  LiveRegs.clear();
417  LiveRegs.addLiveOuts(OldMBB);
418  // Move backward to the place where will insert the jump.
419  MachineBasicBlock::iterator I = OldMBB.end();
420  do {
421  --I;
422  LiveRegs.stepBackward(*I);
423  } while (I != OldInst);
424 
425  // Merging the tails may have switched some undef operand to non-undef ones.
426  // Add IMPLICIT_DEFS into OldMBB as necessary to have a definition of the
427  // register.
428  for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) {
429  // We computed the liveins with computeLiveIn earlier and should only see
430  // full registers:
431  assert(P.LaneMask == LaneBitmask::getAll() &&
432  "Can only handle full register.");
433  MCPhysReg Reg = P.PhysReg;
434  if (!LiveRegs.available(*MRI, Reg))
435  continue;
436  DebugLoc DL;
437  BuildMI(OldMBB, OldInst, DL, TII->get(TargetOpcode::IMPLICIT_DEF), Reg);
438  }
439  }
440 
441  TII->ReplaceTailWithBranchTo(OldInst, &NewDest);
442  ++NumTailMerge;
443 }
444 
445 MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
447  const BasicBlock *BB) {
448  if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
449  return nullptr;
450 
451  MachineFunction &MF = *CurMBB.getParent();
452 
453  // Create the fall-through block.
454  MachineFunction::iterator MBBI = CurMBB.getIterator();
456  CurMBB.getParent()->insert(++MBBI, NewMBB);
457 
458  // Move all the successors of this block to the specified block.
459  NewMBB->transferSuccessors(&CurMBB);
460 
461  // Add an edge from CurMBB to NewMBB for the fall-through.
462  CurMBB.addSuccessor(NewMBB);
463 
464  // Splice the code over.
465  NewMBB->splice(NewMBB->end(), &CurMBB, BBI1, CurMBB.end());
466 
467  // NewMBB belongs to the same loop as CurMBB.
468  if (MLI)
469  if (MachineLoop *ML = MLI->getLoopFor(&CurMBB))
470  ML->addBasicBlockToLoop(NewMBB, MLI->getBase());
471 
472  // NewMBB inherits CurMBB's block frequency.
473  MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
474 
475  if (UpdateLiveIns)
476  computeAndAddLiveIns(LiveRegs, *NewMBB);
477 
478  // Add the new block to the EH scope.
479  const auto &EHScopeI = EHScopeMembership.find(&CurMBB);
480  if (EHScopeI != EHScopeMembership.end()) {
481  auto n = EHScopeI->second;
482  EHScopeMembership[NewMBB] = n;
483  }
484 
485  return NewMBB;
486 }
487 
488 /// EstimateRuntime - Make a rough estimate for how long it will take to run
489 /// the specified code.
492  unsigned Time = 0;
493  for (; I != E; ++I) {
494  if (!countsAsInstruction(*I))
495  continue;
496  if (I->isCall())
497  Time += 10;
498  else if (I->mayLoad() || I->mayStore())
499  Time += 2;
500  else
501  ++Time;
502  }
503  return Time;
504 }
505 
506 // CurMBB needs to add an unconditional branch to SuccMBB (we removed these
507 // branches temporarily for tail merging). In the case where CurMBB ends
508 // with a conditional branch to the next block, optimize by reversing the
509 // test and conditionally branching to SuccMBB instead.
510 static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
511  const TargetInstrInfo *TII) {
512  MachineFunction *MF = CurMBB->getParent();
514  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
516  DebugLoc dl = CurMBB->findBranchDebugLoc();
517  if (I != MF->end() && !TII->analyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
518  MachineBasicBlock *NextBB = &*I;
519  if (TBB == NextBB && !Cond.empty() && !FBB) {
520  if (!TII->reverseBranchCondition(Cond)) {
521  TII->removeBranch(*CurMBB);
522  TII->insertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
523  return;
524  }
525  }
526  }
527  TII->insertBranch(*CurMBB, SuccBB, nullptr,
529 }
530 
531 bool
532 BranchFolder::MergePotentialsElt::operator<(const MergePotentialsElt &o) const {
533  if (getHash() < o.getHash())
534  return true;
535  if (getHash() > o.getHash())
536  return false;
537  if (getBlock()->getNumber() < o.getBlock()->getNumber())
538  return true;
539  if (getBlock()->getNumber() > o.getBlock()->getNumber())
540  return false;
541  // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
542  // an object with itself.
543 #ifndef _GLIBCXX_DEBUG
544  llvm_unreachable("Predecessor appears twice");
545 #else
546  return false;
547 #endif
548 }
549 
552  auto I = MergedBBFreq.find(MBB);
553 
554  if (I != MergedBBFreq.end())
555  return I->second;
556 
557  return MBFI.getBlockFreq(MBB);
558 }
559 
561  BlockFrequency F) {
562  MergedBBFreq[MBB] = F;
563 }
564 
565 raw_ostream &
567  const MachineBasicBlock *MBB) const {
568  return MBFI.printBlockFreq(OS, getBlockFreq(MBB));
569 }
570 
571 raw_ostream &
573  const BlockFrequency Freq) const {
574  return MBFI.printBlockFreq(OS, Freq);
575 }
576 
578  MBFI.view(Name, isSimple);
579 }
580 
581 uint64_t
583  return MBFI.getEntryFreq();
584 }
585 
586 /// CountTerminators - Count the number of terminators in the given
587 /// block and set I to the position of the first non-terminator, if there
588 /// is one, or MBB->end() otherwise.
589 static unsigned CountTerminators(MachineBasicBlock *MBB,
591  I = MBB->end();
592  unsigned NumTerms = 0;
593  while (true) {
594  if (I == MBB->begin()) {
595  I = MBB->end();
596  break;
597  }
598  --I;
599  if (!I->isTerminator()) break;
600  ++NumTerms;
601  }
602  return NumTerms;
603 }
604 
605 /// A no successor, non-return block probably ends in unreachable and is cold.
606 /// Also consider a block that ends in an indirect branch to be a return block,
607 /// since many targets use plain indirect branches to return.
608 static bool blockEndsInUnreachable(const MachineBasicBlock *MBB) {
609  if (!MBB->succ_empty())
610  return false;
611  if (MBB->empty())
612  return true;
613  return !(MBB->back().isReturn() || MBB->back().isIndirectBranch());
614 }
615 
616 /// ProfitableToMerge - Check if two machine basic blocks have a common tail
617 /// and decide if it would be profitable to merge those tails. Return the
618 /// length of the common tail and iterators to the first common instruction
619 /// in each block.
620 /// MBB1, MBB2 The blocks to check
621 /// MinCommonTailLength Minimum size of tail block to be merged.
622 /// CommonTailLen Out parameter to record the size of the shared tail between
623 /// MBB1 and MBB2
624 /// I1, I2 Iterator references that will be changed to point to the first
625 /// instruction in the common tail shared by MBB1,MBB2
626 /// SuccBB A common successor of MBB1, MBB2 which are in a canonical form
627 /// relative to SuccBB
628 /// PredBB The layout predecessor of SuccBB, if any.
629 /// EHScopeMembership map from block to EH scope #.
630 /// AfterPlacement True if we are merging blocks after layout. Stricter
631 /// thresholds apply to prevent undoing tail-duplication.
632 static bool
634  unsigned MinCommonTailLength, unsigned &CommonTailLen,
637  MachineBasicBlock *PredBB,
638  DenseMap<const MachineBasicBlock *, int> &EHScopeMembership,
639  bool AfterPlacement) {
640  // It is never profitable to tail-merge blocks from two different EH scopes.
641  if (!EHScopeMembership.empty()) {
642  auto EHScope1 = EHScopeMembership.find(MBB1);
643  assert(EHScope1 != EHScopeMembership.end());
644  auto EHScope2 = EHScopeMembership.find(MBB2);
645  assert(EHScope2 != EHScopeMembership.end());
646  if (EHScope1->second != EHScope2->second)
647  return false;
648  }
649 
650  CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2);
651  if (CommonTailLen == 0)
652  return false;
653  LLVM_DEBUG(dbgs() << "Common tail length of " << printMBBReference(*MBB1)
654  << " and " << printMBBReference(*MBB2) << " is "
655  << CommonTailLen << '\n');
656 
657  // It's almost always profitable to merge any number of non-terminator
658  // instructions with the block that falls through into the common successor.
659  // This is true only for a single successor. For multiple successors, we are
660  // trading a conditional branch for an unconditional one.
661  // TODO: Re-visit successor size for non-layout tail merging.
662  if ((MBB1 == PredBB || MBB2 == PredBB) &&
663  (!AfterPlacement || MBB1->succ_size() == 1)) {
665  unsigned NumTerms = CountTerminators(MBB1 == PredBB ? MBB2 : MBB1, I);
666  if (CommonTailLen > NumTerms)
667  return true;
668  }
669 
670  // If these are identical non-return blocks with no successors, merge them.
671  // Such blocks are typically cold calls to noreturn functions like abort, and
672  // are unlikely to become a fallthrough target after machine block placement.
673  // Tail merging these blocks is unlikely to create additional unconditional
674  // branches, and will reduce the size of this cold code.
675  if (I1 == MBB1->begin() && I2 == MBB2->begin() &&
677  return true;
678 
679  // If one of the blocks can be completely merged and happens to be in
680  // a position where the other could fall through into it, merge any number
681  // of instructions, because it can be done without a branch.
682  // TODO: If the blocks are not adjacent, move one of them so that they are?
683  if (MBB1->isLayoutSuccessor(MBB2) && I2 == MBB2->begin())
684  return true;
685  if (MBB2->isLayoutSuccessor(MBB1) && I1 == MBB1->begin())
686  return true;
687 
688  // If both blocks are identical and end in a branch, merge them unless they
689  // both have a fallthrough predecessor and successor.
690  // We can only do this after block placement because it depends on whether
691  // there are fallthroughs, and we don't know until after layout.
692  if (AfterPlacement && I1 == MBB1->begin() && I2 == MBB2->begin()) {
693  auto BothFallThrough = [](MachineBasicBlock *MBB) {
694  if (MBB->succ_size() != 0 && !MBB->canFallThrough())
695  return false;
697  MachineFunction *MF = MBB->getParent();
698  return (MBB != &*MF->begin()) && std::prev(I)->canFallThrough();
699  };
700  if (!BothFallThrough(MBB1) || !BothFallThrough(MBB2))
701  return true;
702  }
703 
704  // If both blocks have an unconditional branch temporarily stripped out,
705  // count that as an additional common instruction for the following
706  // heuristics. This heuristic is only accurate for single-succ blocks, so to
707  // make sure that during layout merging and duplicating don't crash, we check
708  // for that when merging during layout.
709  unsigned EffectiveTailLen = CommonTailLen;
710  if (SuccBB && MBB1 != PredBB && MBB2 != PredBB &&
711  (MBB1->succ_size() == 1 || !AfterPlacement) &&
712  !MBB1->back().isBarrier() &&
713  !MBB2->back().isBarrier())
714  ++EffectiveTailLen;
715 
716  // Check if the common tail is long enough to be worthwhile.
717  if (EffectiveTailLen >= MinCommonTailLength)
718  return true;
719 
720  // If we are optimizing for code size, 2 instructions in common is enough if
721  // we don't have to split a block. At worst we will be introducing 1 new
722  // branch instruction, which is likely to be smaller than the 2
723  // instructions that would be deleted in the merge.
724  MachineFunction *MF = MBB1->getParent();
725  return EffectiveTailLen >= 2 && MF->getFunction().optForSize() &&
726  (I1 == MBB1->begin() || I2 == MBB2->begin());
727 }
728 
729 unsigned BranchFolder::ComputeSameTails(unsigned CurHash,
730  unsigned MinCommonTailLength,
731  MachineBasicBlock *SuccBB,
732  MachineBasicBlock *PredBB) {
733  unsigned maxCommonTailLength = 0U;
734  SameTails.clear();
735  MachineBasicBlock::iterator TrialBBI1, TrialBBI2;
736  MPIterator HighestMPIter = std::prev(MergePotentials.end());
737  for (MPIterator CurMPIter = std::prev(MergePotentials.end()),
738  B = MergePotentials.begin();
739  CurMPIter != B && CurMPIter->getHash() == CurHash; --CurMPIter) {
740  for (MPIterator I = std::prev(CurMPIter); I->getHash() == CurHash; --I) {
741  unsigned CommonTailLen;
742  if (ProfitableToMerge(CurMPIter->getBlock(), I->getBlock(),
743  MinCommonTailLength,
744  CommonTailLen, TrialBBI1, TrialBBI2,
745  SuccBB, PredBB,
746  EHScopeMembership,
747  AfterBlockPlacement)) {
748  if (CommonTailLen > maxCommonTailLength) {
749  SameTails.clear();
750  maxCommonTailLength = CommonTailLen;
751  HighestMPIter = CurMPIter;
752  SameTails.push_back(SameTailElt(CurMPIter, TrialBBI1));
753  }
754  if (HighestMPIter == CurMPIter &&
755  CommonTailLen == maxCommonTailLength)
756  SameTails.push_back(SameTailElt(I, TrialBBI2));
757  }
758  if (I == B)
759  break;
760  }
761  }
762  return maxCommonTailLength;
763 }
764 
765 void BranchFolder::RemoveBlocksWithHash(unsigned CurHash,
766  MachineBasicBlock *SuccBB,
767  MachineBasicBlock *PredBB) {
768  MPIterator CurMPIter, B;
769  for (CurMPIter = std::prev(MergePotentials.end()),
770  B = MergePotentials.begin();
771  CurMPIter->getHash() == CurHash; --CurMPIter) {
772  // Put the unconditional branch back, if we need one.
773  MachineBasicBlock *CurMBB = CurMPIter->getBlock();
774  if (SuccBB && CurMBB != PredBB)
775  FixTail(CurMBB, SuccBB, TII);
776  if (CurMPIter == B)
777  break;
778  }
779  if (CurMPIter->getHash() != CurHash)
780  CurMPIter++;
781  MergePotentials.erase(CurMPIter, MergePotentials.end());
782 }
783 
784 bool BranchFolder::CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
785  MachineBasicBlock *SuccBB,
786  unsigned maxCommonTailLength,
787  unsigned &commonTailIndex) {
788  commonTailIndex = 0;
789  unsigned TimeEstimate = ~0U;
790  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
791  // Use PredBB if possible; that doesn't require a new branch.
792  if (SameTails[i].getBlock() == PredBB) {
793  commonTailIndex = i;
794  break;
795  }
796  // Otherwise, make a (fairly bogus) choice based on estimate of
797  // how long it will take the various blocks to execute.
798  unsigned t = EstimateRuntime(SameTails[i].getBlock()->begin(),
799  SameTails[i].getTailStartPos());
800  if (t <= TimeEstimate) {
801  TimeEstimate = t;
802  commonTailIndex = i;
803  }
804  }
805 
807  SameTails[commonTailIndex].getTailStartPos();
808  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
809 
810  LLVM_DEBUG(dbgs() << "\nSplitting " << printMBBReference(*MBB) << ", size "
811  << maxCommonTailLength);
812 
813  // If the split block unconditionally falls-thru to SuccBB, it will be
814  // merged. In control flow terms it should then take SuccBB's name. e.g. If
815  // SuccBB is an inner loop, the common tail is still part of the inner loop.
816  const BasicBlock *BB = (SuccBB && MBB->succ_size() == 1) ?
817  SuccBB->getBasicBlock() : MBB->getBasicBlock();
818  MachineBasicBlock *newMBB = SplitMBBAt(*MBB, BBI, BB);
819  if (!newMBB) {
820  LLVM_DEBUG(dbgs() << "... failed!");
821  return false;
822  }
823 
824  SameTails[commonTailIndex].setBlock(newMBB);
825  SameTails[commonTailIndex].setTailStartPos(newMBB->begin());
826 
827  // If we split PredBB, newMBB is the new predecessor.
828  if (PredBB == MBB)
829  PredBB = newMBB;
830 
831  return true;
832 }
833 
834 static void
836  MachineBasicBlock &MBBCommon) {
837  MachineBasicBlock *MBB = MBBIStartPos->getParent();
838  // Note CommonTailLen does not necessarily matches the size of
839  // the common BB nor all its instructions because of debug
840  // instructions differences.
841  unsigned CommonTailLen = 0;
842  for (auto E = MBB->end(); MBBIStartPos != E; ++MBBIStartPos)
843  ++CommonTailLen;
844 
847  MachineBasicBlock::reverse_iterator MBBICommon = MBBCommon.rbegin();
848  MachineBasicBlock::reverse_iterator MBBIECommon = MBBCommon.rend();
849 
850  while (CommonTailLen--) {
851  assert(MBBI != MBBIE && "Reached BB end within common tail length!");
852  (void)MBBIE;
853 
854  if (!countsAsInstruction(*MBBI)) {
855  ++MBBI;
856  continue;
857  }
858 
859  while ((MBBICommon != MBBIECommon) && !countsAsInstruction(*MBBICommon))
860  ++MBBICommon;
861 
862  assert(MBBICommon != MBBIECommon &&
863  "Reached BB end within common tail length!");
864  assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
865 
866  // Merge MMOs from memory operations in the common block.
867  if (MBBICommon->mayLoad() || MBBICommon->mayStore())
868  MBBICommon->cloneMergedMemRefs(*MBB->getParent(), {&*MBBICommon, &*MBBI});
869  // Drop undef flags if they aren't present in all merged instructions.
870  for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
871  MachineOperand &MO = MBBICommon->getOperand(I);
872  if (MO.isReg() && MO.isUndef()) {
873  const MachineOperand &OtherMO = MBBI->getOperand(I);
874  if (!OtherMO.isUndef())
875  MO.setIsUndef(false);
876  }
877  }
878 
879  ++MBBI;
880  ++MBBICommon;
881  }
882 }
883 
884 void BranchFolder::mergeCommonTails(unsigned commonTailIndex) {
885  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
886 
887  std::vector<MachineBasicBlock::iterator> NextCommonInsts(SameTails.size());
888  for (unsigned int i = 0 ; i != SameTails.size() ; ++i) {
889  if (i != commonTailIndex) {
890  NextCommonInsts[i] = SameTails[i].getTailStartPos();
891  mergeOperations(SameTails[i].getTailStartPos(), *MBB);
892  } else {
893  assert(SameTails[i].getTailStartPos() == MBB->begin() &&
894  "MBB is not a common tail only block");
895  }
896  }
897 
898  for (auto &MI : *MBB) {
899  if (!countsAsInstruction(MI))
900  continue;
901  DebugLoc DL = MI.getDebugLoc();
902  for (unsigned int i = 0 ; i < NextCommonInsts.size() ; i++) {
903  if (i == commonTailIndex)
904  continue;
905 
906  auto &Pos = NextCommonInsts[i];
907  assert(Pos != SameTails[i].getBlock()->end() &&
908  "Reached BB end within common tail");
909  while (!countsAsInstruction(*Pos)) {
910  ++Pos;
911  assert(Pos != SameTails[i].getBlock()->end() &&
912  "Reached BB end within common tail");
913  }
914  assert(MI.isIdenticalTo(*Pos) && "Expected matching MIIs!");
915  DL = DILocation::getMergedLocation(DL, Pos->getDebugLoc());
916  NextCommonInsts[i] = ++Pos;
917  }
918  MI.setDebugLoc(DL);
919  }
920 
921  if (UpdateLiveIns) {
922  LivePhysRegs NewLiveIns(*TRI);
923  computeLiveIns(NewLiveIns, *MBB);
924  LiveRegs.init(*TRI);
925 
926  // The flag merging may lead to some register uses no longer using the
927  // <undef> flag, add IMPLICIT_DEFs in the predecessors as necessary.
928  for (MachineBasicBlock *Pred : MBB->predecessors()) {
929  LiveRegs.clear();
930  LiveRegs.addLiveOuts(*Pred);
931  MachineBasicBlock::iterator InsertBefore = Pred->getFirstTerminator();
932  for (unsigned Reg : NewLiveIns) {
933  if (!LiveRegs.available(*MRI, Reg))
934  continue;
935  DebugLoc DL;
936  BuildMI(*Pred, InsertBefore, DL, TII->get(TargetOpcode::IMPLICIT_DEF),
937  Reg);
938  }
939  }
940 
941  MBB->clearLiveIns();
942  addLiveIns(*MBB, NewLiveIns);
943  }
944 }
945 
946 // See if any of the blocks in MergePotentials (which all have SuccBB as a
947 // successor, or all have no successor if it is null) can be tail-merged.
948 // If there is a successor, any blocks in MergePotentials that are not
949 // tail-merged and are not immediately before Succ must have an unconditional
950 // branch to Succ added (but the predecessor/successor lists need no
951 // adjustment). The lone predecessor of Succ that falls through into Succ,
952 // if any, is given in PredBB.
953 // MinCommonTailLength - Except for the special cases below, tail-merge if
954 // there are at least this many instructions in common.
955 bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
956  MachineBasicBlock *PredBB,
957  unsigned MinCommonTailLength) {
958  bool MadeChange = false;
959 
960  LLVM_DEBUG(
961  dbgs() << "\nTryTailMergeBlocks: ";
962  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i) dbgs()
963  << printMBBReference(*MergePotentials[i].getBlock())
964  << (i == e - 1 ? "" : ", ");
965  dbgs() << "\n"; if (SuccBB) {
966  dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
967  if (PredBB)
968  dbgs() << " which has fall-through from "
969  << printMBBReference(*PredBB) << "\n";
970  } dbgs() << "Looking for common tails of at least "
971  << MinCommonTailLength << " instruction"
972  << (MinCommonTailLength == 1 ? "" : "s") << '\n';);
973 
974  // Sort by hash value so that blocks with identical end sequences sort
975  // together.
976  array_pod_sort(MergePotentials.begin(), MergePotentials.end());
977 
978  // Walk through equivalence sets looking for actual exact matches.
979  while (MergePotentials.size() > 1) {
980  unsigned CurHash = MergePotentials.back().getHash();
981 
982  // Build SameTails, identifying the set of blocks with this hash code
983  // and with the maximum number of instructions in common.
984  unsigned maxCommonTailLength = ComputeSameTails(CurHash,
985  MinCommonTailLength,
986  SuccBB, PredBB);
987 
988  // If we didn't find any pair that has at least MinCommonTailLength
989  // instructions in common, remove all blocks with this hash code and retry.
990  if (SameTails.empty()) {
991  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
992  continue;
993  }
994 
995  // If one of the blocks is the entire common tail (and not the entry
996  // block, which we can't jump to), we can treat all blocks with this same
997  // tail at once. Use PredBB if that is one of the possibilities, as that
998  // will not introduce any extra branches.
999  MachineBasicBlock *EntryBB =
1000  &MergePotentials.front().getBlock()->getParent()->front();
1001  unsigned commonTailIndex = SameTails.size();
1002  // If there are two blocks, check to see if one can be made to fall through
1003  // into the other.
1004  if (SameTails.size() == 2 &&
1005  SameTails[0].getBlock()->isLayoutSuccessor(SameTails[1].getBlock()) &&
1006  SameTails[1].tailIsWholeBlock())
1007  commonTailIndex = 1;
1008  else if (SameTails.size() == 2 &&
1009  SameTails[1].getBlock()->isLayoutSuccessor(
1010  SameTails[0].getBlock()) &&
1011  SameTails[0].tailIsWholeBlock())
1012  commonTailIndex = 0;
1013  else {
1014  // Otherwise just pick one, favoring the fall-through predecessor if
1015  // there is one.
1016  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
1017  MachineBasicBlock *MBB = SameTails[i].getBlock();
1018  if (MBB == EntryBB && SameTails[i].tailIsWholeBlock())
1019  continue;
1020  if (MBB == PredBB) {
1021  commonTailIndex = i;
1022  break;
1023  }
1024  if (SameTails[i].tailIsWholeBlock())
1025  commonTailIndex = i;
1026  }
1027  }
1028 
1029  if (commonTailIndex == SameTails.size() ||
1030  (SameTails[commonTailIndex].getBlock() == PredBB &&
1031  !SameTails[commonTailIndex].tailIsWholeBlock())) {
1032  // None of the blocks consist entirely of the common tail.
1033  // Split a block so that one does.
1034  if (!CreateCommonTailOnlyBlock(PredBB, SuccBB,
1035  maxCommonTailLength, commonTailIndex)) {
1036  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
1037  continue;
1038  }
1039  }
1040 
1041  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
1042 
1043  // Recompute common tail MBB's edge weights and block frequency.
1044  setCommonTailEdgeWeights(*MBB);
1045 
1046  // Merge debug locations, MMOs and undef flags across identical instructions
1047  // for common tail.
1048  mergeCommonTails(commonTailIndex);
1049 
1050  // MBB is common tail. Adjust all other BB's to jump to this one.
1051  // Traversal must be forwards so erases work.
1052  LLVM_DEBUG(dbgs() << "\nUsing common tail in " << printMBBReference(*MBB)
1053  << " for ");
1054  for (unsigned int i=0, e = SameTails.size(); i != e; ++i) {
1055  if (commonTailIndex == i)
1056  continue;
1057  LLVM_DEBUG(dbgs() << printMBBReference(*SameTails[i].getBlock())
1058  << (i == e - 1 ? "" : ", "));
1059  // Hack the end off BB i, making it jump to BB commonTailIndex instead.
1060  replaceTailWithBranchTo(SameTails[i].getTailStartPos(), *MBB);
1061  // BB i is no longer a predecessor of SuccBB; remove it from the worklist.
1062  MergePotentials.erase(SameTails[i].getMPIter());
1063  }
1064  LLVM_DEBUG(dbgs() << "\n");
1065  // We leave commonTailIndex in the worklist in case there are other blocks
1066  // that match it with a smaller number of instructions.
1067  MadeChange = true;
1068  }
1069  return MadeChange;
1070 }
1071 
1072 bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
1073  bool MadeChange = false;
1074  if (!EnableTailMerge) return MadeChange;
1075 
1076  // First find blocks with no successors.
1077  // Block placement does not create new tail merging opportunities for these
1078  // blocks.
1079  if (!AfterBlockPlacement) {
1080  MergePotentials.clear();
1081  for (MachineBasicBlock &MBB : MF) {
1082  if (MergePotentials.size() == TailMergeThreshold)
1083  break;
1084  if (!TriedMerging.count(&MBB) && MBB.succ_empty())
1085  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(MBB), &MBB));
1086  }
1087 
1088  // If this is a large problem, avoid visiting the same basic blocks
1089  // multiple times.
1090  if (MergePotentials.size() == TailMergeThreshold)
1091  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1092  TriedMerging.insert(MergePotentials[i].getBlock());
1093 
1094  // See if we can do any tail merging on those.
1095  if (MergePotentials.size() >= 2)
1096  MadeChange |= TryTailMergeBlocks(nullptr, nullptr, MinCommonTailLength);
1097  }
1098 
1099  // Look at blocks (IBB) with multiple predecessors (PBB).
1100  // We change each predecessor to a canonical form, by
1101  // (1) temporarily removing any unconditional branch from the predecessor
1102  // to IBB, and
1103  // (2) alter conditional branches so they branch to the other block
1104  // not IBB; this may require adding back an unconditional branch to IBB
1105  // later, where there wasn't one coming in. E.g.
1106  // Bcc IBB
1107  // fallthrough to QBB
1108  // here becomes
1109  // Bncc QBB
1110  // with a conceptual B to IBB after that, which never actually exists.
1111  // With those changes, we see whether the predecessors' tails match,
1112  // and merge them if so. We change things out of canonical form and
1113  // back to the way they were later in the process. (OptimizeBranches
1114  // would undo some of this, but we can't use it, because we'd get into
1115  // a compile-time infinite loop repeatedly doing and undoing the same
1116  // transformations.)
1117 
1118  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1119  I != E; ++I) {
1120  if (I->pred_size() < 2) continue;
1122  MachineBasicBlock *IBB = &*I;
1123  MachineBasicBlock *PredBB = &*std::prev(I);
1124  MergePotentials.clear();
1125  MachineLoop *ML;
1126 
1127  // Bail if merging after placement and IBB is the loop header because
1128  // -- If merging predecessors that belong to the same loop as IBB, the
1129  // common tail of merged predecessors may become the loop top if block
1130  // placement is called again and the predecessors may branch to this common
1131  // tail and require more branches. This can be relaxed if
1132  // MachineBlockPlacement::findBestLoopTop is more flexible.
1133  // --If merging predecessors that do not belong to the same loop as IBB, the
1134  // loop info of IBB's loop and the other loops may be affected. Calling the
1135  // block placement again may make big change to the layout and eliminate the
1136  // reason to do tail merging here.
1137  if (AfterBlockPlacement && MLI) {
1138  ML = MLI->getLoopFor(IBB);
1139  if (ML && IBB == ML->getHeader())
1140  continue;
1141  }
1142 
1143  for (MachineBasicBlock *PBB : I->predecessors()) {
1144  if (MergePotentials.size() == TailMergeThreshold)
1145  break;
1146 
1147  if (TriedMerging.count(PBB))
1148  continue;
1149 
1150  // Skip blocks that loop to themselves, can't tail merge these.
1151  if (PBB == IBB)
1152  continue;
1153 
1154  // Visit each predecessor only once.
1155  if (!UniquePreds.insert(PBB).second)
1156  continue;
1157 
1158  // Skip blocks which may jump to a landing pad. Can't tail merge these.
1159  if (PBB->hasEHPadSuccessor())
1160  continue;
1161 
1162  // After block placement, only consider predecessors that belong to the
1163  // same loop as IBB. The reason is the same as above when skipping loop
1164  // header.
1165  if (AfterBlockPlacement && MLI)
1166  if (ML != MLI->getLoopFor(PBB))
1167  continue;
1168 
1169  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1171  if (!TII->analyzeBranch(*PBB, TBB, FBB, Cond, true)) {
1172  // Failing case: IBB is the target of a cbr, and we cannot reverse the
1173  // branch.
1174  SmallVector<MachineOperand, 4> NewCond(Cond);
1175  if (!Cond.empty() && TBB == IBB) {
1176  if (TII->reverseBranchCondition(NewCond))
1177  continue;
1178  // This is the QBB case described above
1179  if (!FBB) {
1180  auto Next = ++PBB->getIterator();
1181  if (Next != MF.end())
1182  FBB = &*Next;
1183  }
1184  }
1185 
1186  // Failing case: the only way IBB can be reached from PBB is via
1187  // exception handling. Happens for landing pads. Would be nice to have
1188  // a bit in the edge so we didn't have to do all this.
1189  if (IBB->isEHPad()) {
1190  MachineFunction::iterator IP = ++PBB->getIterator();
1191  MachineBasicBlock *PredNextBB = nullptr;
1192  if (IP != MF.end())
1193  PredNextBB = &*IP;
1194  if (!TBB) {
1195  if (IBB != PredNextBB) // fallthrough
1196  continue;
1197  } else if (FBB) {
1198  if (TBB != IBB && FBB != IBB) // cbr then ubr
1199  continue;
1200  } else if (Cond.empty()) {
1201  if (TBB != IBB) // ubr
1202  continue;
1203  } else {
1204  if (TBB != IBB && IBB != PredNextBB) // cbr
1205  continue;
1206  }
1207  }
1208 
1209  // Remove the unconditional branch at the end, if any.
1210  if (TBB && (Cond.empty() || FBB)) {
1211  DebugLoc dl = PBB->findBranchDebugLoc();
1212  TII->removeBranch(*PBB);
1213  if (!Cond.empty())
1214  // reinsert conditional branch only, for now
1215  TII->insertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
1216  NewCond, dl);
1217  }
1218 
1219  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(*PBB), PBB));
1220  }
1221  }
1222 
1223  // If this is a large problem, avoid visiting the same basic blocks multiple
1224  // times.
1225  if (MergePotentials.size() == TailMergeThreshold)
1226  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1227  TriedMerging.insert(MergePotentials[i].getBlock());
1228 
1229  if (MergePotentials.size() >= 2)
1230  MadeChange |= TryTailMergeBlocks(IBB, PredBB, MinCommonTailLength);
1231 
1232  // Reinsert an unconditional branch if needed. The 1 below can occur as a
1233  // result of removing blocks in TryTailMergeBlocks.
1234  PredBB = &*std::prev(I); // this may have been changed in TryTailMergeBlocks
1235  if (MergePotentials.size() == 1 &&
1236  MergePotentials.begin()->getBlock() != PredBB)
1237  FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
1238  }
1239 
1240  return MadeChange;
1241 }
1242 
1243 void BranchFolder::setCommonTailEdgeWeights(MachineBasicBlock &TailMBB) {
1244  SmallVector<BlockFrequency, 2> EdgeFreqLs(TailMBB.succ_size());
1245  BlockFrequency AccumulatedMBBFreq;
1246 
1247  // Aggregate edge frequency of successor edge j:
1248  // edgeFreq(j) = sum (freq(bb) * edgeProb(bb, j)),
1249  // where bb is a basic block that is in SameTails.
1250  for (const auto &Src : SameTails) {
1251  const MachineBasicBlock *SrcMBB = Src.getBlock();
1252  BlockFrequency BlockFreq = MBBFreqInfo.getBlockFreq(SrcMBB);
1253  AccumulatedMBBFreq += BlockFreq;
1254 
1255  // It is not necessary to recompute edge weights if TailBB has less than two
1256  // successors.
1257  if (TailMBB.succ_size() <= 1)
1258  continue;
1259 
1260  auto EdgeFreq = EdgeFreqLs.begin();
1261 
1262  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1263  SuccI != SuccE; ++SuccI, ++EdgeFreq)
1264  *EdgeFreq += BlockFreq * MBPI.getEdgeProbability(SrcMBB, *SuccI);
1265  }
1266 
1267  MBBFreqInfo.setBlockFreq(&TailMBB, AccumulatedMBBFreq);
1268 
1269  if (TailMBB.succ_size() <= 1)
1270  return;
1271 
1272  auto SumEdgeFreq =
1273  std::accumulate(EdgeFreqLs.begin(), EdgeFreqLs.end(), BlockFrequency(0))
1274  .getFrequency();
1275  auto EdgeFreq = EdgeFreqLs.begin();
1276 
1277  if (SumEdgeFreq > 0) {
1278  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1279  SuccI != SuccE; ++SuccI, ++EdgeFreq) {
1281  EdgeFreq->getFrequency(), SumEdgeFreq);
1282  TailMBB.setSuccProbability(SuccI, Prob);
1283  }
1284  }
1285 }
1286 
1287 //===----------------------------------------------------------------------===//
1288 // Branch Optimization
1289 //===----------------------------------------------------------------------===//
1290 
1291 bool BranchFolder::OptimizeBranches(MachineFunction &MF) {
1292  bool MadeChange = false;
1293 
1294  // Make sure blocks are numbered in order
1295  MF.RenumberBlocks();
1296  // Renumbering blocks alters EH scope membership, recalculate it.
1297  EHScopeMembership = getEHScopeMembership(MF);
1298 
1299  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1300  I != E; ) {
1301  MachineBasicBlock *MBB = &*I++;
1302  MadeChange |= OptimizeBlock(MBB);
1303 
1304  // If it is dead, remove it.
1305  if (MBB->pred_empty()) {
1306  RemoveDeadBlock(MBB);
1307  MadeChange = true;
1308  ++NumDeadBlocks;
1309  }
1310  }
1311 
1312  return MadeChange;
1313 }
1314 
1315 // Blocks should be considered empty if they contain only debug info;
1316 // else the debug info would affect codegen.
1317 static bool IsEmptyBlock(MachineBasicBlock *MBB) {
1318  return MBB->getFirstNonDebugInstr() == MBB->end();
1319 }
1320 
1321 // Blocks with only debug info and branches should be considered the same
1322 // as blocks with only branches.
1325  assert(I != MBB->end() && "empty block!");
1326  return I->isBranch();
1327 }
1328 
1329 /// IsBetterFallthrough - Return true if it would be clearly better to
1330 /// fall-through to MBB1 than to fall through into MBB2. This has to return
1331 /// a strict ordering, returning true for both (MBB1,MBB2) and (MBB2,MBB1) will
1332 /// result in infinite loops.
1334  MachineBasicBlock *MBB2) {
1335  // Right now, we use a simple heuristic. If MBB2 ends with a call, and
1336  // MBB1 doesn't, we prefer to fall through into MBB1. This allows us to
1337  // optimize branches that branch to either a return block or an assert block
1338  // into a fallthrough to the return.
1341  if (MBB1I == MBB1->end() || MBB2I == MBB2->end())
1342  return false;
1343 
1344  // If there is a clear successor ordering we make sure that one block
1345  // will fall through to the next
1346  if (MBB1->isSuccessor(MBB2)) return true;
1347  if (MBB2->isSuccessor(MBB1)) return false;
1348 
1349  return MBB2I->isCall() && !MBB1I->isCall();
1350 }
1351 
1352 /// getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch
1353 /// instructions on the block.
1356  if (I != MBB.end() && I->isBranch())
1357  return I->getDebugLoc();
1358  return DebugLoc();
1359 }
1360 
1362  MachineBasicBlock &MBB,
1363  MachineBasicBlock &PredMBB) {
1364  auto InsertBefore = PredMBB.getFirstTerminator();
1365  for (MachineInstr &MI : MBB.instrs())
1366  if (MI.isDebugValue()) {
1367  TII->duplicate(PredMBB, InsertBefore, MI);
1368  LLVM_DEBUG(dbgs() << "Copied debug value from empty block to pred: "
1369  << MI);
1370  }
1371 }
1372 
1374  MachineBasicBlock &MBB,
1375  MachineBasicBlock &SuccMBB) {
1376  auto InsertBefore = SuccMBB.SkipPHIsAndLabels(SuccMBB.begin());
1377  for (MachineInstr &MI : MBB.instrs())
1378  if (MI.isDebugValue()) {
1379  TII->duplicate(SuccMBB, InsertBefore, MI);
1380  LLVM_DEBUG(dbgs() << "Copied debug value from empty block to succ: "
1381  << MI);
1382  }
1383 }
1384 
1385 // Try to salvage DBG_VALUE instructions from an otherwise empty block. If such
1386 // a basic block is removed we would lose the debug information unless we have
1387 // copied the information to a predecessor/successor.
1388 //
1389 // TODO: This function only handles some simple cases. An alternative would be
1390 // to run a heavier analysis, such as the LiveDebugValues pass, before we do
1391 // branch folding.
1393  MachineBasicBlock &MBB) {
1394  assert(IsEmptyBlock(&MBB) && "Expected an empty block (except debug info).");
1395  // If this MBB is the only predecessor of a successor it is legal to copy
1396  // DBG_VALUE instructions to the beginning of the successor.
1397  for (MachineBasicBlock *SuccBB : MBB.successors())
1398  if (SuccBB->pred_size() == 1)
1399  copyDebugInfoToSuccessor(TII, MBB, *SuccBB);
1400  // If this MBB is the only successor of a predecessor it is legal to copy the
1401  // DBG_VALUE instructions to the end of the predecessor (just before the
1402  // terminators, assuming that the terminator isn't affecting the DBG_VALUE).
1403  for (MachineBasicBlock *PredBB : MBB.predecessors())
1404  if (PredBB->succ_size() == 1)
1405  copyDebugInfoToPredecessor(TII, MBB, *PredBB);
1406 }
1407 
1408 bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
1409  bool MadeChange = false;
1410  MachineFunction &MF = *MBB->getParent();
1411 ReoptimizeBlock:
1412 
1413  MachineFunction::iterator FallThrough = MBB->getIterator();
1414  ++FallThrough;
1415 
1416  // Make sure MBB and FallThrough belong to the same EH scope.
1417  bool SameEHScope = true;
1418  if (!EHScopeMembership.empty() && FallThrough != MF.end()) {
1419  auto MBBEHScope = EHScopeMembership.find(MBB);
1420  assert(MBBEHScope != EHScopeMembership.end());
1421  auto FallThroughEHScope = EHScopeMembership.find(&*FallThrough);
1422  assert(FallThroughEHScope != EHScopeMembership.end());
1423  SameEHScope = MBBEHScope->second == FallThroughEHScope->second;
1424  }
1425 
1426  // If this block is empty, make everyone use its fall-through, not the block
1427  // explicitly. Landing pads should not do this since the landing-pad table
1428  // points to this block. Blocks with their addresses taken shouldn't be
1429  // optimized away.
1430  if (IsEmptyBlock(MBB) && !MBB->isEHPad() && !MBB->hasAddressTaken() &&
1431  SameEHScope) {
1432  salvageDebugInfoFromEmptyBlock(TII, *MBB);
1433  // Dead block? Leave for cleanup later.
1434  if (MBB->pred_empty()) return MadeChange;
1435 
1436  if (FallThrough == MF.end()) {
1437  // TODO: Simplify preds to not branch here if possible!
1438  } else if (FallThrough->isEHPad()) {
1439  // Don't rewrite to a landing pad fallthough. That could lead to the case
1440  // where a BB jumps to more than one landing pad.
1441  // TODO: Is it ever worth rewriting predecessors which don't already
1442  // jump to a landing pad, and so can safely jump to the fallthrough?
1443  } else if (MBB->isSuccessor(&*FallThrough)) {
1444  // Rewrite all predecessors of the old block to go to the fallthrough
1445  // instead.
1446  while (!MBB->pred_empty()) {
1447  MachineBasicBlock *Pred = *(MBB->pred_end()-1);
1448  Pred->ReplaceUsesOfBlockWith(MBB, &*FallThrough);
1449  }
1450  // If MBB was the target of a jump table, update jump tables to go to the
1451  // fallthrough instead.
1452  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1453  MJTI->ReplaceMBBInJumpTables(MBB, &*FallThrough);
1454  MadeChange = true;
1455  }
1456  return MadeChange;
1457  }
1458 
1459  // Check to see if we can simplify the terminator of the block before this
1460  // one.
1461  MachineBasicBlock &PrevBB = *std::prev(MachineFunction::iterator(MBB));
1462 
1463  MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;
1465  bool PriorUnAnalyzable =
1466  TII->analyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1467  if (!PriorUnAnalyzable) {
1468  // If the CFG for the prior block has extra edges, remove them.
1469  MadeChange |= PrevBB.CorrectExtraCFGEdges(PriorTBB, PriorFBB,
1470  !PriorCond.empty());
1471 
1472  // If the previous branch is conditional and both conditions go to the same
1473  // destination, remove the branch, replacing it with an unconditional one or
1474  // a fall-through.
1475  if (PriorTBB && PriorTBB == PriorFBB) {
1476  DebugLoc dl = getBranchDebugLoc(PrevBB);
1477  TII->removeBranch(PrevBB);
1478  PriorCond.clear();
1479  if (PriorTBB != MBB)
1480  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1481  MadeChange = true;
1482  ++NumBranchOpts;
1483  goto ReoptimizeBlock;
1484  }
1485 
1486  // If the previous block unconditionally falls through to this block and
1487  // this block has no other predecessors, move the contents of this block
1488  // into the prior block. This doesn't usually happen when SimplifyCFG
1489  // has been used, but it can happen if tail merging splits a fall-through
1490  // predecessor of a block.
1491  // This has to check PrevBB->succ_size() because EH edges are ignored by
1492  // AnalyzeBranch.
1493  if (PriorCond.empty() && !PriorTBB && MBB->pred_size() == 1 &&
1494  PrevBB.succ_size() == 1 &&
1495  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1496  LLVM_DEBUG(dbgs() << "\nMerging into block: " << PrevBB
1497  << "From MBB: " << *MBB);
1498  // Remove redundant DBG_VALUEs first.
1499  if (PrevBB.begin() != PrevBB.end()) {
1500  MachineBasicBlock::iterator PrevBBIter = PrevBB.end();
1501  --PrevBBIter;
1502  MachineBasicBlock::iterator MBBIter = MBB->begin();
1503  // Check if DBG_VALUE at the end of PrevBB is identical to the
1504  // DBG_VALUE at the beginning of MBB.
1505  while (PrevBBIter != PrevBB.begin() && MBBIter != MBB->end()
1506  && PrevBBIter->isDebugInstr() && MBBIter->isDebugInstr()) {
1507  if (!MBBIter->isIdenticalTo(*PrevBBIter))
1508  break;
1509  MachineInstr &DuplicateDbg = *MBBIter;
1510  ++MBBIter; -- PrevBBIter;
1511  DuplicateDbg.eraseFromParent();
1512  }
1513  }
1514  PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end());
1515  PrevBB.removeSuccessor(PrevBB.succ_begin());
1516  assert(PrevBB.succ_empty());
1517  PrevBB.transferSuccessors(MBB);
1518  MadeChange = true;
1519  return MadeChange;
1520  }
1521 
1522  // If the previous branch *only* branches to *this* block (conditional or
1523  // not) remove the branch.
1524  if (PriorTBB == MBB && !PriorFBB) {
1525  TII->removeBranch(PrevBB);
1526  MadeChange = true;
1527  ++NumBranchOpts;
1528  goto ReoptimizeBlock;
1529  }
1530 
1531  // If the prior block branches somewhere else on the condition and here if
1532  // the condition is false, remove the uncond second branch.
1533  if (PriorFBB == MBB) {
1534  DebugLoc dl = getBranchDebugLoc(PrevBB);
1535  TII->removeBranch(PrevBB);
1536  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1537  MadeChange = true;
1538  ++NumBranchOpts;
1539  goto ReoptimizeBlock;
1540  }
1541 
1542  // If the prior block branches here on true and somewhere else on false, and
1543  // if the branch condition is reversible, reverse the branch to create a
1544  // fall-through.
1545  if (PriorTBB == MBB) {
1546  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1547  if (!TII->reverseBranchCondition(NewPriorCond)) {
1548  DebugLoc dl = getBranchDebugLoc(PrevBB);
1549  TII->removeBranch(PrevBB);
1550  TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
1551  MadeChange = true;
1552  ++NumBranchOpts;
1553  goto ReoptimizeBlock;
1554  }
1555  }
1556 
1557  // If this block has no successors (e.g. it is a return block or ends with
1558  // a call to a no-return function like abort or __cxa_throw) and if the pred
1559  // falls through into this block, and if it would otherwise fall through
1560  // into the block after this, move this block to the end of the function.
1561  //
1562  // We consider it more likely that execution will stay in the function (e.g.
1563  // due to loops) than it is to exit it. This asserts in loops etc, moving
1564  // the assert condition out of the loop body.
1565  if (MBB->succ_empty() && !PriorCond.empty() && !PriorFBB &&
1566  MachineFunction::iterator(PriorTBB) == FallThrough &&
1567  !MBB->canFallThrough()) {
1568  bool DoTransform = true;
1569 
1570  // We have to be careful that the succs of PredBB aren't both no-successor
1571  // blocks. If neither have successors and if PredBB is the second from
1572  // last block in the function, we'd just keep swapping the two blocks for
1573  // last. Only do the swap if one is clearly better to fall through than
1574  // the other.
1575  if (FallThrough == --MF.end() &&
1576  !IsBetterFallthrough(PriorTBB, MBB))
1577  DoTransform = false;
1578 
1579  if (DoTransform) {
1580  // Reverse the branch so we will fall through on the previous true cond.
1581  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1582  if (!TII->reverseBranchCondition(NewPriorCond)) {
1583  LLVM_DEBUG(dbgs() << "\nMoving MBB: " << *MBB
1584  << "To make fallthrough to: " << *PriorTBB << "\n");
1585 
1586  DebugLoc dl = getBranchDebugLoc(PrevBB);
1587  TII->removeBranch(PrevBB);
1588  TII->insertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
1589 
1590  // Move this block to the end of the function.
1591  MBB->moveAfter(&MF.back());
1592  MadeChange = true;
1593  ++NumBranchOpts;
1594  return MadeChange;
1595  }
1596  }
1597  }
1598  }
1599 
1600  if (!IsEmptyBlock(MBB) && MBB->pred_size() == 1 &&
1601  MF.getFunction().optForSize()) {
1602  // Changing "Jcc foo; foo: jmp bar;" into "Jcc bar;" might change the branch
1603  // direction, thereby defeating careful block placement and regressing
1604  // performance. Therefore, only consider this for optsize functions.
1606  if (TII->isUnconditionalTailCall(TailCall)) {
1607  MachineBasicBlock *Pred = *MBB->pred_begin();
1608  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1610  bool PredAnalyzable =
1611  !TII->analyzeBranch(*Pred, PredTBB, PredFBB, PredCond, true);
1612 
1613  if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB &&
1614  PredTBB != PredFBB) {
1615  // The predecessor has a conditional branch to this block which consists
1616  // of only a tail call. Try to fold the tail call into the conditional
1617  // branch.
1618  if (TII->canMakeTailCallConditional(PredCond, TailCall)) {
1619  // TODO: It would be nice if analyzeBranch() could provide a pointer
1620  // to the branch instruction so replaceBranchWithTailCall() doesn't
1621  // have to search for it.
1622  TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall);
1623  ++NumTailCalls;
1624  Pred->removeSuccessor(MBB);
1625  MadeChange = true;
1626  return MadeChange;
1627  }
1628  }
1629  // If the predecessor is falling through to this block, we could reverse
1630  // the branch condition and fold the tail call into that. However, after
1631  // that we might have to re-arrange the CFG to fall through to the other
1632  // block and there is a high risk of regressing code size rather than
1633  // improving it.
1634  }
1635  }
1636 
1637  // Analyze the branch in the current block.
1638  MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr;
1640  bool CurUnAnalyzable =
1641  TII->analyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1642  if (!CurUnAnalyzable) {
1643  // If the CFG for the prior block has extra edges, remove them.
1644  MadeChange |= MBB->CorrectExtraCFGEdges(CurTBB, CurFBB, !CurCond.empty());
1645 
1646  // If this is a two-way branch, and the FBB branches to this block, reverse
1647  // the condition so the single-basic-block loop is faster. Instead of:
1648  // Loop: xxx; jcc Out; jmp Loop
1649  // we want:
1650  // Loop: xxx; jncc Loop; jmp Out
1651  if (CurTBB && CurFBB && CurFBB == MBB && CurTBB != MBB) {
1652  SmallVector<MachineOperand, 4> NewCond(CurCond);
1653  if (!TII->reverseBranchCondition(NewCond)) {
1654  DebugLoc dl = getBranchDebugLoc(*MBB);
1655  TII->removeBranch(*MBB);
1656  TII->insertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
1657  MadeChange = true;
1658  ++NumBranchOpts;
1659  goto ReoptimizeBlock;
1660  }
1661  }
1662 
1663  // If this branch is the only thing in its block, see if we can forward
1664  // other blocks across it.
1665  if (CurTBB && CurCond.empty() && !CurFBB &&
1666  IsBranchOnlyBlock(MBB) && CurTBB != MBB &&
1667  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1668  DebugLoc dl = getBranchDebugLoc(*MBB);
1669  // This block may contain just an unconditional branch. Because there can
1670  // be 'non-branch terminators' in the block, try removing the branch and
1671  // then seeing if the block is empty.
1672  TII->removeBranch(*MBB);
1673  // If the only things remaining in the block are debug info, remove these
1674  // as well, so this will behave the same as an empty block in non-debug
1675  // mode.
1676  if (IsEmptyBlock(MBB)) {
1677  // Make the block empty, losing the debug info (we could probably
1678  // improve this in some cases.)
1679  MBB->erase(MBB->begin(), MBB->end());
1680  }
1681  // If this block is just an unconditional branch to CurTBB, we can
1682  // usually completely eliminate the block. The only case we cannot
1683  // completely eliminate the block is when the block before this one
1684  // falls through into MBB and we can't understand the prior block's branch
1685  // condition.
1686  if (MBB->empty()) {
1687  bool PredHasNoFallThrough = !PrevBB.canFallThrough();
1688  if (PredHasNoFallThrough || !PriorUnAnalyzable ||
1689  !PrevBB.isSuccessor(MBB)) {
1690  // If the prior block falls through into us, turn it into an
1691  // explicit branch to us to make updates simpler.
1692  if (!PredHasNoFallThrough && PrevBB.isSuccessor(MBB) &&
1693  PriorTBB != MBB && PriorFBB != MBB) {
1694  if (!PriorTBB) {
1695  assert(PriorCond.empty() && !PriorFBB &&
1696  "Bad branch analysis");
1697  PriorTBB = MBB;
1698  } else {
1699  assert(!PriorFBB && "Machine CFG out of date!");
1700  PriorFBB = MBB;
1701  }
1702  DebugLoc pdl = getBranchDebugLoc(PrevBB);
1703  TII->removeBranch(PrevBB);
1704  TII->insertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
1705  }
1706 
1707  // Iterate through all the predecessors, revectoring each in-turn.
1708  size_t PI = 0;
1709  bool DidChange = false;
1710  bool HasBranchToSelf = false;
1711  while(PI != MBB->pred_size()) {
1712  MachineBasicBlock *PMBB = *(MBB->pred_begin() + PI);
1713  if (PMBB == MBB) {
1714  // If this block has an uncond branch to itself, leave it.
1715  ++PI;
1716  HasBranchToSelf = true;
1717  } else {
1718  DidChange = true;
1719  PMBB->ReplaceUsesOfBlockWith(MBB, CurTBB);
1720  // If this change resulted in PMBB ending in a conditional
1721  // branch where both conditions go to the same destination,
1722  // change this to an unconditional branch (and fix the CFG).
1723  MachineBasicBlock *NewCurTBB = nullptr, *NewCurFBB = nullptr;
1724  SmallVector<MachineOperand, 4> NewCurCond;
1725  bool NewCurUnAnalyzable = TII->analyzeBranch(
1726  *PMBB, NewCurTBB, NewCurFBB, NewCurCond, true);
1727  if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
1728  DebugLoc pdl = getBranchDebugLoc(*PMBB);
1729  TII->removeBranch(*PMBB);
1730  NewCurCond.clear();
1731  TII->insertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
1732  MadeChange = true;
1733  ++NumBranchOpts;
1734  PMBB->CorrectExtraCFGEdges(NewCurTBB, nullptr, false);
1735  }
1736  }
1737  }
1738 
1739  // Change any jumptables to go to the new MBB.
1740  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1741  MJTI->ReplaceMBBInJumpTables(MBB, CurTBB);
1742  if (DidChange) {
1743  ++NumBranchOpts;
1744  MadeChange = true;
1745  if (!HasBranchToSelf) return MadeChange;
1746  }
1747  }
1748  }
1749 
1750  // Add the branch back if the block is more than just an uncond branch.
1751  TII->insertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
1752  }
1753  }
1754 
1755  // If the prior block doesn't fall through into this block, and if this
1756  // block doesn't fall through into some other block, see if we can find a
1757  // place to move this block where a fall-through will happen.
1758  if (!PrevBB.canFallThrough()) {
1759  // Now we know that there was no fall-through into this block, check to
1760  // see if it has a fall-through into its successor.
1761  bool CurFallsThru = MBB->canFallThrough();
1762 
1763  if (!MBB->isEHPad()) {
1764  // Check all the predecessors of this block. If one of them has no fall
1765  // throughs, move this block right after it.
1766  for (MachineBasicBlock *PredBB : MBB->predecessors()) {
1767  // Analyze the branch at the end of the pred.
1768  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1770  if (PredBB != MBB && !PredBB->canFallThrough() &&
1771  !TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true) &&
1772  (!CurFallsThru || !CurTBB || !CurFBB) &&
1773  (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
1774  // If the current block doesn't fall through, just move it.
1775  // If the current block can fall through and does not end with a
1776  // conditional branch, we need to append an unconditional jump to
1777  // the (current) next block. To avoid a possible compile-time
1778  // infinite loop, move blocks only backward in this case.
1779  // Also, if there are already 2 branches here, we cannot add a third;
1780  // this means we have the case
1781  // Bcc next
1782  // B elsewhere
1783  // next:
1784  if (CurFallsThru) {
1785  MachineBasicBlock *NextBB = &*std::next(MBB->getIterator());
1786  CurCond.clear();
1787  TII->insertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
1788  }
1789  MBB->moveAfter(PredBB);
1790  MadeChange = true;
1791  goto ReoptimizeBlock;
1792  }
1793  }
1794  }
1795 
1796  if (!CurFallsThru) {
1797  // Check all successors to see if we can move this block before it.
1798  for (MachineBasicBlock *SuccBB : MBB->successors()) {
1799  // Analyze the branch at the end of the block before the succ.
1800  MachineFunction::iterator SuccPrev = --SuccBB->getIterator();
1801 
1802  // If this block doesn't already fall-through to that successor, and if
1803  // the succ doesn't already have a block that can fall through into it,
1804  // and if the successor isn't an EH destination, we can arrange for the
1805  // fallthrough to happen.
1806  if (SuccBB != MBB && &*SuccPrev != MBB &&
1807  !SuccPrev->canFallThrough() && !CurUnAnalyzable &&
1808  !SuccBB->isEHPad()) {
1809  MBB->moveBefore(SuccBB);
1810  MadeChange = true;
1811  goto ReoptimizeBlock;
1812  }
1813  }
1814 
1815  // Okay, there is no really great place to put this block. If, however,
1816  // the block before this one would be a fall-through if this block were
1817  // removed, move this block to the end of the function. There is no real
1818  // advantage in "falling through" to an EH block, so we don't want to
1819  // perform this transformation for that case.
1820  //
1821  // Also, Windows EH introduced the possibility of an arbitrary number of
1822  // successors to a given block. The analyzeBranch call does not consider
1823  // exception handling and so we can get in a state where a block
1824  // containing a call is followed by multiple EH blocks that would be
1825  // rotated infinitely at the end of the function if the transformation
1826  // below were performed for EH "FallThrough" blocks. Therefore, even if
1827  // that appears not to be happening anymore, we should assume that it is
1828  // possible and not remove the "!FallThrough()->isEHPad" condition below.
1829  MachineBasicBlock *PrevTBB = nullptr, *PrevFBB = nullptr;
1831  if (FallThrough != MF.end() &&
1832  !FallThrough->isEHPad() &&
1833  !TII->analyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1834  PrevBB.isSuccessor(&*FallThrough)) {
1835  MBB->moveAfter(&MF.back());
1836  MadeChange = true;
1837  return MadeChange;
1838  }
1839  }
1840  }
1841 
1842  return MadeChange;
1843 }
1844 
1845 //===----------------------------------------------------------------------===//
1846 // Hoist Common Code
1847 //===----------------------------------------------------------------------===//
1848 
1849 bool BranchFolder::HoistCommonCode(MachineFunction &MF) {
1850  bool MadeChange = false;
1851  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ) {
1852  MachineBasicBlock *MBB = &*I++;
1853  MadeChange |= HoistCommonCodeInSuccs(MBB);
1854  }
1855 
1856  return MadeChange;
1857 }
1858 
1859 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
1860 /// its 'true' successor.
1862  MachineBasicBlock *TrueBB) {
1863  for (MachineBasicBlock *SuccBB : BB->successors())
1864  if (SuccBB != TrueBB)
1865  return SuccBB;
1866  return nullptr;
1867 }
1868 
1869 template <class Container>
1870 static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI,
1871  Container &Set) {
1873  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
1874  Set.insert(*AI);
1875  } else {
1876  Set.insert(Reg);
1877  }
1878 }
1879 
1880 /// findHoistingInsertPosAndDeps - Find the location to move common instructions
1881 /// in successors to. The location is usually just before the terminator,
1882 /// however if the terminator is a conditional branch and its previous
1883 /// instruction is the flag setting instruction, the previous instruction is
1884 /// the preferred location. This function also gathers uses and defs of the
1885 /// instructions from the insertion point to the end of the block. The data is
1886 /// used by HoistCommonCodeInSuccs to ensure safety.
1887 static
1889  const TargetInstrInfo *TII,
1890  const TargetRegisterInfo *TRI,
1891  SmallSet<unsigned,4> &Uses,
1892  SmallSet<unsigned,4> &Defs) {
1894  if (!TII->isUnpredicatedTerminator(*Loc))
1895  return MBB->end();
1896 
1897  for (const MachineOperand &MO : Loc->operands()) {
1898  if (!MO.isReg())
1899  continue;
1900  unsigned Reg = MO.getReg();
1901  if (!Reg)
1902  continue;
1903  if (MO.isUse()) {
1904  addRegAndItsAliases(Reg, TRI, Uses);
1905  } else {
1906  if (!MO.isDead())
1907  // Don't try to hoist code in the rare case the terminator defines a
1908  // register that is later used.
1909  return MBB->end();
1910 
1911  // If the terminator defines a register, make sure we don't hoist
1912  // the instruction whose def might be clobbered by the terminator.
1913  addRegAndItsAliases(Reg, TRI, Defs);
1914  }
1915  }
1916 
1917  if (Uses.empty())
1918  return Loc;
1919  // If the terminator is the only instruction in the block and Uses is not
1920  // empty (or we would have returned above), we can still safely hoist
1921  // instructions just before the terminator as long as the Defs/Uses are not
1922  // violated (which is checked in HoistCommonCodeInSuccs).
1923  if (Loc == MBB->begin())
1924  return Loc;
1925 
1926  // The terminator is probably a conditional branch, try not to separate the
1927  // branch from condition setting instruction.
1929  skipDebugInstructionsBackward(std::prev(Loc), MBB->begin());
1930 
1931  bool IsDef = false;
1932  for (const MachineOperand &MO : PI->operands()) {
1933  // If PI has a regmask operand, it is probably a call. Separate away.
1934  if (MO.isRegMask())
1935  return Loc;
1936  if (!MO.isReg() || MO.isUse())
1937  continue;
1938  unsigned Reg = MO.getReg();
1939  if (!Reg)
1940  continue;
1941  if (Uses.count(Reg)) {
1942  IsDef = true;
1943  break;
1944  }
1945  }
1946  if (!IsDef)
1947  // The condition setting instruction is not just before the conditional
1948  // branch.
1949  return Loc;
1950 
1951  // Be conservative, don't insert instruction above something that may have
1952  // side-effects. And since it's potentially bad to separate flag setting
1953  // instruction from the conditional branch, just abort the optimization
1954  // completely.
1955  // Also avoid moving code above predicated instruction since it's hard to
1956  // reason about register liveness with predicated instruction.
1957  bool DontMoveAcrossStore = true;
1958  if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI))
1959  return MBB->end();
1960 
1961  // Find out what registers are live. Note this routine is ignoring other live
1962  // registers which are only used by instructions in successor blocks.
1963  for (const MachineOperand &MO : PI->operands()) {
1964  if (!MO.isReg())
1965  continue;
1966  unsigned Reg = MO.getReg();
1967  if (!Reg)
1968  continue;
1969  if (MO.isUse()) {
1970  addRegAndItsAliases(Reg, TRI, Uses);
1971  } else {
1972  if (Uses.erase(Reg)) {
1974  for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1975  Uses.erase(*SubRegs); // Use sub-registers to be conservative
1976  }
1977  }
1978  addRegAndItsAliases(Reg, TRI, Defs);
1979  }
1980  }
1981 
1982  return PI;
1983 }
1984 
1985 bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
1986  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1988  if (TII->analyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1989  return false;
1990 
1991  if (!FBB) FBB = findFalseBlock(MBB, TBB);
1992  if (!FBB)
1993  // Malformed bcc? True and false blocks are the same?
1994  return false;
1995 
1996  // Restrict the optimization to cases where MBB is the only predecessor,
1997  // it is an obvious win.
1998  if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
1999  return false;
2000 
2001  // Find a suitable position to hoist the common instructions to. Also figure
2002  // out which registers are used or defined by instructions from the insertion
2003  // point to the end of the block.
2004  SmallSet<unsigned, 4> Uses, Defs;
2006  findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
2007  if (Loc == MBB->end())
2008  return false;
2009 
2010  bool HasDups = false;
2011  SmallSet<unsigned, 4> ActiveDefsSet, AllDefsSet;
2012  MachineBasicBlock::iterator TIB = TBB->begin();
2013  MachineBasicBlock::iterator FIB = FBB->begin();
2014  MachineBasicBlock::iterator TIE = TBB->end();
2015  MachineBasicBlock::iterator FIE = FBB->end();
2016  while (TIB != TIE && FIB != FIE) {
2017  // Skip dbg_value instructions. These do not count.
2018  TIB = skipDebugInstructionsForward(TIB, TIE);
2019  FIB = skipDebugInstructionsForward(FIB, FIE);
2020  if (TIB == TIE || FIB == FIE)
2021  break;
2022 
2023  if (!TIB->isIdenticalTo(*FIB, MachineInstr::CheckKillDead))
2024  break;
2025 
2026  if (TII->isPredicated(*TIB))
2027  // Hard to reason about register liveness with predicated instruction.
2028  break;
2029 
2030  bool IsSafe = true;
2031  for (MachineOperand &MO : TIB->operands()) {
2032  // Don't attempt to hoist instructions with register masks.
2033  if (MO.isRegMask()) {
2034  IsSafe = false;
2035  break;
2036  }
2037  if (!MO.isReg())
2038  continue;
2039  unsigned Reg = MO.getReg();
2040  if (!Reg)
2041  continue;
2042  if (MO.isDef()) {
2043  if (Uses.count(Reg)) {
2044  // Avoid clobbering a register that's used by the instruction at
2045  // the point of insertion.
2046  IsSafe = false;
2047  break;
2048  }
2049 
2050  if (Defs.count(Reg) && !MO.isDead()) {
2051  // Don't hoist the instruction if the def would be clobber by the
2052  // instruction at the point insertion. FIXME: This is overly
2053  // conservative. It should be possible to hoist the instructions
2054  // in BB2 in the following example:
2055  // BB1:
2056  // r1, eflag = op1 r2, r3
2057  // brcc eflag
2058  //
2059  // BB2:
2060  // r1 = op2, ...
2061  // = op3, killed r1
2062  IsSafe = false;
2063  break;
2064  }
2065  } else if (!ActiveDefsSet.count(Reg)) {
2066  if (Defs.count(Reg)) {
2067  // Use is defined by the instruction at the point of insertion.
2068  IsSafe = false;
2069  break;
2070  }
2071 
2072  if (MO.isKill() && Uses.count(Reg))
2073  // Kills a register that's read by the instruction at the point of
2074  // insertion. Remove the kill marker.
2075  MO.setIsKill(false);
2076  }
2077  }
2078  if (!IsSafe)
2079  break;
2080 
2081  bool DontMoveAcrossStore = true;
2082  if (!TIB->isSafeToMove(nullptr, DontMoveAcrossStore))
2083  break;
2084 
2085  // Remove kills from ActiveDefsSet, these registers had short live ranges.
2086  for (const MachineOperand &MO : TIB->operands()) {
2087  if (!MO.isReg() || !MO.isUse() || !MO.isKill())
2088  continue;
2089  unsigned Reg = MO.getReg();
2090  if (!Reg)
2091  continue;
2092  if (!AllDefsSet.count(Reg)) {
2093  continue;
2094  }
2096  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
2097  ActiveDefsSet.erase(*AI);
2098  } else {
2099  ActiveDefsSet.erase(Reg);
2100  }
2101  }
2102 
2103  // Track local defs so we can update liveins.
2104  for (const MachineOperand &MO : TIB->operands()) {
2105  if (!MO.isReg() || !MO.isDef() || MO.isDead())
2106  continue;
2107  unsigned Reg = MO.getReg();
2108  if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg))
2109  continue;
2110  addRegAndItsAliases(Reg, TRI, ActiveDefsSet);
2111  addRegAndItsAliases(Reg, TRI, AllDefsSet);
2112  }
2113 
2114  HasDups = true;
2115  ++TIB;
2116  ++FIB;
2117  }
2118 
2119  if (!HasDups)
2120  return false;
2121 
2122  MBB->splice(Loc, TBB, TBB->begin(), TIB);
2123  FBB->erase(FBB->begin(), FIB);
2124 
2125  if (UpdateLiveIns) {
2126  recomputeLiveIns(*TBB);
2127  recomputeLiveIns(*FBB);
2128  }
2129 
2130  ++NumHoist;
2131  return true;
2132 }
#define DEBUG_TYPE
void view(const Twine &Name, bool isSimple=true)
static unsigned EstimateRuntime(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
EstimateRuntime - Make a rough estimate for how long it will take to run the specified code...
static bool ProfitableToMerge(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, unsigned MinCommonTailLength, unsigned &CommonTailLen, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2, MachineBasicBlock *SuccBB, MachineBasicBlock *PredBB, DenseMap< const MachineBasicBlock *, int > &EHScopeMembership, bool AfterPlacement)
ProfitableToMerge - Check if two machine basic blocks have a common tail and decide if it would be pr...
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:259
BitVector & set()
Definition: BitVector.h:398
A common definition of LaneBitmask for use in TableGen and CodeGen.
const std::vector< MachineJumpTableEntry > & getJumpTables() const
static cl::opt< unsigned > TailMergeThreshold("tail-merge-threshold", cl::desc("Max number of predecessors to consider tail merging"), cl::init(150), cl::Hidden)
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:250
MachineBasicBlock * getMBB() const
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void RenumberBlocks(MachineBasicBlock *MBBFrom=nullptr)
RenumberBlocks - This discards all of the MachineBasicBlock numbers and recomputes them...
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
bool isCFIInstruction() const
Definition: MachineInstr.h:990
iterator getFirstNonDebugInstr()
Returns an iterator to the first non-debug instruction in the basic block, or end().
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
unsigned getReg() const
getReg - Returns the register number.
void setIsUndef(bool Val=true)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Address of indexed Jump Table for switch.
unsigned Reg
virtual MachineInstr & duplicate(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) const
Clones instruction or the whole instruction bundle Orig and insert into MBB before InsertBefore...
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
static unsigned HashMachineInstr(const MachineInstr &MI)
HashMachineInstr - Compute a hash value for MI and its operands.
void RemoveJumpTable(unsigned Idx)
RemoveJumpTable - Mark the specific index as being dead.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
MachineBasicBlock reference.
STATISTIC(NumFunctions, "Total number of functions")
void moveAfter(MachineBasicBlock *NewBefore)
A debug info location.
Definition: DebugLoc.h:34
F(f)
static DebugLoc getBranchDebugLoc(MachineBasicBlock &MBB)
getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch instructions on the block...
virtual unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const
Remove the branching code at the end of the specific MBB.
bool erase(const T &V)
Definition: SmallSet.h:208
BranchFolder(bool defaultEnableTailMerge, bool CommonHoist, MBFIWrapper &FreqInfo, const MachineBranchProbabilityInfo &ProbInfo, unsigned MinTailLength=0)
iterator_range< succ_iterator > successors()
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const
Returns true if the instruction is a terminator instruction that has not been predicated.
AnalysisUsage & addRequired()
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to &#39;Old&#39;, change the code and CFG so that it branches to &#39;N...
LLVM_NODISCARD bool empty() const
Definition: SmallSet.h:156
amdgpu Simplify well known AMD library false Value Value const Twine & Name
bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi, MachineLoopInfo *mli=nullptr, bool AfterPlacement=false)
Perhaps branch folding, tail merging and other CFG optimizations on the given function.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE, "Control Flow Optimizer", false, false) bool BranchFolderPass
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:412
static void copyDebugInfoToPredecessor(const TargetInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock &PredMBB)
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
Name of external global symbol.
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84
static unsigned HashEndOfMBB(const MachineBasicBlock &MBB)
HashEndOfMBB - Hash the last instruction in the MBB.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:409
static bool IsEmptyBlock(MachineBasicBlock *MBB)
void removeBlock(MachineBasicBlock *BB)
This method completely removes BB from all data structures, including all of the Loop objects it is n...
Target-Independent Code Generator Pass Configuration Options.
BlockT * getHeader() const
Definition: LoopInfo.h:100
static bool countsAsInstruction(const MachineInstr &MI)
Whether MI should be counted as an instruction when calculating common tail.
static bool isSimple(Instruction *I)
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
Definition: MachineInstr.h:663
static cl::opt< cl::boolOrDefault > FlagEnableTailMerge("enable-tail-merge", cl::init(cl::BOU_UNSET), cl::Hidden)
static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB, const TargetInstrInfo *TII)
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
static bool blockEndsInUnreachable(const MachineBasicBlock *MBB)
A no successor, non-return block probably ends in unreachable and is cold.
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
static MachineBasicBlock::iterator findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet< unsigned, 4 > &Uses, SmallSet< unsigned, 4 > &Defs)
findHoistingInsertPosAndDeps - Find the location to move common instructions in successors to...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
reverse_iterator rend()
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
reverse_iterator rbegin()
BasicBlockListType::iterator iterator
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F)
TargetInstrInfo - Interface to description of machine instruction set.
static void mergeOperations(MachineBasicBlock::iterator MBBIStartPos, MachineBasicBlock &MBBCommon)
bool isReturn(QueryType Type=AnyInBundle) const
Definition: MachineInstr.h:623
bool getEnableTailMerge() const
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
#define P(N)
Address of a global value.
virtual void ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail, MachineBasicBlock *NewDest) const
Delete the instruction OldInst and everything after it, replacing it with an unconditional branch to ...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:419
void array_pod_sort(IteratorTy Start, IteratorTy End)
array_pod_sort - This sorts an array with the specified start and end extent.
Definition: STLExtras.h:945
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const
Return true if it&#39;s legal to split the given basic block at the specified instruction (i...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:135
static void salvageDebugInfoFromEmptyBlock(const TargetInstrInfo *TII, MachineBasicBlock &MBB)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:67
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
raw_ostream & printBlockFreq(raw_ostream &OS, const MachineBasicBlock *MBB) const
bool optForSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:598
static bool IsBetterFallthrough(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2)
IsBetterFallthrough - Return true if it would be clearly better to fall-through to MBB1 than to fall ...
self_iterator getIterator()
Definition: ilist_node.h:82
iterator_range< pred_iterator > predecessors()
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
void moveBefore(MachineBasicBlock *NewAfter)
Move &#39;this&#39; block before or after the specified block.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
virtual bool canMakeTailCallConditional(SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Returns true if the tail call can be made conditional on BranchCond.
static unsigned CountTerminators(MachineBasicBlock *MBB, MachineBasicBlock::iterator &I)
CountTerminators - Count the number of terminators in the given block and set I to the position of th...
virtual bool isPredicated(const MachineInstr &MI) const
Returns true if the instruction is already predicated.
static cl::opt< unsigned > TailMergeSize("tail-merge-size", cl::desc("Min number of instructions to consider tail merging"), cl::init(3), cl::Hidden)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)
Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date...
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const
Returns true if register Reg and no aliasing register is in the set.
bool isDebugValue() const
Definition: MachineInstr.h:997
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI, Container &Set)
static BranchProbability getBranchProbability(uint64_t Numerator, uint64_t Denominator)
DenseMap< const MachineBasicBlock *, int > getEHScopeMembership(const MachineFunction &MF)
Definition: Analysis.cpp:668
void invalidateLiveness()
invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
int64_t getImm() const
unsigned pred_size() const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
unsigned succ_size() const
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const
Representation of each machine instruction.
Definition: MachineInstr.h:64
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:49
bool isEHPad() const
Returns true if the block is a landing pad.
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:56
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
int64_t getOffset() const
Return the offset from the symbol in this operand.
#define I(x, y, z)
Definition: MD5.cpp:58
Pair of physical register and lane mask.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
const MachineBasicBlock & back() const
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
static bool IsBranchOnlyBlock(MachineBasicBlock *MBB)
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Abstract Stack Frame Index.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineBasicBlock * findFalseBlock(MachineBasicBlock *BB, MachineBasicBlock *TrueBB)
findFalseBlock - BB has a fallthrough.
virtual bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
void erase(iterator MBBI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void clear()
Clears the set.
Definition: LivePhysRegs.h:74
bool operator<(int64_t V1, const APSInt &V2)
Definition: APSInt.h:326
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in&#39;s for MBB.
Definition: LivePhysRegs.h:190
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
Return the innermost loop that BB lives in.
virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB, SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Replace the conditional branch in MBB with a conditional tail call.
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
This class keeps track of branch frequencies of newly created blocks and tail-merged blocks...
IRTranslator LLVM IR MI
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
Definition: MachineInstr.h:640
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
Returns true if the live-ins should be tracked after register allocation.
Address of indexed Constant in Constant Pool.
virtual bool isUnconditionalTailCall(const MachineInstr &MI) const
Returns true if MI is an unconditional tail call.
#define LLVM_DEBUG(X)
Definition: Debug.h:123
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:414
static void copyDebugInfoToSuccessor(const TargetInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock &SuccMBB)
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool IsCond)
Various pieces of code can cause excess edges in the CFG to be inserted.
This class contains meta information specific to a module.
static unsigned ComputeCommonTailLength(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2)
ComputeCommonTailLength - Given two machine basic blocks, compute the number of instructions they act...
LoopInfoBase< MachineBasicBlock, MachineLoop > & getBase()
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:165