LLVM  6.0.0svn
BranchFolding.cpp
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1 //===- BranchFolding.cpp - Fold machine code branch instructions ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass forwards branches to unconditional branches to make them branch
11 // directly to the target block. This pass often results in dead MBB's, which
12 // it then removes.
13 //
14 // Note that this pass must be run after register allocation, it cannot handle
15 // SSA form. It also must handle virtual registers for targets that emit virtual
16 // ISA (e.g. NVPTX).
17 //
18 //===----------------------------------------------------------------------===//
19 
20 #include "BranchFolding.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/STLExtras.h"
24 #include "llvm/ADT/SmallPtrSet.h"
25 #include "llvm/ADT/SmallSet.h"
26 #include "llvm/ADT/SmallVector.h"
27 #include "llvm/ADT/Statistic.h"
28 #include "llvm/CodeGen/Analysis.h"
48 #include "llvm/IR/DebugLoc.h"
49 #include "llvm/IR/Function.h"
50 #include "llvm/MC/LaneBitmask.h"
51 #include "llvm/MC/MCRegisterInfo.h"
52 #include "llvm/Pass.h"
56 #include "llvm/Support/Debug.h"
60 #include <cassert>
61 #include <cstddef>
62 #include <iterator>
63 #include <numeric>
64 #include <vector>
65 
66 using namespace llvm;
67 
68 #define DEBUG_TYPE "branch-folder"
69 
70 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
71 STATISTIC(NumBranchOpts, "Number of branches optimized");
72 STATISTIC(NumTailMerge , "Number of block tails merged");
73 STATISTIC(NumHoist , "Number of times common instructions are hoisted");
74 STATISTIC(NumTailCalls, "Number of tail calls optimized");
75 
76 static cl::opt<cl::boolOrDefault> FlagEnableTailMerge("enable-tail-merge",
78 
79 // Throttle for huge numbers of predecessors (compile speed problems)
80 static cl::opt<unsigned>
81 TailMergeThreshold("tail-merge-threshold",
82  cl::desc("Max number of predecessors to consider tail merging"),
83  cl::init(150), cl::Hidden);
84 
85 // Heuristic for tail merging (and, inversely, tail duplication).
86 // TODO: This should be replaced with a target query.
87 static cl::opt<unsigned>
88 TailMergeSize("tail-merge-size",
89  cl::desc("Min number of instructions to consider tail merging"),
90  cl::init(3), cl::Hidden);
91 
92 namespace {
93 
94  /// BranchFolderPass - Wrap branch folder in a machine function pass.
95  class BranchFolderPass : public MachineFunctionPass {
96  public:
97  static char ID;
98 
99  explicit BranchFolderPass(): MachineFunctionPass(ID) {}
100 
101  bool runOnMachineFunction(MachineFunction &MF) override;
102 
103  void getAnalysisUsage(AnalysisUsage &AU) const override {
108  }
109  };
110 
111 } // end anonymous namespace
112 
113 char BranchFolderPass::ID = 0;
114 
116 
117 INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
118  "Control Flow Optimizer", false, false)
119 
120 bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
121  if (skipFunction(*MF.getFunction()))
122  return false;
123 
124  TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
125  // TailMerge can create jump into if branches that make CFG irreducible for
126  // HW that requires structurized CFG.
127  bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
128  PassConfig->getEnableTailMerge();
129  BranchFolder::MBFIWrapper MBBFreqInfo(
130  getAnalysis<MachineBlockFrequencyInfo>());
131  BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
132  getAnalysis<MachineBranchProbabilityInfo>());
133  return Folder.OptimizeFunction(MF, MF.getSubtarget().getInstrInfo(),
134  MF.getSubtarget().getRegisterInfo(),
135  getAnalysisIfAvailable<MachineModuleInfo>());
136 }
137 
138 BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,
139  MBFIWrapper &FreqInfo,
140  const MachineBranchProbabilityInfo &ProbInfo,
141  unsigned MinTailLength)
142  : EnableHoistCommonCode(CommonHoist), MinCommonTailLength(MinTailLength),
143  MBBFreqInfo(FreqInfo), MBPI(ProbInfo) {
144  if (MinCommonTailLength == 0)
145  MinCommonTailLength = TailMergeSize;
146  switch (FlagEnableTailMerge) {
147  case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
148  case cl::BOU_TRUE: EnableTailMerge = true; break;
149  case cl::BOU_FALSE: EnableTailMerge = false; break;
150  }
151 }
152 
153 void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
154  assert(MBB->pred_empty() && "MBB must be dead!");
155  DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
156 
157  MachineFunction *MF = MBB->getParent();
158  // drop all successors.
159  while (!MBB->succ_empty())
160  MBB->removeSuccessor(MBB->succ_end()-1);
161 
162  // Avoid matching if this pointer gets reused.
163  TriedMerging.erase(MBB);
164 
165  // Remove the block.
166  MF->erase(MBB);
167  FuncletMembership.erase(MBB);
168  if (MLI)
169  MLI->removeBlock(MBB);
170 }
171 
173  const TargetInstrInfo *tii,
174  const TargetRegisterInfo *tri,
175  MachineModuleInfo *mmi,
176  MachineLoopInfo *mli, bool AfterPlacement) {
177  if (!tii) return false;
178 
179  TriedMerging.clear();
180 
181  MachineRegisterInfo &MRI = MF.getRegInfo();
182  AfterBlockPlacement = AfterPlacement;
183  TII = tii;
184  TRI = tri;
185  MMI = mmi;
186  MLI = mli;
187  this->MRI = &MRI;
188 
189  UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
190  if (!UpdateLiveIns)
191  MRI.invalidateLiveness();
192 
193  // Fix CFG. The later algorithms expect it to be right.
194  bool MadeChange = false;
195  for (MachineBasicBlock &MBB : MF) {
196  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
198  if (!TII->analyzeBranch(MBB, TBB, FBB, Cond, true))
199  MadeChange |= MBB.CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
200  }
201 
202  // Recalculate funclet membership.
203  FuncletMembership = getFuncletMembership(MF);
204 
205  bool MadeChangeThisIteration = true;
206  while (MadeChangeThisIteration) {
207  MadeChangeThisIteration = TailMergeBlocks(MF);
208  // No need to clean up if tail merging does not change anything after the
209  // block placement.
210  if (!AfterBlockPlacement || MadeChangeThisIteration)
211  MadeChangeThisIteration |= OptimizeBranches(MF);
212  if (EnableHoistCommonCode)
213  MadeChangeThisIteration |= HoistCommonCode(MF);
214  MadeChange |= MadeChangeThisIteration;
215  }
216 
217  // See if any jump tables have become dead as the code generator
218  // did its thing.
219  MachineJumpTableInfo *JTI = MF.getJumpTableInfo();
220  if (!JTI)
221  return MadeChange;
222 
223  // Walk the function to find jump tables that are live.
224  BitVector JTIsLive(JTI->getJumpTables().size());
225  for (const MachineBasicBlock &BB : MF) {
226  for (const MachineInstr &I : BB)
227  for (const MachineOperand &Op : I.operands()) {
228  if (!Op.isJTI()) continue;
229 
230  // Remember that this JT is live.
231  JTIsLive.set(Op.getIndex());
232  }
233  }
234 
235  // Finally, remove dead jump tables. This happens when the
236  // indirect jump was unreachable (and thus deleted).
237  for (unsigned i = 0, e = JTIsLive.size(); i != e; ++i)
238  if (!JTIsLive.test(i)) {
239  JTI->RemoveJumpTable(i);
240  MadeChange = true;
241  }
242 
243  return MadeChange;
244 }
245 
246 //===----------------------------------------------------------------------===//
247 // Tail Merging of Blocks
248 //===----------------------------------------------------------------------===//
249 
250 /// HashMachineInstr - Compute a hash value for MI and its operands.
251 static unsigned HashMachineInstr(const MachineInstr &MI) {
252  unsigned Hash = MI.getOpcode();
253  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
254  const MachineOperand &Op = MI.getOperand(i);
255 
256  // Merge in bits from the operand if easy. We can't use MachineOperand's
257  // hash_code here because it's not deterministic and we sort by hash value
258  // later.
259  unsigned OperandHash = 0;
260  switch (Op.getType()) {
262  OperandHash = Op.getReg();
263  break;
265  OperandHash = Op.getImm();
266  break;
268  OperandHash = Op.getMBB()->getNumber();
269  break;
273  OperandHash = Op.getIndex();
274  break;
277  // Global address / external symbol are too hard, don't bother, but do
278  // pull in the offset.
279  OperandHash = Op.getOffset();
280  break;
281  default:
282  break;
283  }
284 
285  Hash += ((OperandHash << 3) | Op.getType()) << (i & 31);
286  }
287  return Hash;
288 }
289 
290 /// HashEndOfMBB - Hash the last instruction in the MBB.
291 static unsigned HashEndOfMBB(const MachineBasicBlock &MBB) {
293  if (I == MBB.end())
294  return 0;
295 
296  return HashMachineInstr(*I);
297 }
298 
299 /// ComputeCommonTailLength - Given two machine basic blocks, compute the number
300 /// of instructions they actually have in common together at their end. Return
301 /// iterators for the first shared instruction in each block.
303  MachineBasicBlock *MBB2,
306  I1 = MBB1->end();
307  I2 = MBB2->end();
308 
309  unsigned TailLen = 0;
310  while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
311  --I1; --I2;
312  // Skip debugging pseudos; necessary to avoid changing the code.
313  while (I1->isDebugValue()) {
314  if (I1==MBB1->begin()) {
315  while (I2->isDebugValue()) {
316  if (I2==MBB2->begin())
317  // I1==DBG at begin; I2==DBG at begin
318  return TailLen;
319  --I2;
320  }
321  ++I2;
322  // I1==DBG at begin; I2==non-DBG, or first of DBGs not at begin
323  return TailLen;
324  }
325  --I1;
326  }
327  // I1==first (untested) non-DBG preceding known match
328  while (I2->isDebugValue()) {
329  if (I2==MBB2->begin()) {
330  ++I1;
331  // I1==non-DBG, or first of DBGs not at begin; I2==DBG at begin
332  return TailLen;
333  }
334  --I2;
335  }
336  // I1, I2==first (untested) non-DBGs preceding known match
337  if (!I1->isIdenticalTo(*I2) ||
338  // FIXME: This check is dubious. It's used to get around a problem where
339  // people incorrectly expect inline asm directives to remain in the same
340  // relative order. This is untenable because normal compiler
341  // optimizations (like this one) may reorder and/or merge these
342  // directives.
343  I1->isInlineAsm()) {
344  ++I1; ++I2;
345  break;
346  }
347  ++TailLen;
348  }
349  // Back past possible debugging pseudos at beginning of block. This matters
350  // when one block differs from the other only by whether debugging pseudos
351  // are present at the beginning. (This way, the various checks later for
352  // I1==MBB1->begin() work as expected.)
353  if (I1 == MBB1->begin() && I2 != MBB2->begin()) {
354  --I2;
355  while (I2->isDebugValue()) {
356  if (I2 == MBB2->begin())
357  return TailLen;
358  --I2;
359  }
360  ++I2;
361  }
362  if (I2 == MBB2->begin() && I1 != MBB1->begin()) {
363  --I1;
364  while (I1->isDebugValue()) {
365  if (I1 == MBB1->begin())
366  return TailLen;
367  --I1;
368  }
369  ++I1;
370  }
371  return TailLen;
372 }
373 
374 void BranchFolder::replaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
375  MachineBasicBlock &NewDest) {
376  if (UpdateLiveIns) {
377  // OldInst should always point to an instruction.
378  MachineBasicBlock &OldMBB = *OldInst->getParent();
379  LiveRegs.clear();
380  LiveRegs.addLiveOuts(OldMBB);
381  // Move backward to the place where will insert the jump.
382  MachineBasicBlock::iterator I = OldMBB.end();
383  do {
384  --I;
385  LiveRegs.stepBackward(*I);
386  } while (I != OldInst);
387 
388  // Merging the tails may have switched some undef operand to non-undef ones.
389  // Add IMPLICIT_DEFS into OldMBB as necessary to have a definition of the
390  // register.
391  for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) {
392  // We computed the liveins with computeLiveIn earlier and should only see
393  // full registers:
394  assert(P.LaneMask == LaneBitmask::getAll() &&
395  "Can only handle full register.");
396  MCPhysReg Reg = P.PhysReg;
397  if (!LiveRegs.available(*MRI, Reg))
398  continue;
399  DebugLoc DL;
400  BuildMI(OldMBB, OldInst, DL, TII->get(TargetOpcode::IMPLICIT_DEF), Reg);
401  }
402  }
403 
404  TII->ReplaceTailWithBranchTo(OldInst, &NewDest);
405  ++NumTailMerge;
406 }
407 
408 MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
410  const BasicBlock *BB) {
411  if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
412  return nullptr;
413 
414  MachineFunction &MF = *CurMBB.getParent();
415 
416  // Create the fall-through block.
417  MachineFunction::iterator MBBI = CurMBB.getIterator();
419  CurMBB.getParent()->insert(++MBBI, NewMBB);
420 
421  // Move all the successors of this block to the specified block.
422  NewMBB->transferSuccessors(&CurMBB);
423 
424  // Add an edge from CurMBB to NewMBB for the fall-through.
425  CurMBB.addSuccessor(NewMBB);
426 
427  // Splice the code over.
428  NewMBB->splice(NewMBB->end(), &CurMBB, BBI1, CurMBB.end());
429 
430  // NewMBB belongs to the same loop as CurMBB.
431  if (MLI)
432  if (MachineLoop *ML = MLI->getLoopFor(&CurMBB))
433  ML->addBasicBlockToLoop(NewMBB, MLI->getBase());
434 
435  // NewMBB inherits CurMBB's block frequency.
436  MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
437 
438  if (UpdateLiveIns)
439  computeAndAddLiveIns(LiveRegs, *NewMBB);
440 
441  // Add the new block to the funclet.
442  const auto &FuncletI = FuncletMembership.find(&CurMBB);
443  if (FuncletI != FuncletMembership.end()) {
444  auto n = FuncletI->second;
445  FuncletMembership[NewMBB] = n;
446  }
447 
448  return NewMBB;
449 }
450 
451 /// EstimateRuntime - Make a rough estimate for how long it will take to run
452 /// the specified code.
455  unsigned Time = 0;
456  for (; I != E; ++I) {
457  if (I->isDebugValue())
458  continue;
459  if (I->isCall())
460  Time += 10;
461  else if (I->mayLoad() || I->mayStore())
462  Time += 2;
463  else
464  ++Time;
465  }
466  return Time;
467 }
468 
469 // CurMBB needs to add an unconditional branch to SuccMBB (we removed these
470 // branches temporarily for tail merging). In the case where CurMBB ends
471 // with a conditional branch to the next block, optimize by reversing the
472 // test and conditionally branching to SuccMBB instead.
473 static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
474  const TargetInstrInfo *TII) {
475  MachineFunction *MF = CurMBB->getParent();
477  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
479  DebugLoc dl = CurMBB->findBranchDebugLoc();
480  if (I != MF->end() && !TII->analyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
481  MachineBasicBlock *NextBB = &*I;
482  if (TBB == NextBB && !Cond.empty() && !FBB) {
483  if (!TII->reverseBranchCondition(Cond)) {
484  TII->removeBranch(*CurMBB);
485  TII->insertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
486  return;
487  }
488  }
489  }
490  TII->insertBranch(*CurMBB, SuccBB, nullptr,
492 }
493 
494 bool
495 BranchFolder::MergePotentialsElt::operator<(const MergePotentialsElt &o) const {
496  if (getHash() < o.getHash())
497  return true;
498  if (getHash() > o.getHash())
499  return false;
500  if (getBlock()->getNumber() < o.getBlock()->getNumber())
501  return true;
502  if (getBlock()->getNumber() > o.getBlock()->getNumber())
503  return false;
504  // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
505  // an object with itself.
506 #ifndef _GLIBCXX_DEBUG
507  llvm_unreachable("Predecessor appears twice");
508 #else
509  return false;
510 #endif
511 }
512 
515  auto I = MergedBBFreq.find(MBB);
516 
517  if (I != MergedBBFreq.end())
518  return I->second;
519 
520  return MBFI.getBlockFreq(MBB);
521 }
522 
524  BlockFrequency F) {
525  MergedBBFreq[MBB] = F;
526 }
527 
528 raw_ostream &
530  const MachineBasicBlock *MBB) const {
531  return MBFI.printBlockFreq(OS, getBlockFreq(MBB));
532 }
533 
534 raw_ostream &
536  const BlockFrequency Freq) const {
537  return MBFI.printBlockFreq(OS, Freq);
538 }
539 
541  MBFI.view(Name, isSimple);
542 }
543 
544 uint64_t
546  return MBFI.getEntryFreq();
547 }
548 
549 /// CountTerminators - Count the number of terminators in the given
550 /// block and set I to the position of the first non-terminator, if there
551 /// is one, or MBB->end() otherwise.
552 static unsigned CountTerminators(MachineBasicBlock *MBB,
554  I = MBB->end();
555  unsigned NumTerms = 0;
556  while (true) {
557  if (I == MBB->begin()) {
558  I = MBB->end();
559  break;
560  }
561  --I;
562  if (!I->isTerminator()) break;
563  ++NumTerms;
564  }
565  return NumTerms;
566 }
567 
568 /// A no successor, non-return block probably ends in unreachable and is cold.
569 /// Also consider a block that ends in an indirect branch to be a return block,
570 /// since many targets use plain indirect branches to return.
571 static bool blockEndsInUnreachable(const MachineBasicBlock *MBB) {
572  if (!MBB->succ_empty())
573  return false;
574  if (MBB->empty())
575  return true;
576  return !(MBB->back().isReturn() || MBB->back().isIndirectBranch());
577 }
578 
579 /// ProfitableToMerge - Check if two machine basic blocks have a common tail
580 /// and decide if it would be profitable to merge those tails. Return the
581 /// length of the common tail and iterators to the first common instruction
582 /// in each block.
583 /// MBB1, MBB2 The blocks to check
584 /// MinCommonTailLength Minimum size of tail block to be merged.
585 /// CommonTailLen Out parameter to record the size of the shared tail between
586 /// MBB1 and MBB2
587 /// I1, I2 Iterator references that will be changed to point to the first
588 /// instruction in the common tail shared by MBB1,MBB2
589 /// SuccBB A common successor of MBB1, MBB2 which are in a canonical form
590 /// relative to SuccBB
591 /// PredBB The layout predecessor of SuccBB, if any.
592 /// FuncletMembership map from block to funclet #.
593 /// AfterPlacement True if we are merging blocks after layout. Stricter
594 /// thresholds apply to prevent undoing tail-duplication.
595 static bool
597  unsigned MinCommonTailLength, unsigned &CommonTailLen,
600  MachineBasicBlock *PredBB,
601  DenseMap<const MachineBasicBlock *, int> &FuncletMembership,
602  bool AfterPlacement) {
603  // It is never profitable to tail-merge blocks from two different funclets.
604  if (!FuncletMembership.empty()) {
605  auto Funclet1 = FuncletMembership.find(MBB1);
606  assert(Funclet1 != FuncletMembership.end());
607  auto Funclet2 = FuncletMembership.find(MBB2);
608  assert(Funclet2 != FuncletMembership.end());
609  if (Funclet1->second != Funclet2->second)
610  return false;
611  }
612 
613  CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2);
614  if (CommonTailLen == 0)
615  return false;
616  DEBUG(dbgs() << "Common tail length of BB#" << MBB1->getNumber()
617  << " and BB#" << MBB2->getNumber() << " is " << CommonTailLen
618  << '\n');
619 
620  // It's almost always profitable to merge any number of non-terminator
621  // instructions with the block that falls through into the common successor.
622  // This is true only for a single successor. For multiple successors, we are
623  // trading a conditional branch for an unconditional one.
624  // TODO: Re-visit successor size for non-layout tail merging.
625  if ((MBB1 == PredBB || MBB2 == PredBB) &&
626  (!AfterPlacement || MBB1->succ_size() == 1)) {
628  unsigned NumTerms = CountTerminators(MBB1 == PredBB ? MBB2 : MBB1, I);
629  if (CommonTailLen > NumTerms)
630  return true;
631  }
632 
633  // If these are identical non-return blocks with no successors, merge them.
634  // Such blocks are typically cold calls to noreturn functions like abort, and
635  // are unlikely to become a fallthrough target after machine block placement.
636  // Tail merging these blocks is unlikely to create additional unconditional
637  // branches, and will reduce the size of this cold code.
638  if (I1 == MBB1->begin() && I2 == MBB2->begin() &&
640  return true;
641 
642  // If one of the blocks can be completely merged and happens to be in
643  // a position where the other could fall through into it, merge any number
644  // of instructions, because it can be done without a branch.
645  // TODO: If the blocks are not adjacent, move one of them so that they are?
646  if (MBB1->isLayoutSuccessor(MBB2) && I2 == MBB2->begin())
647  return true;
648  if (MBB2->isLayoutSuccessor(MBB1) && I1 == MBB1->begin())
649  return true;
650 
651  // If both blocks are identical and end in a branch, merge them unless they
652  // both have a fallthrough predecessor and successor.
653  // We can only do this after block placement because it depends on whether
654  // there are fallthroughs, and we don't know until after layout.
655  if (AfterPlacement && I1 == MBB1->begin() && I2 == MBB2->begin()) {
656  auto BothFallThrough = [](MachineBasicBlock *MBB) {
657  if (MBB->succ_size() != 0 && !MBB->canFallThrough())
658  return false;
660  MachineFunction *MF = MBB->getParent();
661  return (MBB != &*MF->begin()) && std::prev(I)->canFallThrough();
662  };
663  if (!BothFallThrough(MBB1) || !BothFallThrough(MBB2))
664  return true;
665  }
666 
667  // If both blocks have an unconditional branch temporarily stripped out,
668  // count that as an additional common instruction for the following
669  // heuristics. This heuristic is only accurate for single-succ blocks, so to
670  // make sure that during layout merging and duplicating don't crash, we check
671  // for that when merging during layout.
672  unsigned EffectiveTailLen = CommonTailLen;
673  if (SuccBB && MBB1 != PredBB && MBB2 != PredBB &&
674  (MBB1->succ_size() == 1 || !AfterPlacement) &&
675  !MBB1->back().isBarrier() &&
676  !MBB2->back().isBarrier())
677  ++EffectiveTailLen;
678 
679  // Check if the common tail is long enough to be worthwhile.
680  if (EffectiveTailLen >= MinCommonTailLength)
681  return true;
682 
683  // If we are optimizing for code size, 2 instructions in common is enough if
684  // we don't have to split a block. At worst we will be introducing 1 new
685  // branch instruction, which is likely to be smaller than the 2
686  // instructions that would be deleted in the merge.
687  MachineFunction *MF = MBB1->getParent();
688  return EffectiveTailLen >= 2 && MF->getFunction()->optForSize() &&
689  (I1 == MBB1->begin() || I2 == MBB2->begin());
690 }
691 
692 unsigned BranchFolder::ComputeSameTails(unsigned CurHash,
693  unsigned MinCommonTailLength,
694  MachineBasicBlock *SuccBB,
695  MachineBasicBlock *PredBB) {
696  unsigned maxCommonTailLength = 0U;
697  SameTails.clear();
698  MachineBasicBlock::iterator TrialBBI1, TrialBBI2;
699  MPIterator HighestMPIter = std::prev(MergePotentials.end());
700  for (MPIterator CurMPIter = std::prev(MergePotentials.end()),
701  B = MergePotentials.begin();
702  CurMPIter != B && CurMPIter->getHash() == CurHash; --CurMPIter) {
703  for (MPIterator I = std::prev(CurMPIter); I->getHash() == CurHash; --I) {
704  unsigned CommonTailLen;
705  if (ProfitableToMerge(CurMPIter->getBlock(), I->getBlock(),
706  MinCommonTailLength,
707  CommonTailLen, TrialBBI1, TrialBBI2,
708  SuccBB, PredBB,
709  FuncletMembership,
710  AfterBlockPlacement)) {
711  if (CommonTailLen > maxCommonTailLength) {
712  SameTails.clear();
713  maxCommonTailLength = CommonTailLen;
714  HighestMPIter = CurMPIter;
715  SameTails.push_back(SameTailElt(CurMPIter, TrialBBI1));
716  }
717  if (HighestMPIter == CurMPIter &&
718  CommonTailLen == maxCommonTailLength)
719  SameTails.push_back(SameTailElt(I, TrialBBI2));
720  }
721  if (I == B)
722  break;
723  }
724  }
725  return maxCommonTailLength;
726 }
727 
728 void BranchFolder::RemoveBlocksWithHash(unsigned CurHash,
729  MachineBasicBlock *SuccBB,
730  MachineBasicBlock *PredBB) {
731  MPIterator CurMPIter, B;
732  for (CurMPIter = std::prev(MergePotentials.end()),
733  B = MergePotentials.begin();
734  CurMPIter->getHash() == CurHash; --CurMPIter) {
735  // Put the unconditional branch back, if we need one.
736  MachineBasicBlock *CurMBB = CurMPIter->getBlock();
737  if (SuccBB && CurMBB != PredBB)
738  FixTail(CurMBB, SuccBB, TII);
739  if (CurMPIter == B)
740  break;
741  }
742  if (CurMPIter->getHash() != CurHash)
743  CurMPIter++;
744  MergePotentials.erase(CurMPIter, MergePotentials.end());
745 }
746 
747 bool BranchFolder::CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
748  MachineBasicBlock *SuccBB,
749  unsigned maxCommonTailLength,
750  unsigned &commonTailIndex) {
751  commonTailIndex = 0;
752  unsigned TimeEstimate = ~0U;
753  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
754  // Use PredBB if possible; that doesn't require a new branch.
755  if (SameTails[i].getBlock() == PredBB) {
756  commonTailIndex = i;
757  break;
758  }
759  // Otherwise, make a (fairly bogus) choice based on estimate of
760  // how long it will take the various blocks to execute.
761  unsigned t = EstimateRuntime(SameTails[i].getBlock()->begin(),
762  SameTails[i].getTailStartPos());
763  if (t <= TimeEstimate) {
764  TimeEstimate = t;
765  commonTailIndex = i;
766  }
767  }
768 
770  SameTails[commonTailIndex].getTailStartPos();
771  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
772 
773  DEBUG(dbgs() << "\nSplitting BB#" << MBB->getNumber() << ", size "
774  << maxCommonTailLength);
775 
776  // If the split block unconditionally falls-thru to SuccBB, it will be
777  // merged. In control flow terms it should then take SuccBB's name. e.g. If
778  // SuccBB is an inner loop, the common tail is still part of the inner loop.
779  const BasicBlock *BB = (SuccBB && MBB->succ_size() == 1) ?
780  SuccBB->getBasicBlock() : MBB->getBasicBlock();
781  MachineBasicBlock *newMBB = SplitMBBAt(*MBB, BBI, BB);
782  if (!newMBB) {
783  DEBUG(dbgs() << "... failed!");
784  return false;
785  }
786 
787  SameTails[commonTailIndex].setBlock(newMBB);
788  SameTails[commonTailIndex].setTailStartPos(newMBB->begin());
789 
790  // If we split PredBB, newMBB is the new predecessor.
791  if (PredBB == MBB)
792  PredBB = newMBB;
793 
794  return true;
795 }
796 
797 static void
799  MachineBasicBlock &MBBCommon) {
800  MachineBasicBlock *MBB = MBBIStartPos->getParent();
801  // Note CommonTailLen does not necessarily matches the size of
802  // the common BB nor all its instructions because of debug
803  // instructions differences.
804  unsigned CommonTailLen = 0;
805  for (auto E = MBB->end(); MBBIStartPos != E; ++MBBIStartPos)
806  ++CommonTailLen;
807 
810  MachineBasicBlock::reverse_iterator MBBICommon = MBBCommon.rbegin();
811  MachineBasicBlock::reverse_iterator MBBIECommon = MBBCommon.rend();
812 
813  while (CommonTailLen--) {
814  assert(MBBI != MBBIE && "Reached BB end within common tail length!");
815  (void)MBBIE;
816 
817  if (MBBI->isDebugValue()) {
818  ++MBBI;
819  continue;
820  }
821 
822  while ((MBBICommon != MBBIECommon) && MBBICommon->isDebugValue())
823  ++MBBICommon;
824 
825  assert(MBBICommon != MBBIECommon &&
826  "Reached BB end within common tail length!");
827  assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
828 
829  // Merge MMOs from memory operations in the common block.
830  if (MBBICommon->mayLoad() || MBBICommon->mayStore())
831  MBBICommon->setMemRefs(MBBICommon->mergeMemRefsWith(*MBBI));
832  // Drop undef flags if they aren't present in all merged instructions.
833  for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
834  MachineOperand &MO = MBBICommon->getOperand(I);
835  if (MO.isReg() && MO.isUndef()) {
836  const MachineOperand &OtherMO = MBBI->getOperand(I);
837  if (!OtherMO.isUndef())
838  MO.setIsUndef(false);
839  }
840  }
841 
842  ++MBBI;
843  ++MBBICommon;
844  }
845 }
846 
847 void BranchFolder::mergeCommonTails(unsigned commonTailIndex) {
848  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
849 
850  std::vector<MachineBasicBlock::iterator> NextCommonInsts(SameTails.size());
851  for (unsigned int i = 0 ; i != SameTails.size() ; ++i) {
852  if (i != commonTailIndex) {
853  NextCommonInsts[i] = SameTails[i].getTailStartPos();
854  mergeOperations(SameTails[i].getTailStartPos(), *MBB);
855  } else {
856  assert(SameTails[i].getTailStartPos() == MBB->begin() &&
857  "MBB is not a common tail only block");
858  }
859  }
860 
861  for (auto &MI : *MBB) {
862  if (MI.isDebugValue())
863  continue;
864  DebugLoc DL = MI.getDebugLoc();
865  for (unsigned int i = 0 ; i < NextCommonInsts.size() ; i++) {
866  if (i == commonTailIndex)
867  continue;
868 
869  auto &Pos = NextCommonInsts[i];
870  assert(Pos != SameTails[i].getBlock()->end() &&
871  "Reached BB end within common tail");
872  while (Pos->isDebugValue()) {
873  ++Pos;
874  assert(Pos != SameTails[i].getBlock()->end() &&
875  "Reached BB end within common tail");
876  }
877  assert(MI.isIdenticalTo(*Pos) && "Expected matching MIIs!");
878  DL = DILocation::getMergedLocation(DL, Pos->getDebugLoc());
879  NextCommonInsts[i] = ++Pos;
880  }
881  MI.setDebugLoc(DL);
882  }
883 
884  if (UpdateLiveIns) {
885  LivePhysRegs NewLiveIns(*TRI);
886  computeLiveIns(NewLiveIns, *MBB);
887 
888  // The flag merging may lead to some register uses no longer using the
889  // <undef> flag, add IMPLICIT_DEFs in the predecessors as necessary.
890  for (MachineBasicBlock *Pred : MBB->predecessors()) {
891  LiveRegs.init(*TRI);
892  LiveRegs.addLiveOuts(*Pred);
893  MachineBasicBlock::iterator InsertBefore = Pred->getFirstTerminator();
894  for (unsigned Reg : NewLiveIns) {
895  if (!LiveRegs.available(*MRI, Reg))
896  continue;
897  DebugLoc DL;
898  BuildMI(*Pred, InsertBefore, DL, TII->get(TargetOpcode::IMPLICIT_DEF),
899  Reg);
900  }
901  }
902 
903  MBB->clearLiveIns();
904  addLiveIns(*MBB, NewLiveIns);
905  }
906 }
907 
908 // See if any of the blocks in MergePotentials (which all have SuccBB as a
909 // successor, or all have no successor if it is null) can be tail-merged.
910 // If there is a successor, any blocks in MergePotentials that are not
911 // tail-merged and are not immediately before Succ must have an unconditional
912 // branch to Succ added (but the predecessor/successor lists need no
913 // adjustment). The lone predecessor of Succ that falls through into Succ,
914 // if any, is given in PredBB.
915 // MinCommonTailLength - Except for the special cases below, tail-merge if
916 // there are at least this many instructions in common.
917 bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
918  MachineBasicBlock *PredBB,
919  unsigned MinCommonTailLength) {
920  bool MadeChange = false;
921 
922  DEBUG(dbgs() << "\nTryTailMergeBlocks: ";
923  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
924  dbgs() << "BB#" << MergePotentials[i].getBlock()->getNumber()
925  << (i == e-1 ? "" : ", ");
926  dbgs() << "\n";
927  if (SuccBB) {
928  dbgs() << " with successor BB#" << SuccBB->getNumber() << '\n';
929  if (PredBB)
930  dbgs() << " which has fall-through from BB#"
931  << PredBB->getNumber() << "\n";
932  }
933  dbgs() << "Looking for common tails of at least "
934  << MinCommonTailLength << " instruction"
935  << (MinCommonTailLength == 1 ? "" : "s") << '\n';
936  );
937 
938  // Sort by hash value so that blocks with identical end sequences sort
939  // together.
940  array_pod_sort(MergePotentials.begin(), MergePotentials.end());
941 
942  // Walk through equivalence sets looking for actual exact matches.
943  while (MergePotentials.size() > 1) {
944  unsigned CurHash = MergePotentials.back().getHash();
945 
946  // Build SameTails, identifying the set of blocks with this hash code
947  // and with the maximum number of instructions in common.
948  unsigned maxCommonTailLength = ComputeSameTails(CurHash,
949  MinCommonTailLength,
950  SuccBB, PredBB);
951 
952  // If we didn't find any pair that has at least MinCommonTailLength
953  // instructions in common, remove all blocks with this hash code and retry.
954  if (SameTails.empty()) {
955  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
956  continue;
957  }
958 
959  // If one of the blocks is the entire common tail (and not the entry
960  // block, which we can't jump to), we can treat all blocks with this same
961  // tail at once. Use PredBB if that is one of the possibilities, as that
962  // will not introduce any extra branches.
963  MachineBasicBlock *EntryBB =
964  &MergePotentials.front().getBlock()->getParent()->front();
965  unsigned commonTailIndex = SameTails.size();
966  // If there are two blocks, check to see if one can be made to fall through
967  // into the other.
968  if (SameTails.size() == 2 &&
969  SameTails[0].getBlock()->isLayoutSuccessor(SameTails[1].getBlock()) &&
970  SameTails[1].tailIsWholeBlock())
971  commonTailIndex = 1;
972  else if (SameTails.size() == 2 &&
973  SameTails[1].getBlock()->isLayoutSuccessor(
974  SameTails[0].getBlock()) &&
975  SameTails[0].tailIsWholeBlock())
976  commonTailIndex = 0;
977  else {
978  // Otherwise just pick one, favoring the fall-through predecessor if
979  // there is one.
980  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
981  MachineBasicBlock *MBB = SameTails[i].getBlock();
982  if (MBB == EntryBB && SameTails[i].tailIsWholeBlock())
983  continue;
984  if (MBB == PredBB) {
985  commonTailIndex = i;
986  break;
987  }
988  if (SameTails[i].tailIsWholeBlock())
989  commonTailIndex = i;
990  }
991  }
992 
993  if (commonTailIndex == SameTails.size() ||
994  (SameTails[commonTailIndex].getBlock() == PredBB &&
995  !SameTails[commonTailIndex].tailIsWholeBlock())) {
996  // None of the blocks consist entirely of the common tail.
997  // Split a block so that one does.
998  if (!CreateCommonTailOnlyBlock(PredBB, SuccBB,
999  maxCommonTailLength, commonTailIndex)) {
1000  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
1001  continue;
1002  }
1003  }
1004 
1005  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
1006 
1007  // Recompute common tail MBB's edge weights and block frequency.
1008  setCommonTailEdgeWeights(*MBB);
1009 
1010  // Merge debug locations, MMOs and undef flags across identical instructions
1011  // for common tail.
1012  mergeCommonTails(commonTailIndex);
1013 
1014  // MBB is common tail. Adjust all other BB's to jump to this one.
1015  // Traversal must be forwards so erases work.
1016  DEBUG(dbgs() << "\nUsing common tail in BB#" << MBB->getNumber()
1017  << " for ");
1018  for (unsigned int i=0, e = SameTails.size(); i != e; ++i) {
1019  if (commonTailIndex == i)
1020  continue;
1021  DEBUG(dbgs() << "BB#" << SameTails[i].getBlock()->getNumber()
1022  << (i == e-1 ? "" : ", "));
1023  // Hack the end off BB i, making it jump to BB commonTailIndex instead.
1024  replaceTailWithBranchTo(SameTails[i].getTailStartPos(), *MBB);
1025  // BB i is no longer a predecessor of SuccBB; remove it from the worklist.
1026  MergePotentials.erase(SameTails[i].getMPIter());
1027  }
1028  DEBUG(dbgs() << "\n");
1029  // We leave commonTailIndex in the worklist in case there are other blocks
1030  // that match it with a smaller number of instructions.
1031  MadeChange = true;
1032  }
1033  return MadeChange;
1034 }
1035 
1036 bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
1037  bool MadeChange = false;
1038  if (!EnableTailMerge) return MadeChange;
1039 
1040  // First find blocks with no successors.
1041  // Block placement does not create new tail merging opportunities for these
1042  // blocks.
1043  if (!AfterBlockPlacement) {
1044  MergePotentials.clear();
1045  for (MachineBasicBlock &MBB : MF) {
1046  if (MergePotentials.size() == TailMergeThreshold)
1047  break;
1048  if (!TriedMerging.count(&MBB) && MBB.succ_empty())
1049  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(MBB), &MBB));
1050  }
1051 
1052  // If this is a large problem, avoid visiting the same basic blocks
1053  // multiple times.
1054  if (MergePotentials.size() == TailMergeThreshold)
1055  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1056  TriedMerging.insert(MergePotentials[i].getBlock());
1057 
1058  // See if we can do any tail merging on those.
1059  if (MergePotentials.size() >= 2)
1060  MadeChange |= TryTailMergeBlocks(nullptr, nullptr, MinCommonTailLength);
1061  }
1062 
1063  // Look at blocks (IBB) with multiple predecessors (PBB).
1064  // We change each predecessor to a canonical form, by
1065  // (1) temporarily removing any unconditional branch from the predecessor
1066  // to IBB, and
1067  // (2) alter conditional branches so they branch to the other block
1068  // not IBB; this may require adding back an unconditional branch to IBB
1069  // later, where there wasn't one coming in. E.g.
1070  // Bcc IBB
1071  // fallthrough to QBB
1072  // here becomes
1073  // Bncc QBB
1074  // with a conceptual B to IBB after that, which never actually exists.
1075  // With those changes, we see whether the predecessors' tails match,
1076  // and merge them if so. We change things out of canonical form and
1077  // back to the way they were later in the process. (OptimizeBranches
1078  // would undo some of this, but we can't use it, because we'd get into
1079  // a compile-time infinite loop repeatedly doing and undoing the same
1080  // transformations.)
1081 
1082  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1083  I != E; ++I) {
1084  if (I->pred_size() < 2) continue;
1086  MachineBasicBlock *IBB = &*I;
1087  MachineBasicBlock *PredBB = &*std::prev(I);
1088  MergePotentials.clear();
1089  MachineLoop *ML;
1090 
1091  // Bail if merging after placement and IBB is the loop header because
1092  // -- If merging predecessors that belong to the same loop as IBB, the
1093  // common tail of merged predecessors may become the loop top if block
1094  // placement is called again and the predecessors may branch to this common
1095  // tail and require more branches. This can be relaxed if
1096  // MachineBlockPlacement::findBestLoopTop is more flexible.
1097  // --If merging predecessors that do not belong to the same loop as IBB, the
1098  // loop info of IBB's loop and the other loops may be affected. Calling the
1099  // block placement again may make big change to the layout and eliminate the
1100  // reason to do tail merging here.
1101  if (AfterBlockPlacement && MLI) {
1102  ML = MLI->getLoopFor(IBB);
1103  if (ML && IBB == ML->getHeader())
1104  continue;
1105  }
1106 
1107  for (MachineBasicBlock *PBB : I->predecessors()) {
1108  if (MergePotentials.size() == TailMergeThreshold)
1109  break;
1110 
1111  if (TriedMerging.count(PBB))
1112  continue;
1113 
1114  // Skip blocks that loop to themselves, can't tail merge these.
1115  if (PBB == IBB)
1116  continue;
1117 
1118  // Visit each predecessor only once.
1119  if (!UniquePreds.insert(PBB).second)
1120  continue;
1121 
1122  // Skip blocks which may jump to a landing pad. Can't tail merge these.
1123  if (PBB->hasEHPadSuccessor())
1124  continue;
1125 
1126  // After block placement, only consider predecessors that belong to the
1127  // same loop as IBB. The reason is the same as above when skipping loop
1128  // header.
1129  if (AfterBlockPlacement && MLI)
1130  if (ML != MLI->getLoopFor(PBB))
1131  continue;
1132 
1133  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1135  if (!TII->analyzeBranch(*PBB, TBB, FBB, Cond, true)) {
1136  // Failing case: IBB is the target of a cbr, and we cannot reverse the
1137  // branch.
1138  SmallVector<MachineOperand, 4> NewCond(Cond);
1139  if (!Cond.empty() && TBB == IBB) {
1140  if (TII->reverseBranchCondition(NewCond))
1141  continue;
1142  // This is the QBB case described above
1143  if (!FBB) {
1144  auto Next = ++PBB->getIterator();
1145  if (Next != MF.end())
1146  FBB = &*Next;
1147  }
1148  }
1149 
1150  // Failing case: the only way IBB can be reached from PBB is via
1151  // exception handling. Happens for landing pads. Would be nice to have
1152  // a bit in the edge so we didn't have to do all this.
1153  if (IBB->isEHPad()) {
1154  MachineFunction::iterator IP = ++PBB->getIterator();
1155  MachineBasicBlock *PredNextBB = nullptr;
1156  if (IP != MF.end())
1157  PredNextBB = &*IP;
1158  if (!TBB) {
1159  if (IBB != PredNextBB) // fallthrough
1160  continue;
1161  } else if (FBB) {
1162  if (TBB != IBB && FBB != IBB) // cbr then ubr
1163  continue;
1164  } else if (Cond.empty()) {
1165  if (TBB != IBB) // ubr
1166  continue;
1167  } else {
1168  if (TBB != IBB && IBB != PredNextBB) // cbr
1169  continue;
1170  }
1171  }
1172 
1173  // Remove the unconditional branch at the end, if any.
1174  if (TBB && (Cond.empty() || FBB)) {
1175  DebugLoc dl = PBB->findBranchDebugLoc();
1176  TII->removeBranch(*PBB);
1177  if (!Cond.empty())
1178  // reinsert conditional branch only, for now
1179  TII->insertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
1180  NewCond, dl);
1181  }
1182 
1183  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(*PBB), PBB));
1184  }
1185  }
1186 
1187  // If this is a large problem, avoid visiting the same basic blocks multiple
1188  // times.
1189  if (MergePotentials.size() == TailMergeThreshold)
1190  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1191  TriedMerging.insert(MergePotentials[i].getBlock());
1192 
1193  if (MergePotentials.size() >= 2)
1194  MadeChange |= TryTailMergeBlocks(IBB, PredBB, MinCommonTailLength);
1195 
1196  // Reinsert an unconditional branch if needed. The 1 below can occur as a
1197  // result of removing blocks in TryTailMergeBlocks.
1198  PredBB = &*std::prev(I); // this may have been changed in TryTailMergeBlocks
1199  if (MergePotentials.size() == 1 &&
1200  MergePotentials.begin()->getBlock() != PredBB)
1201  FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
1202  }
1203 
1204  return MadeChange;
1205 }
1206 
1207 void BranchFolder::setCommonTailEdgeWeights(MachineBasicBlock &TailMBB) {
1208  SmallVector<BlockFrequency, 2> EdgeFreqLs(TailMBB.succ_size());
1209  BlockFrequency AccumulatedMBBFreq;
1210 
1211  // Aggregate edge frequency of successor edge j:
1212  // edgeFreq(j) = sum (freq(bb) * edgeProb(bb, j)),
1213  // where bb is a basic block that is in SameTails.
1214  for (const auto &Src : SameTails) {
1215  const MachineBasicBlock *SrcMBB = Src.getBlock();
1216  BlockFrequency BlockFreq = MBBFreqInfo.getBlockFreq(SrcMBB);
1217  AccumulatedMBBFreq += BlockFreq;
1218 
1219  // It is not necessary to recompute edge weights if TailBB has less than two
1220  // successors.
1221  if (TailMBB.succ_size() <= 1)
1222  continue;
1223 
1224  auto EdgeFreq = EdgeFreqLs.begin();
1225 
1226  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1227  SuccI != SuccE; ++SuccI, ++EdgeFreq)
1228  *EdgeFreq += BlockFreq * MBPI.getEdgeProbability(SrcMBB, *SuccI);
1229  }
1230 
1231  MBBFreqInfo.setBlockFreq(&TailMBB, AccumulatedMBBFreq);
1232 
1233  if (TailMBB.succ_size() <= 1)
1234  return;
1235 
1236  auto SumEdgeFreq =
1237  std::accumulate(EdgeFreqLs.begin(), EdgeFreqLs.end(), BlockFrequency(0))
1238  .getFrequency();
1239  auto EdgeFreq = EdgeFreqLs.begin();
1240 
1241  if (SumEdgeFreq > 0) {
1242  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1243  SuccI != SuccE; ++SuccI, ++EdgeFreq) {
1245  EdgeFreq->getFrequency(), SumEdgeFreq);
1246  TailMBB.setSuccProbability(SuccI, Prob);
1247  }
1248  }
1249 }
1250 
1251 //===----------------------------------------------------------------------===//
1252 // Branch Optimization
1253 //===----------------------------------------------------------------------===//
1254 
1255 bool BranchFolder::OptimizeBranches(MachineFunction &MF) {
1256  bool MadeChange = false;
1257 
1258  // Make sure blocks are numbered in order
1259  MF.RenumberBlocks();
1260  // Renumbering blocks alters funclet membership, recalculate it.
1261  FuncletMembership = getFuncletMembership(MF);
1262 
1263  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1264  I != E; ) {
1265  MachineBasicBlock *MBB = &*I++;
1266  MadeChange |= OptimizeBlock(MBB);
1267 
1268  // If it is dead, remove it.
1269  if (MBB->pred_empty()) {
1270  RemoveDeadBlock(MBB);
1271  MadeChange = true;
1272  ++NumDeadBlocks;
1273  }
1274  }
1275 
1276  return MadeChange;
1277 }
1278 
1279 // Blocks should be considered empty if they contain only debug info;
1280 // else the debug info would affect codegen.
1281 static bool IsEmptyBlock(MachineBasicBlock *MBB) {
1282  return MBB->getFirstNonDebugInstr() == MBB->end();
1283 }
1284 
1285 // Blocks with only debug info and branches should be considered the same
1286 // as blocks with only branches.
1289  assert(I != MBB->end() && "empty block!");
1290  return I->isBranch();
1291 }
1292 
1293 /// IsBetterFallthrough - Return true if it would be clearly better to
1294 /// fall-through to MBB1 than to fall through into MBB2. This has to return
1295 /// a strict ordering, returning true for both (MBB1,MBB2) and (MBB2,MBB1) will
1296 /// result in infinite loops.
1298  MachineBasicBlock *MBB2) {
1299  // Right now, we use a simple heuristic. If MBB2 ends with a call, and
1300  // MBB1 doesn't, we prefer to fall through into MBB1. This allows us to
1301  // optimize branches that branch to either a return block or an assert block
1302  // into a fallthrough to the return.
1305  if (MBB1I == MBB1->end() || MBB2I == MBB2->end())
1306  return false;
1307 
1308  // If there is a clear successor ordering we make sure that one block
1309  // will fall through to the next
1310  if (MBB1->isSuccessor(MBB2)) return true;
1311  if (MBB2->isSuccessor(MBB1)) return false;
1312 
1313  return MBB2I->isCall() && !MBB1I->isCall();
1314 }
1315 
1316 /// getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch
1317 /// instructions on the block.
1320  if (I != MBB.end() && I->isBranch())
1321  return I->getDebugLoc();
1322  return DebugLoc();
1323 }
1324 
1325 bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
1326  bool MadeChange = false;
1327  MachineFunction &MF = *MBB->getParent();
1328 ReoptimizeBlock:
1329 
1330  MachineFunction::iterator FallThrough = MBB->getIterator();
1331  ++FallThrough;
1332 
1333  // Make sure MBB and FallThrough belong to the same funclet.
1334  bool SameFunclet = true;
1335  if (!FuncletMembership.empty() && FallThrough != MF.end()) {
1336  auto MBBFunclet = FuncletMembership.find(MBB);
1337  assert(MBBFunclet != FuncletMembership.end());
1338  auto FallThroughFunclet = FuncletMembership.find(&*FallThrough);
1339  assert(FallThroughFunclet != FuncletMembership.end());
1340  SameFunclet = MBBFunclet->second == FallThroughFunclet->second;
1341  }
1342 
1343  // If this block is empty, make everyone use its fall-through, not the block
1344  // explicitly. Landing pads should not do this since the landing-pad table
1345  // points to this block. Blocks with their addresses taken shouldn't be
1346  // optimized away.
1347  if (IsEmptyBlock(MBB) && !MBB->isEHPad() && !MBB->hasAddressTaken() &&
1348  SameFunclet) {
1349  // Dead block? Leave for cleanup later.
1350  if (MBB->pred_empty()) return MadeChange;
1351 
1352  if (FallThrough == MF.end()) {
1353  // TODO: Simplify preds to not branch here if possible!
1354  } else if (FallThrough->isEHPad()) {
1355  // Don't rewrite to a landing pad fallthough. That could lead to the case
1356  // where a BB jumps to more than one landing pad.
1357  // TODO: Is it ever worth rewriting predecessors which don't already
1358  // jump to a landing pad, and so can safely jump to the fallthrough?
1359  } else if (MBB->isSuccessor(&*FallThrough)) {
1360  // Rewrite all predecessors of the old block to go to the fallthrough
1361  // instead.
1362  while (!MBB->pred_empty()) {
1363  MachineBasicBlock *Pred = *(MBB->pred_end()-1);
1364  Pred->ReplaceUsesOfBlockWith(MBB, &*FallThrough);
1365  }
1366  // If MBB was the target of a jump table, update jump tables to go to the
1367  // fallthrough instead.
1368  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1369  MJTI->ReplaceMBBInJumpTables(MBB, &*FallThrough);
1370  MadeChange = true;
1371  }
1372  return MadeChange;
1373  }
1374 
1375  // Check to see if we can simplify the terminator of the block before this
1376  // one.
1377  MachineBasicBlock &PrevBB = *std::prev(MachineFunction::iterator(MBB));
1378 
1379  MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;
1381  bool PriorUnAnalyzable =
1382  TII->analyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1383  if (!PriorUnAnalyzable) {
1384  // If the CFG for the prior block has extra edges, remove them.
1385  MadeChange |= PrevBB.CorrectExtraCFGEdges(PriorTBB, PriorFBB,
1386  !PriorCond.empty());
1387 
1388  // If the previous branch is conditional and both conditions go to the same
1389  // destination, remove the branch, replacing it with an unconditional one or
1390  // a fall-through.
1391  if (PriorTBB && PriorTBB == PriorFBB) {
1392  DebugLoc dl = getBranchDebugLoc(PrevBB);
1393  TII->removeBranch(PrevBB);
1394  PriorCond.clear();
1395  if (PriorTBB != MBB)
1396  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1397  MadeChange = true;
1398  ++NumBranchOpts;
1399  goto ReoptimizeBlock;
1400  }
1401 
1402  // If the previous block unconditionally falls through to this block and
1403  // this block has no other predecessors, move the contents of this block
1404  // into the prior block. This doesn't usually happen when SimplifyCFG
1405  // has been used, but it can happen if tail merging splits a fall-through
1406  // predecessor of a block.
1407  // This has to check PrevBB->succ_size() because EH edges are ignored by
1408  // AnalyzeBranch.
1409  if (PriorCond.empty() && !PriorTBB && MBB->pred_size() == 1 &&
1410  PrevBB.succ_size() == 1 &&
1411  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1412  DEBUG(dbgs() << "\nMerging into block: " << PrevBB
1413  << "From MBB: " << *MBB);
1414  // Remove redundant DBG_VALUEs first.
1415  if (PrevBB.begin() != PrevBB.end()) {
1416  MachineBasicBlock::iterator PrevBBIter = PrevBB.end();
1417  --PrevBBIter;
1418  MachineBasicBlock::iterator MBBIter = MBB->begin();
1419  // Check if DBG_VALUE at the end of PrevBB is identical to the
1420  // DBG_VALUE at the beginning of MBB.
1421  while (PrevBBIter != PrevBB.begin() && MBBIter != MBB->end()
1422  && PrevBBIter->isDebugValue() && MBBIter->isDebugValue()) {
1423  if (!MBBIter->isIdenticalTo(*PrevBBIter))
1424  break;
1425  MachineInstr &DuplicateDbg = *MBBIter;
1426  ++MBBIter; -- PrevBBIter;
1427  DuplicateDbg.eraseFromParent();
1428  }
1429  }
1430  PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end());
1431  PrevBB.removeSuccessor(PrevBB.succ_begin());
1432  assert(PrevBB.succ_empty());
1433  PrevBB.transferSuccessors(MBB);
1434  MadeChange = true;
1435  return MadeChange;
1436  }
1437 
1438  // If the previous branch *only* branches to *this* block (conditional or
1439  // not) remove the branch.
1440  if (PriorTBB == MBB && !PriorFBB) {
1441  TII->removeBranch(PrevBB);
1442  MadeChange = true;
1443  ++NumBranchOpts;
1444  goto ReoptimizeBlock;
1445  }
1446 
1447  // If the prior block branches somewhere else on the condition and here if
1448  // the condition is false, remove the uncond second branch.
1449  if (PriorFBB == MBB) {
1450  DebugLoc dl = getBranchDebugLoc(PrevBB);
1451  TII->removeBranch(PrevBB);
1452  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1453  MadeChange = true;
1454  ++NumBranchOpts;
1455  goto ReoptimizeBlock;
1456  }
1457 
1458  // If the prior block branches here on true and somewhere else on false, and
1459  // if the branch condition is reversible, reverse the branch to create a
1460  // fall-through.
1461  if (PriorTBB == MBB) {
1462  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1463  if (!TII->reverseBranchCondition(NewPriorCond)) {
1464  DebugLoc dl = getBranchDebugLoc(PrevBB);
1465  TII->removeBranch(PrevBB);
1466  TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
1467  MadeChange = true;
1468  ++NumBranchOpts;
1469  goto ReoptimizeBlock;
1470  }
1471  }
1472 
1473  // If this block has no successors (e.g. it is a return block or ends with
1474  // a call to a no-return function like abort or __cxa_throw) and if the pred
1475  // falls through into this block, and if it would otherwise fall through
1476  // into the block after this, move this block to the end of the function.
1477  //
1478  // We consider it more likely that execution will stay in the function (e.g.
1479  // due to loops) than it is to exit it. This asserts in loops etc, moving
1480  // the assert condition out of the loop body.
1481  if (MBB->succ_empty() && !PriorCond.empty() && !PriorFBB &&
1482  MachineFunction::iterator(PriorTBB) == FallThrough &&
1483  !MBB->canFallThrough()) {
1484  bool DoTransform = true;
1485 
1486  // We have to be careful that the succs of PredBB aren't both no-successor
1487  // blocks. If neither have successors and if PredBB is the second from
1488  // last block in the function, we'd just keep swapping the two blocks for
1489  // last. Only do the swap if one is clearly better to fall through than
1490  // the other.
1491  if (FallThrough == --MF.end() &&
1492  !IsBetterFallthrough(PriorTBB, MBB))
1493  DoTransform = false;
1494 
1495  if (DoTransform) {
1496  // Reverse the branch so we will fall through on the previous true cond.
1497  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1498  if (!TII->reverseBranchCondition(NewPriorCond)) {
1499  DEBUG(dbgs() << "\nMoving MBB: " << *MBB
1500  << "To make fallthrough to: " << *PriorTBB << "\n");
1501 
1502  DebugLoc dl = getBranchDebugLoc(PrevBB);
1503  TII->removeBranch(PrevBB);
1504  TII->insertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
1505 
1506  // Move this block to the end of the function.
1507  MBB->moveAfter(&MF.back());
1508  MadeChange = true;
1509  ++NumBranchOpts;
1510  return MadeChange;
1511  }
1512  }
1513  }
1514  }
1515 
1516  if (!IsEmptyBlock(MBB) && MBB->pred_size() == 1 &&
1517  MF.getFunction()->optForSize()) {
1518  // Changing "Jcc foo; foo: jmp bar;" into "Jcc bar;" might change the branch
1519  // direction, thereby defeating careful block placement and regressing
1520  // performance. Therefore, only consider this for optsize functions.
1522  if (TII->isUnconditionalTailCall(TailCall)) {
1523  MachineBasicBlock *Pred = *MBB->pred_begin();
1524  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1526  bool PredAnalyzable =
1527  !TII->analyzeBranch(*Pred, PredTBB, PredFBB, PredCond, true);
1528 
1529  if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB &&
1530  PredTBB != PredFBB) {
1531  // The predecessor has a conditional branch to this block which consists
1532  // of only a tail call. Try to fold the tail call into the conditional
1533  // branch.
1534  if (TII->canMakeTailCallConditional(PredCond, TailCall)) {
1535  // TODO: It would be nice if analyzeBranch() could provide a pointer
1536  // to the branch instruction so replaceBranchWithTailCall() doesn't
1537  // have to search for it.
1538  TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall);
1539  ++NumTailCalls;
1540  Pred->removeSuccessor(MBB);
1541  MadeChange = true;
1542  return MadeChange;
1543  }
1544  }
1545  // If the predecessor is falling through to this block, we could reverse
1546  // the branch condition and fold the tail call into that. However, after
1547  // that we might have to re-arrange the CFG to fall through to the other
1548  // block and there is a high risk of regressing code size rather than
1549  // improving it.
1550  }
1551  }
1552 
1553  // Analyze the branch in the current block.
1554  MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr;
1556  bool CurUnAnalyzable =
1557  TII->analyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1558  if (!CurUnAnalyzable) {
1559  // If the CFG for the prior block has extra edges, remove them.
1560  MadeChange |= MBB->CorrectExtraCFGEdges(CurTBB, CurFBB, !CurCond.empty());
1561 
1562  // If this is a two-way branch, and the FBB branches to this block, reverse
1563  // the condition so the single-basic-block loop is faster. Instead of:
1564  // Loop: xxx; jcc Out; jmp Loop
1565  // we want:
1566  // Loop: xxx; jncc Loop; jmp Out
1567  if (CurTBB && CurFBB && CurFBB == MBB && CurTBB != MBB) {
1568  SmallVector<MachineOperand, 4> NewCond(CurCond);
1569  if (!TII->reverseBranchCondition(NewCond)) {
1570  DebugLoc dl = getBranchDebugLoc(*MBB);
1571  TII->removeBranch(*MBB);
1572  TII->insertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
1573  MadeChange = true;
1574  ++NumBranchOpts;
1575  goto ReoptimizeBlock;
1576  }
1577  }
1578 
1579  // If this branch is the only thing in its block, see if we can forward
1580  // other blocks across it.
1581  if (CurTBB && CurCond.empty() && !CurFBB &&
1582  IsBranchOnlyBlock(MBB) && CurTBB != MBB &&
1583  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1584  DebugLoc dl = getBranchDebugLoc(*MBB);
1585  // This block may contain just an unconditional branch. Because there can
1586  // be 'non-branch terminators' in the block, try removing the branch and
1587  // then seeing if the block is empty.
1588  TII->removeBranch(*MBB);
1589  // If the only things remaining in the block are debug info, remove these
1590  // as well, so this will behave the same as an empty block in non-debug
1591  // mode.
1592  if (IsEmptyBlock(MBB)) {
1593  // Make the block empty, losing the debug info (we could probably
1594  // improve this in some cases.)
1595  MBB->erase(MBB->begin(), MBB->end());
1596  }
1597  // If this block is just an unconditional branch to CurTBB, we can
1598  // usually completely eliminate the block. The only case we cannot
1599  // completely eliminate the block is when the block before this one
1600  // falls through into MBB and we can't understand the prior block's branch
1601  // condition.
1602  if (MBB->empty()) {
1603  bool PredHasNoFallThrough = !PrevBB.canFallThrough();
1604  if (PredHasNoFallThrough || !PriorUnAnalyzable ||
1605  !PrevBB.isSuccessor(MBB)) {
1606  // If the prior block falls through into us, turn it into an
1607  // explicit branch to us to make updates simpler.
1608  if (!PredHasNoFallThrough && PrevBB.isSuccessor(MBB) &&
1609  PriorTBB != MBB && PriorFBB != MBB) {
1610  if (!PriorTBB) {
1611  assert(PriorCond.empty() && !PriorFBB &&
1612  "Bad branch analysis");
1613  PriorTBB = MBB;
1614  } else {
1615  assert(!PriorFBB && "Machine CFG out of date!");
1616  PriorFBB = MBB;
1617  }
1618  DebugLoc pdl = getBranchDebugLoc(PrevBB);
1619  TII->removeBranch(PrevBB);
1620  TII->insertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
1621  }
1622 
1623  // Iterate through all the predecessors, revectoring each in-turn.
1624  size_t PI = 0;
1625  bool DidChange = false;
1626  bool HasBranchToSelf = false;
1627  while(PI != MBB->pred_size()) {
1628  MachineBasicBlock *PMBB = *(MBB->pred_begin() + PI);
1629  if (PMBB == MBB) {
1630  // If this block has an uncond branch to itself, leave it.
1631  ++PI;
1632  HasBranchToSelf = true;
1633  } else {
1634  DidChange = true;
1635  PMBB->ReplaceUsesOfBlockWith(MBB, CurTBB);
1636  // If this change resulted in PMBB ending in a conditional
1637  // branch where both conditions go to the same destination,
1638  // change this to an unconditional branch (and fix the CFG).
1639  MachineBasicBlock *NewCurTBB = nullptr, *NewCurFBB = nullptr;
1640  SmallVector<MachineOperand, 4> NewCurCond;
1641  bool NewCurUnAnalyzable = TII->analyzeBranch(
1642  *PMBB, NewCurTBB, NewCurFBB, NewCurCond, true);
1643  if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
1644  DebugLoc pdl = getBranchDebugLoc(*PMBB);
1645  TII->removeBranch(*PMBB);
1646  NewCurCond.clear();
1647  TII->insertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
1648  MadeChange = true;
1649  ++NumBranchOpts;
1650  PMBB->CorrectExtraCFGEdges(NewCurTBB, nullptr, false);
1651  }
1652  }
1653  }
1654 
1655  // Change any jumptables to go to the new MBB.
1656  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1657  MJTI->ReplaceMBBInJumpTables(MBB, CurTBB);
1658  if (DidChange) {
1659  ++NumBranchOpts;
1660  MadeChange = true;
1661  if (!HasBranchToSelf) return MadeChange;
1662  }
1663  }
1664  }
1665 
1666  // Add the branch back if the block is more than just an uncond branch.
1667  TII->insertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
1668  }
1669  }
1670 
1671  // If the prior block doesn't fall through into this block, and if this
1672  // block doesn't fall through into some other block, see if we can find a
1673  // place to move this block where a fall-through will happen.
1674  if (!PrevBB.canFallThrough()) {
1675  // Now we know that there was no fall-through into this block, check to
1676  // see if it has a fall-through into its successor.
1677  bool CurFallsThru = MBB->canFallThrough();
1678 
1679  if (!MBB->isEHPad()) {
1680  // Check all the predecessors of this block. If one of them has no fall
1681  // throughs, move this block right after it.
1682  for (MachineBasicBlock *PredBB : MBB->predecessors()) {
1683  // Analyze the branch at the end of the pred.
1684  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1686  if (PredBB != MBB && !PredBB->canFallThrough() &&
1687  !TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true) &&
1688  (!CurFallsThru || !CurTBB || !CurFBB) &&
1689  (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
1690  // If the current block doesn't fall through, just move it.
1691  // If the current block can fall through and does not end with a
1692  // conditional branch, we need to append an unconditional jump to
1693  // the (current) next block. To avoid a possible compile-time
1694  // infinite loop, move blocks only backward in this case.
1695  // Also, if there are already 2 branches here, we cannot add a third;
1696  // this means we have the case
1697  // Bcc next
1698  // B elsewhere
1699  // next:
1700  if (CurFallsThru) {
1701  MachineBasicBlock *NextBB = &*std::next(MBB->getIterator());
1702  CurCond.clear();
1703  TII->insertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
1704  }
1705  MBB->moveAfter(PredBB);
1706  MadeChange = true;
1707  goto ReoptimizeBlock;
1708  }
1709  }
1710  }
1711 
1712  if (!CurFallsThru) {
1713  // Check all successors to see if we can move this block before it.
1714  for (MachineBasicBlock *SuccBB : MBB->successors()) {
1715  // Analyze the branch at the end of the block before the succ.
1716  MachineFunction::iterator SuccPrev = --SuccBB->getIterator();
1717 
1718  // If this block doesn't already fall-through to that successor, and if
1719  // the succ doesn't already have a block that can fall through into it,
1720  // and if the successor isn't an EH destination, we can arrange for the
1721  // fallthrough to happen.
1722  if (SuccBB != MBB && &*SuccPrev != MBB &&
1723  !SuccPrev->canFallThrough() && !CurUnAnalyzable &&
1724  !SuccBB->isEHPad()) {
1725  MBB->moveBefore(SuccBB);
1726  MadeChange = true;
1727  goto ReoptimizeBlock;
1728  }
1729  }
1730 
1731  // Okay, there is no really great place to put this block. If, however,
1732  // the block before this one would be a fall-through if this block were
1733  // removed, move this block to the end of the function. There is no real
1734  // advantage in "falling through" to an EH block, so we don't want to
1735  // perform this transformation for that case.
1736  //
1737  // Also, Windows EH introduced the possibility of an arbitrary number of
1738  // successors to a given block. The analyzeBranch call does not consider
1739  // exception handling and so we can get in a state where a block
1740  // containing a call is followed by multiple EH blocks that would be
1741  // rotated infinitely at the end of the function if the transformation
1742  // below were performed for EH "FallThrough" blocks. Therefore, even if
1743  // that appears not to be happening anymore, we should assume that it is
1744  // possible and not remove the "!FallThrough()->isEHPad" condition below.
1745  MachineBasicBlock *PrevTBB = nullptr, *PrevFBB = nullptr;
1747  if (FallThrough != MF.end() &&
1748  !FallThrough->isEHPad() &&
1749  !TII->analyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1750  PrevBB.isSuccessor(&*FallThrough)) {
1751  MBB->moveAfter(&MF.back());
1752  MadeChange = true;
1753  return MadeChange;
1754  }
1755  }
1756  }
1757 
1758  return MadeChange;
1759 }
1760 
1761 //===----------------------------------------------------------------------===//
1762 // Hoist Common Code
1763 //===----------------------------------------------------------------------===//
1764 
1765 bool BranchFolder::HoistCommonCode(MachineFunction &MF) {
1766  bool MadeChange = false;
1767  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ) {
1768  MachineBasicBlock *MBB = &*I++;
1769  MadeChange |= HoistCommonCodeInSuccs(MBB);
1770  }
1771 
1772  return MadeChange;
1773 }
1774 
1775 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
1776 /// its 'true' successor.
1778  MachineBasicBlock *TrueBB) {
1779  for (MachineBasicBlock *SuccBB : BB->successors())
1780  if (SuccBB != TrueBB)
1781  return SuccBB;
1782  return nullptr;
1783 }
1784 
1785 template <class Container>
1786 static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI,
1787  Container &Set) {
1789  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
1790  Set.insert(*AI);
1791  } else {
1792  Set.insert(Reg);
1793  }
1794 }
1795 
1796 /// findHoistingInsertPosAndDeps - Find the location to move common instructions
1797 /// in successors to. The location is usually just before the terminator,
1798 /// however if the terminator is a conditional branch and its previous
1799 /// instruction is the flag setting instruction, the previous instruction is
1800 /// the preferred location. This function also gathers uses and defs of the
1801 /// instructions from the insertion point to the end of the block. The data is
1802 /// used by HoistCommonCodeInSuccs to ensure safety.
1803 static
1805  const TargetInstrInfo *TII,
1806  const TargetRegisterInfo *TRI,
1807  SmallSet<unsigned,4> &Uses,
1808  SmallSet<unsigned,4> &Defs) {
1810  if (!TII->isUnpredicatedTerminator(*Loc))
1811  return MBB->end();
1812 
1813  for (const MachineOperand &MO : Loc->operands()) {
1814  if (!MO.isReg())
1815  continue;
1816  unsigned Reg = MO.getReg();
1817  if (!Reg)
1818  continue;
1819  if (MO.isUse()) {
1820  addRegAndItsAliases(Reg, TRI, Uses);
1821  } else {
1822  if (!MO.isDead())
1823  // Don't try to hoist code in the rare case the terminator defines a
1824  // register that is later used.
1825  return MBB->end();
1826 
1827  // If the terminator defines a register, make sure we don't hoist
1828  // the instruction whose def might be clobbered by the terminator.
1829  addRegAndItsAliases(Reg, TRI, Defs);
1830  }
1831  }
1832 
1833  if (Uses.empty())
1834  return Loc;
1835  if (Loc == MBB->begin())
1836  return MBB->end();
1837 
1838  // The terminator is probably a conditional branch, try not to separate the
1839  // branch from condition setting instruction.
1841  skipDebugInstructionsBackward(std::prev(Loc), MBB->begin());
1842 
1843  bool IsDef = false;
1844  for (const MachineOperand &MO : PI->operands()) {
1845  // If PI has a regmask operand, it is probably a call. Separate away.
1846  if (MO.isRegMask())
1847  return Loc;
1848  if (!MO.isReg() || MO.isUse())
1849  continue;
1850  unsigned Reg = MO.getReg();
1851  if (!Reg)
1852  continue;
1853  if (Uses.count(Reg)) {
1854  IsDef = true;
1855  break;
1856  }
1857  }
1858  if (!IsDef)
1859  // The condition setting instruction is not just before the conditional
1860  // branch.
1861  return Loc;
1862 
1863  // Be conservative, don't insert instruction above something that may have
1864  // side-effects. And since it's potentially bad to separate flag setting
1865  // instruction from the conditional branch, just abort the optimization
1866  // completely.
1867  // Also avoid moving code above predicated instruction since it's hard to
1868  // reason about register liveness with predicated instruction.
1869  bool DontMoveAcrossStore = true;
1870  if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI))
1871  return MBB->end();
1872 
1873  // Find out what registers are live. Note this routine is ignoring other live
1874  // registers which are only used by instructions in successor blocks.
1875  for (const MachineOperand &MO : PI->operands()) {
1876  if (!MO.isReg())
1877  continue;
1878  unsigned Reg = MO.getReg();
1879  if (!Reg)
1880  continue;
1881  if (MO.isUse()) {
1882  addRegAndItsAliases(Reg, TRI, Uses);
1883  } else {
1884  if (Uses.erase(Reg)) {
1886  for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1887  Uses.erase(*SubRegs); // Use sub-registers to be conservative
1888  }
1889  }
1890  addRegAndItsAliases(Reg, TRI, Defs);
1891  }
1892  }
1893 
1894  return PI;
1895 }
1896 
1897 bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
1898  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1900  if (TII->analyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1901  return false;
1902 
1903  if (!FBB) FBB = findFalseBlock(MBB, TBB);
1904  if (!FBB)
1905  // Malformed bcc? True and false blocks are the same?
1906  return false;
1907 
1908  // Restrict the optimization to cases where MBB is the only predecessor,
1909  // it is an obvious win.
1910  if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
1911  return false;
1912 
1913  // Find a suitable position to hoist the common instructions to. Also figure
1914  // out which registers are used or defined by instructions from the insertion
1915  // point to the end of the block.
1916  SmallSet<unsigned, 4> Uses, Defs;
1918  findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
1919  if (Loc == MBB->end())
1920  return false;
1921 
1922  bool HasDups = false;
1923  SmallVector<unsigned, 4> LocalDefs, LocalKills;
1924  SmallSet<unsigned, 4> ActiveDefsSet, AllDefsSet;
1925  MachineBasicBlock::iterator TIB = TBB->begin();
1926  MachineBasicBlock::iterator FIB = FBB->begin();
1927  MachineBasicBlock::iterator TIE = TBB->end();
1928  MachineBasicBlock::iterator FIE = FBB->end();
1929  while (TIB != TIE && FIB != FIE) {
1930  // Skip dbg_value instructions. These do not count.
1931  TIB = skipDebugInstructionsForward(TIB, TIE);
1932  FIB = skipDebugInstructionsForward(FIB, FIE);
1933  if (TIB == TIE || FIB == FIE)
1934  break;
1935 
1936  if (!TIB->isIdenticalTo(*FIB, MachineInstr::CheckKillDead))
1937  break;
1938 
1939  if (TII->isPredicated(*TIB))
1940  // Hard to reason about register liveness with predicated instruction.
1941  break;
1942 
1943  bool IsSafe = true;
1944  for (MachineOperand &MO : TIB->operands()) {
1945  // Don't attempt to hoist instructions with register masks.
1946  if (MO.isRegMask()) {
1947  IsSafe = false;
1948  break;
1949  }
1950  if (!MO.isReg())
1951  continue;
1952  unsigned Reg = MO.getReg();
1953  if (!Reg)
1954  continue;
1955  if (MO.isDef()) {
1956  if (Uses.count(Reg)) {
1957  // Avoid clobbering a register that's used by the instruction at
1958  // the point of insertion.
1959  IsSafe = false;
1960  break;
1961  }
1962 
1963  if (Defs.count(Reg) && !MO.isDead()) {
1964  // Don't hoist the instruction if the def would be clobber by the
1965  // instruction at the point insertion. FIXME: This is overly
1966  // conservative. It should be possible to hoist the instructions
1967  // in BB2 in the following example:
1968  // BB1:
1969  // r1, eflag = op1 r2, r3
1970  // brcc eflag
1971  //
1972  // BB2:
1973  // r1 = op2, ...
1974  // = op3, r1<kill>
1975  IsSafe = false;
1976  break;
1977  }
1978  } else if (!ActiveDefsSet.count(Reg)) {
1979  if (Defs.count(Reg)) {
1980  // Use is defined by the instruction at the point of insertion.
1981  IsSafe = false;
1982  break;
1983  }
1984 
1985  if (MO.isKill() && Uses.count(Reg))
1986  // Kills a register that's read by the instruction at the point of
1987  // insertion. Remove the kill marker.
1988  MO.setIsKill(false);
1989  }
1990  }
1991  if (!IsSafe)
1992  break;
1993 
1994  bool DontMoveAcrossStore = true;
1995  if (!TIB->isSafeToMove(nullptr, DontMoveAcrossStore))
1996  break;
1997 
1998  // Remove kills from ActiveDefsSet, these registers had short live ranges.
1999  for (const MachineOperand &MO : TIB->operands()) {
2000  if (!MO.isReg() || !MO.isUse() || !MO.isKill())
2001  continue;
2002  unsigned Reg = MO.getReg();
2003  if (!Reg)
2004  continue;
2005  if (!AllDefsSet.count(Reg)) {
2006  LocalKills.push_back(Reg);
2007  continue;
2008  }
2010  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
2011  ActiveDefsSet.erase(*AI);
2012  } else {
2013  ActiveDefsSet.erase(Reg);
2014  }
2015  }
2016 
2017  // Track local defs so we can update liveins.
2018  for (const MachineOperand &MO : TIB->operands()) {
2019  if (!MO.isReg() || !MO.isDef() || MO.isDead())
2020  continue;
2021  unsigned Reg = MO.getReg();
2022  if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg))
2023  continue;
2024  LocalDefs.push_back(Reg);
2025  addRegAndItsAliases(Reg, TRI, ActiveDefsSet);
2026  addRegAndItsAliases(Reg, TRI, AllDefsSet);
2027  }
2028 
2029  HasDups = true;
2030  ++TIB;
2031  ++FIB;
2032  }
2033 
2034  if (!HasDups)
2035  return false;
2036 
2037  MBB->splice(Loc, TBB, TBB->begin(), TIB);
2038  FBB->erase(FBB->begin(), FIB);
2039 
2040  // Update livein's.
2041  bool ChangedLiveIns = false;
2042  for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
2043  unsigned Def = LocalDefs[i];
2044  if (ActiveDefsSet.count(Def)) {
2045  TBB->addLiveIn(Def);
2046  FBB->addLiveIn(Def);
2047  ChangedLiveIns = true;
2048  }
2049  }
2050  for (unsigned K : LocalKills) {
2051  TBB->removeLiveIn(K);
2052  FBB->removeLiveIn(K);
2053  ChangedLiveIns = true;
2054  }
2055 
2056  if (ChangedLiveIns) {
2057  TBB->sortUniqueLiveIns();
2058  FBB->sortUniqueLiveIns();
2059  }
2060 
2061  ++NumHoist;
2062  return true;
2063 }
#define DEBUG_TYPE
void view(const Twine &Name, bool isSimple=true)
static unsigned EstimateRuntime(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
EstimateRuntime - Make a rough estimate for how long it will take to run the specified code...
void push_back(const T &Elt)
Definition: SmallVector.h:212
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:244
BitVector & set()
Definition: BitVector.h:398
A common definition of LaneBitmask for use in TableGen and CodeGen.
const std::vector< MachineJumpTableEntry > & getJumpTables() const
static cl::opt< unsigned > TailMergeThreshold("tail-merge-threshold", cl::desc("Max number of predecessors to consider tail merging"), cl::init(150), cl::Hidden)
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:235
MachineBasicBlock * getMBB() const
bool available(const MachineRegisterInfo &MRI, unsigned Reg) const
Returns true if register Reg and no aliasing register is in the set.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void RenumberBlocks(MachineBasicBlock *MBBFrom=nullptr)
RenumberBlocks - This discards all of the MachineBasicBlock numbers and recomputes them...
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
static LaneBitmask getAll()
Definition: LaneBitmask.h:84
iterator getFirstNonDebugInstr()
Returns an iterator to the first non-debug instruction in the basic block, or end().
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
unsigned getReg() const
getReg - Returns the register number.
void setIsUndef(bool Val=true)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Address of indexed Jump Table for switch.
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
static unsigned HashMachineInstr(const MachineInstr &MI)
HashMachineInstr - Compute a hash value for MI and its operands.
void RemoveJumpTable(unsigned Idx)
RemoveJumpTable - Mark the specific index as being dead.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
MachineBasicBlock reference.
STATISTIC(NumFunctions, "Total number of functions")
void moveAfter(MachineBasicBlock *NewBefore)
A debug info location.
Definition: DebugLoc.h:34
F(f)
static DebugLoc getBranchDebugLoc(MachineBasicBlock &MBB)
getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch instructions on the block...
virtual unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const
Remove the branching code at the end of the specific MBB.
bool erase(const T &V)
Definition: SmallSet.h:108
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
iterator_range< succ_iterator > successors()
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const
Returns true if the instruction is a terminator instruction that has not been predicated.
AnalysisUsage & addRequired()
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to &#39;Old&#39;, change the code and CFG so that it branches to &#39;N...
LLVM_NODISCARD bool empty() const
Definition: SmallSet.h:56
bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi, MachineLoopInfo *mli=nullptr, bool AfterPlacement=false)
Perhaps branch folding, tail merging and other CFG optimizations on the given function.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE, "Control Flow Optimizer", false, false) bool BranchFolderPass
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:293
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
Name of external global symbol.
Reg
All possible values of the reg field in the ModR/M byte.
static unsigned HashEndOfMBB(const MachineBasicBlock &MBB)
HashEndOfMBB - Hash the last instruction in the MBB.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:290
static bool IsEmptyBlock(MachineBasicBlock *MBB)
void removeBlock(MachineBasicBlock *BB)
This method completely removes BB from all data structures, including all of the Loop objects it is n...
Target-Independent Code Generator Pass Configuration Options.
BlockT * getHeader() const
Definition: LoopInfo.h:100
static bool isSimple(Instruction *I)
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
Definition: MachineInstr.h:488
static cl::opt< cl::boolOrDefault > FlagEnableTailMerge("enable-tail-merge", cl::init(cl::BOU_UNSET), cl::Hidden)
static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB, const TargetInstrInfo *TII)
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
static bool blockEndsInUnreachable(const MachineBasicBlock *MBB)
A no successor, non-return block probably ends in unreachable and is cold.
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
static MachineBasicBlock::iterator findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet< unsigned, 4 > &Uses, SmallSet< unsigned, 4 > &Defs)
findHoistingInsertPosAndDeps - Find the location to move common instructions in successors to...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
reverse_iterator rend()
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
reverse_iterator rbegin()
BasicBlockListType::iterator iterator
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F)
TargetInstrInfo - Interface to description of machine instruction set.
static void mergeOperations(MachineBasicBlock::iterator MBBIStartPos, MachineBasicBlock &MBBCommon)
bool isReturn(QueryType Type=AnyInBundle) const
Definition: MachineInstr.h:454
bool getEnableTailMerge() const
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
#define P(N)
Address of a global value.
virtual void ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail, MachineBasicBlock *NewDest) const
Delete the instruction OldInst and everything after it, replacing it with an unconditional branch to ...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:406
void array_pod_sort(IteratorTy Start, IteratorTy End)
array_pod_sort - This sorts an array with the specified start and end extent.
Definition: STLExtras.h:713
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const
Return true if it&#39;s legal to split the given basic block at the specified instruction (i...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:36
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:66
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
raw_ostream & printBlockFreq(raw_ostream &OS, const MachineBasicBlock *MBB) const
bool optForSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:530
static bool IsBetterFallthrough(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2)
IsBetterFallthrough - Return true if it would be clearly better to fall-through to MBB1 than to fall ...
self_iterator getIterator()
Definition: ilist_node.h:82
iterator_range< pred_iterator > predecessors()
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
void moveBefore(MachineBasicBlock *NewAfter)
Move &#39;this&#39; block before or after the specified block.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
virtual bool canMakeTailCallConditional(SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Returns true if the tail call can be made conditional on BranchCond.
static unsigned CountTerminators(MachineBasicBlock *MBB, MachineBasicBlock::iterator &I)
CountTerminators - Count the number of terminators in the given block and set I to the position of th...
virtual bool isPredicated(const MachineInstr &MI) const
Returns true if the instruction is already predicated.
static cl::opt< unsigned > TailMergeSize("tail-merge-size", cl::desc("Min number of instructions to consider tail merging"), cl::init(3), cl::Hidden)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)
Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date...
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB, const Instruction *ForInst=nullptr)
When two instructions are combined into a single instruction we also need to combine the original loc...
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
DenseMap< const MachineBasicBlock *, int > getFuncletMembership(const MachineFunction &MF)
Definition: Analysis.cpp:663
static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI, Container &Set)
static BranchProbability getBranchProbability(uint64_t Numerator, uint64_t Denominator)
void invalidateLiveness()
invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
int64_t getImm() const
unsigned pred_size() const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
unsigned succ_size() const
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const
Representation of each machine instruction.
Definition: MachineInstr.h:59
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:49
bool isEHPad() const
Returns true if the block is a landing pad.
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:61
BranchFolder(bool defaultEnableTailMerge, bool CommonHoist, MBFIWrapper &MBFI, const MachineBranchProbabilityInfo &MBPI, unsigned MinCommonTailLength=0)
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
int64_t getOffset() const
Return the offset from the symbol in this operand.
#define I(x, y, z)
Definition: MD5.cpp:58
Pair of physical register and lane mask.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
const MachineBasicBlock & back() const
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
static bool IsBranchOnlyBlock(MachineBasicBlock *MBB)
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Abstract Stack Frame Index.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineBasicBlock * findFalseBlock(MachineBasicBlock *BB, MachineBasicBlock *TrueBB)
findFalseBlock - BB has a fallthrough.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
virtual bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
void erase(iterator MBBI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void clear()
Clears the set.
Definition: LivePhysRegs.h:73
bool operator<(int64_t V1, const APSInt &V2)
Definition: APSInt.h:326
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
Return the innermost loop that BB lives in.
static bool ProfitableToMerge(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, unsigned MinCommonTailLength, unsigned &CommonTailLen, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2, MachineBasicBlock *SuccBB, MachineBasicBlock *PredBB, DenseMap< const MachineBasicBlock *, int > &FuncletMembership, bool AfterPlacement)
ProfitableToMerge - Check if two machine basic blocks have a common tail and decide if it would be pr...
virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB, SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Replace the conditional branch in MBB with a conditional tail call.
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
#define DEBUG(X)
Definition: Debug.h:118
This class keeps track of branch frequencies of newly created blocks and tail-merged blocks...
IRTranslator LLVM IR MI
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
Definition: MachineInstr.h:465
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
Returns true if the live-ins should be tracked after register allocation.
Address of indexed Constant in Constant Pool.
virtual bool isUnconditionalTailCall(const MachineInstr &MI) const
Returns true if MI is an unconditional tail call.
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:295
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool IsCond)
Various pieces of code can cause excess edges in the CFG to be inserted.
This class contains meta information specific to a module.
static unsigned ComputeCommonTailLength(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2)
ComputeCommonTailLength - Given two machine basic blocks, compute the number of instructions they act...
LoopInfoBase< MachineBasicBlock, MachineLoop > & getBase()
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:65