LLVM  9.0.0svn
BranchFolding.cpp
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1 //===- BranchFolding.cpp - Fold machine code branch instructions ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass forwards branches to unconditional branches to make them branch
10 // directly to the target block. This pass often results in dead MBB's, which
11 // it then removes.
12 //
13 // Note that this pass must be run after register allocation, it cannot handle
14 // SSA form. It also must handle virtual registers for targets that emit virtual
15 // ISA (e.g. NVPTX).
16 //
17 //===----------------------------------------------------------------------===//
18 
19 #include "BranchFolding.h"
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/DenseMap.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/Statistic.h"
27 #include "llvm/CodeGen/Analysis.h"
47 #include "llvm/IR/DebugLoc.h"
48 #include "llvm/IR/Function.h"
49 #include "llvm/MC/LaneBitmask.h"
50 #include "llvm/MC/MCRegisterInfo.h"
51 #include "llvm/Pass.h"
55 #include "llvm/Support/Debug.h"
59 #include <cassert>
60 #include <cstddef>
61 #include <iterator>
62 #include <numeric>
63 #include <vector>
64 
65 using namespace llvm;
66 
67 #define DEBUG_TYPE "branch-folder"
68 
69 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
70 STATISTIC(NumBranchOpts, "Number of branches optimized");
71 STATISTIC(NumTailMerge , "Number of block tails merged");
72 STATISTIC(NumHoist , "Number of times common instructions are hoisted");
73 STATISTIC(NumTailCalls, "Number of tail calls optimized");
74 
75 static cl::opt<cl::boolOrDefault> FlagEnableTailMerge("enable-tail-merge",
77 
78 // Throttle for huge numbers of predecessors (compile speed problems)
79 static cl::opt<unsigned>
80 TailMergeThreshold("tail-merge-threshold",
81  cl::desc("Max number of predecessors to consider tail merging"),
82  cl::init(150), cl::Hidden);
83 
84 // Heuristic for tail merging (and, inversely, tail duplication).
85 // TODO: This should be replaced with a target query.
86 static cl::opt<unsigned>
87 TailMergeSize("tail-merge-size",
88  cl::desc("Min number of instructions to consider tail merging"),
89  cl::init(3), cl::Hidden);
90 
91 namespace {
92 
93  /// BranchFolderPass - Wrap branch folder in a machine function pass.
94  class BranchFolderPass : public MachineFunctionPass {
95  public:
96  static char ID;
97 
98  explicit BranchFolderPass(): MachineFunctionPass(ID) {}
99 
100  bool runOnMachineFunction(MachineFunction &MF) override;
101 
102  void getAnalysisUsage(AnalysisUsage &AU) const override {
107  }
108  };
109 
110 } // end anonymous namespace
111 
112 char BranchFolderPass::ID = 0;
113 
115 
116 INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
117  "Control Flow Optimizer", false, false)
118 
119 bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
120  if (skipFunction(MF.getFunction()))
121  return false;
122 
123  TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
124  // TailMerge can create jump into if branches that make CFG irreducible for
125  // HW that requires structurized CFG.
126  bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
127  PassConfig->getEnableTailMerge();
128  BranchFolder::MBFIWrapper MBBFreqInfo(
129  getAnalysis<MachineBlockFrequencyInfo>());
130  BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
131  getAnalysis<MachineBranchProbabilityInfo>());
132  return Folder.OptimizeFunction(MF, MF.getSubtarget().getInstrInfo(),
133  MF.getSubtarget().getRegisterInfo(),
134  getAnalysisIfAvailable<MachineModuleInfo>());
135 }
136 
137 BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,
138  MBFIWrapper &FreqInfo,
139  const MachineBranchProbabilityInfo &ProbInfo,
140  unsigned MinTailLength)
141  : EnableHoistCommonCode(CommonHoist), MinCommonTailLength(MinTailLength),
142  MBBFreqInfo(FreqInfo), MBPI(ProbInfo) {
143  if (MinCommonTailLength == 0)
144  MinCommonTailLength = TailMergeSize;
145  switch (FlagEnableTailMerge) {
146  case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
147  case cl::BOU_TRUE: EnableTailMerge = true; break;
148  case cl::BOU_FALSE: EnableTailMerge = false; break;
149  }
150 }
151 
152 void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
153  assert(MBB->pred_empty() && "MBB must be dead!");
154  LLVM_DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
155 
156  MachineFunction *MF = MBB->getParent();
157  // drop all successors.
158  while (!MBB->succ_empty())
159  MBB->removeSuccessor(MBB->succ_end()-1);
160 
161  // Avoid matching if this pointer gets reused.
162  TriedMerging.erase(MBB);
163 
164  // Remove the block.
165  MF->erase(MBB);
166  EHScopeMembership.erase(MBB);
167  if (MLI)
168  MLI->removeBlock(MBB);
169 }
170 
172  const TargetInstrInfo *tii,
173  const TargetRegisterInfo *tri,
174  MachineModuleInfo *mmi,
175  MachineLoopInfo *mli, bool AfterPlacement) {
176  if (!tii) return false;
177 
178  TriedMerging.clear();
179 
180  MachineRegisterInfo &MRI = MF.getRegInfo();
181  AfterBlockPlacement = AfterPlacement;
182  TII = tii;
183  TRI = tri;
184  MMI = mmi;
185  MLI = mli;
186  this->MRI = &MRI;
187 
188  UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
189  if (!UpdateLiveIns)
190  MRI.invalidateLiveness();
191 
192  // Fix CFG. The later algorithms expect it to be right.
193  bool MadeChange = false;
194  for (MachineBasicBlock &MBB : MF) {
195  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
197  if (!TII->analyzeBranch(MBB, TBB, FBB, Cond, true))
198  MadeChange |= MBB.CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
199  }
200 
201  // Recalculate EH scope membership.
202  EHScopeMembership = getEHScopeMembership(MF);
203 
204  bool MadeChangeThisIteration = true;
205  while (MadeChangeThisIteration) {
206  MadeChangeThisIteration = TailMergeBlocks(MF);
207  // No need to clean up if tail merging does not change anything after the
208  // block placement.
209  if (!AfterBlockPlacement || MadeChangeThisIteration)
210  MadeChangeThisIteration |= OptimizeBranches(MF);
211  if (EnableHoistCommonCode)
212  MadeChangeThisIteration |= HoistCommonCode(MF);
213  MadeChange |= MadeChangeThisIteration;
214  }
215 
216  // See if any jump tables have become dead as the code generator
217  // did its thing.
218  MachineJumpTableInfo *JTI = MF.getJumpTableInfo();
219  if (!JTI)
220  return MadeChange;
221 
222  // Walk the function to find jump tables that are live.
223  BitVector JTIsLive(JTI->getJumpTables().size());
224  for (const MachineBasicBlock &BB : MF) {
225  for (const MachineInstr &I : BB)
226  for (const MachineOperand &Op : I.operands()) {
227  if (!Op.isJTI()) continue;
228 
229  // Remember that this JT is live.
230  JTIsLive.set(Op.getIndex());
231  }
232  }
233 
234  // Finally, remove dead jump tables. This happens when the
235  // indirect jump was unreachable (and thus deleted).
236  for (unsigned i = 0, e = JTIsLive.size(); i != e; ++i)
237  if (!JTIsLive.test(i)) {
238  JTI->RemoveJumpTable(i);
239  MadeChange = true;
240  }
241 
242  return MadeChange;
243 }
244 
245 //===----------------------------------------------------------------------===//
246 // Tail Merging of Blocks
247 //===----------------------------------------------------------------------===//
248 
249 /// HashMachineInstr - Compute a hash value for MI and its operands.
250 static unsigned HashMachineInstr(const MachineInstr &MI) {
251  unsigned Hash = MI.getOpcode();
252  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
253  const MachineOperand &Op = MI.getOperand(i);
254 
255  // Merge in bits from the operand if easy. We can't use MachineOperand's
256  // hash_code here because it's not deterministic and we sort by hash value
257  // later.
258  unsigned OperandHash = 0;
259  switch (Op.getType()) {
261  OperandHash = Op.getReg();
262  break;
264  OperandHash = Op.getImm();
265  break;
267  OperandHash = Op.getMBB()->getNumber();
268  break;
272  OperandHash = Op.getIndex();
273  break;
276  // Global address / external symbol are too hard, don't bother, but do
277  // pull in the offset.
278  OperandHash = Op.getOffset();
279  break;
280  default:
281  break;
282  }
283 
284  Hash += ((OperandHash << 3) | Op.getType()) << (i & 31);
285  }
286  return Hash;
287 }
288 
289 /// HashEndOfMBB - Hash the last instruction in the MBB.
290 static unsigned HashEndOfMBB(const MachineBasicBlock &MBB) {
292  if (I == MBB.end())
293  return 0;
294 
295  return HashMachineInstr(*I);
296 }
297 
298 /// Whether MI should be counted as an instruction when calculating common tail.
299 static bool countsAsInstruction(const MachineInstr &MI) {
300  return !(MI.isDebugInstr() || MI.isCFIInstruction());
301 }
302 
303 /// ComputeCommonTailLength - Given two machine basic blocks, compute the number
304 /// of instructions they actually have in common together at their end. Return
305 /// iterators for the first shared instruction in each block.
307  MachineBasicBlock *MBB2,
310  I1 = MBB1->end();
311  I2 = MBB2->end();
312 
313  unsigned TailLen = 0;
314  while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
315  --I1; --I2;
316  // Skip debugging pseudos; necessary to avoid changing the code.
317  while (!countsAsInstruction(*I1)) {
318  if (I1==MBB1->begin()) {
319  while (!countsAsInstruction(*I2)) {
320  if (I2==MBB2->begin()) {
321  // I1==DBG at begin; I2==DBG at begin
322  goto SkipTopCFIAndReturn;
323  }
324  --I2;
325  }
326  ++I2;
327  // I1==DBG at begin; I2==non-DBG, or first of DBGs not at begin
328  goto SkipTopCFIAndReturn;
329  }
330  --I1;
331  }
332  // I1==first (untested) non-DBG preceding known match
333  while (!countsAsInstruction(*I2)) {
334  if (I2==MBB2->begin()) {
335  ++I1;
336  // I1==non-DBG, or first of DBGs not at begin; I2==DBG at begin
337  goto SkipTopCFIAndReturn;
338  }
339  --I2;
340  }
341  // I1, I2==first (untested) non-DBGs preceding known match
342  if (!I1->isIdenticalTo(*I2) ||
343  // FIXME: This check is dubious. It's used to get around a problem where
344  // people incorrectly expect inline asm directives to remain in the same
345  // relative order. This is untenable because normal compiler
346  // optimizations (like this one) may reorder and/or merge these
347  // directives.
348  I1->isInlineAsm()) {
349  ++I1; ++I2;
350  break;
351  }
352  ++TailLen;
353  }
354  // Back past possible debugging pseudos at beginning of block. This matters
355  // when one block differs from the other only by whether debugging pseudos
356  // are present at the beginning. (This way, the various checks later for
357  // I1==MBB1->begin() work as expected.)
358  if (I1 == MBB1->begin() && I2 != MBB2->begin()) {
359  --I2;
360  while (I2->isDebugInstr()) {
361  if (I2 == MBB2->begin())
362  return TailLen;
363  --I2;
364  }
365  ++I2;
366  }
367  if (I2 == MBB2->begin() && I1 != MBB1->begin()) {
368  --I1;
369  while (I1->isDebugInstr()) {
370  if (I1 == MBB1->begin())
371  return TailLen;
372  --I1;
373  }
374  ++I1;
375  }
376 
377 SkipTopCFIAndReturn:
378  // Ensure that I1 and I2 do not point to a CFI_INSTRUCTION. This can happen if
379  // I1 and I2 are non-identical when compared and then one or both of them ends
380  // up pointing to a CFI instruction after being incremented. For example:
381  /*
382  BB1:
383  ...
384  INSTRUCTION_A
385  ADD32ri8 <- last common instruction
386  ...
387  BB2:
388  ...
389  INSTRUCTION_B
390  CFI_INSTRUCTION
391  ADD32ri8 <- last common instruction
392  ...
393  */
394  // When INSTRUCTION_A and INSTRUCTION_B are compared as not equal, after
395  // incrementing the iterators, I1 will point to ADD, however I2 will point to
396  // the CFI instruction. Later on, this leads to BB2 being 'hacked off' at the
397  // wrong place (in ReplaceTailWithBranchTo()) which results in losing this CFI
398  // instruction.
399  while (I1 != MBB1->end() && I1->isCFIInstruction()) {
400  ++I1;
401  }
402 
403  while (I2 != MBB2->end() && I2->isCFIInstruction()) {
404  ++I2;
405  }
406 
407  return TailLen;
408 }
409 
410 void BranchFolder::replaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
411  MachineBasicBlock &NewDest) {
412  if (UpdateLiveIns) {
413  // OldInst should always point to an instruction.
414  MachineBasicBlock &OldMBB = *OldInst->getParent();
415  LiveRegs.clear();
416  LiveRegs.addLiveOuts(OldMBB);
417  // Move backward to the place where will insert the jump.
418  MachineBasicBlock::iterator I = OldMBB.end();
419  do {
420  --I;
421  LiveRegs.stepBackward(*I);
422  } while (I != OldInst);
423 
424  // Merging the tails may have switched some undef operand to non-undef ones.
425  // Add IMPLICIT_DEFS into OldMBB as necessary to have a definition of the
426  // register.
427  for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) {
428  // We computed the liveins with computeLiveIn earlier and should only see
429  // full registers:
430  assert(P.LaneMask == LaneBitmask::getAll() &&
431  "Can only handle full register.");
432  MCPhysReg Reg = P.PhysReg;
433  if (!LiveRegs.available(*MRI, Reg))
434  continue;
435  DebugLoc DL;
436  BuildMI(OldMBB, OldInst, DL, TII->get(TargetOpcode::IMPLICIT_DEF), Reg);
437  }
438  }
439 
440  TII->ReplaceTailWithBranchTo(OldInst, &NewDest);
441  ++NumTailMerge;
442 }
443 
444 MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
446  const BasicBlock *BB) {
447  if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
448  return nullptr;
449 
450  MachineFunction &MF = *CurMBB.getParent();
451 
452  // Create the fall-through block.
453  MachineFunction::iterator MBBI = CurMBB.getIterator();
455  CurMBB.getParent()->insert(++MBBI, NewMBB);
456 
457  // Move all the successors of this block to the specified block.
458  NewMBB->transferSuccessors(&CurMBB);
459 
460  // Add an edge from CurMBB to NewMBB for the fall-through.
461  CurMBB.addSuccessor(NewMBB);
462 
463  // Splice the code over.
464  NewMBB->splice(NewMBB->end(), &CurMBB, BBI1, CurMBB.end());
465 
466  // NewMBB belongs to the same loop as CurMBB.
467  if (MLI)
468  if (MachineLoop *ML = MLI->getLoopFor(&CurMBB))
469  ML->addBasicBlockToLoop(NewMBB, MLI->getBase());
470 
471  // NewMBB inherits CurMBB's block frequency.
472  MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
473 
474  if (UpdateLiveIns)
475  computeAndAddLiveIns(LiveRegs, *NewMBB);
476 
477  // Add the new block to the EH scope.
478  const auto &EHScopeI = EHScopeMembership.find(&CurMBB);
479  if (EHScopeI != EHScopeMembership.end()) {
480  auto n = EHScopeI->second;
481  EHScopeMembership[NewMBB] = n;
482  }
483 
484  return NewMBB;
485 }
486 
487 /// EstimateRuntime - Make a rough estimate for how long it will take to run
488 /// the specified code.
491  unsigned Time = 0;
492  for (; I != E; ++I) {
493  if (!countsAsInstruction(*I))
494  continue;
495  if (I->isCall())
496  Time += 10;
497  else if (I->mayLoad() || I->mayStore())
498  Time += 2;
499  else
500  ++Time;
501  }
502  return Time;
503 }
504 
505 // CurMBB needs to add an unconditional branch to SuccMBB (we removed these
506 // branches temporarily for tail merging). In the case where CurMBB ends
507 // with a conditional branch to the next block, optimize by reversing the
508 // test and conditionally branching to SuccMBB instead.
509 static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
510  const TargetInstrInfo *TII) {
511  MachineFunction *MF = CurMBB->getParent();
513  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
515  DebugLoc dl = CurMBB->findBranchDebugLoc();
516  if (I != MF->end() && !TII->analyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
517  MachineBasicBlock *NextBB = &*I;
518  if (TBB == NextBB && !Cond.empty() && !FBB) {
519  if (!TII->reverseBranchCondition(Cond)) {
520  TII->removeBranch(*CurMBB);
521  TII->insertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
522  return;
523  }
524  }
525  }
526  TII->insertBranch(*CurMBB, SuccBB, nullptr,
528 }
529 
530 bool
531 BranchFolder::MergePotentialsElt::operator<(const MergePotentialsElt &o) const {
532  if (getHash() < o.getHash())
533  return true;
534  if (getHash() > o.getHash())
535  return false;
536  if (getBlock()->getNumber() < o.getBlock()->getNumber())
537  return true;
538  if (getBlock()->getNumber() > o.getBlock()->getNumber())
539  return false;
540  // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
541  // an object with itself.
542 #ifndef _GLIBCXX_DEBUG
543  llvm_unreachable("Predecessor appears twice");
544 #else
545  return false;
546 #endif
547 }
548 
551  auto I = MergedBBFreq.find(MBB);
552 
553  if (I != MergedBBFreq.end())
554  return I->second;
555 
556  return MBFI.getBlockFreq(MBB);
557 }
558 
560  BlockFrequency F) {
561  MergedBBFreq[MBB] = F;
562 }
563 
564 raw_ostream &
566  const MachineBasicBlock *MBB) const {
567  return MBFI.printBlockFreq(OS, getBlockFreq(MBB));
568 }
569 
570 raw_ostream &
572  const BlockFrequency Freq) const {
573  return MBFI.printBlockFreq(OS, Freq);
574 }
575 
577  MBFI.view(Name, isSimple);
578 }
579 
580 uint64_t
582  return MBFI.getEntryFreq();
583 }
584 
585 /// CountTerminators - Count the number of terminators in the given
586 /// block and set I to the position of the first non-terminator, if there
587 /// is one, or MBB->end() otherwise.
588 static unsigned CountTerminators(MachineBasicBlock *MBB,
590  I = MBB->end();
591  unsigned NumTerms = 0;
592  while (true) {
593  if (I == MBB->begin()) {
594  I = MBB->end();
595  break;
596  }
597  --I;
598  if (!I->isTerminator()) break;
599  ++NumTerms;
600  }
601  return NumTerms;
602 }
603 
604 /// A no successor, non-return block probably ends in unreachable and is cold.
605 /// Also consider a block that ends in an indirect branch to be a return block,
606 /// since many targets use plain indirect branches to return.
607 static bool blockEndsInUnreachable(const MachineBasicBlock *MBB) {
608  if (!MBB->succ_empty())
609  return false;
610  if (MBB->empty())
611  return true;
612  return !(MBB->back().isReturn() || MBB->back().isIndirectBranch());
613 }
614 
615 /// ProfitableToMerge - Check if two machine basic blocks have a common tail
616 /// and decide if it would be profitable to merge those tails. Return the
617 /// length of the common tail and iterators to the first common instruction
618 /// in each block.
619 /// MBB1, MBB2 The blocks to check
620 /// MinCommonTailLength Minimum size of tail block to be merged.
621 /// CommonTailLen Out parameter to record the size of the shared tail between
622 /// MBB1 and MBB2
623 /// I1, I2 Iterator references that will be changed to point to the first
624 /// instruction in the common tail shared by MBB1,MBB2
625 /// SuccBB A common successor of MBB1, MBB2 which are in a canonical form
626 /// relative to SuccBB
627 /// PredBB The layout predecessor of SuccBB, if any.
628 /// EHScopeMembership map from block to EH scope #.
629 /// AfterPlacement True if we are merging blocks after layout. Stricter
630 /// thresholds apply to prevent undoing tail-duplication.
631 static bool
633  unsigned MinCommonTailLength, unsigned &CommonTailLen,
636  MachineBasicBlock *PredBB,
637  DenseMap<const MachineBasicBlock *, int> &EHScopeMembership,
638  bool AfterPlacement) {
639  // It is never profitable to tail-merge blocks from two different EH scopes.
640  if (!EHScopeMembership.empty()) {
641  auto EHScope1 = EHScopeMembership.find(MBB1);
642  assert(EHScope1 != EHScopeMembership.end());
643  auto EHScope2 = EHScopeMembership.find(MBB2);
644  assert(EHScope2 != EHScopeMembership.end());
645  if (EHScope1->second != EHScope2->second)
646  return false;
647  }
648 
649  CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2);
650  if (CommonTailLen == 0)
651  return false;
652  LLVM_DEBUG(dbgs() << "Common tail length of " << printMBBReference(*MBB1)
653  << " and " << printMBBReference(*MBB2) << " is "
654  << CommonTailLen << '\n');
655 
656  // It's almost always profitable to merge any number of non-terminator
657  // instructions with the block that falls through into the common successor.
658  // This is true only for a single successor. For multiple successors, we are
659  // trading a conditional branch for an unconditional one.
660  // TODO: Re-visit successor size for non-layout tail merging.
661  if ((MBB1 == PredBB || MBB2 == PredBB) &&
662  (!AfterPlacement || MBB1->succ_size() == 1)) {
664  unsigned NumTerms = CountTerminators(MBB1 == PredBB ? MBB2 : MBB1, I);
665  if (CommonTailLen > NumTerms)
666  return true;
667  }
668 
669  // If these are identical non-return blocks with no successors, merge them.
670  // Such blocks are typically cold calls to noreturn functions like abort, and
671  // are unlikely to become a fallthrough target after machine block placement.
672  // Tail merging these blocks is unlikely to create additional unconditional
673  // branches, and will reduce the size of this cold code.
674  if (I1 == MBB1->begin() && I2 == MBB2->begin() &&
676  return true;
677 
678  // If one of the blocks can be completely merged and happens to be in
679  // a position where the other could fall through into it, merge any number
680  // of instructions, because it can be done without a branch.
681  // TODO: If the blocks are not adjacent, move one of them so that they are?
682  if (MBB1->isLayoutSuccessor(MBB2) && I2 == MBB2->begin())
683  return true;
684  if (MBB2->isLayoutSuccessor(MBB1) && I1 == MBB1->begin())
685  return true;
686 
687  // If both blocks are identical and end in a branch, merge them unless they
688  // both have a fallthrough predecessor and successor.
689  // We can only do this after block placement because it depends on whether
690  // there are fallthroughs, and we don't know until after layout.
691  if (AfterPlacement && I1 == MBB1->begin() && I2 == MBB2->begin()) {
692  auto BothFallThrough = [](MachineBasicBlock *MBB) {
693  if (MBB->succ_size() != 0 && !MBB->canFallThrough())
694  return false;
696  MachineFunction *MF = MBB->getParent();
697  return (MBB != &*MF->begin()) && std::prev(I)->canFallThrough();
698  };
699  if (!BothFallThrough(MBB1) || !BothFallThrough(MBB2))
700  return true;
701  }
702 
703  // If both blocks have an unconditional branch temporarily stripped out,
704  // count that as an additional common instruction for the following
705  // heuristics. This heuristic is only accurate for single-succ blocks, so to
706  // make sure that during layout merging and duplicating don't crash, we check
707  // for that when merging during layout.
708  unsigned EffectiveTailLen = CommonTailLen;
709  if (SuccBB && MBB1 != PredBB && MBB2 != PredBB &&
710  (MBB1->succ_size() == 1 || !AfterPlacement) &&
711  !MBB1->back().isBarrier() &&
712  !MBB2->back().isBarrier())
713  ++EffectiveTailLen;
714 
715  // Check if the common tail is long enough to be worthwhile.
716  if (EffectiveTailLen >= MinCommonTailLength)
717  return true;
718 
719  // If we are optimizing for code size, 2 instructions in common is enough if
720  // we don't have to split a block. At worst we will be introducing 1 new
721  // branch instruction, which is likely to be smaller than the 2
722  // instructions that would be deleted in the merge.
723  MachineFunction *MF = MBB1->getParent();
724  return EffectiveTailLen >= 2 && MF->getFunction().hasOptSize() &&
725  (I1 == MBB1->begin() || I2 == MBB2->begin());
726 }
727 
728 unsigned BranchFolder::ComputeSameTails(unsigned CurHash,
729  unsigned MinCommonTailLength,
730  MachineBasicBlock *SuccBB,
731  MachineBasicBlock *PredBB) {
732  unsigned maxCommonTailLength = 0U;
733  SameTails.clear();
734  MachineBasicBlock::iterator TrialBBI1, TrialBBI2;
735  MPIterator HighestMPIter = std::prev(MergePotentials.end());
736  for (MPIterator CurMPIter = std::prev(MergePotentials.end()),
737  B = MergePotentials.begin();
738  CurMPIter != B && CurMPIter->getHash() == CurHash; --CurMPIter) {
739  for (MPIterator I = std::prev(CurMPIter); I->getHash() == CurHash; --I) {
740  unsigned CommonTailLen;
741  if (ProfitableToMerge(CurMPIter->getBlock(), I->getBlock(),
742  MinCommonTailLength,
743  CommonTailLen, TrialBBI1, TrialBBI2,
744  SuccBB, PredBB,
745  EHScopeMembership,
746  AfterBlockPlacement)) {
747  if (CommonTailLen > maxCommonTailLength) {
748  SameTails.clear();
749  maxCommonTailLength = CommonTailLen;
750  HighestMPIter = CurMPIter;
751  SameTails.push_back(SameTailElt(CurMPIter, TrialBBI1));
752  }
753  if (HighestMPIter == CurMPIter &&
754  CommonTailLen == maxCommonTailLength)
755  SameTails.push_back(SameTailElt(I, TrialBBI2));
756  }
757  if (I == B)
758  break;
759  }
760  }
761  return maxCommonTailLength;
762 }
763 
764 void BranchFolder::RemoveBlocksWithHash(unsigned CurHash,
765  MachineBasicBlock *SuccBB,
766  MachineBasicBlock *PredBB) {
767  MPIterator CurMPIter, B;
768  for (CurMPIter = std::prev(MergePotentials.end()),
769  B = MergePotentials.begin();
770  CurMPIter->getHash() == CurHash; --CurMPIter) {
771  // Put the unconditional branch back, if we need one.
772  MachineBasicBlock *CurMBB = CurMPIter->getBlock();
773  if (SuccBB && CurMBB != PredBB)
774  FixTail(CurMBB, SuccBB, TII);
775  if (CurMPIter == B)
776  break;
777  }
778  if (CurMPIter->getHash() != CurHash)
779  CurMPIter++;
780  MergePotentials.erase(CurMPIter, MergePotentials.end());
781 }
782 
783 bool BranchFolder::CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
784  MachineBasicBlock *SuccBB,
785  unsigned maxCommonTailLength,
786  unsigned &commonTailIndex) {
787  commonTailIndex = 0;
788  unsigned TimeEstimate = ~0U;
789  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
790  // Use PredBB if possible; that doesn't require a new branch.
791  if (SameTails[i].getBlock() == PredBB) {
792  commonTailIndex = i;
793  break;
794  }
795  // Otherwise, make a (fairly bogus) choice based on estimate of
796  // how long it will take the various blocks to execute.
797  unsigned t = EstimateRuntime(SameTails[i].getBlock()->begin(),
798  SameTails[i].getTailStartPos());
799  if (t <= TimeEstimate) {
800  TimeEstimate = t;
801  commonTailIndex = i;
802  }
803  }
804 
806  SameTails[commonTailIndex].getTailStartPos();
807  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
808 
809  LLVM_DEBUG(dbgs() << "\nSplitting " << printMBBReference(*MBB) << ", size "
810  << maxCommonTailLength);
811 
812  // If the split block unconditionally falls-thru to SuccBB, it will be
813  // merged. In control flow terms it should then take SuccBB's name. e.g. If
814  // SuccBB is an inner loop, the common tail is still part of the inner loop.
815  const BasicBlock *BB = (SuccBB && MBB->succ_size() == 1) ?
816  SuccBB->getBasicBlock() : MBB->getBasicBlock();
817  MachineBasicBlock *newMBB = SplitMBBAt(*MBB, BBI, BB);
818  if (!newMBB) {
819  LLVM_DEBUG(dbgs() << "... failed!");
820  return false;
821  }
822 
823  SameTails[commonTailIndex].setBlock(newMBB);
824  SameTails[commonTailIndex].setTailStartPos(newMBB->begin());
825 
826  // If we split PredBB, newMBB is the new predecessor.
827  if (PredBB == MBB)
828  PredBB = newMBB;
829 
830  return true;
831 }
832 
833 static void
835  MachineBasicBlock &MBBCommon) {
836  MachineBasicBlock *MBB = MBBIStartPos->getParent();
837  // Note CommonTailLen does not necessarily matches the size of
838  // the common BB nor all its instructions because of debug
839  // instructions differences.
840  unsigned CommonTailLen = 0;
841  for (auto E = MBB->end(); MBBIStartPos != E; ++MBBIStartPos)
842  ++CommonTailLen;
843 
846  MachineBasicBlock::reverse_iterator MBBICommon = MBBCommon.rbegin();
847  MachineBasicBlock::reverse_iterator MBBIECommon = MBBCommon.rend();
848 
849  while (CommonTailLen--) {
850  assert(MBBI != MBBIE && "Reached BB end within common tail length!");
851  (void)MBBIE;
852 
853  if (!countsAsInstruction(*MBBI)) {
854  ++MBBI;
855  continue;
856  }
857 
858  while ((MBBICommon != MBBIECommon) && !countsAsInstruction(*MBBICommon))
859  ++MBBICommon;
860 
861  assert(MBBICommon != MBBIECommon &&
862  "Reached BB end within common tail length!");
863  assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
864 
865  // Merge MMOs from memory operations in the common block.
866  if (MBBICommon->mayLoad() || MBBICommon->mayStore())
867  MBBICommon->cloneMergedMemRefs(*MBB->getParent(), {&*MBBICommon, &*MBBI});
868  // Drop undef flags if they aren't present in all merged instructions.
869  for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
870  MachineOperand &MO = MBBICommon->getOperand(I);
871  if (MO.isReg() && MO.isUndef()) {
872  const MachineOperand &OtherMO = MBBI->getOperand(I);
873  if (!OtherMO.isUndef())
874  MO.setIsUndef(false);
875  }
876  }
877 
878  ++MBBI;
879  ++MBBICommon;
880  }
881 }
882 
883 void BranchFolder::mergeCommonTails(unsigned commonTailIndex) {
884  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
885 
886  std::vector<MachineBasicBlock::iterator> NextCommonInsts(SameTails.size());
887  for (unsigned int i = 0 ; i != SameTails.size() ; ++i) {
888  if (i != commonTailIndex) {
889  NextCommonInsts[i] = SameTails[i].getTailStartPos();
890  mergeOperations(SameTails[i].getTailStartPos(), *MBB);
891  } else {
892  assert(SameTails[i].getTailStartPos() == MBB->begin() &&
893  "MBB is not a common tail only block");
894  }
895  }
896 
897  for (auto &MI : *MBB) {
898  if (!countsAsInstruction(MI))
899  continue;
900  DebugLoc DL = MI.getDebugLoc();
901  for (unsigned int i = 0 ; i < NextCommonInsts.size() ; i++) {
902  if (i == commonTailIndex)
903  continue;
904 
905  auto &Pos = NextCommonInsts[i];
906  assert(Pos != SameTails[i].getBlock()->end() &&
907  "Reached BB end within common tail");
908  while (!countsAsInstruction(*Pos)) {
909  ++Pos;
910  assert(Pos != SameTails[i].getBlock()->end() &&
911  "Reached BB end within common tail");
912  }
913  assert(MI.isIdenticalTo(*Pos) && "Expected matching MIIs!");
914  DL = DILocation::getMergedLocation(DL, Pos->getDebugLoc());
915  NextCommonInsts[i] = ++Pos;
916  }
917  MI.setDebugLoc(DL);
918  }
919 
920  if (UpdateLiveIns) {
921  LivePhysRegs NewLiveIns(*TRI);
922  computeLiveIns(NewLiveIns, *MBB);
923  LiveRegs.init(*TRI);
924 
925  // The flag merging may lead to some register uses no longer using the
926  // <undef> flag, add IMPLICIT_DEFs in the predecessors as necessary.
927  for (MachineBasicBlock *Pred : MBB->predecessors()) {
928  LiveRegs.clear();
929  LiveRegs.addLiveOuts(*Pred);
930  MachineBasicBlock::iterator InsertBefore = Pred->getFirstTerminator();
931  for (unsigned Reg : NewLiveIns) {
932  if (!LiveRegs.available(*MRI, Reg))
933  continue;
934  DebugLoc DL;
935  BuildMI(*Pred, InsertBefore, DL, TII->get(TargetOpcode::IMPLICIT_DEF),
936  Reg);
937  }
938  }
939 
940  MBB->clearLiveIns();
941  addLiveIns(*MBB, NewLiveIns);
942  }
943 }
944 
945 // See if any of the blocks in MergePotentials (which all have SuccBB as a
946 // successor, or all have no successor if it is null) can be tail-merged.
947 // If there is a successor, any blocks in MergePotentials that are not
948 // tail-merged and are not immediately before Succ must have an unconditional
949 // branch to Succ added (but the predecessor/successor lists need no
950 // adjustment). The lone predecessor of Succ that falls through into Succ,
951 // if any, is given in PredBB.
952 // MinCommonTailLength - Except for the special cases below, tail-merge if
953 // there are at least this many instructions in common.
954 bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
955  MachineBasicBlock *PredBB,
956  unsigned MinCommonTailLength) {
957  bool MadeChange = false;
958 
959  LLVM_DEBUG(
960  dbgs() << "\nTryTailMergeBlocks: ";
961  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i) dbgs()
962  << printMBBReference(*MergePotentials[i].getBlock())
963  << (i == e - 1 ? "" : ", ");
964  dbgs() << "\n"; if (SuccBB) {
965  dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
966  if (PredBB)
967  dbgs() << " which has fall-through from "
968  << printMBBReference(*PredBB) << "\n";
969  } dbgs() << "Looking for common tails of at least "
970  << MinCommonTailLength << " instruction"
971  << (MinCommonTailLength == 1 ? "" : "s") << '\n';);
972 
973  // Sort by hash value so that blocks with identical end sequences sort
974  // together.
975  array_pod_sort(MergePotentials.begin(), MergePotentials.end());
976 
977  // Walk through equivalence sets looking for actual exact matches.
978  while (MergePotentials.size() > 1) {
979  unsigned CurHash = MergePotentials.back().getHash();
980 
981  // Build SameTails, identifying the set of blocks with this hash code
982  // and with the maximum number of instructions in common.
983  unsigned maxCommonTailLength = ComputeSameTails(CurHash,
984  MinCommonTailLength,
985  SuccBB, PredBB);
986 
987  // If we didn't find any pair that has at least MinCommonTailLength
988  // instructions in common, remove all blocks with this hash code and retry.
989  if (SameTails.empty()) {
990  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
991  continue;
992  }
993 
994  // If one of the blocks is the entire common tail (and not the entry
995  // block, which we can't jump to), we can treat all blocks with this same
996  // tail at once. Use PredBB if that is one of the possibilities, as that
997  // will not introduce any extra branches.
998  MachineBasicBlock *EntryBB =
999  &MergePotentials.front().getBlock()->getParent()->front();
1000  unsigned commonTailIndex = SameTails.size();
1001  // If there are two blocks, check to see if one can be made to fall through
1002  // into the other.
1003  if (SameTails.size() == 2 &&
1004  SameTails[0].getBlock()->isLayoutSuccessor(SameTails[1].getBlock()) &&
1005  SameTails[1].tailIsWholeBlock())
1006  commonTailIndex = 1;
1007  else if (SameTails.size() == 2 &&
1008  SameTails[1].getBlock()->isLayoutSuccessor(
1009  SameTails[0].getBlock()) &&
1010  SameTails[0].tailIsWholeBlock())
1011  commonTailIndex = 0;
1012  else {
1013  // Otherwise just pick one, favoring the fall-through predecessor if
1014  // there is one.
1015  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
1016  MachineBasicBlock *MBB = SameTails[i].getBlock();
1017  if (MBB == EntryBB && SameTails[i].tailIsWholeBlock())
1018  continue;
1019  if (MBB == PredBB) {
1020  commonTailIndex = i;
1021  break;
1022  }
1023  if (SameTails[i].tailIsWholeBlock())
1024  commonTailIndex = i;
1025  }
1026  }
1027 
1028  if (commonTailIndex == SameTails.size() ||
1029  (SameTails[commonTailIndex].getBlock() == PredBB &&
1030  !SameTails[commonTailIndex].tailIsWholeBlock())) {
1031  // None of the blocks consist entirely of the common tail.
1032  // Split a block so that one does.
1033  if (!CreateCommonTailOnlyBlock(PredBB, SuccBB,
1034  maxCommonTailLength, commonTailIndex)) {
1035  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
1036  continue;
1037  }
1038  }
1039 
1040  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
1041 
1042  // Recompute common tail MBB's edge weights and block frequency.
1043  setCommonTailEdgeWeights(*MBB);
1044 
1045  // Merge debug locations, MMOs and undef flags across identical instructions
1046  // for common tail.
1047  mergeCommonTails(commonTailIndex);
1048 
1049  // MBB is common tail. Adjust all other BB's to jump to this one.
1050  // Traversal must be forwards so erases work.
1051  LLVM_DEBUG(dbgs() << "\nUsing common tail in " << printMBBReference(*MBB)
1052  << " for ");
1053  for (unsigned int i=0, e = SameTails.size(); i != e; ++i) {
1054  if (commonTailIndex == i)
1055  continue;
1056  LLVM_DEBUG(dbgs() << printMBBReference(*SameTails[i].getBlock())
1057  << (i == e - 1 ? "" : ", "));
1058  // Hack the end off BB i, making it jump to BB commonTailIndex instead.
1059  replaceTailWithBranchTo(SameTails[i].getTailStartPos(), *MBB);
1060  // BB i is no longer a predecessor of SuccBB; remove it from the worklist.
1061  MergePotentials.erase(SameTails[i].getMPIter());
1062  }
1063  LLVM_DEBUG(dbgs() << "\n");
1064  // We leave commonTailIndex in the worklist in case there are other blocks
1065  // that match it with a smaller number of instructions.
1066  MadeChange = true;
1067  }
1068  return MadeChange;
1069 }
1070 
1071 bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
1072  bool MadeChange = false;
1073  if (!EnableTailMerge)
1074  return MadeChange;
1075 
1076  // First find blocks with no successors.
1077  // Block placement may create new tail merging opportunities for these blocks.
1078  MergePotentials.clear();
1079  for (MachineBasicBlock &MBB : MF) {
1080  if (MergePotentials.size() == TailMergeThreshold)
1081  break;
1082  if (!TriedMerging.count(&MBB) && MBB.succ_empty())
1083  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(MBB), &MBB));
1084  }
1085 
1086  // If this is a large problem, avoid visiting the same basic blocks
1087  // multiple times.
1088  if (MergePotentials.size() == TailMergeThreshold)
1089  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1090  TriedMerging.insert(MergePotentials[i].getBlock());
1091 
1092  // See if we can do any tail merging on those.
1093  if (MergePotentials.size() >= 2)
1094  MadeChange |= TryTailMergeBlocks(nullptr, nullptr, MinCommonTailLength);
1095 
1096  // Look at blocks (IBB) with multiple predecessors (PBB).
1097  // We change each predecessor to a canonical form, by
1098  // (1) temporarily removing any unconditional branch from the predecessor
1099  // to IBB, and
1100  // (2) alter conditional branches so they branch to the other block
1101  // not IBB; this may require adding back an unconditional branch to IBB
1102  // later, where there wasn't one coming in. E.g.
1103  // Bcc IBB
1104  // fallthrough to QBB
1105  // here becomes
1106  // Bncc QBB
1107  // with a conceptual B to IBB after that, which never actually exists.
1108  // With those changes, we see whether the predecessors' tails match,
1109  // and merge them if so. We change things out of canonical form and
1110  // back to the way they were later in the process. (OptimizeBranches
1111  // would undo some of this, but we can't use it, because we'd get into
1112  // a compile-time infinite loop repeatedly doing and undoing the same
1113  // transformations.)
1114 
1115  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1116  I != E; ++I) {
1117  if (I->pred_size() < 2) continue;
1119  MachineBasicBlock *IBB = &*I;
1120  MachineBasicBlock *PredBB = &*std::prev(I);
1121  MergePotentials.clear();
1122  MachineLoop *ML;
1123 
1124  // Bail if merging after placement and IBB is the loop header because
1125  // -- If merging predecessors that belong to the same loop as IBB, the
1126  // common tail of merged predecessors may become the loop top if block
1127  // placement is called again and the predecessors may branch to this common
1128  // tail and require more branches. This can be relaxed if
1129  // MachineBlockPlacement::findBestLoopTop is more flexible.
1130  // --If merging predecessors that do not belong to the same loop as IBB, the
1131  // loop info of IBB's loop and the other loops may be affected. Calling the
1132  // block placement again may make big change to the layout and eliminate the
1133  // reason to do tail merging here.
1134  if (AfterBlockPlacement && MLI) {
1135  ML = MLI->getLoopFor(IBB);
1136  if (ML && IBB == ML->getHeader())
1137  continue;
1138  }
1139 
1140  for (MachineBasicBlock *PBB : I->predecessors()) {
1141  if (MergePotentials.size() == TailMergeThreshold)
1142  break;
1143 
1144  if (TriedMerging.count(PBB))
1145  continue;
1146 
1147  // Skip blocks that loop to themselves, can't tail merge these.
1148  if (PBB == IBB)
1149  continue;
1150 
1151  // Visit each predecessor only once.
1152  if (!UniquePreds.insert(PBB).second)
1153  continue;
1154 
1155  // Skip blocks which may jump to a landing pad. Can't tail merge these.
1156  if (PBB->hasEHPadSuccessor())
1157  continue;
1158 
1159  // After block placement, only consider predecessors that belong to the
1160  // same loop as IBB. The reason is the same as above when skipping loop
1161  // header.
1162  if (AfterBlockPlacement && MLI)
1163  if (ML != MLI->getLoopFor(PBB))
1164  continue;
1165 
1166  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1168  if (!TII->analyzeBranch(*PBB, TBB, FBB, Cond, true)) {
1169  // Failing case: IBB is the target of a cbr, and we cannot reverse the
1170  // branch.
1171  SmallVector<MachineOperand, 4> NewCond(Cond);
1172  if (!Cond.empty() && TBB == IBB) {
1173  if (TII->reverseBranchCondition(NewCond))
1174  continue;
1175  // This is the QBB case described above
1176  if (!FBB) {
1177  auto Next = ++PBB->getIterator();
1178  if (Next != MF.end())
1179  FBB = &*Next;
1180  }
1181  }
1182 
1183  // Remove the unconditional branch at the end, if any.
1184  if (TBB && (Cond.empty() || FBB)) {
1185  DebugLoc dl = PBB->findBranchDebugLoc();
1186  TII->removeBranch(*PBB);
1187  if (!Cond.empty())
1188  // reinsert conditional branch only, for now
1189  TII->insertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
1190  NewCond, dl);
1191  }
1192 
1193  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(*PBB), PBB));
1194  }
1195  }
1196 
1197  // If this is a large problem, avoid visiting the same basic blocks multiple
1198  // times.
1199  if (MergePotentials.size() == TailMergeThreshold)
1200  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1201  TriedMerging.insert(MergePotentials[i].getBlock());
1202 
1203  if (MergePotentials.size() >= 2)
1204  MadeChange |= TryTailMergeBlocks(IBB, PredBB, MinCommonTailLength);
1205 
1206  // Reinsert an unconditional branch if needed. The 1 below can occur as a
1207  // result of removing blocks in TryTailMergeBlocks.
1208  PredBB = &*std::prev(I); // this may have been changed in TryTailMergeBlocks
1209  if (MergePotentials.size() == 1 &&
1210  MergePotentials.begin()->getBlock() != PredBB)
1211  FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
1212  }
1213 
1214  return MadeChange;
1215 }
1216 
1217 void BranchFolder::setCommonTailEdgeWeights(MachineBasicBlock &TailMBB) {
1218  SmallVector<BlockFrequency, 2> EdgeFreqLs(TailMBB.succ_size());
1219  BlockFrequency AccumulatedMBBFreq;
1220 
1221  // Aggregate edge frequency of successor edge j:
1222  // edgeFreq(j) = sum (freq(bb) * edgeProb(bb, j)),
1223  // where bb is a basic block that is in SameTails.
1224  for (const auto &Src : SameTails) {
1225  const MachineBasicBlock *SrcMBB = Src.getBlock();
1226  BlockFrequency BlockFreq = MBBFreqInfo.getBlockFreq(SrcMBB);
1227  AccumulatedMBBFreq += BlockFreq;
1228 
1229  // It is not necessary to recompute edge weights if TailBB has less than two
1230  // successors.
1231  if (TailMBB.succ_size() <= 1)
1232  continue;
1233 
1234  auto EdgeFreq = EdgeFreqLs.begin();
1235 
1236  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1237  SuccI != SuccE; ++SuccI, ++EdgeFreq)
1238  *EdgeFreq += BlockFreq * MBPI.getEdgeProbability(SrcMBB, *SuccI);
1239  }
1240 
1241  MBBFreqInfo.setBlockFreq(&TailMBB, AccumulatedMBBFreq);
1242 
1243  if (TailMBB.succ_size() <= 1)
1244  return;
1245 
1246  auto SumEdgeFreq =
1247  std::accumulate(EdgeFreqLs.begin(), EdgeFreqLs.end(), BlockFrequency(0))
1248  .getFrequency();
1249  auto EdgeFreq = EdgeFreqLs.begin();
1250 
1251  if (SumEdgeFreq > 0) {
1252  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1253  SuccI != SuccE; ++SuccI, ++EdgeFreq) {
1255  EdgeFreq->getFrequency(), SumEdgeFreq);
1256  TailMBB.setSuccProbability(SuccI, Prob);
1257  }
1258  }
1259 }
1260 
1261 //===----------------------------------------------------------------------===//
1262 // Branch Optimization
1263 //===----------------------------------------------------------------------===//
1264 
1265 bool BranchFolder::OptimizeBranches(MachineFunction &MF) {
1266  bool MadeChange = false;
1267 
1268  // Make sure blocks are numbered in order
1269  MF.RenumberBlocks();
1270  // Renumbering blocks alters EH scope membership, recalculate it.
1271  EHScopeMembership = getEHScopeMembership(MF);
1272 
1273  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1274  I != E; ) {
1275  MachineBasicBlock *MBB = &*I++;
1276  MadeChange |= OptimizeBlock(MBB);
1277 
1278  // If it is dead, remove it.
1279  if (MBB->pred_empty()) {
1280  RemoveDeadBlock(MBB);
1281  MadeChange = true;
1282  ++NumDeadBlocks;
1283  }
1284  }
1285 
1286  return MadeChange;
1287 }
1288 
1289 // Blocks should be considered empty if they contain only debug info;
1290 // else the debug info would affect codegen.
1291 static bool IsEmptyBlock(MachineBasicBlock *MBB) {
1292  return MBB->getFirstNonDebugInstr() == MBB->end();
1293 }
1294 
1295 // Blocks with only debug info and branches should be considered the same
1296 // as blocks with only branches.
1299  assert(I != MBB->end() && "empty block!");
1300  return I->isBranch();
1301 }
1302 
1303 /// IsBetterFallthrough - Return true if it would be clearly better to
1304 /// fall-through to MBB1 than to fall through into MBB2. This has to return
1305 /// a strict ordering, returning true for both (MBB1,MBB2) and (MBB2,MBB1) will
1306 /// result in infinite loops.
1308  MachineBasicBlock *MBB2) {
1309  // Right now, we use a simple heuristic. If MBB2 ends with a call, and
1310  // MBB1 doesn't, we prefer to fall through into MBB1. This allows us to
1311  // optimize branches that branch to either a return block or an assert block
1312  // into a fallthrough to the return.
1315  if (MBB1I == MBB1->end() || MBB2I == MBB2->end())
1316  return false;
1317 
1318  // If there is a clear successor ordering we make sure that one block
1319  // will fall through to the next
1320  if (MBB1->isSuccessor(MBB2)) return true;
1321  if (MBB2->isSuccessor(MBB1)) return false;
1322 
1323  return MBB2I->isCall() && !MBB1I->isCall();
1324 }
1325 
1326 /// getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch
1327 /// instructions on the block.
1330  if (I != MBB.end() && I->isBranch())
1331  return I->getDebugLoc();
1332  return DebugLoc();
1333 }
1334 
1336  MachineBasicBlock &MBB,
1337  MachineBasicBlock &PredMBB) {
1338  auto InsertBefore = PredMBB.getFirstTerminator();
1339  for (MachineInstr &MI : MBB.instrs())
1340  if (MI.isDebugInstr()) {
1341  TII->duplicate(PredMBB, InsertBefore, MI);
1342  LLVM_DEBUG(dbgs() << "Copied debug entity from empty block to pred: "
1343  << MI);
1344  }
1345 }
1346 
1348  MachineBasicBlock &MBB,
1349  MachineBasicBlock &SuccMBB) {
1350  auto InsertBefore = SuccMBB.SkipPHIsAndLabels(SuccMBB.begin());
1351  for (MachineInstr &MI : MBB.instrs())
1352  if (MI.isDebugInstr()) {
1353  TII->duplicate(SuccMBB, InsertBefore, MI);
1354  LLVM_DEBUG(dbgs() << "Copied debug entity from empty block to succ: "
1355  << MI);
1356  }
1357 }
1358 
1359 // Try to salvage DBG_VALUE instructions from an otherwise empty block. If such
1360 // a basic block is removed we would lose the debug information unless we have
1361 // copied the information to a predecessor/successor.
1362 //
1363 // TODO: This function only handles some simple cases. An alternative would be
1364 // to run a heavier analysis, such as the LiveDebugValues pass, before we do
1365 // branch folding.
1367  MachineBasicBlock &MBB) {
1368  assert(IsEmptyBlock(&MBB) && "Expected an empty block (except debug info).");
1369  // If this MBB is the only predecessor of a successor it is legal to copy
1370  // DBG_VALUE instructions to the beginning of the successor.
1371  for (MachineBasicBlock *SuccBB : MBB.successors())
1372  if (SuccBB->pred_size() == 1)
1373  copyDebugInfoToSuccessor(TII, MBB, *SuccBB);
1374  // If this MBB is the only successor of a predecessor it is legal to copy the
1375  // DBG_VALUE instructions to the end of the predecessor (just before the
1376  // terminators, assuming that the terminator isn't affecting the DBG_VALUE).
1377  for (MachineBasicBlock *PredBB : MBB.predecessors())
1378  if (PredBB->succ_size() == 1)
1379  copyDebugInfoToPredecessor(TII, MBB, *PredBB);
1380 }
1381 
1382 bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
1383  bool MadeChange = false;
1384  MachineFunction &MF = *MBB->getParent();
1385 ReoptimizeBlock:
1386 
1387  MachineFunction::iterator FallThrough = MBB->getIterator();
1388  ++FallThrough;
1389 
1390  // Make sure MBB and FallThrough belong to the same EH scope.
1391  bool SameEHScope = true;
1392  if (!EHScopeMembership.empty() && FallThrough != MF.end()) {
1393  auto MBBEHScope = EHScopeMembership.find(MBB);
1394  assert(MBBEHScope != EHScopeMembership.end());
1395  auto FallThroughEHScope = EHScopeMembership.find(&*FallThrough);
1396  assert(FallThroughEHScope != EHScopeMembership.end());
1397  SameEHScope = MBBEHScope->second == FallThroughEHScope->second;
1398  }
1399 
1400  // If this block is empty, make everyone use its fall-through, not the block
1401  // explicitly. Landing pads should not do this since the landing-pad table
1402  // points to this block. Blocks with their addresses taken shouldn't be
1403  // optimized away.
1404  if (IsEmptyBlock(MBB) && !MBB->isEHPad() && !MBB->hasAddressTaken() &&
1405  SameEHScope) {
1406  salvageDebugInfoFromEmptyBlock(TII, *MBB);
1407  // Dead block? Leave for cleanup later.
1408  if (MBB->pred_empty()) return MadeChange;
1409 
1410  if (FallThrough == MF.end()) {
1411  // TODO: Simplify preds to not branch here if possible!
1412  } else if (FallThrough->isEHPad()) {
1413  // Don't rewrite to a landing pad fallthough. That could lead to the case
1414  // where a BB jumps to more than one landing pad.
1415  // TODO: Is it ever worth rewriting predecessors which don't already
1416  // jump to a landing pad, and so can safely jump to the fallthrough?
1417  } else if (MBB->isSuccessor(&*FallThrough)) {
1418  // Rewrite all predecessors of the old block to go to the fallthrough
1419  // instead.
1420  while (!MBB->pred_empty()) {
1421  MachineBasicBlock *Pred = *(MBB->pred_end()-1);
1422  Pred->ReplaceUsesOfBlockWith(MBB, &*FallThrough);
1423  }
1424  // If MBB was the target of a jump table, update jump tables to go to the
1425  // fallthrough instead.
1426  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1427  MJTI->ReplaceMBBInJumpTables(MBB, &*FallThrough);
1428  MadeChange = true;
1429  }
1430  return MadeChange;
1431  }
1432 
1433  // Check to see if we can simplify the terminator of the block before this
1434  // one.
1435  MachineBasicBlock &PrevBB = *std::prev(MachineFunction::iterator(MBB));
1436 
1437  MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;
1439  bool PriorUnAnalyzable =
1440  TII->analyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1441  if (!PriorUnAnalyzable) {
1442  // If the CFG for the prior block has extra edges, remove them.
1443  MadeChange |= PrevBB.CorrectExtraCFGEdges(PriorTBB, PriorFBB,
1444  !PriorCond.empty());
1445 
1446  // If the previous branch is conditional and both conditions go to the same
1447  // destination, remove the branch, replacing it with an unconditional one or
1448  // a fall-through.
1449  if (PriorTBB && PriorTBB == PriorFBB) {
1450  DebugLoc dl = getBranchDebugLoc(PrevBB);
1451  TII->removeBranch(PrevBB);
1452  PriorCond.clear();
1453  if (PriorTBB != MBB)
1454  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1455  MadeChange = true;
1456  ++NumBranchOpts;
1457  goto ReoptimizeBlock;
1458  }
1459 
1460  // If the previous block unconditionally falls through to this block and
1461  // this block has no other predecessors, move the contents of this block
1462  // into the prior block. This doesn't usually happen when SimplifyCFG
1463  // has been used, but it can happen if tail merging splits a fall-through
1464  // predecessor of a block.
1465  // This has to check PrevBB->succ_size() because EH edges are ignored by
1466  // AnalyzeBranch.
1467  if (PriorCond.empty() && !PriorTBB && MBB->pred_size() == 1 &&
1468  PrevBB.succ_size() == 1 &&
1469  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1470  LLVM_DEBUG(dbgs() << "\nMerging into block: " << PrevBB
1471  << "From MBB: " << *MBB);
1472  // Remove redundant DBG_VALUEs first.
1473  if (PrevBB.begin() != PrevBB.end()) {
1474  MachineBasicBlock::iterator PrevBBIter = PrevBB.end();
1475  --PrevBBIter;
1476  MachineBasicBlock::iterator MBBIter = MBB->begin();
1477  // Check if DBG_VALUE at the end of PrevBB is identical to the
1478  // DBG_VALUE at the beginning of MBB.
1479  while (PrevBBIter != PrevBB.begin() && MBBIter != MBB->end()
1480  && PrevBBIter->isDebugInstr() && MBBIter->isDebugInstr()) {
1481  if (!MBBIter->isIdenticalTo(*PrevBBIter))
1482  break;
1483  MachineInstr &DuplicateDbg = *MBBIter;
1484  ++MBBIter; -- PrevBBIter;
1485  DuplicateDbg.eraseFromParent();
1486  }
1487  }
1488  PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end());
1489  PrevBB.removeSuccessor(PrevBB.succ_begin());
1490  assert(PrevBB.succ_empty());
1491  PrevBB.transferSuccessors(MBB);
1492  MadeChange = true;
1493  return MadeChange;
1494  }
1495 
1496  // If the previous branch *only* branches to *this* block (conditional or
1497  // not) remove the branch.
1498  if (PriorTBB == MBB && !PriorFBB) {
1499  TII->removeBranch(PrevBB);
1500  MadeChange = true;
1501  ++NumBranchOpts;
1502  goto ReoptimizeBlock;
1503  }
1504 
1505  // If the prior block branches somewhere else on the condition and here if
1506  // the condition is false, remove the uncond second branch.
1507  if (PriorFBB == MBB) {
1508  DebugLoc dl = getBranchDebugLoc(PrevBB);
1509  TII->removeBranch(PrevBB);
1510  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1511  MadeChange = true;
1512  ++NumBranchOpts;
1513  goto ReoptimizeBlock;
1514  }
1515 
1516  // If the prior block branches here on true and somewhere else on false, and
1517  // if the branch condition is reversible, reverse the branch to create a
1518  // fall-through.
1519  if (PriorTBB == MBB) {
1520  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1521  if (!TII->reverseBranchCondition(NewPriorCond)) {
1522  DebugLoc dl = getBranchDebugLoc(PrevBB);
1523  TII->removeBranch(PrevBB);
1524  TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
1525  MadeChange = true;
1526  ++NumBranchOpts;
1527  goto ReoptimizeBlock;
1528  }
1529  }
1530 
1531  // If this block has no successors (e.g. it is a return block or ends with
1532  // a call to a no-return function like abort or __cxa_throw) and if the pred
1533  // falls through into this block, and if it would otherwise fall through
1534  // into the block after this, move this block to the end of the function.
1535  //
1536  // We consider it more likely that execution will stay in the function (e.g.
1537  // due to loops) than it is to exit it. This asserts in loops etc, moving
1538  // the assert condition out of the loop body.
1539  if (MBB->succ_empty() && !PriorCond.empty() && !PriorFBB &&
1540  MachineFunction::iterator(PriorTBB) == FallThrough &&
1541  !MBB->canFallThrough()) {
1542  bool DoTransform = true;
1543 
1544  // We have to be careful that the succs of PredBB aren't both no-successor
1545  // blocks. If neither have successors and if PredBB is the second from
1546  // last block in the function, we'd just keep swapping the two blocks for
1547  // last. Only do the swap if one is clearly better to fall through than
1548  // the other.
1549  if (FallThrough == --MF.end() &&
1550  !IsBetterFallthrough(PriorTBB, MBB))
1551  DoTransform = false;
1552 
1553  if (DoTransform) {
1554  // Reverse the branch so we will fall through on the previous true cond.
1555  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1556  if (!TII->reverseBranchCondition(NewPriorCond)) {
1557  LLVM_DEBUG(dbgs() << "\nMoving MBB: " << *MBB
1558  << "To make fallthrough to: " << *PriorTBB << "\n");
1559 
1560  DebugLoc dl = getBranchDebugLoc(PrevBB);
1561  TII->removeBranch(PrevBB);
1562  TII->insertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
1563 
1564  // Move this block to the end of the function.
1565  MBB->moveAfter(&MF.back());
1566  MadeChange = true;
1567  ++NumBranchOpts;
1568  return MadeChange;
1569  }
1570  }
1571  }
1572  }
1573 
1574  if (!IsEmptyBlock(MBB) && MBB->pred_size() == 1 &&
1575  MF.getFunction().hasOptSize()) {
1576  // Changing "Jcc foo; foo: jmp bar;" into "Jcc bar;" might change the branch
1577  // direction, thereby defeating careful block placement and regressing
1578  // performance. Therefore, only consider this for optsize functions.
1580  if (TII->isUnconditionalTailCall(TailCall)) {
1581  MachineBasicBlock *Pred = *MBB->pred_begin();
1582  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1584  bool PredAnalyzable =
1585  !TII->analyzeBranch(*Pred, PredTBB, PredFBB, PredCond, true);
1586 
1587  if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB &&
1588  PredTBB != PredFBB) {
1589  // The predecessor has a conditional branch to this block which consists
1590  // of only a tail call. Try to fold the tail call into the conditional
1591  // branch.
1592  if (TII->canMakeTailCallConditional(PredCond, TailCall)) {
1593  // TODO: It would be nice if analyzeBranch() could provide a pointer
1594  // to the branch instruction so replaceBranchWithTailCall() doesn't
1595  // have to search for it.
1596  TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall);
1597  ++NumTailCalls;
1598  Pred->removeSuccessor(MBB);
1599  MadeChange = true;
1600  return MadeChange;
1601  }
1602  }
1603  // If the predecessor is falling through to this block, we could reverse
1604  // the branch condition and fold the tail call into that. However, after
1605  // that we might have to re-arrange the CFG to fall through to the other
1606  // block and there is a high risk of regressing code size rather than
1607  // improving it.
1608  }
1609  }
1610 
1611  // Analyze the branch in the current block.
1612  MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr;
1614  bool CurUnAnalyzable =
1615  TII->analyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1616  if (!CurUnAnalyzable) {
1617  // If the CFG for the prior block has extra edges, remove them.
1618  MadeChange |= MBB->CorrectExtraCFGEdges(CurTBB, CurFBB, !CurCond.empty());
1619 
1620  // If this is a two-way branch, and the FBB branches to this block, reverse
1621  // the condition so the single-basic-block loop is faster. Instead of:
1622  // Loop: xxx; jcc Out; jmp Loop
1623  // we want:
1624  // Loop: xxx; jncc Loop; jmp Out
1625  if (CurTBB && CurFBB && CurFBB == MBB && CurTBB != MBB) {
1626  SmallVector<MachineOperand, 4> NewCond(CurCond);
1627  if (!TII->reverseBranchCondition(NewCond)) {
1628  DebugLoc dl = getBranchDebugLoc(*MBB);
1629  TII->removeBranch(*MBB);
1630  TII->insertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
1631  MadeChange = true;
1632  ++NumBranchOpts;
1633  goto ReoptimizeBlock;
1634  }
1635  }
1636 
1637  // If this branch is the only thing in its block, see if we can forward
1638  // other blocks across it.
1639  if (CurTBB && CurCond.empty() && !CurFBB &&
1640  IsBranchOnlyBlock(MBB) && CurTBB != MBB &&
1641  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1642  DebugLoc dl = getBranchDebugLoc(*MBB);
1643  // This block may contain just an unconditional branch. Because there can
1644  // be 'non-branch terminators' in the block, try removing the branch and
1645  // then seeing if the block is empty.
1646  TII->removeBranch(*MBB);
1647  // If the only things remaining in the block are debug info, remove these
1648  // as well, so this will behave the same as an empty block in non-debug
1649  // mode.
1650  if (IsEmptyBlock(MBB)) {
1651  // Make the block empty, losing the debug info (we could probably
1652  // improve this in some cases.)
1653  MBB->erase(MBB->begin(), MBB->end());
1654  }
1655  // If this block is just an unconditional branch to CurTBB, we can
1656  // usually completely eliminate the block. The only case we cannot
1657  // completely eliminate the block is when the block before this one
1658  // falls through into MBB and we can't understand the prior block's branch
1659  // condition.
1660  if (MBB->empty()) {
1661  bool PredHasNoFallThrough = !PrevBB.canFallThrough();
1662  if (PredHasNoFallThrough || !PriorUnAnalyzable ||
1663  !PrevBB.isSuccessor(MBB)) {
1664  // If the prior block falls through into us, turn it into an
1665  // explicit branch to us to make updates simpler.
1666  if (!PredHasNoFallThrough && PrevBB.isSuccessor(MBB) &&
1667  PriorTBB != MBB && PriorFBB != MBB) {
1668  if (!PriorTBB) {
1669  assert(PriorCond.empty() && !PriorFBB &&
1670  "Bad branch analysis");
1671  PriorTBB = MBB;
1672  } else {
1673  assert(!PriorFBB && "Machine CFG out of date!");
1674  PriorFBB = MBB;
1675  }
1676  DebugLoc pdl = getBranchDebugLoc(PrevBB);
1677  TII->removeBranch(PrevBB);
1678  TII->insertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
1679  }
1680 
1681  // Iterate through all the predecessors, revectoring each in-turn.
1682  size_t PI = 0;
1683  bool DidChange = false;
1684  bool HasBranchToSelf = false;
1685  while(PI != MBB->pred_size()) {
1686  MachineBasicBlock *PMBB = *(MBB->pred_begin() + PI);
1687  if (PMBB == MBB) {
1688  // If this block has an uncond branch to itself, leave it.
1689  ++PI;
1690  HasBranchToSelf = true;
1691  } else {
1692  DidChange = true;
1693  PMBB->ReplaceUsesOfBlockWith(MBB, CurTBB);
1694  // If this change resulted in PMBB ending in a conditional
1695  // branch where both conditions go to the same destination,
1696  // change this to an unconditional branch (and fix the CFG).
1697  MachineBasicBlock *NewCurTBB = nullptr, *NewCurFBB = nullptr;
1698  SmallVector<MachineOperand, 4> NewCurCond;
1699  bool NewCurUnAnalyzable = TII->analyzeBranch(
1700  *PMBB, NewCurTBB, NewCurFBB, NewCurCond, true);
1701  if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
1702  DebugLoc pdl = getBranchDebugLoc(*PMBB);
1703  TII->removeBranch(*PMBB);
1704  NewCurCond.clear();
1705  TII->insertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
1706  MadeChange = true;
1707  ++NumBranchOpts;
1708  PMBB->CorrectExtraCFGEdges(NewCurTBB, nullptr, false);
1709  }
1710  }
1711  }
1712 
1713  // Change any jumptables to go to the new MBB.
1714  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1715  MJTI->ReplaceMBBInJumpTables(MBB, CurTBB);
1716  if (DidChange) {
1717  ++NumBranchOpts;
1718  MadeChange = true;
1719  if (!HasBranchToSelf) return MadeChange;
1720  }
1721  }
1722  }
1723 
1724  // Add the branch back if the block is more than just an uncond branch.
1725  TII->insertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
1726  }
1727  }
1728 
1729  // If the prior block doesn't fall through into this block, and if this
1730  // block doesn't fall through into some other block, see if we can find a
1731  // place to move this block where a fall-through will happen.
1732  if (!PrevBB.canFallThrough()) {
1733  // Now we know that there was no fall-through into this block, check to
1734  // see if it has a fall-through into its successor.
1735  bool CurFallsThru = MBB->canFallThrough();
1736 
1737  if (!MBB->isEHPad()) {
1738  // Check all the predecessors of this block. If one of them has no fall
1739  // throughs, move this block right after it.
1740  for (MachineBasicBlock *PredBB : MBB->predecessors()) {
1741  // Analyze the branch at the end of the pred.
1742  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1744  if (PredBB != MBB && !PredBB->canFallThrough() &&
1745  !TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true) &&
1746  (!CurFallsThru || !CurTBB || !CurFBB) &&
1747  (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
1748  // If the current block doesn't fall through, just move it.
1749  // If the current block can fall through and does not end with a
1750  // conditional branch, we need to append an unconditional jump to
1751  // the (current) next block. To avoid a possible compile-time
1752  // infinite loop, move blocks only backward in this case.
1753  // Also, if there are already 2 branches here, we cannot add a third;
1754  // this means we have the case
1755  // Bcc next
1756  // B elsewhere
1757  // next:
1758  if (CurFallsThru) {
1759  MachineBasicBlock *NextBB = &*std::next(MBB->getIterator());
1760  CurCond.clear();
1761  TII->insertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
1762  }
1763  MBB->moveAfter(PredBB);
1764  MadeChange = true;
1765  goto ReoptimizeBlock;
1766  }
1767  }
1768  }
1769 
1770  if (!CurFallsThru) {
1771  // Check all successors to see if we can move this block before it.
1772  for (MachineBasicBlock *SuccBB : MBB->successors()) {
1773  // Analyze the branch at the end of the block before the succ.
1774  MachineFunction::iterator SuccPrev = --SuccBB->getIterator();
1775 
1776  // If this block doesn't already fall-through to that successor, and if
1777  // the succ doesn't already have a block that can fall through into it,
1778  // and if the successor isn't an EH destination, we can arrange for the
1779  // fallthrough to happen.
1780  if (SuccBB != MBB && &*SuccPrev != MBB &&
1781  !SuccPrev->canFallThrough() && !CurUnAnalyzable &&
1782  !SuccBB->isEHPad()) {
1783  MBB->moveBefore(SuccBB);
1784  MadeChange = true;
1785  goto ReoptimizeBlock;
1786  }
1787  }
1788 
1789  // Okay, there is no really great place to put this block. If, however,
1790  // the block before this one would be a fall-through if this block were
1791  // removed, move this block to the end of the function. There is no real
1792  // advantage in "falling through" to an EH block, so we don't want to
1793  // perform this transformation for that case.
1794  //
1795  // Also, Windows EH introduced the possibility of an arbitrary number of
1796  // successors to a given block. The analyzeBranch call does not consider
1797  // exception handling and so we can get in a state where a block
1798  // containing a call is followed by multiple EH blocks that would be
1799  // rotated infinitely at the end of the function if the transformation
1800  // below were performed for EH "FallThrough" blocks. Therefore, even if
1801  // that appears not to be happening anymore, we should assume that it is
1802  // possible and not remove the "!FallThrough()->isEHPad" condition below.
1803  MachineBasicBlock *PrevTBB = nullptr, *PrevFBB = nullptr;
1805  if (FallThrough != MF.end() &&
1806  !FallThrough->isEHPad() &&
1807  !TII->analyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1808  PrevBB.isSuccessor(&*FallThrough)) {
1809  MBB->moveAfter(&MF.back());
1810  MadeChange = true;
1811  return MadeChange;
1812  }
1813  }
1814  }
1815 
1816  return MadeChange;
1817 }
1818 
1819 //===----------------------------------------------------------------------===//
1820 // Hoist Common Code
1821 //===----------------------------------------------------------------------===//
1822 
1823 bool BranchFolder::HoistCommonCode(MachineFunction &MF) {
1824  bool MadeChange = false;
1825  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ) {
1826  MachineBasicBlock *MBB = &*I++;
1827  MadeChange |= HoistCommonCodeInSuccs(MBB);
1828  }
1829 
1830  return MadeChange;
1831 }
1832 
1833 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
1834 /// its 'true' successor.
1836  MachineBasicBlock *TrueBB) {
1837  for (MachineBasicBlock *SuccBB : BB->successors())
1838  if (SuccBB != TrueBB)
1839  return SuccBB;
1840  return nullptr;
1841 }
1842 
1843 template <class Container>
1844 static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI,
1845  Container &Set) {
1847  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
1848  Set.insert(*AI);
1849  } else {
1850  Set.insert(Reg);
1851  }
1852 }
1853 
1854 /// findHoistingInsertPosAndDeps - Find the location to move common instructions
1855 /// in successors to. The location is usually just before the terminator,
1856 /// however if the terminator is a conditional branch and its previous
1857 /// instruction is the flag setting instruction, the previous instruction is
1858 /// the preferred location. This function also gathers uses and defs of the
1859 /// instructions from the insertion point to the end of the block. The data is
1860 /// used by HoistCommonCodeInSuccs to ensure safety.
1861 static
1863  const TargetInstrInfo *TII,
1864  const TargetRegisterInfo *TRI,
1865  SmallSet<unsigned,4> &Uses,
1866  SmallSet<unsigned,4> &Defs) {
1868  if (!TII->isUnpredicatedTerminator(*Loc))
1869  return MBB->end();
1870 
1871  for (const MachineOperand &MO : Loc->operands()) {
1872  if (!MO.isReg())
1873  continue;
1874  unsigned Reg = MO.getReg();
1875  if (!Reg)
1876  continue;
1877  if (MO.isUse()) {
1878  addRegAndItsAliases(Reg, TRI, Uses);
1879  } else {
1880  if (!MO.isDead())
1881  // Don't try to hoist code in the rare case the terminator defines a
1882  // register that is later used.
1883  return MBB->end();
1884 
1885  // If the terminator defines a register, make sure we don't hoist
1886  // the instruction whose def might be clobbered by the terminator.
1887  addRegAndItsAliases(Reg, TRI, Defs);
1888  }
1889  }
1890 
1891  if (Uses.empty())
1892  return Loc;
1893  // If the terminator is the only instruction in the block and Uses is not
1894  // empty (or we would have returned above), we can still safely hoist
1895  // instructions just before the terminator as long as the Defs/Uses are not
1896  // violated (which is checked in HoistCommonCodeInSuccs).
1897  if (Loc == MBB->begin())
1898  return Loc;
1899 
1900  // The terminator is probably a conditional branch, try not to separate the
1901  // branch from condition setting instruction.
1903  skipDebugInstructionsBackward(std::prev(Loc), MBB->begin());
1904 
1905  bool IsDef = false;
1906  for (const MachineOperand &MO : PI->operands()) {
1907  // If PI has a regmask operand, it is probably a call. Separate away.
1908  if (MO.isRegMask())
1909  return Loc;
1910  if (!MO.isReg() || MO.isUse())
1911  continue;
1912  unsigned Reg = MO.getReg();
1913  if (!Reg)
1914  continue;
1915  if (Uses.count(Reg)) {
1916  IsDef = true;
1917  break;
1918  }
1919  }
1920  if (!IsDef)
1921  // The condition setting instruction is not just before the conditional
1922  // branch.
1923  return Loc;
1924 
1925  // Be conservative, don't insert instruction above something that may have
1926  // side-effects. And since it's potentially bad to separate flag setting
1927  // instruction from the conditional branch, just abort the optimization
1928  // completely.
1929  // Also avoid moving code above predicated instruction since it's hard to
1930  // reason about register liveness with predicated instruction.
1931  bool DontMoveAcrossStore = true;
1932  if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI))
1933  return MBB->end();
1934 
1935  // Find out what registers are live. Note this routine is ignoring other live
1936  // registers which are only used by instructions in successor blocks.
1937  for (const MachineOperand &MO : PI->operands()) {
1938  if (!MO.isReg())
1939  continue;
1940  unsigned Reg = MO.getReg();
1941  if (!Reg)
1942  continue;
1943  if (MO.isUse()) {
1944  addRegAndItsAliases(Reg, TRI, Uses);
1945  } else {
1946  if (Uses.erase(Reg)) {
1948  for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1949  Uses.erase(*SubRegs); // Use sub-registers to be conservative
1950  }
1951  }
1952  addRegAndItsAliases(Reg, TRI, Defs);
1953  }
1954  }
1955 
1956  return PI;
1957 }
1958 
1959 bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
1960  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1962  if (TII->analyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1963  return false;
1964 
1965  if (!FBB) FBB = findFalseBlock(MBB, TBB);
1966  if (!FBB)
1967  // Malformed bcc? True and false blocks are the same?
1968  return false;
1969 
1970  // Restrict the optimization to cases where MBB is the only predecessor,
1971  // it is an obvious win.
1972  if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
1973  return false;
1974 
1975  // Find a suitable position to hoist the common instructions to. Also figure
1976  // out which registers are used or defined by instructions from the insertion
1977  // point to the end of the block.
1978  SmallSet<unsigned, 4> Uses, Defs;
1980  findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
1981  if (Loc == MBB->end())
1982  return false;
1983 
1984  bool HasDups = false;
1985  SmallSet<unsigned, 4> ActiveDefsSet, AllDefsSet;
1986  MachineBasicBlock::iterator TIB = TBB->begin();
1987  MachineBasicBlock::iterator FIB = FBB->begin();
1988  MachineBasicBlock::iterator TIE = TBB->end();
1989  MachineBasicBlock::iterator FIE = FBB->end();
1990  while (TIB != TIE && FIB != FIE) {
1991  // Skip dbg_value instructions. These do not count.
1992  TIB = skipDebugInstructionsForward(TIB, TIE);
1993  FIB = skipDebugInstructionsForward(FIB, FIE);
1994  if (TIB == TIE || FIB == FIE)
1995  break;
1996 
1997  if (!TIB->isIdenticalTo(*FIB, MachineInstr::CheckKillDead))
1998  break;
1999 
2000  if (TII->isPredicated(*TIB))
2001  // Hard to reason about register liveness with predicated instruction.
2002  break;
2003 
2004  bool IsSafe = true;
2005  for (MachineOperand &MO : TIB->operands()) {
2006  // Don't attempt to hoist instructions with register masks.
2007  if (MO.isRegMask()) {
2008  IsSafe = false;
2009  break;
2010  }
2011  if (!MO.isReg())
2012  continue;
2013  unsigned Reg = MO.getReg();
2014  if (!Reg)
2015  continue;
2016  if (MO.isDef()) {
2017  if (Uses.count(Reg)) {
2018  // Avoid clobbering a register that's used by the instruction at
2019  // the point of insertion.
2020  IsSafe = false;
2021  break;
2022  }
2023 
2024  if (Defs.count(Reg) && !MO.isDead()) {
2025  // Don't hoist the instruction if the def would be clobber by the
2026  // instruction at the point insertion. FIXME: This is overly
2027  // conservative. It should be possible to hoist the instructions
2028  // in BB2 in the following example:
2029  // BB1:
2030  // r1, eflag = op1 r2, r3
2031  // brcc eflag
2032  //
2033  // BB2:
2034  // r1 = op2, ...
2035  // = op3, killed r1
2036  IsSafe = false;
2037  break;
2038  }
2039  } else if (!ActiveDefsSet.count(Reg)) {
2040  if (Defs.count(Reg)) {
2041  // Use is defined by the instruction at the point of insertion.
2042  IsSafe = false;
2043  break;
2044  }
2045 
2046  if (MO.isKill() && Uses.count(Reg))
2047  // Kills a register that's read by the instruction at the point of
2048  // insertion. Remove the kill marker.
2049  MO.setIsKill(false);
2050  }
2051  }
2052  if (!IsSafe)
2053  break;
2054 
2055  bool DontMoveAcrossStore = true;
2056  if (!TIB->isSafeToMove(nullptr, DontMoveAcrossStore))
2057  break;
2058 
2059  // Remove kills from ActiveDefsSet, these registers had short live ranges.
2060  for (const MachineOperand &MO : TIB->operands()) {
2061  if (!MO.isReg() || !MO.isUse() || !MO.isKill())
2062  continue;
2063  unsigned Reg = MO.getReg();
2064  if (!Reg)
2065  continue;
2066  if (!AllDefsSet.count(Reg)) {
2067  continue;
2068  }
2070  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
2071  ActiveDefsSet.erase(*AI);
2072  } else {
2073  ActiveDefsSet.erase(Reg);
2074  }
2075  }
2076 
2077  // Track local defs so we can update liveins.
2078  for (const MachineOperand &MO : TIB->operands()) {
2079  if (!MO.isReg() || !MO.isDef() || MO.isDead())
2080  continue;
2081  unsigned Reg = MO.getReg();
2082  if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg))
2083  continue;
2084  addRegAndItsAliases(Reg, TRI, ActiveDefsSet);
2085  addRegAndItsAliases(Reg, TRI, AllDefsSet);
2086  }
2087 
2088  HasDups = true;
2089  ++TIB;
2090  ++FIB;
2091  }
2092 
2093  if (!HasDups)
2094  return false;
2095 
2096  MBB->splice(Loc, TBB, TBB->begin(), TIB);
2097  FBB->erase(FBB->begin(), FIB);
2098 
2099  if (UpdateLiveIns) {
2100  recomputeLiveIns(*TBB);
2101  recomputeLiveIns(*FBB);
2102  }
2103 
2104  ++NumHoist;
2105  return true;
2106 }
#define DEBUG_TYPE
void view(const Twine &Name, bool isSimple=true)
static unsigned EstimateRuntime(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
EstimateRuntime - Make a rough estimate for how long it will take to run the specified code...
static bool ProfitableToMerge(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, unsigned MinCommonTailLength, unsigned &CommonTailLen, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2, MachineBasicBlock *SuccBB, MachineBasicBlock *PredBB, DenseMap< const MachineBasicBlock *, int > &EHScopeMembership, bool AfterPlacement)
ProfitableToMerge - Check if two machine basic blocks have a common tail and decide if it would be pr...
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:233
BitVector & set()
Definition: BitVector.h:397
A common definition of LaneBitmask for use in TableGen and CodeGen.
const std::vector< MachineJumpTableEntry > & getJumpTables() const
static cl::opt< unsigned > TailMergeThreshold("tail-merge-threshold", cl::desc("Max number of predecessors to consider tail merging"), cl::init(150), cl::Hidden)
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:224
MachineBasicBlock * getMBB() const
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void RenumberBlocks(MachineBasicBlock *MBBFrom=nullptr)
RenumberBlocks - This discards all of the MachineBasicBlock numbers and recomputes them...
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:622
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
bool isCFIInstruction() const
iterator getFirstNonDebugInstr()
Returns an iterator to the first non-debug instruction in the basic block, or end().
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void setIsUndef(bool Val=true)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Address of indexed Jump Table for switch.
unsigned Reg
virtual MachineInstr & duplicate(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) const
Clones instruction or the whole instruction bundle Orig and insert into MBB before InsertBefore...
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
static unsigned HashMachineInstr(const MachineInstr &MI)
HashMachineInstr - Compute a hash value for MI and its operands.
void RemoveJumpTable(unsigned Idx)
RemoveJumpTable - Mark the specific index as being dead.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
MachineBasicBlock reference.
STATISTIC(NumFunctions, "Total number of functions")
void moveAfter(MachineBasicBlock *NewBefore)
A debug info location.
Definition: DebugLoc.h:33
F(f)
static DebugLoc getBranchDebugLoc(MachineBasicBlock &MBB)
getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch instructions on the block...
virtual unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const
Remove the branching code at the end of the specific MBB.
bool erase(const T &V)
Definition: SmallSet.h:207
BranchFolder(bool defaultEnableTailMerge, bool CommonHoist, MBFIWrapper &FreqInfo, const MachineBranchProbabilityInfo &ProbInfo, unsigned MinTailLength=0)
iterator_range< succ_iterator > successors()
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const
Returns true if the instruction is a terminator instruction that has not been predicated.
AnalysisUsage & addRequired()
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to &#39;Old&#39;, change the code and CFG so that it branches to &#39;N...
LLVM_NODISCARD bool empty() const
Definition: SmallSet.h:155
bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi, MachineLoopInfo *mli=nullptr, bool AfterPlacement=false)
Perhaps branch folding, tail merging and other CFG optimizations on the given function.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE, "Control Flow Optimizer", false, false) bool BranchFolderPass
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:414
static void copyDebugInfoToPredecessor(const TargetInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock &PredMBB)
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
Name of external global symbol.
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:83
static unsigned HashEndOfMBB(const MachineBasicBlock &MBB)
HashEndOfMBB - Hash the last instruction in the MBB.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:411
static bool IsEmptyBlock(MachineBasicBlock *MBB)
void removeBlock(MachineBasicBlock *BB)
This method completely removes BB from all data structures, including all of the Loop objects it is n...
Target-Independent Code Generator Pass Configuration Options.
BlockT * getHeader() const
Definition: LoopInfo.h:102
static bool countsAsInstruction(const MachineInstr &MI)
Whether MI should be counted as an instruction when calculating common tail.
static bool isSimple(Instruction *I)
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
Definition: MachineInstr.h:665
static cl::opt< cl::boolOrDefault > FlagEnableTailMerge("enable-tail-merge", cl::init(cl::BOU_UNSET), cl::Hidden)
static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB, const TargetInstrInfo *TII)
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
static bool blockEndsInUnreachable(const MachineBasicBlock *MBB)
A no successor, non-return block probably ends in unreachable and is cold.
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
static MachineBasicBlock::iterator findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet< unsigned, 4 > &Uses, SmallSet< unsigned, 4 > &Defs)
findHoistingInsertPosAndDeps - Find the location to move common instructions in successors to...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
reverse_iterator rend()
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
reverse_iterator rbegin()
BasicBlockListType::iterator iterator
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F)
TargetInstrInfo - Interface to description of machine instruction set.
static void mergeOperations(MachineBasicBlock::iterator MBBIStartPos, MachineBasicBlock &MBBCommon)
bool isReturn(QueryType Type=AnyInBundle) const
Definition: MachineInstr.h:625
bool getEnableTailMerge() const
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
#define P(N)
Address of a global value.
virtual void ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail, MachineBasicBlock *NewDest) const
Delete the instruction OldInst and everything after it, replacing it with an unconditional branch to ...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:432
void array_pod_sort(IteratorTy Start, IteratorTy End)
array_pod_sort - This sorts an array with the specified start and end extent.
Definition: STLExtras.h:1089
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const
Return true if it&#39;s legal to split the given basic block at the specified instruction (i...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:134
static void salvageDebugInfoFromEmptyBlock(const TargetInstrInfo *TII, MachineBasicBlock &MBB)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:370
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:66
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
raw_ostream & printBlockFreq(raw_ostream &OS, const MachineBasicBlock *MBB) const
static bool IsBetterFallthrough(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2)
IsBetterFallthrough - Return true if it would be clearly better to fall-through to MBB1 than to fall ...
self_iterator getIterator()
Definition: ilist_node.h:81
iterator_range< pred_iterator > predecessors()
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
void moveBefore(MachineBasicBlock *NewAfter)
Move &#39;this&#39; block before or after the specified block.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
virtual bool canMakeTailCallConditional(SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Returns true if the tail call can be made conditional on BranchCond.
static unsigned CountTerminators(MachineBasicBlock *MBB, MachineBasicBlock::iterator &I)
CountTerminators - Count the number of terminators in the given block and set I to the position of th...
virtual bool isPredicated(const MachineInstr &MI) const
Returns true if the instruction is already predicated.
bool isDebugInstr() const
static cl::opt< unsigned > TailMergeSize("tail-merge-size", cl::desc("Min number of instructions to consider tail merging"), cl::init(3), cl::Hidden)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)
Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date...
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:417
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const
Returns true if register Reg and no aliasing register is in the set.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI, Container &Set)
static BranchProbability getBranchProbability(uint64_t Numerator, uint64_t Denominator)
DenseMap< const MachineBasicBlock *, int > getEHScopeMembership(const MachineFunction &MF)
Definition: Analysis.cpp:723
void invalidateLiveness()
invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
int64_t getImm() const
unsigned pred_size() const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
unsigned succ_size() const
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const
Representation of each machine instruction.
Definition: MachineInstr.h:64
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:48
bool isEHPad() const
Returns true if the block is a landing pad.
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:55
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
int64_t getOffset() const
Return the offset from the symbol in this operand.
#define I(x, y, z)
Definition: MD5.cpp:58
Pair of physical register and lane mask.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
const MachineBasicBlock & back() const
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
static bool IsBranchOnlyBlock(MachineBasicBlock *MBB)
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Abstract Stack Frame Index.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineBasicBlock * findFalseBlock(MachineBasicBlock *BB, MachineBasicBlock *TrueBB)
findFalseBlock - BB has a fallthrough.
virtual bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
void erase(iterator MBBI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void clear()
Clears the set.
Definition: LivePhysRegs.h:73
bool operator<(int64_t V1, const APSInt &V2)
Definition: APSInt.h:343
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in&#39;s for MBB.
Definition: LivePhysRegs.h:189
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
Return the innermost loop that BB lives in.
virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB, SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Replace the conditional branch in MBB with a conditional tail call.
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
This class keeps track of branch frequencies of newly created blocks and tail-merged blocks...
IRTranslator LLVM IR MI
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
Definition: MachineInstr.h:642
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
Returns true if the live-ins should be tracked after register allocation.
Address of indexed Constant in Constant Pool.
Register getReg() const
getReg - Returns the register number.
virtual bool isUnconditionalTailCall(const MachineInstr &MI) const
Returns true if MI is an unconditional tail call.
#define LLVM_DEBUG(X)
Definition: Debug.h:122
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
static void copyDebugInfoToSuccessor(const TargetInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock &SuccMBB)
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool IsCond)
Various pieces of code can cause excess edges in the CFG to be inserted.
This class contains meta information specific to a module.
static unsigned ComputeCommonTailLength(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2)
ComputeCommonTailLength - Given two machine basic blocks, compute the number of instructions they act...
LoopInfoBase< MachineBasicBlock, MachineLoop > & getBase()
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:164