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MachineCopyPropagation.cpp
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1 //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This is an extremely simple MachineInstr-level copy propagation pass.
11 //
12 // This pass forwards the source of COPYs to the users of their destinations
13 // when doing so is legal. For example:
14 //
15 // %reg1 = COPY %reg0
16 // ...
17 // ... = OP %reg1
18 //
19 // If
20 // - %reg0 has not been clobbered by the time of the use of %reg1
21 // - the register class constraints are satisfied
22 // - the COPY def is the only value that reaches OP
23 // then this pass replaces the above with:
24 //
25 // %reg1 = COPY %reg0
26 // ...
27 // ... = OP %reg0
28 //
29 // This pass also removes some redundant COPYs. For example:
30 //
31 // %R1 = COPY %R0
32 // ... // No clobber of %R1
33 // %R0 = COPY %R1 <<< Removed
34 //
35 // or
36 //
37 // %R1 = COPY %R0
38 // ... // No clobber of %R0
39 // %R1 = COPY %R0 <<< Removed
40 //
41 //===----------------------------------------------------------------------===//
42 
43 #include "llvm/ADT/DenseMap.h"
44 #include "llvm/ADT/STLExtras.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallVector.h"
47 #include "llvm/ADT/Statistic.h"
58 #include "llvm/MC/MCRegisterInfo.h"
59 #include "llvm/Pass.h"
60 #include "llvm/Support/Debug.h"
63 #include <cassert>
64 #include <iterator>
65 
66 using namespace llvm;
67 
68 #define DEBUG_TYPE "machine-cp"
69 
70 STATISTIC(NumDeletes, "Number of dead copies deleted");
71 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
72 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
73  "Controls which register COPYs are forwarded");
74 
75 namespace {
76 
77 class CopyTracker {
78  using RegList = SmallVector<unsigned, 4>;
79  using SourceMap = DenseMap<unsigned, RegList>;
80  using Reg2MIMap = DenseMap<unsigned, MachineInstr *>;
81 
82  /// Def -> available copies map.
83  Reg2MIMap AvailCopyMap;
84 
85  /// Def -> copies map.
86  Reg2MIMap CopyMap;
87 
88  /// Src -> Def map
89  SourceMap SrcMap;
90 
91 public:
92  /// Mark all of the given registers and their subregisters as unavailable for
93  /// copying.
94  void markRegsUnavailable(const RegList &Regs, const TargetRegisterInfo &TRI) {
95  for (unsigned Reg : Regs) {
96  // Source of copy is no longer available for propagation.
97  for (MCSubRegIterator SR(Reg, &TRI, true); SR.isValid(); ++SR)
98  AvailCopyMap.erase(*SR);
99  }
100  }
101 
102  /// Remove any entry in the tracker's copy maps that is marked clobbered in \p
103  /// RegMask. The map will typically have a lot fewer entries than the regmask
104  /// clobbers, so this is more efficient than iterating the clobbered registers
105  /// and calling ClobberRegister() on them.
106  void removeClobberedRegs(const MachineOperand &RegMask,
107  const TargetRegisterInfo &TRI) {
108  auto RemoveFromMap = [&RegMask](Reg2MIMap &Map) {
109  for (Reg2MIMap::iterator I = Map.begin(), E = Map.end(), Next; I != E;
110  I = Next) {
111  Next = std::next(I);
112  if (RegMask.clobbersPhysReg(I->first))
113  Map.erase(I);
114  }
115  };
116  RemoveFromMap(AvailCopyMap);
117  RemoveFromMap(CopyMap);
118 
119  for (SourceMap::iterator I = SrcMap.begin(), E = SrcMap.end(), Next; I != E;
120  I = Next) {
121  Next = std::next(I);
122  if (RegMask.clobbersPhysReg(I->first)) {
123  markRegsUnavailable(I->second, TRI);
124  SrcMap.erase(I);
125  }
126  }
127  }
128 
129  /// Clobber a single register, removing it from the tracker's copy maps.
130  void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) {
131  for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) {
132  CopyMap.erase(*AI);
133  AvailCopyMap.erase(*AI);
134 
135  SourceMap::iterator SI = SrcMap.find(*AI);
136  if (SI != SrcMap.end()) {
137  markRegsUnavailable(SI->second, TRI);
138  SrcMap.erase(SI);
139  }
140  }
141  }
142 
143  /// Add this copy's registers into the tracker's copy maps.
144  void trackCopy(MachineInstr *Copy, const TargetRegisterInfo &TRI) {
145  assert(Copy->isCopy() && "Tracking non-copy?");
146 
147  unsigned Def = Copy->getOperand(0).getReg();
148  unsigned Src = Copy->getOperand(1).getReg();
149 
150  // Remember Def is defined by the copy.
151  for (MCSubRegIterator SR(Def, &TRI, /*IncludeSelf=*/true); SR.isValid();
152  ++SR) {
153  CopyMap[*SR] = Copy;
154  AvailCopyMap[*SR] = Copy;
155  }
156 
157  // Remember source that's copied to Def. Once it's clobbered, then
158  // it's no longer available for copy propagation.
159  RegList &DestList = SrcMap[Src];
160  if (!is_contained(DestList, Def))
161  DestList.push_back(Def);
162  }
163 
164  bool hasAvailableCopies() { return !AvailCopyMap.empty(); }
165 
166  MachineInstr *findAvailCopy(unsigned Reg) {
167  auto CI = AvailCopyMap.find(Reg);
168  if (CI != AvailCopyMap.end())
169  return CI->second;
170  return nullptr;
171  }
172 
173  MachineInstr *findCopy(unsigned Reg) {
174  auto CI = CopyMap.find(Reg);
175  if (CI != CopyMap.end())
176  return CI->second;
177  return nullptr;
178  }
179 
180  void clear() {
181  AvailCopyMap.clear();
182  CopyMap.clear();
183  SrcMap.clear();
184  }
185 };
186 
187 class MachineCopyPropagation : public MachineFunctionPass {
188  const TargetRegisterInfo *TRI;
189  const TargetInstrInfo *TII;
190  const MachineRegisterInfo *MRI;
191 
192 public:
193  static char ID; // Pass identification, replacement for typeid
194 
195  MachineCopyPropagation() : MachineFunctionPass(ID) {
197  }
198 
199  void getAnalysisUsage(AnalysisUsage &AU) const override {
200  AU.setPreservesCFG();
202  }
203 
204  bool runOnMachineFunction(MachineFunction &MF) override;
205 
206  MachineFunctionProperties getRequiredProperties() const override {
209  }
210 
211 private:
212  void ClobberRegister(unsigned Reg);
213  void ReadRegister(unsigned Reg);
214  void CopyPropagateBlock(MachineBasicBlock &MBB);
215  bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
216  void forwardUses(MachineInstr &MI);
217  bool isForwardableRegClassCopy(const MachineInstr &Copy,
218  const MachineInstr &UseI, unsigned UseIdx);
219  bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
220 
221  /// Candidates for deletion.
222  SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
223 
224  CopyTracker Tracker;
225 
226  bool Changed;
227 };
228 
229 } // end anonymous namespace
230 
232 
234 
235 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
236  "Machine Copy Propagation Pass", false, false)
237 
238 void MachineCopyPropagation::ReadRegister(unsigned Reg) {
239  // If 'Reg' is defined by a copy, the copy is no longer a candidate
240  // for elimination.
241  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
242  if (MachineInstr *Copy = Tracker.findCopy(*AI)) {
243  LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
244  MaybeDeadCopies.remove(Copy);
245  }
246  }
247 }
248 
249 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
250 /// This fact may have been obscured by sub register usage or may not be true at
251 /// all even though Src and Def are subregisters of the registers used in
252 /// PreviousCopy. e.g.
253 /// isNopCopy("ecx = COPY eax", AX, CX) == true
254 /// isNopCopy("ecx = COPY eax", AH, CL) == false
255 static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src,
256  unsigned Def, const TargetRegisterInfo *TRI) {
257  unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg();
258  unsigned PreviousDef = PreviousCopy.getOperand(0).getReg();
259  if (Src == PreviousSrc) {
260  assert(Def == PreviousDef);
261  return true;
262  }
263  if (!TRI->isSubRegister(PreviousSrc, Src))
264  return false;
265  unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
266  return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
267 }
268 
269 /// Remove instruction \p Copy if there exists a previous copy that copies the
270 /// register \p Src to the register \p Def; This may happen indirectly by
271 /// copying the super registers.
272 bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src,
273  unsigned Def) {
274  // Avoid eliminating a copy from/to a reserved registers as we cannot predict
275  // the value (Example: The sparc zero register is writable but stays zero).
276  if (MRI->isReserved(Src) || MRI->isReserved(Def))
277  return false;
278 
279  // Search for an existing copy.
280  MachineInstr *PrevCopy = Tracker.findAvailCopy(Def);
281  if (!PrevCopy)
282  return false;
283 
284  // Check that the existing copy uses the correct sub registers.
285  if (PrevCopy->getOperand(0).isDead())
286  return false;
287  if (!isNopCopy(*PrevCopy, Src, Def, TRI))
288  return false;
289 
290  LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
291 
292  // Copy was redundantly redefining either Src or Def. Remove earlier kill
293  // flags between Copy and PrevCopy because the value will be reused now.
294  assert(Copy.isCopy());
295  unsigned CopyDef = Copy.getOperand(0).getReg();
296  assert(CopyDef == Src || CopyDef == Def);
297  for (MachineInstr &MI :
298  make_range(PrevCopy->getIterator(), Copy.getIterator()))
299  MI.clearRegisterKills(CopyDef, TRI);
300 
301  Copy.eraseFromParent();
302  Changed = true;
303  ++NumDeletes;
304  return true;
305 }
306 
307 /// Decide whether we should forward the source of \param Copy to its use in
308 /// \param UseI based on the physical register class constraints of the opcode
309 /// and avoiding introducing more cross-class COPYs.
310 bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
311  const MachineInstr &UseI,
312  unsigned UseIdx) {
313 
314  unsigned CopySrcReg = Copy.getOperand(1).getReg();
315 
316  // If the new register meets the opcode register constraints, then allow
317  // forwarding.
318  if (const TargetRegisterClass *URC =
319  UseI.getRegClassConstraint(UseIdx, TII, TRI))
320  return URC->contains(CopySrcReg);
321 
322  if (!UseI.isCopy())
323  return false;
324 
325  /// COPYs don't have register class constraints, so if the user instruction
326  /// is a COPY, we just try to avoid introducing additional cross-class
327  /// COPYs. For example:
328  ///
329  /// RegClassA = COPY RegClassB // Copy parameter
330  /// ...
331  /// RegClassB = COPY RegClassA // UseI parameter
332  ///
333  /// which after forwarding becomes
334  ///
335  /// RegClassA = COPY RegClassB
336  /// ...
337  /// RegClassB = COPY RegClassB
338  ///
339  /// so we have reduced the number of cross-class COPYs and potentially
340  /// introduced a nop COPY that can be removed.
341  const TargetRegisterClass *UseDstRC =
342  TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg());
343 
344  const TargetRegisterClass *SuperRC = UseDstRC;
345  for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses();
346  SuperRC; SuperRC = *SuperRCI++)
347  if (SuperRC->contains(CopySrcReg))
348  return true;
349 
350  return false;
351 }
352 
353 /// Check that \p MI does not have implicit uses that overlap with it's \p Use
354 /// operand (the register being replaced), since these can sometimes be
355 /// implicitly tied to other operands. For example, on AMDGPU:
356 ///
357 /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
358 ///
359 /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
360 /// way of knowing we need to update the latter when updating the former.
361 bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
362  const MachineOperand &Use) {
363  for (const MachineOperand &MIUse : MI.uses())
364  if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
365  MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
366  return true;
367 
368  return false;
369 }
370 
371 /// Look for available copies whose destination register is used by \p MI and
372 /// replace the use in \p MI with the copy's source register.
373 void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
374  if (!Tracker.hasAvailableCopies())
375  return;
376 
377  // Look for non-tied explicit vreg uses that have an active COPY
378  // instruction that defines the physical register allocated to them.
379  // Replace the vreg with the source of the active COPY.
380  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
381  ++OpIdx) {
382  MachineOperand &MOUse = MI.getOperand(OpIdx);
383  // Don't forward into undef use operands since doing so can cause problems
384  // with the machine verifier, since it doesn't treat undef reads as reads,
385  // so we can end up with a live range that ends on an undef read, leading to
386  // an error that the live range doesn't end on a read of the live range
387  // register.
388  if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
389  MOUse.isImplicit())
390  continue;
391 
392  if (!MOUse.getReg())
393  continue;
394 
395  // Check that the register is marked 'renamable' so we know it is safe to
396  // rename it without violating any constraints that aren't expressed in the
397  // IR (e.g. ABI or opcode requirements).
398  if (!MOUse.isRenamable())
399  continue;
400 
401  MachineInstr *Copy = Tracker.findAvailCopy(MOUse.getReg());
402  if (!Copy)
403  continue;
404 
405  unsigned CopyDstReg = Copy->getOperand(0).getReg();
406  const MachineOperand &CopySrc = Copy->getOperand(1);
407  unsigned CopySrcReg = CopySrc.getReg();
408 
409  // FIXME: Don't handle partial uses of wider COPYs yet.
410  if (MOUse.getReg() != CopyDstReg) {
411  LLVM_DEBUG(
412  dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n "
413  << MI);
414  continue;
415  }
416 
417  // Don't forward COPYs of reserved regs unless they are constant.
418  if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
419  continue;
420 
421  if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
422  continue;
423 
424  if (hasImplicitOverlap(MI, MOUse))
425  continue;
426 
427  if (!DebugCounter::shouldExecute(FwdCounter)) {
428  LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n "
429  << MI);
430  continue;
431  }
432 
433  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
434  << "\n with " << printReg(CopySrcReg, TRI)
435  << "\n in " << MI << " from " << *Copy);
436 
437  MOUse.setReg(CopySrcReg);
438  if (!CopySrc.isRenamable())
439  MOUse.setIsRenamable(false);
440 
441  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
442 
443  // Clear kill markers that may have been invalidated.
444  for (MachineInstr &KMI :
445  make_range(Copy->getIterator(), std::next(MI.getIterator())))
446  KMI.clearRegisterKills(CopySrcReg, TRI);
447 
448  ++NumCopyForwards;
449  Changed = true;
450  }
451 }
452 
453 void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
454  LLVM_DEBUG(dbgs() << "MCP: CopyPropagateBlock " << MBB.getName() << "\n");
455 
456  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) {
457  MachineInstr *MI = &*I;
458  ++I;
459 
460  // Analyze copies (which don't overlap themselves).
461  if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
462  MI->getOperand(1).getReg())) {
463  unsigned Def = MI->getOperand(0).getReg();
464  unsigned Src = MI->getOperand(1).getReg();
465 
468  "MachineCopyPropagation should be run after register allocation!");
469 
470  // The two copies cancel out and the source of the first copy
471  // hasn't been overridden, eliminate the second one. e.g.
472  // %ecx = COPY %eax
473  // ... nothing clobbered eax.
474  // %eax = COPY %ecx
475  // =>
476  // %ecx = COPY %eax
477  //
478  // or
479  //
480  // %ecx = COPY %eax
481  // ... nothing clobbered eax.
482  // %ecx = COPY %eax
483  // =>
484  // %ecx = COPY %eax
485  if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def))
486  continue;
487 
488  forwardUses(*MI);
489 
490  // Src may have been changed by forwardUses()
491  Src = MI->getOperand(1).getReg();
492 
493  // If Src is defined by a previous copy, the previous copy cannot be
494  // eliminated.
495  ReadRegister(Src);
496  for (const MachineOperand &MO : MI->implicit_operands()) {
497  if (!MO.isReg() || !MO.readsReg())
498  continue;
499  unsigned Reg = MO.getReg();
500  if (!Reg)
501  continue;
502  ReadRegister(Reg);
503  }
504 
505  LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump());
506 
507  // Copy is now a candidate for deletion.
508  if (!MRI->isReserved(Def))
509  MaybeDeadCopies.insert(MI);
510 
511  // If 'Def' is previously source of another copy, then this earlier copy's
512  // source is no longer available. e.g.
513  // %xmm9 = copy %xmm2
514  // ...
515  // %xmm2 = copy %xmm0
516  // ...
517  // %xmm2 = copy %xmm9
518  Tracker.clobberRegister(Def, *TRI);
519  for (const MachineOperand &MO : MI->implicit_operands()) {
520  if (!MO.isReg() || !MO.isDef())
521  continue;
522  unsigned Reg = MO.getReg();
523  if (!Reg)
524  continue;
525  Tracker.clobberRegister(Reg, *TRI);
526  }
527 
528  Tracker.trackCopy(MI, *TRI);
529 
530  continue;
531  }
532 
533  // Clobber any earlyclobber regs first.
534  for (const MachineOperand &MO : MI->operands())
535  if (MO.isReg() && MO.isEarlyClobber()) {
536  unsigned Reg = MO.getReg();
537  // If we have a tied earlyclobber, that means it is also read by this
538  // instruction, so we need to make sure we don't remove it as dead
539  // later.
540  if (MO.isTied())
541  ReadRegister(Reg);
542  Tracker.clobberRegister(Reg, *TRI);
543  }
544 
545  forwardUses(*MI);
546 
547  // Not a copy.
549  const MachineOperand *RegMask = nullptr;
550  for (const MachineOperand &MO : MI->operands()) {
551  if (MO.isRegMask())
552  RegMask = &MO;
553  if (!MO.isReg())
554  continue;
555  unsigned Reg = MO.getReg();
556  if (!Reg)
557  continue;
558 
560  "MachineCopyPropagation should be run after register allocation!");
561 
562  if (MO.isDef() && !MO.isEarlyClobber()) {
563  Defs.push_back(Reg);
564  continue;
565  } else if (!MO.isDebug() && MO.readsReg())
566  ReadRegister(Reg);
567  }
568 
569  // The instruction has a register mask operand which means that it clobbers
570  // a large set of registers. Treat clobbered registers the same way as
571  // defined registers.
572  if (RegMask) {
573  // Erase any MaybeDeadCopies whose destination register is clobbered.
575  MaybeDeadCopies.begin();
576  DI != MaybeDeadCopies.end();) {
577  MachineInstr *MaybeDead = *DI;
578  unsigned Reg = MaybeDead->getOperand(0).getReg();
579  assert(!MRI->isReserved(Reg));
580 
581  if (!RegMask->clobbersPhysReg(Reg)) {
582  ++DI;
583  continue;
584  }
585 
586  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
587  MaybeDead->dump());
588 
589  // erase() will return the next valid iterator pointing to the next
590  // element after the erased one.
591  DI = MaybeDeadCopies.erase(DI);
592  MaybeDead->eraseFromParent();
593  Changed = true;
594  ++NumDeletes;
595  }
596 
597  Tracker.removeClobberedRegs(*RegMask, *TRI);
598  }
599 
600  // Any previous copy definition or reading the Defs is no longer available.
601  for (unsigned Reg : Defs)
602  Tracker.clobberRegister(Reg, *TRI);
603  }
604 
605  // If MBB doesn't have successors, delete the copies whose defs are not used.
606  // If MBB does have successors, then conservative assume the defs are live-out
607  // since we don't want to trust live-in lists.
608  if (MBB.succ_empty()) {
609  for (MachineInstr *MaybeDead : MaybeDeadCopies) {
610  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
611  MaybeDead->dump());
612  assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg()));
613  MaybeDead->eraseFromParent();
614  Changed = true;
615  ++NumDeletes;
616  }
617  }
618 
619  MaybeDeadCopies.clear();
620  Tracker.clear();
621 }
622 
623 bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
624  if (skipFunction(MF.getFunction()))
625  return false;
626 
627  Changed = false;
628 
629  TRI = MF.getSubtarget().getRegisterInfo();
630  TII = MF.getSubtarget().getInstrInfo();
631  MRI = &MF.getRegInfo();
632 
633  for (MachineBasicBlock &MBB : MF)
634  CopyPropagateBlock(MBB);
635 
636  return Changed;
637 }
void push_back(const T &Elt)
Definition: SmallVector.h:218
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
bool contains(unsigned Reg) const
Return true if the specified register is included in this register class.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
iterator_range< mop_iterator > uses()
Returns a range that includes all operands that are register uses.
Definition: MachineInstr.h:492
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
This provides a very simple, boring adaptor for a begin and end iterator into a range type...
unsigned getReg() const
getReg - Returns the register number.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
unsigned Reg
STATISTIC(NumFunctions, "Total number of functions")
unsigned const TargetRegisterInfo * TRI
iterator_range< mop_iterator > operands()
Definition: MachineInstr.h:459
void setIsRenamable(bool Val=true)
INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE, "Machine Copy Propagation Pass", false, false) void MachineCopyPropagation
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
const TargetRegisterClass * getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:412
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
A Use represents the edge between a Value definition and its users.
Definition: Use.h:56
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
bool isSubRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA.
This file provides an implementation of debug counters.
const TargetRegisterClass *const * sc_iterator
DEBUG_COUNTER(FwdCounter, "machine-cp-fwd", "Controls which register COPYs are forwarded")
iterator begin()
Get an iterator to the beginning of the SetVector.
Definition: SetVector.h:83
virtual const TargetInstrInfo * getInstrInfo() const
TargetInstrInfo - Interface to description of machine instruction set.
#define DEBUG_TYPE
sc_iterator getSuperClasses() const
Returns a NULL-terminated list of super-classes.
bool erase(const KeyT &Val)
Definition: DenseMap.h:268
unsigned const MachineRegisterInfo * MRI
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
self_iterator getIterator()
Definition: ilist_node.h:82
static bool shouldExecute(unsigned CounterName)
Definition: DebugCounter.h:72
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
bool isCopy() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
bool isConstantPhysReg(unsigned PhysReg) const
Returns true if PhysReg is unallocatable and constant throughout the function.
void initializeMachineCopyPropagationPass(PassRegistry &)
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:298
bool regsOverlap(unsigned regA, unsigned regB) const
Returns true if the two registers are equal or alias each other.
MachineOperand class - Representation of each machine instruction operand.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:286
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
iterator_range< mop_iterator > implicit_operands()
Definition: MachineInstr.h:473
static void clear(coro::Shape &Shape)
Definition: Coroutines.cpp:212
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
Definition: MachineInstr.h:64
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void setReg(unsigned Reg)
Change the register this operand corresponds to.
#define I(x, y, z)
Definition: MD5.cpp:58
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src, unsigned Def, const TargetRegisterInfo *TRI)
Return true if PreviousCopy did copy register Src to register Def.
IRTranslator LLVM IR MI
#define LLVM_DEBUG(X)
Definition: Debug.h:123
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:414
Properties which a MachineFunction may have at a given point in time.
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
bool isImplicit() const
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1101