LLVM  7.0.0svn
ShrinkWrap.cpp
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1 //===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass looks for safe point where the prologue and epilogue can be
11 // inserted.
12 // The safe point for the prologue (resp. epilogue) is called Save
13 // (resp. Restore).
14 // A point is safe for prologue (resp. epilogue) if and only if
15 // it 1) dominates (resp. post-dominates) all the frame related operations and
16 // between 2) two executions of the Save (resp. Restore) point there is an
17 // execution of the Restore (resp. Save) point.
18 //
19 // For instance, the following points are safe:
20 // for (int i = 0; i < 10; ++i) {
21 // Save
22 // ...
23 // Restore
24 // }
25 // Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
26 // And the following points are not:
27 // for (int i = 0; i < 10; ++i) {
28 // Save
29 // ...
30 // }
31 // for (int i = 0; i < 10; ++i) {
32 // ...
33 // Restore
34 // }
35 // Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
36 //
37 // This pass also ensures that the safe points are 3) cheaper than the regular
38 // entry and exits blocks.
39 //
40 // Property #1 is ensured via the use of MachineDominatorTree and
41 // MachinePostDominatorTree.
42 // Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
43 // points must be in the same loop.
44 // Property #3 is ensured via the MachineBlockFrequencyInfo.
45 //
46 // If this pass found points matching all these properties, then
47 // MachineFrameInfo is updated with this information.
48 //
49 //===----------------------------------------------------------------------===//
50 
51 #include "llvm/ADT/BitVector.h"
53 #include "llvm/ADT/SetVector.h"
54 #include "llvm/ADT/SmallVector.h"
55 #include "llvm/ADT/Statistic.h"
72 #include "llvm/IR/Attributes.h"
73 #include "llvm/IR/Function.h"
74 #include "llvm/MC/MCAsmInfo.h"
75 #include "llvm/Pass.h"
77 #include "llvm/Support/Debug.h"
81 #include <cassert>
82 #include <cstdint>
83 #include <memory>
84 
85 using namespace llvm;
86 
87 #define DEBUG_TYPE "shrink-wrap"
88 
89 STATISTIC(NumFunc, "Number of functions");
90 STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
91 STATISTIC(NumCandidatesDropped,
92  "Number of shrink-wrapping candidates dropped because of frequency");
93 
95 EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
96  cl::desc("enable the shrink-wrapping pass"));
97 
98 namespace {
99 
100 /// \brief Class to determine where the safe point to insert the
101 /// prologue and epilogue are.
102 /// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
103 /// shrink-wrapping term for prologue/epilogue placement, this pass
104 /// does not rely on expensive data-flow analysis. Instead we use the
105 /// dominance properties and loop information to decide which point
106 /// are safe for such insertion.
107 class ShrinkWrap : public MachineFunctionPass {
108  /// Hold callee-saved information.
109  RegisterClassInfo RCI;
112 
113  /// Current safe point found for the prologue.
114  /// The prologue will be inserted before the first instruction
115  /// in this basic block.
116  MachineBasicBlock *Save;
117 
118  /// Current safe point found for the epilogue.
119  /// The epilogue will be inserted before the first terminator instruction
120  /// in this basic block.
121  MachineBasicBlock *Restore;
122 
123  /// Hold the information of the basic block frequency.
124  /// Use to check the profitability of the new points.
126 
127  /// Hold the loop information. Used to determine if Save and Restore
128  /// are in the same loop.
129  MachineLoopInfo *MLI;
130 
131  /// Frequency of the Entry block.
132  uint64_t EntryFreq;
133 
134  /// Current opcode for frame setup.
135  unsigned FrameSetupOpcode;
136 
137  /// Current opcode for frame destroy.
138  unsigned FrameDestroyOpcode;
139 
140  /// Entry block.
141  const MachineBasicBlock *Entry;
142 
143  using SetOfRegs = SmallSetVector<unsigned, 16>;
144 
145  /// Registers that need to be saved for the current function.
146  mutable SetOfRegs CurrentCSRs;
147 
148  /// Current MachineFunction.
149  MachineFunction *MachineFunc;
150 
151  /// \brief Check if \p MI uses or defines a callee-saved register or
152  /// a frame index. If this is the case, this means \p MI must happen
153  /// after Save and before Restore.
154  bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
155 
156  const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
157  if (CurrentCSRs.empty()) {
158  BitVector SavedRegs;
159  const TargetFrameLowering *TFI =
160  MachineFunc->getSubtarget().getFrameLowering();
161 
162  TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
163 
164  for (int Reg = SavedRegs.find_first(); Reg != -1;
165  Reg = SavedRegs.find_next(Reg))
166  CurrentCSRs.insert((unsigned)Reg);
167  }
168  return CurrentCSRs;
169  }
170 
171  /// \brief Update the Save and Restore points such that \p MBB is in
172  /// the region that is dominated by Save and post-dominated by Restore
173  /// and Save and Restore still match the safe point definition.
174  /// Such point may not exist and Save and/or Restore may be null after
175  /// this call.
176  void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
177 
178  /// \brief Initialize the pass for \p MF.
179  void init(MachineFunction &MF) {
180  RCI.runOnMachineFunction(MF);
181  MDT = &getAnalysis<MachineDominatorTree>();
182  MPDT = &getAnalysis<MachinePostDominatorTree>();
183  Save = nullptr;
184  Restore = nullptr;
185  MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
186  MLI = &getAnalysis<MachineLoopInfo>();
187  EntryFreq = MBFI->getEntryFreq();
188  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
189  FrameSetupOpcode = TII.getCallFrameSetupOpcode();
190  FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
191  Entry = &MF.front();
192  CurrentCSRs.clear();
193  MachineFunc = &MF;
194 
195  ++NumFunc;
196  }
197 
198  /// Check whether or not Save and Restore points are still interesting for
199  /// shrink-wrapping.
200  bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
201 
202  /// \brief Check if shrink wrapping is enabled for this target and function.
203  static bool isShrinkWrapEnabled(const MachineFunction &MF);
204 
205 public:
206  static char ID;
207 
208  ShrinkWrap() : MachineFunctionPass(ID) {
210  }
211 
212  void getAnalysisUsage(AnalysisUsage &AU) const override {
213  AU.setPreservesAll();
219  }
220 
221  StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
222 
223  /// \brief Perform the shrink-wrapping analysis and update
224  /// the MachineFrameInfo attached to \p MF with the results.
225  bool runOnMachineFunction(MachineFunction &MF) override;
226 };
227 
228 } // end anonymous namespace
229 
230 char ShrinkWrap::ID = 0;
231 
233 
234 INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
239 INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
240 
241 bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
242  RegScavenger *RS) const {
243  if (MI.getOpcode() == FrameSetupOpcode ||
244  MI.getOpcode() == FrameDestroyOpcode) {
245  DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
246  return true;
247  }
248  for (const MachineOperand &MO : MI.operands()) {
249  bool UseOrDefCSR = false;
250  if (MO.isReg()) {
251  // Ignore instructions like DBG_VALUE which don't read/def the register.
252  if (!MO.isDef() && !MO.readsReg())
253  continue;
254  unsigned PhysReg = MO.getReg();
255  if (!PhysReg)
256  continue;
258  "Unallocated register?!");
259  UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg);
260  } else if (MO.isRegMask()) {
261  // Check if this regmask clobbers any of the CSRs.
262  for (unsigned Reg : getCurrentCSRs(RS)) {
263  if (MO.clobbersPhysReg(Reg)) {
264  UseOrDefCSR = true;
265  break;
266  }
267  }
268  }
269  // Skip FrameIndex operands in DBG_VALUE instructions.
270  if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
271  DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
272  << MO.isFI() << "): " << MI << '\n');
273  return true;
274  }
275  }
276  return false;
277 }
278 
279 /// \brief Helper function to find the immediate (post) dominator.
280 template <typename ListOfBBs, typename DominanceAnalysis>
281 static MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
282  DominanceAnalysis &Dom) {
283  MachineBasicBlock *IDom = &Block;
284  for (MachineBasicBlock *BB : BBs) {
285  IDom = Dom.findNearestCommonDominator(IDom, BB);
286  if (!IDom)
287  break;
288  }
289  if (IDom == &Block)
290  return nullptr;
291  return IDom;
292 }
293 
294 void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB,
295  RegScavenger *RS) {
296  // Get rid of the easy cases first.
297  if (!Save)
298  Save = &MBB;
299  else
300  Save = MDT->findNearestCommonDominator(Save, &MBB);
301 
302  if (!Save) {
303  DEBUG(dbgs() << "Found a block that is not reachable from Entry\n");
304  return;
305  }
306 
307  if (!Restore)
308  Restore = &MBB;
309  else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
310  // means the block never returns. If that's the
311  // case, we don't want to call
312  // `findNearestCommonDominator`, which will
313  // return `Restore`.
314  Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
315  else
316  Restore = nullptr; // Abort, we can't find a restore point in this case.
317 
318  // Make sure we would be able to insert the restore code before the
319  // terminator.
320  if (Restore == &MBB) {
321  for (const MachineInstr &Terminator : MBB.terminators()) {
322  if (!useOrDefCSROrFI(Terminator, RS))
323  continue;
324  // One of the terminator needs to happen before the restore point.
325  if (MBB.succ_empty()) {
326  Restore = nullptr; // Abort, we can't find a restore point in this case.
327  break;
328  }
329  // Look for a restore point that post-dominates all the successors.
330  // The immediate post-dominator is what we are looking for.
331  Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
332  break;
333  }
334  }
335 
336  if (!Restore) {
337  DEBUG(dbgs() << "Restore point needs to be spanned on several blocks\n");
338  return;
339  }
340 
341  // Make sure Save and Restore are suitable for shrink-wrapping:
342  // 1. all path from Save needs to lead to Restore before exiting.
343  // 2. all path to Restore needs to go through Save from Entry.
344  // We achieve that by making sure that:
345  // A. Save dominates Restore.
346  // B. Restore post-dominates Save.
347  // C. Save and Restore are in the same loop.
348  bool SaveDominatesRestore = false;
349  bool RestorePostDominatesSave = false;
350  while (Save && Restore &&
351  (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
352  !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
353  // Post-dominance is not enough in loops to ensure that all uses/defs
354  // are after the prologue and before the epilogue at runtime.
355  // E.g.,
356  // while(1) {
357  // Save
358  // Restore
359  // if (...)
360  // break;
361  // use/def CSRs
362  // }
363  // All the uses/defs of CSRs are dominated by Save and post-dominated
364  // by Restore. However, the CSRs uses are still reachable after
365  // Restore and before Save are executed.
366  //
367  // For now, just push the restore/save points outside of loops.
368  // FIXME: Refine the criteria to still find interesting cases
369  // for loops.
370  MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
371  // Fix (A).
372  if (!SaveDominatesRestore) {
373  Save = MDT->findNearestCommonDominator(Save, Restore);
374  continue;
375  }
376  // Fix (B).
377  if (!RestorePostDominatesSave)
378  Restore = MPDT->findNearestCommonDominator(Restore, Save);
379 
380  // Fix (C).
381  if (Save && Restore &&
382  (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
383  if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
384  // Push Save outside of this loop if immediate dominator is different
385  // from save block. If immediate dominator is not different, bail out.
386  Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
387  if (!Save)
388  break;
389  } else {
390  // If the loop does not exit, there is no point in looking
391  // for a post-dominator outside the loop.
393  MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
394  // Push Restore outside of this loop.
395  // Look for the immediate post-dominator of the loop exits.
396  MachineBasicBlock *IPdom = Restore;
397  for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
398  IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
399  if (!IPdom)
400  break;
401  }
402  // If the immediate post-dominator is not in a less nested loop,
403  // then we are stuck in a program with an infinite loop.
404  // In that case, we will not find a safe point, hence, bail out.
405  if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
406  Restore = IPdom;
407  else {
408  Restore = nullptr;
409  break;
410  }
411  }
412  }
413  }
414 }
415 
416 /// Check whether the edge (\p SrcBB, \p DestBB) is a backedge according to MLI.
417 /// I.e., check if it exists a loop that contains SrcBB and where DestBB is the
418 /// loop header.
419 static bool isProperBackedge(const MachineLoopInfo &MLI,
420  const MachineBasicBlock *SrcBB,
421  const MachineBasicBlock *DestBB) {
422  for (const MachineLoop *Loop = MLI.getLoopFor(SrcBB); Loop;
423  Loop = Loop->getParentLoop()) {
424  if (Loop->getHeader() == DestBB)
425  return true;
426  }
427  return false;
428 }
429 
430 /// Check if the CFG of \p MF is irreducible.
431 static bool isIrreducibleCFG(const MachineFunction &MF,
432  const MachineLoopInfo &MLI) {
433  const MachineBasicBlock *Entry = &*MF.begin();
435  BitVector VisitedBB(MF.getNumBlockIDs());
436  for (const MachineBasicBlock *MBB : RPOT) {
437  VisitedBB.set(MBB->getNumber());
438  for (const MachineBasicBlock *SuccBB : MBB->successors()) {
439  if (!VisitedBB.test(SuccBB->getNumber()))
440  continue;
441  // We already visited SuccBB, thus MBB->SuccBB must be a backedge.
442  // Check that the head matches what we have in the loop information.
443  // Otherwise, we have an irreducible graph.
444  if (!isProperBackedge(MLI, MBB, SuccBB))
445  return true;
446  }
447  }
448  return false;
449 }
450 
451 bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
452  if (skipFunction(MF.getFunction()) || MF.empty() || !isShrinkWrapEnabled(MF))
453  return false;
454 
455  DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
456 
457  init(MF);
458 
459  if (isIrreducibleCFG(MF, *MLI)) {
460  // If MF is irreducible, a block may be in a loop without
461  // MachineLoopInfo reporting it. I.e., we may use the
462  // post-dominance property in loops, which lead to incorrect
463  // results. Moreover, we may miss that the prologue and
464  // epilogue are not in the same loop, leading to unbalanced
465  // construction/deconstruction of the stack frame.
466  DEBUG(dbgs() << "Irreducible CFGs are not supported yet\n");
467  return false;
468  }
469 
470  const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
471  std::unique_ptr<RegScavenger> RS(
472  TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
473 
474  for (MachineBasicBlock &MBB : MF) {
475  DEBUG(dbgs() << "Look into: " << MBB.getNumber() << ' ' << MBB.getName()
476  << '\n');
477 
478  if (MBB.isEHFuncletEntry()) {
479  DEBUG(dbgs() << "EH Funclets are not supported yet.\n");
480  return false;
481  }
482 
483  for (const MachineInstr &MI : MBB) {
484  if (!useOrDefCSROrFI(MI, RS.get()))
485  continue;
486  // Save (resp. restore) point must dominate (resp. post dominate)
487  // MI. Look for the proper basic block for those.
488  updateSaveRestorePoints(MBB, RS.get());
489  // If we are at a point where we cannot improve the placement of
490  // save/restore instructions, just give up.
491  if (!ArePointsInteresting()) {
492  DEBUG(dbgs() << "No Shrink wrap candidate found\n");
493  return false;
494  }
495  // No need to look for other instructions, this basic block
496  // will already be part of the handled region.
497  break;
498  }
499  }
500  if (!ArePointsInteresting()) {
501  // If the points are not interesting at this point, then they must be null
502  // because it means we did not encounter any frame/CSR related code.
503  // Otherwise, we would have returned from the previous loop.
504  assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
505  DEBUG(dbgs() << "Nothing to shrink-wrap\n");
506  return false;
507  }
508 
509  DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: " << EntryFreq
510  << '\n');
511 
512  const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
513  do {
514  DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
515  << Save->getNumber() << ' ' << Save->getName() << ' '
516  << MBFI->getBlockFreq(Save).getFrequency() << "\nRestore: "
517  << Restore->getNumber() << ' ' << Restore->getName() << ' '
518  << MBFI->getBlockFreq(Restore).getFrequency() << '\n');
519 
520  bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
521  if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save).getFrequency()) &&
522  EntryFreq >= MBFI->getBlockFreq(Restore).getFrequency()) &&
523  ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
524  TFI->canUseAsEpilogue(*Restore)))
525  break;
526  DEBUG(dbgs() << "New points are too expensive or invalid for the target\n");
527  MachineBasicBlock *NewBB;
528  if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
529  Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
530  if (!Save)
531  break;
532  NewBB = Save;
533  } else {
534  // Restore is expensive.
535  Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
536  if (!Restore)
537  break;
538  NewBB = Restore;
539  }
540  updateSaveRestorePoints(*NewBB, RS.get());
541  } while (Save && Restore);
542 
543  if (!ArePointsInteresting()) {
544  ++NumCandidatesDropped;
545  return false;
546  }
547 
548  DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: " << Save->getNumber()
549  << ' ' << Save->getName() << "\nRestore: "
550  << Restore->getNumber() << ' ' << Restore->getName() << '\n');
551 
552  MachineFrameInfo &MFI = MF.getFrameInfo();
553  MFI.setSavePoint(Save);
554  MFI.setRestorePoint(Restore);
555  ++NumCandidates;
556  return false;
557 }
558 
559 bool ShrinkWrap::isShrinkWrapEnabled(const MachineFunction &MF) {
561 
562  switch (EnableShrinkWrapOpt) {
563  case cl::BOU_UNSET:
564  return TFI->enableShrinkWrapping(MF) &&
565  // Windows with CFI has some limitations that make it impossible
566  // to use shrink-wrapping.
568  // Sanitizers look at the value of the stack at the location
569  // of the crash. Since a crash can happen anywhere, the
570  // frame must be lowered before anything else happen for the
571  // sanitizers to be able to get a correct stack frame.
572  !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
573  MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
574  MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
575  MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
576  // If EnableShrinkWrap is set, it takes precedence on whatever the
577  // target sets. The rational is that we assume we want to test
578  // something related to shrink-wrapping.
579  case cl::BOU_TRUE:
580  return true;
581  case cl::BOU_FALSE:
582  return false;
583  }
584  llvm_unreachable("Invalid shrink-wrapping state");
585 }
Pass interface - Implemented by all &#39;passes&#39;.
Definition: Pass.h:81
static bool isIrreducibleCFG(const MachineFunction &MF, const MachineLoopInfo &MLI)
Check if the CFG of MF is irreducible.
Definition: ShrinkWrap.cpp:431
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:569
BitVector & set()
Definition: BitVector.h:398
void setSavePoint(MachineBasicBlock *NewSave)
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
Returns true if the target requires (and can make use of) the register scavenger. ...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID&#39;s allocated.
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:302
STATISTIC(NumFunctions, "Total number of functions")
unsigned getCallFrameDestroyOpcode() const
static bool isProperBackedge(const MachineLoopInfo &MLI, const MachineBasicBlock *SrcBB, const MachineBasicBlock *DestBB)
Check whether the edge (SrcBB, DestBB) is a backedge according to MLI.
Definition: ShrinkWrap.cpp:419
iterator_range< succ_iterator > successors()
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:51
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition: BitVector.h:332
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition: BitVector.h:340
Reg
All possible values of the reg field in the ModR/M byte.
This file contains the simple types necessary to represent the attributes associated with functions a...
iterator_range< iterator > terminators()
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
#define DEBUG_TYPE
Definition: ShrinkWrap.cpp:87
BlockT * getHeader() const
Definition: LoopInfo.h:100
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
virtual const TargetInstrInfo * getInstrInfo() const
MachineBasicBlock * findNearestCommonDominator(MachineBasicBlock *A, MachineBasicBlock *B)
findNearestCommonDominator - Find nearest common dominator basic block for basic block A and B...
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
TargetInstrInfo - Interface to description of machine instruction set.
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:406
This file declares the machine register scavenger class.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
unsigned getCallFrameSetupOpcode() const
These methods return the opcode of the frame setup/destroy instructions if they exist (-1 otherwise)...
Represent the analysis usage information of a pass.
void runOnMachineFunction(const MachineFunction &MF)
runOnFunction - Prepare to answer questions about MF.
void initializeShrinkWrapPass(PassRegistry &)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom)
Helper function to find the immediate (post) dominator.
Definition: ShrinkWrap.cpp:281
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:298
PostDominatorTree Class - Concrete subclass of DominatorTree that is used to compute the post-dominat...
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:862
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
Information about stack frame layout on the target.
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:48
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
void setPreservesAll()
Set by analyses that do not transform their input at all.
LoopT * getParentLoop() const
Definition: LoopInfo.h:101
Representation of each machine instruction.
Definition: MachineInstr.h:60
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:439
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
virtual const TargetFrameLowering * getFrameLowering() const
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
unsigned getLastCalleeSavedAlias(unsigned PhysReg) const
getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn&#39;t overlap a CalleeSavedAliases.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
aarch64 promote const
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
Return the innermost loop that BB lives in.
#define DEBUG(X)
Definition: Debug.h:118
IRTranslator LLVM IR MI
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:232
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...