LLVM  10.0.0svn
ShrinkWrap.cpp
Go to the documentation of this file.
1 //===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass looks for safe point where the prologue and epilogue can be
10 // inserted.
11 // The safe point for the prologue (resp. epilogue) is called Save
12 // (resp. Restore).
13 // A point is safe for prologue (resp. epilogue) if and only if
14 // it 1) dominates (resp. post-dominates) all the frame related operations and
15 // between 2) two executions of the Save (resp. Restore) point there is an
16 // execution of the Restore (resp. Save) point.
17 //
18 // For instance, the following points are safe:
19 // for (int i = 0; i < 10; ++i) {
20 // Save
21 // ...
22 // Restore
23 // }
24 // Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
25 // And the following points are not:
26 // for (int i = 0; i < 10; ++i) {
27 // Save
28 // ...
29 // }
30 // for (int i = 0; i < 10; ++i) {
31 // ...
32 // Restore
33 // }
34 // Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
35 //
36 // This pass also ensures that the safe points are 3) cheaper than the regular
37 // entry and exits blocks.
38 //
39 // Property #1 is ensured via the use of MachineDominatorTree and
40 // MachinePostDominatorTree.
41 // Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
42 // points must be in the same loop.
43 // Property #3 is ensured via the MachineBlockFrequencyInfo.
44 //
45 // If this pass found points matching all these properties, then
46 // MachineFrameInfo is updated with this information.
47 //
48 //===----------------------------------------------------------------------===//
49 
50 #include "llvm/ADT/BitVector.h"
52 #include "llvm/ADT/SetVector.h"
53 #include "llvm/ADT/SmallVector.h"
54 #include "llvm/ADT/Statistic.h"
55 #include "llvm/Analysis/CFG.h"
74 #include "llvm/IR/Attributes.h"
75 #include "llvm/IR/Function.h"
76 #include "llvm/MC/MCAsmInfo.h"
77 #include "llvm/Pass.h"
79 #include "llvm/Support/Debug.h"
83 #include <cassert>
84 #include <cstdint>
85 #include <memory>
86 
87 using namespace llvm;
88 
89 #define DEBUG_TYPE "shrink-wrap"
90 
91 STATISTIC(NumFunc, "Number of functions");
92 STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
93 STATISTIC(NumCandidatesDropped,
94  "Number of shrink-wrapping candidates dropped because of frequency");
95 
97 EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
98  cl::desc("enable the shrink-wrapping pass"));
99 
100 namespace {
101 
102 /// Class to determine where the safe point to insert the
103 /// prologue and epilogue are.
104 /// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
105 /// shrink-wrapping term for prologue/epilogue placement, this pass
106 /// does not rely on expensive data-flow analysis. Instead we use the
107 /// dominance properties and loop information to decide which point
108 /// are safe for such insertion.
109 class ShrinkWrap : public MachineFunctionPass {
110  /// Hold callee-saved information.
111  RegisterClassInfo RCI;
114 
115  /// Current safe point found for the prologue.
116  /// The prologue will be inserted before the first instruction
117  /// in this basic block.
118  MachineBasicBlock *Save;
119 
120  /// Current safe point found for the epilogue.
121  /// The epilogue will be inserted before the first terminator instruction
122  /// in this basic block.
123  MachineBasicBlock *Restore;
124 
125  /// Hold the information of the basic block frequency.
126  /// Use to check the profitability of the new points.
128 
129  /// Hold the loop information. Used to determine if Save and Restore
130  /// are in the same loop.
131  MachineLoopInfo *MLI;
132 
133  // Emit remarks.
134  MachineOptimizationRemarkEmitter *ORE = nullptr;
135 
136  /// Frequency of the Entry block.
137  uint64_t EntryFreq;
138 
139  /// Current opcode for frame setup.
140  unsigned FrameSetupOpcode;
141 
142  /// Current opcode for frame destroy.
143  unsigned FrameDestroyOpcode;
144 
145  /// Stack pointer register, used by llvm.{savestack,restorestack}
146  unsigned SP;
147 
148  /// Entry block.
149  const MachineBasicBlock *Entry;
150 
151  using SetOfRegs = SmallSetVector<unsigned, 16>;
152 
153  /// Registers that need to be saved for the current function.
154  mutable SetOfRegs CurrentCSRs;
155 
156  /// Current MachineFunction.
157  MachineFunction *MachineFunc;
158 
159  /// Check if \p MI uses or defines a callee-saved register or
160  /// a frame index. If this is the case, this means \p MI must happen
161  /// after Save and before Restore.
162  bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
163 
164  const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
165  if (CurrentCSRs.empty()) {
166  BitVector SavedRegs;
167  const TargetFrameLowering *TFI =
168  MachineFunc->getSubtarget().getFrameLowering();
169 
170  TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
171 
172  for (int Reg = SavedRegs.find_first(); Reg != -1;
173  Reg = SavedRegs.find_next(Reg))
174  CurrentCSRs.insert((unsigned)Reg);
175  }
176  return CurrentCSRs;
177  }
178 
179  /// Update the Save and Restore points such that \p MBB is in
180  /// the region that is dominated by Save and post-dominated by Restore
181  /// and Save and Restore still match the safe point definition.
182  /// Such point may not exist and Save and/or Restore may be null after
183  /// this call.
184  void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
185 
186  /// Initialize the pass for \p MF.
187  void init(MachineFunction &MF) {
188  RCI.runOnMachineFunction(MF);
189  MDT = &getAnalysis<MachineDominatorTree>();
190  MPDT = &getAnalysis<MachinePostDominatorTree>();
191  Save = nullptr;
192  Restore = nullptr;
193  MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
194  MLI = &getAnalysis<MachineLoopInfo>();
195  ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
196  EntryFreq = MBFI->getEntryFreq();
197  const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
198  const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
199  FrameSetupOpcode = TII.getCallFrameSetupOpcode();
200  FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
202  Entry = &MF.front();
203  CurrentCSRs.clear();
204  MachineFunc = &MF;
205 
206  ++NumFunc;
207  }
208 
209  /// Check whether or not Save and Restore points are still interesting for
210  /// shrink-wrapping.
211  bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
212 
213  /// Check if shrink wrapping is enabled for this target and function.
214  static bool isShrinkWrapEnabled(const MachineFunction &MF);
215 
216 public:
217  static char ID;
218 
219  ShrinkWrap() : MachineFunctionPass(ID) {
221  }
222 
223  void getAnalysisUsage(AnalysisUsage &AU) const override {
224  AU.setPreservesAll();
231  }
232 
233  MachineFunctionProperties getRequiredProperties() const override {
236  }
237 
238  StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
239 
240  /// Perform the shrink-wrapping analysis and update
241  /// the MachineFrameInfo attached to \p MF with the results.
242  bool runOnMachineFunction(MachineFunction &MF) override;
243 };
244 
245 } // end anonymous namespace
246 
247 char ShrinkWrap::ID = 0;
248 
250 
251 INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
257 INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
258 
259 bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
260  RegScavenger *RS) const {
261  // This prevents premature stack popping when occurs a indirect stack
262  // access. It is overly aggressive for the moment.
263  // TODO: - Obvious non-stack loads and store, such as global values,
264  // are known to not access the stack.
265  // - Further, data dependency and alias analysis can validate
266  // that load and stores never derive from the stack pointer.
267  if (MI.mayLoadOrStore())
268  return true;
269 
270  if (MI.getOpcode() == FrameSetupOpcode ||
271  MI.getOpcode() == FrameDestroyOpcode) {
272  LLVM_DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
273  return true;
274  }
275  for (const MachineOperand &MO : MI.operands()) {
276  bool UseOrDefCSR = false;
277  if (MO.isReg()) {
278  // Ignore instructions like DBG_VALUE which don't read/def the register.
279  if (!MO.isDef() && !MO.readsReg())
280  continue;
281  Register PhysReg = MO.getReg();
282  if (!PhysReg)
283  continue;
284  assert(Register::isPhysicalRegister(PhysReg) && "Unallocated register?!");
285  // The stack pointer is not normally described as a callee-saved register
286  // in calling convention definitions, so we need to watch for it
287  // separately. An SP mentioned by a call instruction, we can ignore,
288  // though, as it's harmless and we do not want to effectively disable tail
289  // calls by forcing the restore point to post-dominate them.
290  UseOrDefCSR = (!MI.isCall() && PhysReg == SP) ||
291  RCI.getLastCalleeSavedAlias(PhysReg);
292  } else if (MO.isRegMask()) {
293  // Check if this regmask clobbers any of the CSRs.
294  for (unsigned Reg : getCurrentCSRs(RS)) {
295  if (MO.clobbersPhysReg(Reg)) {
296  UseOrDefCSR = true;
297  break;
298  }
299  }
300  }
301  // Skip FrameIndex operands in DBG_VALUE instructions.
302  if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
303  LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
304  << MO.isFI() << "): " << MI << '\n');
305  return true;
306  }
307  }
308  return false;
309 }
310 
311 /// Helper function to find the immediate (post) dominator.
312 template <typename ListOfBBs, typename DominanceAnalysis>
313 static MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
314  DominanceAnalysis &Dom) {
315  MachineBasicBlock *IDom = &Block;
316  for (MachineBasicBlock *BB : BBs) {
317  IDom = Dom.findNearestCommonDominator(IDom, BB);
318  if (!IDom)
319  break;
320  }
321  if (IDom == &Block)
322  return nullptr;
323  return IDom;
324 }
325 
326 void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB,
327  RegScavenger *RS) {
328  // Get rid of the easy cases first.
329  if (!Save)
330  Save = &MBB;
331  else
332  Save = MDT->findNearestCommonDominator(Save, &MBB);
333 
334  if (!Save) {
335  LLVM_DEBUG(dbgs() << "Found a block that is not reachable from Entry\n");
336  return;
337  }
338 
339  if (!Restore)
340  Restore = &MBB;
341  else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
342  // means the block never returns. If that's the
343  // case, we don't want to call
344  // `findNearestCommonDominator`, which will
345  // return `Restore`.
346  Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
347  else
348  Restore = nullptr; // Abort, we can't find a restore point in this case.
349 
350  // Make sure we would be able to insert the restore code before the
351  // terminator.
352  if (Restore == &MBB) {
353  for (const MachineInstr &Terminator : MBB.terminators()) {
354  if (!useOrDefCSROrFI(Terminator, RS))
355  continue;
356  // One of the terminator needs to happen before the restore point.
357  if (MBB.succ_empty()) {
358  Restore = nullptr; // Abort, we can't find a restore point in this case.
359  break;
360  }
361  // Look for a restore point that post-dominates all the successors.
362  // The immediate post-dominator is what we are looking for.
363  Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
364  break;
365  }
366  }
367 
368  if (!Restore) {
369  LLVM_DEBUG(
370  dbgs() << "Restore point needs to be spanned on several blocks\n");
371  return;
372  }
373 
374  // Make sure Save and Restore are suitable for shrink-wrapping:
375  // 1. all path from Save needs to lead to Restore before exiting.
376  // 2. all path to Restore needs to go through Save from Entry.
377  // We achieve that by making sure that:
378  // A. Save dominates Restore.
379  // B. Restore post-dominates Save.
380  // C. Save and Restore are in the same loop.
381  bool SaveDominatesRestore = false;
382  bool RestorePostDominatesSave = false;
383  while (Save && Restore &&
384  (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
385  !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
386  // Post-dominance is not enough in loops to ensure that all uses/defs
387  // are after the prologue and before the epilogue at runtime.
388  // E.g.,
389  // while(1) {
390  // Save
391  // Restore
392  // if (...)
393  // break;
394  // use/def CSRs
395  // }
396  // All the uses/defs of CSRs are dominated by Save and post-dominated
397  // by Restore. However, the CSRs uses are still reachable after
398  // Restore and before Save are executed.
399  //
400  // For now, just push the restore/save points outside of loops.
401  // FIXME: Refine the criteria to still find interesting cases
402  // for loops.
403  MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
404  // Fix (A).
405  if (!SaveDominatesRestore) {
406  Save = MDT->findNearestCommonDominator(Save, Restore);
407  continue;
408  }
409  // Fix (B).
410  if (!RestorePostDominatesSave)
411  Restore = MPDT->findNearestCommonDominator(Restore, Save);
412 
413  // Fix (C).
414  if (Save && Restore &&
415  (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
416  if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
417  // Push Save outside of this loop if immediate dominator is different
418  // from save block. If immediate dominator is not different, bail out.
419  Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
420  if (!Save)
421  break;
422  } else {
423  // If the loop does not exit, there is no point in looking
424  // for a post-dominator outside the loop.
426  MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
427  // Push Restore outside of this loop.
428  // Look for the immediate post-dominator of the loop exits.
429  MachineBasicBlock *IPdom = Restore;
430  for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
431  IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
432  if (!IPdom)
433  break;
434  }
435  // If the immediate post-dominator is not in a less nested loop,
436  // then we are stuck in a program with an infinite loop.
437  // In that case, we will not find a safe point, hence, bail out.
438  if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
439  Restore = IPdom;
440  else {
441  Restore = nullptr;
442  break;
443  }
444  }
445  }
446  }
447 }
448 
450  StringRef RemarkName, StringRef RemarkMessage,
451  const DiagnosticLocation &Loc,
452  const MachineBasicBlock *MBB) {
453  ORE->emit([&]() {
454  return MachineOptimizationRemarkMissed(DEBUG_TYPE, RemarkName, Loc, MBB)
455  << RemarkMessage;
456  });
457 
458  LLVM_DEBUG(dbgs() << RemarkMessage << '\n');
459  return false;
460 }
461 
462 bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
463  if (skipFunction(MF.getFunction()) || MF.empty() || !isShrinkWrapEnabled(MF))
464  return false;
465 
466  LLVM_DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
467 
468  init(MF);
469 
471  if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *MLI)) {
472  // If MF is irreducible, a block may be in a loop without
473  // MachineLoopInfo reporting it. I.e., we may use the
474  // post-dominance property in loops, which lead to incorrect
475  // results. Moreover, we may miss that the prologue and
476  // epilogue are not in the same loop, leading to unbalanced
477  // construction/deconstruction of the stack frame.
478  return giveUpWithRemarks(ORE, "UnsupportedIrreducibleCFG",
479  "Irreducible CFGs are not supported yet.",
480  MF.getFunction().getSubprogram(), &MF.front());
481  }
482 
484  std::unique_ptr<RegScavenger> RS(
485  TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
486 
487  for (MachineBasicBlock &MBB : MF) {
488  LLVM_DEBUG(dbgs() << "Look into: " << MBB.getNumber() << ' '
489  << MBB.getName() << '\n');
490 
491  if (MBB.isEHFuncletEntry())
492  return giveUpWithRemarks(ORE, "UnsupportedEHFunclets",
493  "EH Funclets are not supported yet.",
494  MBB.front().getDebugLoc(), &MBB);
495 
496  if (MBB.isEHPad()) {
497  // Push the prologue and epilogue outside of
498  // the region that may throw by making sure
499  // that all the landing pads are at least at the
500  // boundary of the save and restore points.
501  // The problem with exceptions is that the throw
502  // is not properly modeled and in particular, a
503  // basic block can jump out from the middle.
504  updateSaveRestorePoints(MBB, RS.get());
505  if (!ArePointsInteresting()) {
506  LLVM_DEBUG(dbgs() << "EHPad prevents shrink-wrapping\n");
507  return false;
508  }
509  continue;
510  }
511 
512  for (const MachineInstr &MI : MBB) {
513  if (!useOrDefCSROrFI(MI, RS.get()))
514  continue;
515  // Save (resp. restore) point must dominate (resp. post dominate)
516  // MI. Look for the proper basic block for those.
517  updateSaveRestorePoints(MBB, RS.get());
518  // If we are at a point where we cannot improve the placement of
519  // save/restore instructions, just give up.
520  if (!ArePointsInteresting()) {
521  LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");
522  return false;
523  }
524  // No need to look for other instructions, this basic block
525  // will already be part of the handled region.
526  break;
527  }
528  }
529  if (!ArePointsInteresting()) {
530  // If the points are not interesting at this point, then they must be null
531  // because it means we did not encounter any frame/CSR related code.
532  // Otherwise, we would have returned from the previous loop.
533  assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
534  LLVM_DEBUG(dbgs() << "Nothing to shrink-wrap\n");
535  return false;
536  }
537 
538  LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: " << EntryFreq
539  << '\n');
540 
541  const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
542  do {
543  LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
544  << Save->getNumber() << ' ' << Save->getName() << ' '
545  << MBFI->getBlockFreq(Save).getFrequency()
546  << "\nRestore: " << Restore->getNumber() << ' '
547  << Restore->getName() << ' '
548  << MBFI->getBlockFreq(Restore).getFrequency() << '\n');
549 
550  bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
551  if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save).getFrequency()) &&
552  EntryFreq >= MBFI->getBlockFreq(Restore).getFrequency()) &&
553  ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
554  TFI->canUseAsEpilogue(*Restore)))
555  break;
556  LLVM_DEBUG(
557  dbgs() << "New points are too expensive or invalid for the target\n");
558  MachineBasicBlock *NewBB;
559  if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
560  Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
561  if (!Save)
562  break;
563  NewBB = Save;
564  } else {
565  // Restore is expensive.
566  Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
567  if (!Restore)
568  break;
569  NewBB = Restore;
570  }
571  updateSaveRestorePoints(*NewBB, RS.get());
572  } while (Save && Restore);
573 
574  if (!ArePointsInteresting()) {
575  ++NumCandidatesDropped;
576  return false;
577  }
578 
579  LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "
580  << Save->getNumber() << ' ' << Save->getName()
581  << "\nRestore: " << Restore->getNumber() << ' '
582  << Restore->getName() << '\n');
583 
584  MachineFrameInfo &MFI = MF.getFrameInfo();
585  MFI.setSavePoint(Save);
586  MFI.setRestorePoint(Restore);
587  ++NumCandidates;
588  return false;
589 }
590 
591 bool ShrinkWrap::isShrinkWrapEnabled(const MachineFunction &MF) {
593 
594  switch (EnableShrinkWrapOpt) {
595  case cl::BOU_UNSET:
596  return TFI->enableShrinkWrapping(MF) &&
597  // Windows with CFI has some limitations that make it impossible
598  // to use shrink-wrapping.
600  // Sanitizers look at the value of the stack at the location
601  // of the crash. Since a crash can happen anywhere, the
602  // frame must be lowered before anything else happen for the
603  // sanitizers to be able to get a correct stack frame.
604  !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
605  MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
606  MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
607  MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
608  // If EnableShrinkWrap is set, it takes precedence on whatever the
609  // target sets. The rational is that we assume we want to test
610  // something related to shrink-wrapping.
611  case cl::BOU_TRUE:
612  return true;
613  case cl::BOU_FALSE:
614  return false;
615  }
616  llvm_unreachable("Invalid shrink-wrapping state");
617 }
Pass interface - Implemented by all &#39;passes&#39;.
Definition: Pass.h:80
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:590
void setSavePoint(MachineBasicBlock *NewSave)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:385
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:63
unsigned Reg
virtual const TargetLowering * getTargetLowering() const
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:323
STATISTIC(NumFunctions, "Total number of functions")
unsigned const TargetRegisterInfo * TRI
unsigned getCallFrameDestroyOpcode() const
iterator_range< succ_iterator > successors()
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void emit(DiagnosticInfoOptimizationBase &OptDiag)
Emit an optimization remark.
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:50
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition: BitVector.h:331
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition: BitVector.h:339
This file contains the simple types necessary to represent the attributes associated with functions a...
iterator_range< iterator > terminators()
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
#define DEBUG_TYPE
Definition: ShrinkWrap.cpp:89
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
virtual const TargetInstrInfo * getInstrInfo() const
MachineBasicBlock * findNearestCommonDominator(MachineBasicBlock *A, MachineBasicBlock *B)
findNearestCommonDominator - Find nearest common dominator basic block for basic block A and B...
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
TargetInstrInfo - Interface to description of machine instruction set.
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:432
This file declares the machine register scavenger class.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1504
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
unsigned getCallFrameSetupOpcode() const
These methods return the opcode of the frame setup/destroy instructions if they exist (-1 otherwise)...
Represent the analysis usage information of a pass.
void runOnMachineFunction(const MachineFunction &MF)
runOnFunction - Prepare to answer questions about MF.
void initializeShrinkWrapPass(PassRegistry &)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom)
Helper function to find the immediate (post) dominator.
Definition: ShrinkWrap.cpp:313
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:297
The optimization diagnostic interface.
PostDominatorTree Class - Concrete subclass of DominatorTree that is used to compute the post-dominat...
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
Information about stack frame layout on the target.
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:47
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
void setPreservesAll()
Set by analyses that do not transform their input at all.
MachineFunctionProperties & set(Property P)
TargetSubtargetInfo - Generic base class for all target subtargets.
Representation of each machine instruction.
Definition: MachineInstr.h:64
static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)
Definition: ShrinkWrap.cpp:449
bool isEHPad() const
Returns true if the block is a landing pad.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
virtual const TargetFrameLowering * getFrameLowering() const
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
unsigned getLastCalleeSavedAlias(unsigned PhysReg) const
getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn&#39;t overlap a CalleeSavedAliases.
Diagnostic information for missed-optimization remarks.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
aarch64 promote const
unsigned getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
IRTranslator LLVM IR MI
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:249
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
#define LLVM_DEBUG(X)
Definition: Debug.h:122
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Properties which a MachineFunction may have at a given point in time.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This file describes how to lower LLVM code to machine code.