LLVM  7.0.0svn
ShrinkWrap.cpp
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1 //===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass looks for safe point where the prologue and epilogue can be
11 // inserted.
12 // The safe point for the prologue (resp. epilogue) is called Save
13 // (resp. Restore).
14 // A point is safe for prologue (resp. epilogue) if and only if
15 // it 1) dominates (resp. post-dominates) all the frame related operations and
16 // between 2) two executions of the Save (resp. Restore) point there is an
17 // execution of the Restore (resp. Save) point.
18 //
19 // For instance, the following points are safe:
20 // for (int i = 0; i < 10; ++i) {
21 // Save
22 // ...
23 // Restore
24 // }
25 // Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
26 // And the following points are not:
27 // for (int i = 0; i < 10; ++i) {
28 // Save
29 // ...
30 // }
31 // for (int i = 0; i < 10; ++i) {
32 // ...
33 // Restore
34 // }
35 // Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
36 //
37 // This pass also ensures that the safe points are 3) cheaper than the regular
38 // entry and exits blocks.
39 //
40 // Property #1 is ensured via the use of MachineDominatorTree and
41 // MachinePostDominatorTree.
42 // Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
43 // points must be in the same loop.
44 // Property #3 is ensured via the MachineBlockFrequencyInfo.
45 //
46 // If this pass found points matching all these properties, then
47 // MachineFrameInfo is updated with this information.
48 //
49 //===----------------------------------------------------------------------===//
50 
51 #include "llvm/ADT/BitVector.h"
53 #include "llvm/ADT/SetVector.h"
54 #include "llvm/ADT/SmallVector.h"
55 #include "llvm/ADT/Statistic.h"
56 #include "llvm/Analysis/CFG.h"
74 #include "llvm/IR/Attributes.h"
75 #include "llvm/IR/Function.h"
76 #include "llvm/MC/MCAsmInfo.h"
77 #include "llvm/Pass.h"
79 #include "llvm/Support/Debug.h"
83 #include <cassert>
84 #include <cstdint>
85 #include <memory>
86 
87 using namespace llvm;
88 
89 #define DEBUG_TYPE "shrink-wrap"
90 
91 STATISTIC(NumFunc, "Number of functions");
92 STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
93 STATISTIC(NumCandidatesDropped,
94  "Number of shrink-wrapping candidates dropped because of frequency");
95 
97 EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
98  cl::desc("enable the shrink-wrapping pass"));
99 
100 namespace {
101 
102 /// \brief Class to determine where the safe point to insert the
103 /// prologue and epilogue are.
104 /// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
105 /// shrink-wrapping term for prologue/epilogue placement, this pass
106 /// does not rely on expensive data-flow analysis. Instead we use the
107 /// dominance properties and loop information to decide which point
108 /// are safe for such insertion.
109 class ShrinkWrap : public MachineFunctionPass {
110  /// Hold callee-saved information.
111  RegisterClassInfo RCI;
114 
115  /// Current safe point found for the prologue.
116  /// The prologue will be inserted before the first instruction
117  /// in this basic block.
118  MachineBasicBlock *Save;
119 
120  /// Current safe point found for the epilogue.
121  /// The epilogue will be inserted before the first terminator instruction
122  /// in this basic block.
123  MachineBasicBlock *Restore;
124 
125  /// Hold the information of the basic block frequency.
126  /// Use to check the profitability of the new points.
128 
129  /// Hold the loop information. Used to determine if Save and Restore
130  /// are in the same loop.
131  MachineLoopInfo *MLI;
132 
133  /// Frequency of the Entry block.
134  uint64_t EntryFreq;
135 
136  /// Current opcode for frame setup.
137  unsigned FrameSetupOpcode;
138 
139  /// Current opcode for frame destroy.
140  unsigned FrameDestroyOpcode;
141 
142  /// Stack pointer register, used by llvm.{savestack,restorestack}
143  unsigned SP;
144 
145  /// Entry block.
146  const MachineBasicBlock *Entry;
147 
148  using SetOfRegs = SmallSetVector<unsigned, 16>;
149 
150  /// Registers that need to be saved for the current function.
151  mutable SetOfRegs CurrentCSRs;
152 
153  /// Current MachineFunction.
154  MachineFunction *MachineFunc;
155 
156  /// \brief Check if \p MI uses or defines a callee-saved register or
157  /// a frame index. If this is the case, this means \p MI must happen
158  /// after Save and before Restore.
159  bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
160 
161  const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
162  if (CurrentCSRs.empty()) {
163  BitVector SavedRegs;
164  const TargetFrameLowering *TFI =
165  MachineFunc->getSubtarget().getFrameLowering();
166 
167  TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
168 
169  for (int Reg = SavedRegs.find_first(); Reg != -1;
170  Reg = SavedRegs.find_next(Reg))
171  CurrentCSRs.insert((unsigned)Reg);
172  }
173  return CurrentCSRs;
174  }
175 
176  /// \brief Update the Save and Restore points such that \p MBB is in
177  /// the region that is dominated by Save and post-dominated by Restore
178  /// and Save and Restore still match the safe point definition.
179  /// Such point may not exist and Save and/or Restore may be null after
180  /// this call.
181  void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
182 
183  /// \brief Initialize the pass for \p MF.
184  void init(MachineFunction &MF) {
185  RCI.runOnMachineFunction(MF);
186  MDT = &getAnalysis<MachineDominatorTree>();
187  MPDT = &getAnalysis<MachinePostDominatorTree>();
188  Save = nullptr;
189  Restore = nullptr;
190  MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
191  MLI = &getAnalysis<MachineLoopInfo>();
192  EntryFreq = MBFI->getEntryFreq();
193  const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
194  const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
195  FrameSetupOpcode = TII.getCallFrameSetupOpcode();
196  FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
198  Entry = &MF.front();
199  CurrentCSRs.clear();
200  MachineFunc = &MF;
201 
202  ++NumFunc;
203  }
204 
205  /// Check whether or not Save and Restore points are still interesting for
206  /// shrink-wrapping.
207  bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
208 
209  /// \brief Check if shrink wrapping is enabled for this target and function.
210  static bool isShrinkWrapEnabled(const MachineFunction &MF);
211 
212 public:
213  static char ID;
214 
215  ShrinkWrap() : MachineFunctionPass(ID) {
217  }
218 
219  void getAnalysisUsage(AnalysisUsage &AU) const override {
220  AU.setPreservesAll();
226  }
227 
228  MachineFunctionProperties getRequiredProperties() const override {
231  }
232 
233  StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
234 
235  /// \brief Perform the shrink-wrapping analysis and update
236  /// the MachineFrameInfo attached to \p MF with the results.
237  bool runOnMachineFunction(MachineFunction &MF) override;
238 };
239 
240 } // end anonymous namespace
241 
242 char ShrinkWrap::ID = 0;
243 
245 
246 INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
251 INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
252 
253 bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
254  RegScavenger *RS) const {
255  if (MI.getOpcode() == FrameSetupOpcode ||
256  MI.getOpcode() == FrameDestroyOpcode) {
257  DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
258  return true;
259  }
260  for (const MachineOperand &MO : MI.operands()) {
261  bool UseOrDefCSR = false;
262  if (MO.isReg()) {
263  // Ignore instructions like DBG_VALUE which don't read/def the register.
264  if (!MO.isDef() && !MO.readsReg())
265  continue;
266  unsigned PhysReg = MO.getReg();
267  if (!PhysReg)
268  continue;
270  "Unallocated register?!");
271  // The stack pointer is not normally described as a callee-saved register
272  // in calling convention definitions, so we need to watch for it
273  // separately. An SP mentioned by a call instruction, we can ignore,
274  // though, as it's harmless and we do not want to effectively disable tail
275  // calls by forcing the restore point to post-dominate them.
276  UseOrDefCSR = (!MI.isCall() && PhysReg == SP) ||
277  RCI.getLastCalleeSavedAlias(PhysReg);
278  } else if (MO.isRegMask()) {
279  // Check if this regmask clobbers any of the CSRs.
280  for (unsigned Reg : getCurrentCSRs(RS)) {
281  if (MO.clobbersPhysReg(Reg)) {
282  UseOrDefCSR = true;
283  break;
284  }
285  }
286  }
287  // Skip FrameIndex operands in DBG_VALUE instructions.
288  if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
289  DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
290  << MO.isFI() << "): " << MI << '\n');
291  return true;
292  }
293  }
294  return false;
295 }
296 
297 /// \brief Helper function to find the immediate (post) dominator.
298 template <typename ListOfBBs, typename DominanceAnalysis>
299 static MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
300  DominanceAnalysis &Dom) {
301  MachineBasicBlock *IDom = &Block;
302  for (MachineBasicBlock *BB : BBs) {
303  IDom = Dom.findNearestCommonDominator(IDom, BB);
304  if (!IDom)
305  break;
306  }
307  if (IDom == &Block)
308  return nullptr;
309  return IDom;
310 }
311 
312 void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB,
313  RegScavenger *RS) {
314  // Get rid of the easy cases first.
315  if (!Save)
316  Save = &MBB;
317  else
318  Save = MDT->findNearestCommonDominator(Save, &MBB);
319 
320  if (!Save) {
321  DEBUG(dbgs() << "Found a block that is not reachable from Entry\n");
322  return;
323  }
324 
325  if (!Restore)
326  Restore = &MBB;
327  else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
328  // means the block never returns. If that's the
329  // case, we don't want to call
330  // `findNearestCommonDominator`, which will
331  // return `Restore`.
332  Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
333  else
334  Restore = nullptr; // Abort, we can't find a restore point in this case.
335 
336  // Make sure we would be able to insert the restore code before the
337  // terminator.
338  if (Restore == &MBB) {
339  for (const MachineInstr &Terminator : MBB.terminators()) {
340  if (!useOrDefCSROrFI(Terminator, RS))
341  continue;
342  // One of the terminator needs to happen before the restore point.
343  if (MBB.succ_empty()) {
344  Restore = nullptr; // Abort, we can't find a restore point in this case.
345  break;
346  }
347  // Look for a restore point that post-dominates all the successors.
348  // The immediate post-dominator is what we are looking for.
349  Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
350  break;
351  }
352  }
353 
354  if (!Restore) {
355  DEBUG(dbgs() << "Restore point needs to be spanned on several blocks\n");
356  return;
357  }
358 
359  // Make sure Save and Restore are suitable for shrink-wrapping:
360  // 1. all path from Save needs to lead to Restore before exiting.
361  // 2. all path to Restore needs to go through Save from Entry.
362  // We achieve that by making sure that:
363  // A. Save dominates Restore.
364  // B. Restore post-dominates Save.
365  // C. Save and Restore are in the same loop.
366  bool SaveDominatesRestore = false;
367  bool RestorePostDominatesSave = false;
368  while (Save && Restore &&
369  (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
370  !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
371  // Post-dominance is not enough in loops to ensure that all uses/defs
372  // are after the prologue and before the epilogue at runtime.
373  // E.g.,
374  // while(1) {
375  // Save
376  // Restore
377  // if (...)
378  // break;
379  // use/def CSRs
380  // }
381  // All the uses/defs of CSRs are dominated by Save and post-dominated
382  // by Restore. However, the CSRs uses are still reachable after
383  // Restore and before Save are executed.
384  //
385  // For now, just push the restore/save points outside of loops.
386  // FIXME: Refine the criteria to still find interesting cases
387  // for loops.
388  MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
389  // Fix (A).
390  if (!SaveDominatesRestore) {
391  Save = MDT->findNearestCommonDominator(Save, Restore);
392  continue;
393  }
394  // Fix (B).
395  if (!RestorePostDominatesSave)
396  Restore = MPDT->findNearestCommonDominator(Restore, Save);
397 
398  // Fix (C).
399  if (Save && Restore &&
400  (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
401  if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
402  // Push Save outside of this loop if immediate dominator is different
403  // from save block. If immediate dominator is not different, bail out.
404  Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
405  if (!Save)
406  break;
407  } else {
408  // If the loop does not exit, there is no point in looking
409  // for a post-dominator outside the loop.
411  MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
412  // Push Restore outside of this loop.
413  // Look for the immediate post-dominator of the loop exits.
414  MachineBasicBlock *IPdom = Restore;
415  for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
416  IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
417  if (!IPdom)
418  break;
419  }
420  // If the immediate post-dominator is not in a less nested loop,
421  // then we are stuck in a program with an infinite loop.
422  // In that case, we will not find a safe point, hence, bail out.
423  if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
424  Restore = IPdom;
425  else {
426  Restore = nullptr;
427  break;
428  }
429  }
430  }
431  }
432 }
433 
434 bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
435  if (skipFunction(MF.getFunction()) || MF.empty() || !isShrinkWrapEnabled(MF))
436  return false;
437 
438  DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
439 
440  init(MF);
441 
443  if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *MLI)) {
444  // If MF is irreducible, a block may be in a loop without
445  // MachineLoopInfo reporting it. I.e., we may use the
446  // post-dominance property in loops, which lead to incorrect
447  // results. Moreover, we may miss that the prologue and
448  // epilogue are not in the same loop, leading to unbalanced
449  // construction/deconstruction of the stack frame.
450  DEBUG(dbgs() << "Irreducible CFGs are not supported yet\n");
451  return false;
452  }
453 
454  const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
455  std::unique_ptr<RegScavenger> RS(
456  TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
457 
458  for (MachineBasicBlock &MBB : MF) {
459  DEBUG(dbgs() << "Look into: " << MBB.getNumber() << ' ' << MBB.getName()
460  << '\n');
461 
462  if (MBB.isEHFuncletEntry()) {
463  DEBUG(dbgs() << "EH Funclets are not supported yet.\n");
464  return false;
465  }
466 
467  if (MBB.isEHPad()) {
468  // Push the prologue and epilogue outside of
469  // the region that may throw by making sure
470  // that all the landing pads are at least at the
471  // boundary of the save and restore points.
472  // The problem with exceptions is that the throw
473  // is not properly modeled and in particular, a
474  // basic block can jump out from the middle.
475  updateSaveRestorePoints(MBB, RS.get());
476  if (!ArePointsInteresting()) {
477  DEBUG(dbgs() << "EHPad prevents shrink-wrapping\n");
478  return false;
479  }
480  continue;
481  }
482 
483  for (const MachineInstr &MI : MBB) {
484  if (!useOrDefCSROrFI(MI, RS.get()))
485  continue;
486  // Save (resp. restore) point must dominate (resp. post dominate)
487  // MI. Look for the proper basic block for those.
488  updateSaveRestorePoints(MBB, RS.get());
489  // If we are at a point where we cannot improve the placement of
490  // save/restore instructions, just give up.
491  if (!ArePointsInteresting()) {
492  DEBUG(dbgs() << "No Shrink wrap candidate found\n");
493  return false;
494  }
495  // No need to look for other instructions, this basic block
496  // will already be part of the handled region.
497  break;
498  }
499  }
500  if (!ArePointsInteresting()) {
501  // If the points are not interesting at this point, then they must be null
502  // because it means we did not encounter any frame/CSR related code.
503  // Otherwise, we would have returned from the previous loop.
504  assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
505  DEBUG(dbgs() << "Nothing to shrink-wrap\n");
506  return false;
507  }
508 
509  DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: " << EntryFreq
510  << '\n');
511 
512  const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
513  do {
514  DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
515  << Save->getNumber() << ' ' << Save->getName() << ' '
516  << MBFI->getBlockFreq(Save).getFrequency() << "\nRestore: "
517  << Restore->getNumber() << ' ' << Restore->getName() << ' '
518  << MBFI->getBlockFreq(Restore).getFrequency() << '\n');
519 
520  bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
521  if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save).getFrequency()) &&
522  EntryFreq >= MBFI->getBlockFreq(Restore).getFrequency()) &&
523  ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
524  TFI->canUseAsEpilogue(*Restore)))
525  break;
526  DEBUG(dbgs() << "New points are too expensive or invalid for the target\n");
527  MachineBasicBlock *NewBB;
528  if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
529  Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
530  if (!Save)
531  break;
532  NewBB = Save;
533  } else {
534  // Restore is expensive.
535  Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
536  if (!Restore)
537  break;
538  NewBB = Restore;
539  }
540  updateSaveRestorePoints(*NewBB, RS.get());
541  } while (Save && Restore);
542 
543  if (!ArePointsInteresting()) {
544  ++NumCandidatesDropped;
545  return false;
546  }
547 
548  DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: " << Save->getNumber()
549  << ' ' << Save->getName() << "\nRestore: "
550  << Restore->getNumber() << ' ' << Restore->getName() << '\n');
551 
552  MachineFrameInfo &MFI = MF.getFrameInfo();
553  MFI.setSavePoint(Save);
554  MFI.setRestorePoint(Restore);
555  ++NumCandidates;
556  return false;
557 }
558 
559 bool ShrinkWrap::isShrinkWrapEnabled(const MachineFunction &MF) {
561 
562  switch (EnableShrinkWrapOpt) {
563  case cl::BOU_UNSET:
564  return TFI->enableShrinkWrapping(MF) &&
565  // Windows with CFI has some limitations that make it impossible
566  // to use shrink-wrapping.
568  // Sanitizers look at the value of the stack at the location
569  // of the crash. Since a crash can happen anywhere, the
570  // frame must be lowered before anything else happen for the
571  // sanitizers to be able to get a correct stack frame.
572  !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
573  MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
574  MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
575  MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
576  // If EnableShrinkWrap is set, it takes precedence on whatever the
577  // target sets. The rational is that we assume we want to test
578  // something related to shrink-wrapping.
579  case cl::BOU_TRUE:
580  return true;
581  case cl::BOU_FALSE:
582  return false;
583  }
584  llvm_unreachable("Invalid shrink-wrapping state");
585 }
Pass interface - Implemented by all &#39;passes&#39;.
Definition: Pass.h:81
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:573
void setSavePoint(MachineBasicBlock *NewSave)
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
Returns true if the target requires (and can make use of) the register scavenger. ...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetLowering * getTargetLowering() const
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:302
STATISTIC(NumFunctions, "Total number of functions")
unsigned getCallFrameDestroyOpcode() const
iterator_range< succ_iterator > successors()
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:51
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition: BitVector.h:332
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition: BitVector.h:340
Reg
All possible values of the reg field in the ModR/M byte.
This file contains the simple types necessary to represent the attributes associated with functions a...
iterator_range< iterator > terminators()
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
#define DEBUG_TYPE
Definition: ShrinkWrap.cpp:89
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
virtual const TargetInstrInfo * getInstrInfo() const
MachineBasicBlock * findNearestCommonDominator(MachineBasicBlock *A, MachineBasicBlock *B)
findNearestCommonDominator - Find nearest common dominator basic block for basic block A and B...
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
TargetInstrInfo - Interface to description of machine instruction set.
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:406
This file declares the machine register scavenger class.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
unsigned getCallFrameSetupOpcode() const
These methods return the opcode of the frame setup/destroy instructions if they exist (-1 otherwise)...
Represent the analysis usage information of a pass.
void runOnMachineFunction(const MachineFunction &MF)
runOnFunction - Prepare to answer questions about MF.
void initializeShrinkWrapPass(PassRegistry &)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom)
Helper function to find the immediate (post) dominator.
Definition: ShrinkWrap.cpp:299
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:298
PostDominatorTree Class - Concrete subclass of DominatorTree that is used to compute the post-dominat...
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:862
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
Information about stack frame layout on the target.
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:48
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
void setPreservesAll()
Set by analyses that do not transform their input at all.
MachineFunctionProperties & set(Property P)
TargetSubtargetInfo - Generic base class for all target subtargets.
Representation of each machine instruction.
Definition: MachineInstr.h:60
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
bool isEHPad() const
Returns true if the block is a landing pad.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
virtual const TargetFrameLowering * getFrameLowering() const
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
unsigned getLastCalleeSavedAlias(unsigned PhysReg) const
getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn&#39;t overlap a CalleeSavedAliases.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
aarch64 promote const
unsigned getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
#define DEBUG(X)
Definition: Debug.h:118
IRTranslator LLVM IR MI
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:244
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
Properties which a MachineFunction may have at a given point in time.
This file describes how to lower LLVM code to machine code.