LLVM  9.0.0svn
WebAssemblyOptimizeLiveIntervals.cpp
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1 //===--- WebAssemblyOptimizeLiveIntervals.cpp - LiveInterval processing ---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// Optimize LiveIntervals for use in a post-RA context.
11 //
12 /// LiveIntervals normally runs before register allocation when the code is
13 /// only recently lowered out of SSA form, so it's uncommon for registers to
14 /// have multiple defs, and when they do, the defs are usually closely related.
15 /// Later, after coalescing, tail duplication, and other optimizations, it's
16 /// more common to see registers with multiple unrelated defs. This pass
17 /// updates LiveIntervals to distribute the value numbers across separate
18 /// LiveIntervals.
19 ///
20 //===----------------------------------------------------------------------===//
21 
22 #include "WebAssembly.h"
23 #include "WebAssemblySubtarget.h"
27 #include "llvm/CodeGen/Passes.h"
28 #include "llvm/Support/Debug.h"
30 using namespace llvm;
31 
32 #define DEBUG_TYPE "wasm-optimize-live-intervals"
33 
34 namespace {
35 class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
36  StringRef getPassName() const override {
37  return "WebAssembly Optimize Live Intervals";
38  }
39 
40  void getAnalysisUsage(AnalysisUsage &AU) const override {
41  AU.setPreservesCFG();
49  }
50 
51  bool runOnMachineFunction(MachineFunction &MF) override;
52 
53 public:
54  static char ID; // Pass identification, replacement for typeid
55  WebAssemblyOptimizeLiveIntervals() : MachineFunctionPass(ID) {}
56 };
57 } // end anonymous namespace
58 
60 INITIALIZE_PASS(WebAssemblyOptimizeLiveIntervals, DEBUG_TYPE,
61  "Optimize LiveIntervals for WebAssembly", false, false)
62 
64  return new WebAssemblyOptimizeLiveIntervals();
65 }
66 
67 bool WebAssemblyOptimizeLiveIntervals::runOnMachineFunction(
68  MachineFunction &MF) {
69  LLVM_DEBUG(dbgs() << "********** Optimize LiveIntervals **********\n"
70  "********** Function: "
71  << MF.getName() << '\n');
72 
74  auto &LIS = getAnalysis<LiveIntervals>();
75 
76  // We don't preserve SSA form.
77  MRI.leaveSSA();
78 
79  assert(MRI.tracksLiveness() && "OptimizeLiveIntervals expects liveness");
80 
81  // Split multiple-VN LiveIntervals into multiple LiveIntervals.
83  for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
85  if (MRI.reg_nodbg_empty(Reg))
86  continue;
87 
88  LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
89  SplitLIs.clear();
90  }
91 
92  // In PrepareForLiveIntervals, we conservatively inserted IMPLICIT_DEF
93  // instructions to satisfy LiveIntervals' requirement that all uses be
94  // dominated by defs. Now that LiveIntervals has computed which of these
95  // defs are actually needed and which are dead, remove the dead ones.
96  for (auto MII = MF.begin()->begin(), MIE = MF.begin()->end(); MII != MIE;) {
97  MachineInstr *MI = &*MII++;
98  if (MI->isImplicitDef() && MI->getOperand(0).isDead()) {
99  LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg());
100  LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot());
101  LIS.RemoveMachineInstrFromMaps(*MI);
102  MI->eraseFromParent();
103  }
104  }
105 
106  return false;
107 }
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:637
unsigned getReg() const
getReg - Returns the register number.
unsigned Reg
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
AnalysisUsage & addRequired()
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
INITIALIZE_PASS(WebAssemblyOptimizeLiveIntervals, DEBUG_TYPE, "Optimize LiveIntervals for WebAssembly", false, false) FunctionPass *llvm
SlotIndexes pass.
Definition: SlotIndexes.h:328
AnalysisUsage & addPreservedID(const void *ID)
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
unsigned const MachineRegisterInfo * MRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:284
bool isImplicitDef() const
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:839
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:285
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:63
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
#define I(x, y, z)
Definition: MD5.cpp:58
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
#define LLVM_DEBUG(X)
Definition: Debug.h:122
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413