LLVM  8.0.0svn
X86Subtarget.cpp
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1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86.h"
15 
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86RegisterBankInfo.h"
19 #include "X86Subtarget.h"
21 #include "X86TargetMachine.h"
22 #include "llvm/ADT/Triple.h"
25 #include "llvm/IR/Attributes.h"
26 #include "llvm/IR/ConstantRange.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/Support/Casting.h"
30 #include "llvm/Support/CodeGen.h"
32 #include "llvm/Support/Debug.h"
36 
37 #if defined(_MSC_VER)
38 #include <intrin.h>
39 #endif
40 
41 using namespace llvm;
42 
43 #define DEBUG_TYPE "subtarget"
44 
45 #define GET_SUBTARGETINFO_TARGET_DESC
46 #define GET_SUBTARGETINFO_CTOR
47 #include "X86GenSubtargetInfo.inc"
48 
49 // Temporary option to control early if-conversion for x86 while adding machine
50 // models.
51 static cl::opt<bool>
52 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
53  cl::desc("Enable early if-conversion on X86"));
54 
55 
56 /// Classify a blockaddress reference for the current subtarget according to how
57 /// we should reference it in a non-pcrel context.
59  return classifyLocalReference(nullptr);
60 }
61 
62 /// Classify a global variable reference for the current subtarget according to
63 /// how we should reference it in a non-pcrel context.
64 unsigned char
66  return classifyGlobalReference(GV, *GV->getParent());
67 }
68 
69 unsigned char
71  // If we're not PIC, it's not very interesting.
72  if (!isPositionIndependent())
73  return X86II::MO_NO_FLAG;
74 
75  if (is64Bit()) {
76  // 64-bit ELF PIC local references may use GOTOFF relocations.
77  if (isTargetELF()) {
78  switch (TM.getCodeModel()) {
79  // 64-bit small code model is simple: All rip-relative.
80  case CodeModel::Tiny:
81  llvm_unreachable("Tiny codesize model not supported on X86");
82  case CodeModel::Small:
83  case CodeModel::Kernel:
84  return X86II::MO_NO_FLAG;
85 
86  // The large PIC code model uses GOTOFF.
87  case CodeModel::Large:
88  return X86II::MO_GOTOFF;
89 
90  // Medium is a hybrid: RIP-rel for code, GOTOFF for DSO local data.
91  case CodeModel::Medium:
92  if (isa<Function>(GV))
93  return X86II::MO_NO_FLAG; // All code is RIP-relative
94  return X86II::MO_GOTOFF; // Local symbols use GOTOFF.
95  }
96  llvm_unreachable("invalid code model");
97  }
98 
99  // Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
100  // both of which use MO_NO_FLAG.
101  return X86II::MO_NO_FLAG;
102  }
103 
104  // The COFF dynamic linker just patches the executable sections.
105  if (isTargetCOFF())
106  return X86II::MO_NO_FLAG;
107 
108  if (isTargetDarwin()) {
109  // 32 bit macho has no relocation for a-b if a is undefined, even if
110  // b is in the section that is being relocated.
111  // This means we have to use o load even for GVs that are known to be
112  // local to the dso.
113  if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
115 
117  }
118 
119  return X86II::MO_GOTOFF;
120 }
121 
123  const Module &M) const {
124  // The static large model never uses stubs.
126  return X86II::MO_NO_FLAG;
127 
128  // Absolute symbols can be referenced directly.
129  if (GV) {
131  // See if we can use the 8-bit immediate form. Note that some instructions
132  // will sign extend the immediate operand, so to be conservative we only
133  // accept the range [0,128).
134  if (CR->getUnsignedMax().ult(128))
135  return X86II::MO_ABS8;
136  else
137  return X86II::MO_NO_FLAG;
138  }
139  }
140 
141  if (TM.shouldAssumeDSOLocal(M, GV))
142  return classifyLocalReference(GV);
143 
144  if (isTargetCOFF()) {
145  if (GV->hasDLLImportStorageClass())
146  return X86II::MO_DLLIMPORT;
147  return X86II::MO_COFFSTUB;
148  }
149 
150  if (is64Bit()) {
151  // ELF supports a large, truly PIC code model with non-PC relative GOT
152  // references. Other object file formats do not. Use the no-flag, 64-bit
153  // reference for them.
156  return X86II::MO_GOTPCREL;
157  }
158 
159  if (isTargetDarwin()) {
160  if (!isPositionIndependent())
163  }
164 
165  return X86II::MO_GOT;
166 }
167 
168 unsigned char
170  return classifyGlobalFunctionReference(GV, *GV->getParent());
171 }
172 
173 unsigned char
175  const Module &M) const {
176  if (TM.shouldAssumeDSOLocal(M, GV))
177  return X86II::MO_NO_FLAG;
178 
179  if (isTargetCOFF()) {
181  "shouldAssumeDSOLocal gave inconsistent answer");
182  return X86II::MO_DLLIMPORT;
183  }
184 
185  const Function *F = dyn_cast_or_null<Function>(GV);
186 
187  if (isTargetELF()) {
188  if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
189  // According to psABI, PLT stub clobbers XMM8-XMM15.
190  // In Regcall calling convention those registers are used for passing
191  // parameters. Thus we need to prevent lazy binding in Regcall.
192  return X86II::MO_GOTPCREL;
193  // If PLT must be avoided then the call should be via GOTPCREL.
194  if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
195  (!F && M.getRtLibUseGOT())) &&
196  is64Bit())
197  return X86II::MO_GOTPCREL;
198  return X86II::MO_PLT;
199  }
200 
201  if (is64Bit()) {
202  if (F && F->hasFnAttribute(Attribute::NonLazyBind))
203  // If the function is marked as non-lazy, generate an indirect call
204  // which loads from the GOT directly. This avoids runtime overhead
205  // at the cost of eager binding (and one extra byte of encoding).
206  return X86II::MO_GOTPCREL;
207  return X86II::MO_NO_FLAG;
208  }
209 
210  return X86II::MO_NO_FLAG;
211 }
212 
213 /// Return true if the subtarget allows calls to immediate address.
215  // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
216  // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
217  // the following check for Win32 should be removed.
218  if (In64BitMode || isTargetWin32())
219  return false;
221 }
222 
223 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
224  std::string CPUName = CPU;
225  if (CPUName.empty())
226  CPUName = "generic";
227 
228  std::string FullFS = FS;
229  if (In64BitMode) {
230  // SSE2 should default to enabled in 64-bit mode, but can be turned off
231  // explicitly.
232  if (!FullFS.empty())
233  FullFS = "+sse2," + FullFS;
234  else
235  FullFS = "+sse2";
236 
237  // If no CPU was specified, enable 64bit feature to satisy later check.
238  if (CPUName == "generic") {
239  if (!FullFS.empty())
240  FullFS = "+64bit," + FullFS;
241  else
242  FullFS = "+64bit";
243  }
244  }
245 
246  // LAHF/SAHF are always supported in non-64-bit mode.
247  if (!In64BitMode) {
248  if (!FullFS.empty())
249  FullFS = "+sahf," + FullFS;
250  else
251  FullFS = "+sahf";
252  }
253 
254  // Parse features string and set the CPU.
255  ParseSubtargetFeatures(CPUName, FullFS);
256 
257  // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
258  // 16-bytes and under that are reasonably fast. These features were
259  // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
260  // micro-architectures respectively.
261  if (hasSSE42() || hasSSE4A())
262  IsUAMem16Slow = false;
263 
264  // It's important to keep the MCSubtargetInfo feature bits in sync with
265  // target data structure which is shared with MC code emitter, etc.
266  if (In64BitMode)
267  ToggleFeature(X86::Mode64Bit);
268  else if (In32BitMode)
269  ToggleFeature(X86::Mode32Bit);
270  else if (In16BitMode)
271  ToggleFeature(X86::Mode16Bit);
272  else
273  llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
274 
275  LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
276  << ", 3DNowLevel " << X863DNowLevel << ", 64bit "
277  << HasX86_64 << "\n");
278  if (In64BitMode && !HasX86_64)
279  report_fatal_error("64-bit code requested on a subtarget that doesn't "
280  "support it!");
281 
282  // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
283  // 32 and 64 bit) and for all 64-bit targets.
284  if (StackAlignOverride)
285  stackAlignment = StackAlignOverride;
286  else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
287  isTargetKFreeBSD() || In64BitMode)
288  stackAlignment = 16;
289 
290  // Some CPUs have more overhead for gather. The specified overhead is relative
291  // to the Load operation. "2" is the number provided by Intel architects. This
292  // parameter is used for cost estimation of Gather Op and comparison with
293  // other alternatives.
294  // TODO: Remove the explicit hasAVX512()?, That would mean we would only
295  // enable gather with a -march.
296  if (hasAVX512() || (hasAVX2() && hasFastGather()))
297  GatherOverhead = 2;
298  if (hasAVX512())
299  ScatterOverhead = 2;
300 
301  // Consume the vector width attribute or apply any target specific limit.
302  if (PreferVectorWidthOverride)
303  PreferVectorWidth = PreferVectorWidthOverride;
304  else if (Prefer256Bit)
305  PreferVectorWidth = 256;
306 }
307 
308 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
309  StringRef FS) {
310  initSubtargetFeatures(CPU, FS);
311  return *this;
312 }
313 
315  const X86TargetMachine &TM,
316  unsigned StackAlignOverride,
317  unsigned PreferVectorWidthOverride,
318  unsigned RequiredVectorWidth)
319  : X86GenSubtargetInfo(TT, CPU, FS),
320  PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
321  StackAlignOverride(StackAlignOverride),
322  PreferVectorWidthOverride(PreferVectorWidthOverride),
323  RequiredVectorWidth(RequiredVectorWidth),
324  In64BitMode(TargetTriple.getArch() == Triple::x86_64),
325  In32BitMode(TargetTriple.getArch() == Triple::x86 &&
326  TargetTriple.getEnvironment() != Triple::CODE16),
327  In16BitMode(TargetTriple.getArch() == Triple::x86 &&
328  TargetTriple.getEnvironment() == Triple::CODE16),
329  InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
330  FrameLowering(*this, getStackAlignment()) {
331  // Determine the PICStyle based on the target selected.
332  if (!isPositionIndependent())
334  else if (is64Bit())
336  else if (isTargetCOFF())
338  else if (isTargetDarwin())
340  else if (isTargetELF())
342 
344  Legalizer.reset(new X86LegalizerInfo(*this, TM));
345 
346  auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
347  RegBankInfo.reset(RBI);
348  InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
349 }
350 
352  return CallLoweringInfo.get();
353 }
354 
356  return InstSelector.get();
357 }
358 
360  return Legalizer.get();
361 }
362 
364  return RegBankInfo.get();
365 }
366 
368  return hasCMov() && X86EarlyIfConv;
369 }
bool isDeclarationForLinker() const
Definition: GlobalValue.h:524
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:525
MO_COFFSTUB - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:238
const CallLowering * getCallLowering() const override
Methods used by Global ISel.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool hasAVX2() const
Definition: X86Subtarget.h:564
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
Register calling convention used for parameters transfer optimization.
Definition: CallingConv.h:204
void setPICStyle(PICStyles::Style Style)
Definition: X86Subtarget.h:550
const TargetMachine & TM
Definition: X86Subtarget.h:87
const LegalizerInfo * getLegalizerInfo() const override
static cl::opt< bool > X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86"))
Optional< ConstantRange > getAbsoluteSymbolRange() const
If this is an absolute symbol reference, returns the range of the symbol, otherwise returns None...
Definition: Globals.cpp:277
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:321
bool hasDLLImportStorageClass() const
Definition: GlobalValue.h:262
F(f)
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
Definition: X86BaseInfo.h:110
unsigned char classifyLocalReference(const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference i...
Holds all the information related to register banks.
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
Definition: X86BaseInfo.h:210
bool isTargetSolaris() const
Definition: X86Subtarget.h:728
This class provides the information for the target register banks.
const InstructionSelector * getInstructionSelector() const override
This file contains the simple types necessary to represent the attributes associated with functions a...
bool hasCommonLinkage() const
Definition: GlobalValue.h:440
bool Prefer256Bit
Indicates target prefers 256 bit instructions.
Definition: X86Subtarget.h:423
std::unique_ptr< CallLowering > CallLoweringInfo
GlobalISel related APIs.
Definition: X86Subtarget.h:432
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
Definition: X86BaseInfo.h:95
MO_ABS8 - On a symbol operand this indicates that the symbol is known to be an absolute symbol in ran...
Definition: X86BaseInfo.h:233
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
X863DNowEnum X863DNowLevel
MMX, 3DNow, 3DNow Athlon, or none supported.
Definition: X86Subtarget.h:93
X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS, const X86TargetMachine &TM, unsigned StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
This constructor initializes the data members to match that of the specified triple.
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:205
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:480
bool isTargetKFreeBSD() const
Definition: X86Subtarget.h:736
bool isLegalToCallImmediateAddr() const
Return true if the subtarget allows calls to immediate address.
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
unsigned getStackAlignment() const
Returns the minimum alignment known to hold of the stack frame on entry to the function and which mus...
Definition: X86Subtarget.h:501
PICStyles::Style PICStyle
Which PIC style to use.
Definition: X86Subtarget.h:85
bool isPositionIndependent() const
Definition: X86Subtarget.h:784
bool hasCMov() const
Definition: X86Subtarget.h:556
bool enableEarlyIfConversion() const override
bool isTargetDarwin() const
Definition: X86Subtarget.h:725
bool hasSSE42() const
Definition: X86Subtarget.h:562
bool IsUAMem16Slow
True if unaligned memory accesses of 16-bytes are slow.
Definition: X86Subtarget.h:233
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
This file declares the targeting of the RegisterBankInfo class for X86.
bool isTargetELF() const
Definition: X86Subtarget.h:731
const X86RegisterInfo * getRegisterInfo() const override
Definition: X86Subtarget.h:494
std::unique_ptr< InstructionSelector > InstSelector
Definition: X86Subtarget.h:435
bool HasX86_64
True if the processor supports X86-64 instructions.
Definition: X86Subtarget.h:107
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:213
bool isTargetWin32() const
Definition: X86Subtarget.h:775
InstructionSelector * createX86InstructionSelector(const X86TargetMachine &TM, X86Subtarget &, X86RegisterBankInfo &)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
CodeModel::Model getCodeModel() const
Returns the code model.
This file describes how to lower LLVM calls to machine code calls.
std::unique_ptr< RegisterBankInfo > RegBankInfo
Definition: X86Subtarget.h:434
bool getRtLibUseGOT() const
Returns true if PLT should be avoided for RTLib calls.
Definition: Module.cpp:541
Provides the logic to select generic machine instructions.
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
Definition: X86BaseInfo.h:102
This class provides the information for the target register banks.
X86SSEEnum X86SSELevel
SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.
Definition: X86Subtarget.h:90
bool isTargetCOFF() const
Definition: X86Subtarget.h:732
unsigned char classifyBlockAddressReference() const
Classify a blockaddress reference for the current subtarget according to how we should reference it i...
MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol n...
Definition: X86BaseInfo.h:117
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
bool isTargetLinux() const
Definition: X86Subtarget.h:735
This file describes how to lower LLVM calls to machine code calls.
This file declares the targeting of the Machinelegalizer class for X86.
bool hasAVX512() const
Definition: X86Subtarget.h:565
const RegisterBankInfo * getRegBankInfo() const override
unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const Module &M) const
Classify a global function reference for the current subtarget.
bool hasSSE4A() const
Definition: X86Subtarget.h:567
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
Definition: X86BaseInfo.h:88
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
unsigned char classifyGlobalReference(const GlobalValue *GV, const Module &M) const
unsigned stackAlignment
The minimum alignment known to hold of the stack frame on entry to the function and which must be mai...
Definition: X86Subtarget.h:415
bool hasFastGather() const
Definition: X86Subtarget.h:636
#define LLVM_DEBUG(X)
Definition: Debug.h:123
Triple TargetTriple
What processor and OS we&#39;re targeting.
Definition: X86Subtarget.h:429
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
Definition: X86BaseInfo.h:200