LLVM  7.0.0svn
X86Subtarget.cpp
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1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86.h"
15 
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86RegisterBankInfo.h"
19 #include "X86Subtarget.h"
21 #include "X86TargetMachine.h"
22 #include "llvm/ADT/Triple.h"
25 #include "llvm/IR/Attributes.h"
26 #include "llvm/IR/ConstantRange.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/Support/Casting.h"
30 #include "llvm/Support/CodeGen.h"
32 #include "llvm/Support/Debug.h"
36 
37 #if defined(_MSC_VER)
38 #include <intrin.h>
39 #endif
40 
41 using namespace llvm;
42 
43 #define DEBUG_TYPE "subtarget"
44 
45 #define GET_SUBTARGETINFO_TARGET_DESC
46 #define GET_SUBTARGETINFO_CTOR
47 #include "X86GenSubtargetInfo.inc"
48 
49 // Temporary option to control early if-conversion for x86 while adding machine
50 // models.
51 static cl::opt<bool>
52 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
53  cl::desc("Enable early if-conversion on X86"));
54 
55 
56 /// Classify a blockaddress reference for the current subtarget according to how
57 /// we should reference it in a non-pcrel context.
59  return classifyLocalReference(nullptr);
60 }
61 
62 /// Classify a global variable reference for the current subtarget according to
63 /// how we should reference it in a non-pcrel context.
64 unsigned char
66  return classifyGlobalReference(GV, *GV->getParent());
67 }
68 
69 unsigned char
71  // 64 bits can use %rip addressing for anything local.
72  if (is64Bit())
73  return X86II::MO_NO_FLAG;
74 
75  // If this is for a position dependent executable, the static linker can
76  // figure it out.
77  if (!isPositionIndependent())
78  return X86II::MO_NO_FLAG;
79 
80  // The COFF dynamic linker just patches the executable sections.
81  if (isTargetCOFF())
82  return X86II::MO_NO_FLAG;
83 
84  if (isTargetDarwin()) {
85  // 32 bit macho has no relocation for a-b if a is undefined, even if
86  // b is in the section that is being relocated.
87  // This means we have to use o load even for GVs that are known to be
88  // local to the dso.
89  if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
91 
93  }
94 
95  return X86II::MO_GOTOFF;
96 }
97 
99  const Module &M) const {
100  // Large model never uses stubs.
102  return X86II::MO_NO_FLAG;
103 
104  // Absolute symbols can be referenced directly.
105  if (GV) {
107  // See if we can use the 8-bit immediate form. Note that some instructions
108  // will sign extend the immediate operand, so to be conservative we only
109  // accept the range [0,128).
110  if (CR->getUnsignedMax().ult(128))
111  return X86II::MO_ABS8;
112  else
113  return X86II::MO_NO_FLAG;
114  }
115  }
116 
117  if (TM.shouldAssumeDSOLocal(M, GV))
118  return classifyLocalReference(GV);
119 
120  if (isTargetCOFF())
121  return X86II::MO_DLLIMPORT;
122 
123  if (is64Bit())
124  return X86II::MO_GOTPCREL;
125 
126  if (isTargetDarwin()) {
127  if (!isPositionIndependent())
130  }
131 
132  return X86II::MO_GOT;
133 }
134 
135 unsigned char
137  return classifyGlobalFunctionReference(GV, *GV->getParent());
138 }
139 
140 unsigned char
142  const Module &M) const {
143  if (TM.shouldAssumeDSOLocal(M, GV))
144  return X86II::MO_NO_FLAG;
145 
146  if (isTargetCOFF()) {
148  "shouldAssumeDSOLocal gave inconsistent answer");
149  return X86II::MO_DLLIMPORT;
150  }
151 
152  const Function *F = dyn_cast_or_null<Function>(GV);
153 
154  if (isTargetELF()) {
155  if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
156  // According to psABI, PLT stub clobbers XMM8-XMM15.
157  // In Regcall calling convention those registers are used for passing
158  // parameters. Thus we need to prevent lazy binding in Regcall.
159  return X86II::MO_GOTPCREL;
160  // If PLT must be avoided then the call should be via GOTPCREL.
161  if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
162  (!F && M.getRtLibUseGOT())) &&
163  is64Bit())
164  return X86II::MO_GOTPCREL;
165  return X86II::MO_PLT;
166  }
167 
168  if (is64Bit()) {
169  if (F && F->hasFnAttribute(Attribute::NonLazyBind))
170  // If the function is marked as non-lazy, generate an indirect call
171  // which loads from the GOT directly. This avoids runtime overhead
172  // at the cost of eager binding (and one extra byte of encoding).
173  return X86II::MO_GOTPCREL;
174  return X86II::MO_NO_FLAG;
175  }
176 
177  return X86II::MO_NO_FLAG;
178 }
179 
180 /// Return true if the subtarget allows calls to immediate address.
182  // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
183  // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
184  // the following check for Win32 should be removed.
185  if (In64BitMode || isTargetWin32())
186  return false;
188 }
189 
190 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
191  std::string CPUName = CPU;
192  if (CPUName.empty())
193  CPUName = "generic";
194 
195  // Make sure 64-bit features are available in 64-bit mode. (But make sure
196  // SSE2 can be turned off explicitly.)
197  std::string FullFS = FS;
198  if (In64BitMode) {
199  if (!FullFS.empty())
200  FullFS = "+64bit,+sse2," + FullFS;
201  else
202  FullFS = "+64bit,+sse2";
203  }
204 
205  // LAHF/SAHF are always supported in non-64-bit mode.
206  if (!In64BitMode) {
207  if (!FullFS.empty())
208  FullFS = "+sahf," + FullFS;
209  else
210  FullFS = "+sahf";
211  }
212 
213  // Parse features string and set the CPU.
214  ParseSubtargetFeatures(CPUName, FullFS);
215 
216  // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
217  // 16-bytes and under that are reasonably fast. These features were
218  // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
219  // micro-architectures respectively.
220  if (hasSSE42() || hasSSE4A())
221  IsUAMem16Slow = false;
222 
223  // It's important to keep the MCSubtargetInfo feature bits in sync with
224  // target data structure which is shared with MC code emitter, etc.
225  if (In64BitMode)
226  ToggleFeature(X86::Mode64Bit);
227  else if (In32BitMode)
228  ToggleFeature(X86::Mode32Bit);
229  else if (In16BitMode)
230  ToggleFeature(X86::Mode16Bit);
231  else
232  llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
233 
234  LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
235  << ", 3DNowLevel " << X863DNowLevel << ", 64bit "
236  << HasX86_64 << "\n");
237  assert((!In64BitMode || HasX86_64) &&
238  "64-bit code requested on a subtarget that doesn't support it!");
239 
240  // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
241  // 32 and 64 bit) and for all 64-bit targets.
242  if (StackAlignOverride)
243  stackAlignment = StackAlignOverride;
244  else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
245  isTargetKFreeBSD() || In64BitMode)
246  stackAlignment = 16;
247 
248  // Some CPUs have more overhead for gather. The specified overhead is relative
249  // to the Load operation. "2" is the number provided by Intel architects. This
250  // parameter is used for cost estimation of Gather Op and comparison with
251  // other alternatives.
252  // TODO: Remove the explicit hasAVX512()?, That would mean we would only
253  // enable gather with a -march.
254  if (hasAVX512() || (hasAVX2() && hasFastGather()))
255  GatherOverhead = 2;
256  if (hasAVX512())
257  ScatterOverhead = 2;
258 
259  // Consume the vector width attribute or apply any target specific limit.
260  if (PreferVectorWidthOverride)
261  PreferVectorWidth = PreferVectorWidthOverride;
262  else if (Prefer256Bit)
263  PreferVectorWidth = 256;
264 }
265 
266 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
267  StringRef FS) {
268  initSubtargetFeatures(CPU, FS);
269  return *this;
270 }
271 
273  const X86TargetMachine &TM,
274  unsigned StackAlignOverride,
275  unsigned PreferVectorWidthOverride,
276  unsigned RequiredVectorWidth)
277  : X86GenSubtargetInfo(TT, CPU, FS),
278  PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
279  StackAlignOverride(StackAlignOverride),
280  PreferVectorWidthOverride(PreferVectorWidthOverride),
281  RequiredVectorWidth(RequiredVectorWidth),
282  In64BitMode(TargetTriple.getArch() == Triple::x86_64),
283  In32BitMode(TargetTriple.getArch() == Triple::x86 &&
284  TargetTriple.getEnvironment() != Triple::CODE16),
285  In16BitMode(TargetTriple.getArch() == Triple::x86 &&
286  TargetTriple.getEnvironment() == Triple::CODE16),
287  InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
288  FrameLowering(*this, getStackAlignment()) {
289  // Determine the PICStyle based on the target selected.
290  if (!isPositionIndependent())
292  else if (is64Bit())
294  else if (isTargetCOFF())
296  else if (isTargetDarwin())
298  else if (isTargetELF())
300 
302  Legalizer.reset(new X86LegalizerInfo(*this, TM));
303 
304  auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
305  RegBankInfo.reset(RBI);
306  InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
307 }
308 
310  return CallLoweringInfo.get();
311 }
312 
314  return InstSelector.get();
315 }
316 
318  return Legalizer.get();
319 }
320 
322  return RegBankInfo.get();
323 }
324 
326  return hasCMov() && X86EarlyIfConv;
327 }
bool isDeclarationForLinker() const
Definition: GlobalValue.h:523
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:508
const CallLowering * getCallLowering() const override
Methods used by Global ISel.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool hasAVX2() const
Definition: X86Subtarget.h:545
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
void setPICStyle(PICStyles::Style Style)
Definition: X86Subtarget.h:533
const TargetMachine & TM
Definition: X86Subtarget.h:87
const LegalizerInfo * getLegalizerInfo() const override
static cl::opt< bool > X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86"))
Optional< ConstantRange > getAbsoluteSymbolRange() const
If this is an absolute symbol reference, returns the range of the symbol, otherwise returns None...
Definition: Globals.cpp:272
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:307
bool hasDLLImportStorageClass() const
Definition: GlobalValue.h:261
F(f)
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
Definition: X86BaseInfo.h:110
unsigned char classifyLocalReference(const GlobalValue *GV) const
Classify a global variable reference for the current subtarget according to how we should reference i...
Holds all the information related to register banks.
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
Definition: X86BaseInfo.h:210
bool isTargetSolaris() const
Definition: X86Subtarget.h:703
This class provides the information for the target register banks.
const InstructionSelector * getInstructionSelector() const override
This file contains the simple types necessary to represent the attributes associated with functions a...
bool hasCommonLinkage() const
Definition: GlobalValue.h:439
bool Prefer256Bit
Indicates target prefers 256 bit instructions.
Definition: X86Subtarget.h:409
std::unique_ptr< CallLowering > CallLoweringInfo
GlobalISel related APIs.
Definition: X86Subtarget.h:415
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
Definition: X86BaseInfo.h:95
MO_ABS8 - On a symbol operand this indicates that the symbol is known to be an absolute symbol in ran...
Definition: X86BaseInfo.h:233
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
X863DNowEnum X863DNowLevel
MMX, 3DNow, 3DNow Athlon, or none supported.
Definition: X86Subtarget.h:93
X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS, const X86TargetMachine &TM, unsigned StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
This constructor initializes the data members to match that of the specified triple.
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:205
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:463
bool isTargetKFreeBSD() const
Definition: X86Subtarget.h:711
bool isLegalToCallImmediateAddr() const
Return true if the subtarget allows calls to immediate address.
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
unsigned getStackAlignment() const
Returns the minimum alignment known to hold of the stack frame on entry to the function and which mus...
Definition: X86Subtarget.h:484
PICStyles::Style PICStyle
Which PIC style to use.
Definition: X86Subtarget.h:85
bool isPositionIndependent() const
Definition: X86Subtarget.h:759
bool hasCMov() const
Definition: X86Subtarget.h:537
bool enableEarlyIfConversion() const override
bool isTargetDarwin() const
Definition: X86Subtarget.h:700
bool hasSSE42() const
Definition: X86Subtarget.h:543
bool IsUAMem16Slow
True if unaligned memory accesses of 16-bytes are slow.
Definition: X86Subtarget.h:233
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
This file declares the targeting of the RegisterBankInfo class for X86.
bool isTargetELF() const
Definition: X86Subtarget.h:706
const X86RegisterInfo * getRegisterInfo() const override
Definition: X86Subtarget.h:477
std::unique_ptr< InstructionSelector > InstSelector
Definition: X86Subtarget.h:418
bool HasX86_64
True if the processor supports X86-64 instructions.
Definition: X86Subtarget.h:107
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:199
bool isTargetWin32() const
Definition: X86Subtarget.h:750
InstructionSelector * createX86InstructionSelector(const X86TargetMachine &TM, X86Subtarget &, X86RegisterBankInfo &)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
CodeModel::Model getCodeModel() const
Returns the code model.
This file describes how to lower LLVM calls to machine code calls.
std::unique_ptr< RegisterBankInfo > RegBankInfo
Definition: X86Subtarget.h:417
bool getRtLibUseGOT() const
Returns true if PLT should be avoided for RTLib calls.
Definition: Module.cpp:520
Provides the logic to select generic machine instructions.
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
Definition: X86BaseInfo.h:102
This class provides the information for the target register banks.
X86SSEEnum X86SSELevel
SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.
Definition: X86Subtarget.h:90
Register calling convention used for parameters transfer optimization.
Definition: CallingConv.h:204
bool isTargetCOFF() const
Definition: X86Subtarget.h:707
unsigned char classifyBlockAddressReference() const
Classify a blockaddress reference for the current subtarget according to how we should reference it i...
MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol n...
Definition: X86BaseInfo.h:117
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
bool isTargetLinux() const
Definition: X86Subtarget.h:710
This file describes how to lower LLVM calls to machine code calls.
This file declares the targeting of the Machinelegalizer class for X86.
bool hasAVX512() const
Definition: X86Subtarget.h:546
const RegisterBankInfo * getRegBankInfo() const override
unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, const Module &M) const
Classify a global function reference for the current subtarget.
bool hasSSE4A() const
Definition: X86Subtarget.h:548
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
Definition: X86BaseInfo.h:88
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
unsigned char classifyGlobalReference(const GlobalValue *GV, const Module &M) const
unsigned stackAlignment
The minimum alignment known to hold of the stack frame on entry to the function and which must be mai...
Definition: X86Subtarget.h:401
bool hasFastGather() const
Definition: X86Subtarget.h:617
#define LLVM_DEBUG(X)
Definition: Debug.h:119
Triple TargetTriple
What processor and OS we&#39;re targeting.
Definition: X86Subtarget.h:412
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
Definition: X86BaseInfo.h:200