40 bool MatchingInlineAsm)
override;
44 SMLoc &EndLoc)
override;
56#define GET_ASSEMBLER_HEADER
57#include "BPFGenAsmMatcher.inc"
64 enum BPFMatchResultTy {
66#define GET_OPERAND_DIAGNOSTIC_TYPES
67#include "BPFGenAsmMatcher.inc"
68#undef GET_OPERAND_DIAGNOSTIC_TYPES
96 SMLoc StartLoc, EndLoc;
103 BPFOperand(KindTy K) :
Kind(
K) {}
108 StartLoc =
o.StartLoc;
124 bool isToken()
const override {
return Kind == Token; }
126 bool isImm()
const override {
return Kind == Immediate; }
127 bool isMem()
const override {
return false; }
129 bool isConstantImm()
const {
130 return isImm() && isa<MCConstantExpr>(getImm());
133 int64_t getConstantImm()
const {
134 const MCExpr *Val = getImm();
138 bool isSImm16()
const {
139 return (isConstantImm() && isInt<16>(getConstantImm()));
142 bool isSymbolRef()
const {
return isImm() && isa<MCSymbolRefExpr>(getImm()); }
144 bool isBrTarget()
const {
return isSymbolRef() || isSImm16(); }
147 SMLoc getStartLoc()
const override {
return StartLoc; }
149 SMLoc getEndLoc()
const override {
return EndLoc; }
156 const MCExpr *getImm()
const {
157 assert(Kind == Immediate &&
"Invalid type access!");
162 assert(Kind == Token &&
"Invalid type access!");
176 OS <<
"'" << getToken() <<
"'";
182 assert(Expr &&
"Expr shouldn't be null!");
184 if (
auto *CE = dyn_cast<MCConstantExpr>(Expr))
191 void addRegOperands(
MCInst &Inst,
unsigned N)
const {
192 assert(
N == 1 &&
"Invalid number of operands!");
196 void addImmOperands(
MCInst &Inst,
unsigned N)
const {
197 assert(
N == 1 &&
"Invalid number of operands!");
198 addExpr(Inst, getImm());
201 static std::unique_ptr<BPFOperand> createToken(
StringRef Str,
SMLoc S) {
202 auto Op = std::make_unique<BPFOperand>(Token);
209 static std::unique_ptr<BPFOperand> createReg(
unsigned RegNo,
SMLoc S,
211 auto Op = std::make_unique<BPFOperand>(
Register);
212 Op->Reg.RegNum = RegNo;
218 static std::unique_ptr<BPFOperand> createImm(
const MCExpr *Val,
SMLoc S,
220 auto Op = std::make_unique<BPFOperand>(Immediate);
235 .
Case(
"may_goto",
true)
239 .
Case(
"ld_pseudo",
true)
259 .
Case(
"bswap16",
true)
260 .
Case(
"bswap32",
true)
261 .
Case(
"bswap64",
true)
267 .
Case(
"atomic_fetch_add",
true)
268 .
Case(
"atomic_fetch_and",
true)
269 .
Case(
"atomic_fetch_or",
true)
270 .
Case(
"atomic_fetch_xor",
true)
271 .
Case(
"xchg_64",
true)
272 .
Case(
"xchg32_32",
true)
273 .
Case(
"cmpxchg_64",
true)
274 .
Case(
"cmpxchg32_32",
true)
275 .
Case(
"addr_space_cast",
true)
281#define GET_REGISTER_MATCHER
282#define GET_MATCHER_IMPLEMENTATION
283#include "BPFGenAsmMatcher.inc"
290 BPFOperand &Op0 = (BPFOperand &)*
Operands[0];
291 BPFOperand &Op1 = (BPFOperand &)*
Operands[1];
292 BPFOperand &Op2 = (BPFOperand &)*
Operands[2];
293 BPFOperand &Op3 = (BPFOperand &)*
Operands[3];
294 if (Op0.isReg() && Op1.isToken() && Op2.isToken() && Op3.isReg()
295 && Op1.getToken() ==
"="
296 && (Op2.getToken() ==
"-" || Op2.getToken() ==
"be16"
297 || Op2.getToken() ==
"be32" || Op2.getToken() ==
"be64"
298 || Op2.getToken() ==
"le16" || Op2.getToken() ==
"le32"
299 || Op2.getToken() ==
"le64")
300 && Op0.getReg() != Op3.getReg())
307bool BPFAsmParser::MatchAndEmitInstruction(
SMLoc IDLoc,
unsigned &Opcode,
310 bool MatchingInlineAsm) {
315 return Error(IDLoc,
"additional inst constraint not met");
324 case Match_MissingFeature:
325 return Error(IDLoc,
"instruction use requires an option to be enabled");
326 case Match_MnemonicFail:
327 return Error(IDLoc,
"unrecognized instruction mnemonic");
328 case Match_InvalidOperand:
333 return Error(ErrorLoc,
"too few operands for instruction");
337 if (ErrorLoc ==
SMLoc())
341 return Error(ErrorLoc,
"invalid operand for instruction");
342 case Match_InvalidBrTarget:
344 "operand is not an identifier or 16-bit signed integer");
345 case Match_InvalidSImm16:
347 "operand is not a 16-bit signed integer");
355 if (!tryParseRegister(Reg, StartLoc, EndLoc).isSuccess())
356 return Error(StartLoc,
"invalid register name");
362 const AsmToken &Tok = getParser().getTok();
365 Reg = BPF::NoRegister;
382 if (BPFOperand::isValidIdInMiddle(
Name)) {
391 switch (getLexer().getKind()) {
425 Operands.push_back(BPFOperand::createToken(
426 getLexer().getTok().getString().
substr(0, 1), S));
427 Operands.push_back(BPFOperand::createToken(
428 getLexer().getTok().getString().
substr(1, 1), S));
445 switch (getLexer().getKind()) {
456 Operands.push_back(BPFOperand::createReg(RegNo, S, E));
462 switch (getLexer().getKind()) {
477 if (getParser().parseExpression(IdVal))
481 Operands.push_back(BPFOperand::createImm(IdVal, S, E));
495 Operands.push_back(BPFOperand::createReg(RegNo, NameLoc, E));
496 }
else if (BPFOperand::isValidIdAtStart (
Name))
497 Operands.push_back(BPFOperand::createToken(
Name, NameLoc));
499 return Error(NameLoc,
"invalid register/token name");
503 if (parseOperandAsOperator(
Operands).isSuccess())
507 if (parseRegister(
Operands).isSuccess())
517 SMLoc Loc = getLexer().getLoc();
518 return Error(Loc,
"unexpected token");
523 SMLoc Loc = getLexer().getLoc();
525 getParser().eatToEndOfStatement();
527 return Error(Loc,
"unexpected token");
static MCRegister MatchRegisterName(StringRef Name)
static bool isNot(const MachineRegisterInfo &MRI, const MachineInstr &MI)
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFAsmParser()
#define LLVM_EXTERNAL_VISIBILITY
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
mir Rename Register Operands
static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)
static bool isReg(const MCInst &MI, unsigned OpNo)
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isImm(const MachineOperand &MO, MachineRegisterInfo *MRI)
static StringRef substr(StringRef Str, uint64_t Len)
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
bool parseImmediate(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes)
Target independent representation for an assembler token.
This class represents an Operation in the Expression.
Base class for user error types.
Lightweight error class with error context and mandatory checking.
MCAsmParser & getParser()
Generic assembler parser interface, for use by target specific assembly parsers.
const AsmToken & getTok() const
Get the current AsmToken from the stream.
Base class for the full range of assembler expressions which are needed for parsing.
Instances of this class represent a single low-level machine instruction.
void addOperand(const MCOperand Op)
Interface to description of machine instruction set.
static MCOperand createReg(unsigned Reg)
static MCOperand createExpr(const MCExpr *Val)
static MCOperand createImm(int64_t Val)
MCParsedAsmOperand - This abstract class represents a source-level assembly instruction operand.
Wrapper class representing physical registers. Should be passed by value.
Streaming machine code generation interface.
virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)
Emit the given Instruction into the current section.
Generic base class for all target subtargets.
const FeatureBitset & getFeatureBits() const
MCTargetAsmParser - Generic interface to target specific assembly parsers.
virtual bool equalIsAsmAssignment()
@ FIRST_TARGET_MATCH_RESULT_TY
virtual bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc)=0
virtual ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc)=0
tryParseRegister - parse one register if possible
virtual bool starIsStartOfStatement()
void setAvailableFeatures(const FeatureBitset &Value)
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands)=0
ParseInstruction - Parse one assembly instruction.
virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm)=0
MatchAndEmitInstruction - Recognize a series of operands of a parsed instruction as an actual MCInst ...
Ternary parse status returned by various parse* methods.
static constexpr StatusTy Failure
static constexpr StatusTy Success
static constexpr StatusTy NoMatch
Wrapper class representing virtual and physical registers.
Represents a location in source code.
static SMLoc getFromPointer(const char *Ptr)
constexpr const char * getPointer() const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StringRef - Represent a constant reference to a string, i.e.
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ CE
Windows NT (Windows on ARM)
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
static bool isMem(const MachineInstr &MI, unsigned Op)
Target & getTheBPFleTarget()
Target & getTheBPFbeTarget()
Target & getTheBPFTarget()
DWARFExpression::Operation Op
RegisterMCAsmParser - Helper template for registering a target specific assembly parser,...