27#define DEBUG_TYPE "legalize-types"
39 VT == MVT::f32 ? Call_F32 :
40 VT == MVT::f64 ? Call_F64 :
41 VT == MVT::f80 ? Call_F80 :
42 VT == MVT::f128 ? Call_F128 :
43 VT == MVT::ppcf128 ? Call_PPCF128 :
44 RTLIB::UNKNOWN_LIBCALL;
51void DAGTypeLegalizer::SoftenFloatResult(
SDNode *
N,
unsigned ResNo) {
52 LLVM_DEBUG(
dbgs() <<
"Soften float result " << ResNo <<
": ";
N->dump(&DAG));
55 switch (
N->getOpcode()) {
59 dbgs() <<
"SoftenFloatResult #" << ResNo <<
": ";
60 N->dump(&DAG);
dbgs() <<
"\n";
71 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(
N, ResNo);
break;
115 case ISD::FMA:
R = SoftenFloatRes_FMA(
N);
break;
183 SetSoftenedFloat(
SDValue(
N, ResNo), R);
188 bool IsStrict =
N->isStrictFPOpcode();
190 unsigned Offset = IsStrict ? 1 : 0;
192 "Unexpected number of operands!");
196 EVT OpVT =
N->getOperand(0 +
Offset).getValueType();
198 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
202 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
207 bool IsStrict =
N->isStrictFPOpcode();
209 unsigned Offset = IsStrict ? 1 : 0;
211 "Unexpected number of operands!");
213 GetSoftenedFloat(
N->getOperand(1 +
Offset)) };
216 EVT OpsVT[2] = {
N->getOperand(0 +
Offset).getValueType(),
217 N->getOperand(1 +
Offset).getValueType() };
219 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT, Ops,
223 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
228 return BitConvertToInteger(
N->getOperand(0));
234 GetSoftenedFloat(
N->getOperand(0)));
240 GetSoftenedFloat(
N->getOperand(0)));
246 SDValue Op = DisintegrateMERGE_VALUES(
N, ResNo);
247 return BitConvertToInteger(
Op);
255 BitConvertToInteger(
N->getOperand(0)),
256 BitConvertToInteger(
N->getOperand(1)));
272 APInt Val(128, words);
283SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_ELEMENT(
SDNode *
N) {
285 assert(Src.getValueType() == MVT::ppcf128 &&
286 "In floats only ppcf128 can be extracted by element!");
288 N->getValueType(0).changeTypeToInteger(),
292SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(
SDNode *
N,
unsigned ResNo) {
293 SDValue NewOp = BitConvertVectorToIntegerVector(
N->getOperand(0));
296 NewOp,
N->getOperand(1));
307 SDValue Op = GetSoftenedFloat(
N->getOperand(0));
313 return SoftenFloatRes_SELECT_CC(SelCC.getNode());
319 RTLIB::FMIN_PPCF128));
324 return SoftenFloatRes_SELECT_CC(SelCC.getNode());
330 RTLIB::FMAX_PPCF128));
334 return SoftenFloatRes_Binary(
336 RTLIB::FMINIMUMNUM_F64, RTLIB::FMINIMUMNUM_F80,
337 RTLIB::FMINIMUMNUM_F128, RTLIB::FMINIMUMNUM_PPCF128));
341 return SoftenFloatRes_Binary(
343 RTLIB::FMAXIMUMNUM_F64, RTLIB::FMAXIMUMNUM_F80,
344 RTLIB::FMAXIMUMNUM_F128, RTLIB::FMAXIMUMNUM_PPCF128));
348 return SoftenFloatRes_Binary(
350 RTLIB::FMINIMUM_F64, RTLIB::FMINIMUM_F80,
351 RTLIB::FMINIMUM_F128, RTLIB::FMINIMUM_PPCF128));
355 return SoftenFloatRes_Binary(
357 RTLIB::FMAXIMUM_F64, RTLIB::FMAXIMUM_F80,
358 RTLIB::FMAXIMUM_F128, RTLIB::FMAXIMUM_PPCF128));
367 RTLIB::ADD_PPCF128));
371 return SoftenFloatRes_Unary(
372 N,
GetFPLibCall(
N->getValueType(0), RTLIB::ACOS_F32, RTLIB::ACOS_F64,
373 RTLIB::ACOS_F80, RTLIB::ACOS_F128, RTLIB::ACOS_PPCF128));
377 return SoftenFloatRes_Unary(
378 N,
GetFPLibCall(
N->getValueType(0), RTLIB::ASIN_F32, RTLIB::ASIN_F64,
379 RTLIB::ASIN_F80, RTLIB::ASIN_F128, RTLIB::ASIN_PPCF128));
383 return SoftenFloatRes_Unary(
384 N,
GetFPLibCall(
N->getValueType(0), RTLIB::ATAN_F32, RTLIB::ATAN_F64,
385 RTLIB::ATAN_F80, RTLIB::ATAN_F128, RTLIB::ATAN_PPCF128));
389 return SoftenFloatRes_Binary(
391 GetFPLibCall(
N->getValueType(0), RTLIB::ATAN2_F32, RTLIB::ATAN2_F64,
392 RTLIB::ATAN2_F80, RTLIB::ATAN2_F128, RTLIB::ATAN2_PPCF128));
401 RTLIB::CBRT_PPCF128));
410 RTLIB::CEIL_PPCF128));
415 SDValue RHS = BitConvertToInteger(
N->getOperand(1));
418 EVT LVT =
LHS.getValueType();
419 EVT RVT =
RHS.getValueType();
440 }
else if (SizeDiff < 0) {
467 RTLIB::COS_PPCF128));
471 return SoftenFloatRes_Unary(
472 N,
GetFPLibCall(
N->getValueType(0), RTLIB::COSH_F32, RTLIB::COSH_F64,
473 RTLIB::COSH_F80, RTLIB::COSH_F128, RTLIB::COSH_PPCF128));
482 RTLIB::DIV_PPCF128));
491 RTLIB::EXP_PPCF128));
500 RTLIB::EXP2_PPCF128));
504 return SoftenFloatRes_Unary(
506 GetFPLibCall(
N->getValueType(0), RTLIB::EXP10_F32, RTLIB::EXP10_F64,
507 RTLIB::EXP10_F80, RTLIB::EXP10_F128, RTLIB::EXP10_PPCF128));
516 RTLIB::FLOOR_PPCF128));
525 RTLIB::LOG_PPCF128));
534 RTLIB::LOG2_PPCF128));
543 RTLIB::LOG10_PPCF128));
547 bool IsStrict =
N->isStrictFPOpcode();
549 unsigned Offset = IsStrict ? 1 : 0;
551 GetSoftenedFloat(
N->getOperand(1 +
Offset)),
552 GetSoftenedFloat(
N->getOperand(2 +
Offset)) };
555 EVT OpsVT[3] = {
N->getOperand(0 +
Offset).getValueType(),
556 N->getOperand(1 +
Offset).getValueType(),
557 N->getOperand(2 +
Offset).getValueType() };
559 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG,
566 NVT, Ops, CallOptions,
SDLoc(
N), Chain);
568 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
578 RTLIB::MUL_PPCF128));
583 RTLIB::NEARBYINT_F32,
584 RTLIB::NEARBYINT_F64,
585 RTLIB::NEARBYINT_F80,
586 RTLIB::NEARBYINT_F128,
587 RTLIB::NEARBYINT_PPCF128));
601 bool IsStrict =
N->isStrictFPOpcode();
608 Op = GetPromotedFloat(
Op);
611 if (
Op.getValueType() ==
N->getValueType(0)) {
613 ReplaceValueWith(
SDValue(
N, 1), Chain);
614 return BitConvertToInteger(
Op);
622 if ((
Op.getValueType() == MVT::f16 ||
Op.getValueType() == MVT::bf16) &&
623 N->getValueType(0) != MVT::f32) {
626 { MVT::f32, MVT::Other }, { Chain,
Op });
627 Chain =
Op.getValue(1);
633 if (
Op.getValueType() == MVT::bf16) {
635 return SoftenFloatRes_BF16_TO_FP(
N);
639 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_EXTEND!");
641 EVT OpVT =
N->getOperand(IsStrict ? 1 : 0).getValueType();
643 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
647 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
657 EVT OpsVT[1] = {
N->getOperand(0).getValueType() };
660 CallOptions,
SDLoc(
N)).first;
661 if (
N->getValueType(0) == MVT::f32)
666 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_EXTEND!");
673 assert(
N->getValueType(0) == MVT::f32 &&
674 "Can only soften BF16_TO_FP with f32 result");
686 bool IsStrict =
N->isStrictFPOpcode();
691 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_ROUND!");
693 EVT OpVT =
N->getOperand(IsStrict ? 1 : 0).getValueType();
695 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
699 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
709 RTLIB::POW_PPCF128));
713 bool IsStrict =
N->isStrictFPOpcode();
714 unsigned Offset = IsStrict ? 1 : 0;
715 assert((
N->getOperand(1 +
Offset).getValueType() == MVT::i16 ||
716 N->getOperand(1 +
Offset).getValueType() == MVT::i32) &&
717 "Unsupported power type!");
723 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unexpected fpowi.");
732 N->getOperand(1 +
Offset).getValueType().getSizeInBits()) {
744 EVT OpsVT[2] = {
N->getOperand(0 +
Offset).getValueType(),
745 N->getOperand(1 +
Offset).getValueType() };
747 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT, Ops,
751 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
756 assert(!
N->isStrictFPOpcode() &&
"strictfp not implemented for frexp");
757 EVT VT0 =
N->getValueType(0);
758 EVT VT1 =
N->getValueType(1);
775 SDValue Ops[2] = {GetSoftenedFloat(
N->getOperand(0)), StackSlot};
782 auto [ReturnVal, Chain] = TLI.
makeLibCall(DAG, LC, NVT0, Ops, CallOptions,
DL,
784 int FrameIdx = cast<FrameIndexSDNode>(StackSlot)->getIndex();
790 ReplaceValueWith(
SDValue(
N, 1), LoadExp);
795DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(
SDNode *
N,
797 assert(!
N->isStrictFPOpcode() &&
"strictfp not implemented");
798 EVT VT =
N->getValueType(0);
810 std::array Ops{GetSoftenedFloat(
N->getOperand(0)), FirstResultSlot,
819 auto [ReturnVal, Chain] = TLI.
makeLibCall(DAG, LC, NVT, Ops, CallOptions,
DL,
822 auto CreateStackLoad = [&, Chain = Chain](
SDValue StackSlot) {
823 int FrameIdx = cast<FrameIndexSDNode>(StackSlot)->getIndex();
826 return DAG.
getLoad(NVT,
DL, Chain, StackSlot, PtrInfo);
828 SetSoftenedFloat(
SDValue(
N, 0), CreateStackLoad(FirstResultSlot));
829 SetSoftenedFloat(
SDValue(
N, 1), CreateStackLoad(SecondResultSlot));
835 return SoftenFloatRes_UnaryWithTwoFPResults(
845 RTLIB::REM_PPCF128));
854 RTLIB::RINT_PPCF128));
863 RTLIB::ROUND_PPCF128));
868 RTLIB::ROUNDEVEN_F32,
869 RTLIB::ROUNDEVEN_F64,
870 RTLIB::ROUNDEVEN_F80,
871 RTLIB::ROUNDEVEN_F128,
872 RTLIB::ROUNDEVEN_PPCF128));
881 RTLIB::SIN_PPCF128));
885 return SoftenFloatRes_Unary(
886 N,
GetFPLibCall(
N->getValueType(0), RTLIB::SINH_F32, RTLIB::SINH_F64,
887 RTLIB::SINH_F80, RTLIB::SINH_F128, RTLIB::SINH_PPCF128));
896 RTLIB::SQRT_PPCF128));
905 RTLIB::SUB_PPCF128));
909 return SoftenFloatRes_Unary(
910 N,
GetFPLibCall(
N->getValueType(0), RTLIB::TAN_F32, RTLIB::TAN_F64,
911 RTLIB::TAN_F80, RTLIB::TAN_F128, RTLIB::TAN_PPCF128));
915 return SoftenFloatRes_Unary(
916 N,
GetFPLibCall(
N->getValueType(0), RTLIB::TANH_F32, RTLIB::TANH_F64,
917 RTLIB::TANH_F80, RTLIB::TANH_F128, RTLIB::TANH_PPCF128));
926 RTLIB::TRUNC_PPCF128));
931 EVT VT =
N->getValueType(0);
936 L->getMemOperand()->getFlags() &
940 NewL = DAG.
getLoad(
L->getAddressingMode(),
L->getExtensionType(), NVT, dl,
941 L->getChain(),
L->getBasePtr(),
L->getOffset(),
942 L->getPointerInfo(), NVT,
L->getOriginalAlign(),
943 MMOFlags,
L->getAAInfo());
952 dl,
L->getChain(),
L->getBasePtr(),
L->getOffset(),
953 L->getPointerInfo(),
L->getMemoryVT(),
954 L->getOriginalAlign(), MMOFlags,
L->getAAInfo());
959 return BitConvertToInteger(ExtendNode);
964 EVT VT =
N->getValueType(0);
971 {L->getChain(), L->getBasePtr()},
L->getMemOperand());
986 LHS.getValueType(),
N->getOperand(0), LHS, RHS);
993 LHS.getValueType(),
N->getOperand(0),
994 N->getOperand(1), LHS, RHS,
N->getOperand(4));
999 N->getValueType(0)));
1005 EVT VT =
N->getValueType(0);
1010 NewVAARG = DAG.
getVAArg(NVT, dl, Chain,
Ptr,
N->getOperand(2),
1011 N->getConstantOperandVal(3));
1021 bool IsStrict =
N->isStrictFPOpcode();
1024 EVT SVT =
N->getOperand(IsStrict ? 1 : 0).getValueType();
1025 EVT RVT =
N->getValueType(0);
1033 for (
unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
1034 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
1040 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported XINT_TO_FP!");
1045 NVT,
N->getOperand(IsStrict ? 1 : 0));
1049 std::pair<SDValue, SDValue> Tmp =
1051 Op, CallOptions, dl, Chain);
1054 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1064SDValue DAGTypeLegalizer::SoftenFloatRes_VECREDUCE_SEQ(
SDNode *
N) {
1073bool DAGTypeLegalizer::SoftenFloatOperand(
SDNode *
N,
unsigned OpNo) {
1074 LLVM_DEBUG(
dbgs() <<
"Soften float operand " << OpNo <<
": ";
N->dump(&DAG));
1077 switch (
N->getOpcode()) {
1080 dbgs() <<
"SoftenFloatOperand Op #" << OpNo <<
": ";
1081 N->dump(&DAG);
dbgs() <<
"\n";
1086 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(
N);
break;
1099 Res = SoftenFloatOp_FP_TO_XINT_SAT(
N);
break;
1101 case ISD::LROUND: Res = SoftenFloatOp_LROUND(
N);
break;
1105 case ISD::LRINT: Res = SoftenFloatOp_LRINT(
N);
break;
1107 case ISD::LLRINT: Res = SoftenFloatOp_LLRINT(
N);
break;
1111 case ISD::SETCC: Res = SoftenFloatOp_SETCC(
N);
break;
1112 case ISD::STORE: Res = SoftenFloatOp_STORE(
N, OpNo);
break;
1114 Res = SoftenFloatOp_ATOMIC_STORE(
N, OpNo);
1120 if (!Res.
getNode())
return false;
1128 "Invalid operand softening");
1130 ReplaceValueWith(
SDValue(
N, 0), Res);
1135 SDValue Op0 = GetSoftenedFloat(
N->getOperand(0));
1149 bool IsStrict =
N->isStrictFPOpcode();
1150 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
1151 EVT SVT =
Op.getValueType();
1152 EVT RVT =
N->getValueType(0);
1156 FloatRVT = MVT::f16;
1159 FloatRVT = MVT::bf16;
1162 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_ROUND libcall");
1165 Op = GetSoftenedFloat(
Op);
1168 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, RVT,
Op,
1172 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1173 ReplaceValueWith(
SDValue(
N, 0), Tmp.first);
1180 SDValue NewLHS =
N->getOperand(2), NewRHS =
N->getOperand(3);
1181 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(1))->get();
1184 NewLHS = GetSoftenedFloat(NewLHS);
1185 NewRHS = GetSoftenedFloat(NewRHS);
1187 N->getOperand(2),
N->getOperand(3));
1191 if (!NewRHS.getNode()) {
1209 for (
unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
1210 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
1214 if (Promoted.
bitsGE(RetVT))
1222 bool IsStrict =
N->isStrictFPOpcode();
1226 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
1227 EVT SVT =
Op.getValueType();
1228 EVT RVT =
N->getValueType(0);
1238 "Unsupported FP_TO_XINT!");
1240 Op = GetSoftenedFloat(
Op);
1244 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
1245 CallOptions, dl, Chain);
1253 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1254 ReplaceValueWith(
SDValue(
N, 0), Res);
1258SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT_SAT(
SDNode *
N) {
1264 SDValue NewLHS =
N->getOperand(0), NewRHS =
N->getOperand(1);
1265 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(4))->get();
1268 NewLHS = GetSoftenedFloat(NewLHS);
1269 NewRHS = GetSoftenedFloat(NewRHS);
1271 N->getOperand(0),
N->getOperand(1));
1275 if (!NewRHS.getNode()) {
1282 N->getOperand(2),
N->getOperand(3),
1288 bool IsStrict =
N->isStrictFPOpcode();
1289 SDValue Op0 =
N->getOperand(IsStrict ? 1 : 0);
1290 SDValue Op1 =
N->getOperand(IsStrict ? 2 : 1);
1293 cast<CondCodeSDNode>(
N->getOperand(IsStrict ? 3 : 2))->get();
1296 SDValue NewLHS = GetSoftenedFloat(Op0);
1297 SDValue NewRHS = GetSoftenedFloat(Op1);
1313 "Unexpected setcc expansion!");
1316 ReplaceValueWith(
SDValue(
N, 0), NewLHS);
1317 ReplaceValueWith(
SDValue(
N, 1), Chain);
1323SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(
SDNode *
N,
unsigned OpNo) {
1325 assert(OpNo == 1 &&
"Can only soften the stored value!");
1330 if (
ST->isTruncatingStore())
1332 Val = BitConvertToInteger(
1336 Val = GetSoftenedFloat(Val);
1338 return DAG.
getStore(
ST->getChain(), dl, Val,
ST->getBasePtr(),
1339 ST->getMemOperand());
1342SDValue DAGTypeLegalizer::SoftenFloatOp_ATOMIC_STORE(
SDNode *
N,
unsigned OpNo) {
1343 assert(OpNo == 1 &&
"Can only soften the stored value!");
1349 assert(
ST->getMemoryVT() == VT &&
"truncating atomic store not handled");
1351 SDValue NewVal = GetSoftenedFloat(Val);
1353 ST->getBasePtr(),
ST->getMemOperand());
1358 SDValue RHS = BitConvertToInteger(
N->getOperand(1));
1361 EVT LVT =
LHS.getValueType();
1363 EVT RVT =
RHS.getValueType();
1369 int SizeDiff = RSize - LSize;
1377 }
else if (SizeDiff < 0) {
1392 bool IsStrict =
N->isStrictFPOpcode();
1393 unsigned Offset = IsStrict ? 1 : 0;
1397 EVT OpVT =
N->getOperand(0 +
Offset).getValueType();
1399 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC, NVT,
Op,
1403 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1404 ReplaceValueWith(
SDValue(
N, 0), Tmp.first);
1412 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1418 RTLIB::LROUND_PPCF128));
1422 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1427 RTLIB::LLROUND_F128,
1428 RTLIB::LLROUND_PPCF128));
1432 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1438 RTLIB::LRINT_PPCF128));
1442 EVT OpVT =
N->getOperand(
N->isStrictFPOpcode() ? 1 : 0).getValueType();
1448 RTLIB::LLRINT_PPCF128));
1459void DAGTypeLegalizer::ExpandFloatResult(
SDNode *
N,
unsigned ResNo) {
1465 if (CustomLowerNode(
N,
N->getValueType(ResNo),
true))
1468 switch (
N->getOpcode()) {
1471 dbgs() <<
"ExpandFloatResult #" << ResNo <<
": ";
1472 N->dump(&DAG);
dbgs() <<
"\n";
1584 "Do not know how to expand this float constant!");
1585 APInt C = cast<ConstantFPSDNode>(
N)->getValueAPF().bitcastToAPInt();
1594 bool IsStrict =
N->isStrictFPOpcode();
1595 unsigned Offset = IsStrict ? 1 : 0;
1599 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC,
N->getValueType(0),
1603 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1604 GetPairElements(Tmp.first,
Lo,
Hi);
1609 bool IsStrict =
N->isStrictFPOpcode();
1610 unsigned Offset = IsStrict ? 1 : 0;
1614 std::pair<SDValue, SDValue> Tmp = TLI.
makeLibCall(DAG, LC,
N->getValueType(0),
1615 Ops, CallOptions,
SDLoc(
N),
1618 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1619 GetPairElements(Tmp.first,
Lo,
Hi);
1624 assert(
N->getValueType(0) == MVT::ppcf128 &&
1625 "Logic only correct for ppcf128!");
1628 GetExpandedFloat(
N->getOperand(0),
Lo, Tmp);
1639 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1640 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1641 RTLIB::FMIN_PPCF128),
Lo,
Hi);
1647 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1648 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1649 RTLIB::FMAX_PPCF128),
Lo,
Hi);
1654 ExpandFloatRes_Binary(
1657 RTLIB::FMINIMUMNUM_F64, RTLIB::FMINIMUMNUM_F80,
1658 RTLIB::FMINIMUMNUM_F128, RTLIB::FMINIMUMNUM_PPCF128),
1664 ExpandFloatRes_Binary(
1667 RTLIB::FMAXIMUMNUM_F64, RTLIB::FMAXIMUMNUM_F80,
1668 RTLIB::FMAXIMUMNUM_F128, RTLIB::FMAXIMUMNUM_PPCF128),
1675 RTLIB::ADD_F32, RTLIB::ADD_F64,
1676 RTLIB::ADD_F80, RTLIB::ADD_F128,
1677 RTLIB::ADD_PPCF128),
Lo,
Hi);
1682 ExpandFloatRes_Unary(
N,
1684 RTLIB::ACOS_F64, RTLIB::ACOS_F80,
1685 RTLIB::ACOS_F128, RTLIB::ACOS_PPCF128),
1691 ExpandFloatRes_Unary(
N,
1693 RTLIB::ASIN_F64, RTLIB::ASIN_F80,
1694 RTLIB::ASIN_F128, RTLIB::ASIN_PPCF128),
1700 ExpandFloatRes_Unary(
N,
1702 RTLIB::ATAN_F64, RTLIB::ATAN_F80,
1703 RTLIB::ATAN_F128, RTLIB::ATAN_PPCF128),
1709 ExpandFloatRes_Binary(
N,
1711 RTLIB::ATAN2_F64, RTLIB::ATAN2_F80,
1712 RTLIB::ATAN2_F128, RTLIB::ATAN2_PPCF128),
1718 ExpandFloatRes_Unary(
N,
GetFPLibCall(
N->getValueType(0), RTLIB::CBRT_F32,
1719 RTLIB::CBRT_F64, RTLIB::CBRT_F80,
1721 RTLIB::CBRT_PPCF128),
Lo,
Hi);
1724void DAGTypeLegalizer::ExpandFloatRes_FCEIL(
SDNode *
N,
1727 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1728 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1729 RTLIB::CEIL_PPCF128),
Lo,
Hi);
1732void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(
SDNode *
N,
1735 RTLIB::COPYSIGN_F32,
1736 RTLIB::COPYSIGN_F64,
1737 RTLIB::COPYSIGN_F80,
1738 RTLIB::COPYSIGN_F128,
1739 RTLIB::COPYSIGN_PPCF128),
Lo,
Hi);
1742void DAGTypeLegalizer::ExpandFloatRes_FCOS(
SDNode *
N,
1745 RTLIB::COS_F32, RTLIB::COS_F64,
1746 RTLIB::COS_F80, RTLIB::COS_F128,
1747 RTLIB::COS_PPCF128),
Lo,
Hi);
1752 ExpandFloatRes_Unary(
N,
1754 RTLIB::COSH_F64, RTLIB::COSH_F80,
1755 RTLIB::COSH_F128, RTLIB::COSH_PPCF128),
1766 RTLIB::DIV_PPCF128),
Lo,
Hi);
1769void DAGTypeLegalizer::ExpandFloatRes_FEXP(
SDNode *
N,
1772 RTLIB::EXP_F32, RTLIB::EXP_F64,
1773 RTLIB::EXP_F80, RTLIB::EXP_F128,
1774 RTLIB::EXP_PPCF128),
Lo,
Hi);
1777void DAGTypeLegalizer::ExpandFloatRes_FEXP2(
SDNode *
N,
1780 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1781 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1782 RTLIB::EXP2_PPCF128),
Lo,
Hi);
1787 ExpandFloatRes_Unary(
N,
1789 RTLIB::EXP10_F64, RTLIB::EXP10_F80,
1790 RTLIB::EXP10_F128, RTLIB::EXP10_PPCF128),
1794void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(
SDNode *
N,
1797 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1798 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1799 RTLIB::FLOOR_PPCF128),
Lo,
Hi);
1802void DAGTypeLegalizer::ExpandFloatRes_FLOG(
SDNode *
N,
1805 RTLIB::LOG_F32, RTLIB::LOG_F64,
1806 RTLIB::LOG_F80, RTLIB::LOG_F128,
1807 RTLIB::LOG_PPCF128),
Lo,
Hi);
1810void DAGTypeLegalizer::ExpandFloatRes_FLOG2(
SDNode *
N,
1813 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1814 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1815 RTLIB::LOG2_PPCF128),
Lo,
Hi);
1818void DAGTypeLegalizer::ExpandFloatRes_FLOG10(
SDNode *
N,
1821 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1822 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1823 RTLIB::LOG10_PPCF128),
Lo,
Hi);
1828 bool IsStrict =
N->isStrictFPOpcode();
1829 unsigned Offset = IsStrict ? 1 : 0;
1839 RTLIB::FMA_PPCF128),
1840 N->getValueType(0), Ops, CallOptions,
1843 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
1844 GetPairElements(Tmp.first,
Lo,
Hi);
1854 RTLIB::MUL_PPCF128),
Lo,
Hi);
1857void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(
SDNode *
N,
1860 RTLIB::NEARBYINT_F32,
1861 RTLIB::NEARBYINT_F64,
1862 RTLIB::NEARBYINT_F80,
1863 RTLIB::NEARBYINT_F128,
1864 RTLIB::NEARBYINT_PPCF128),
Lo,
Hi);
1870 GetExpandedFloat(
N->getOperand(0),
Lo,
Hi);
1879 bool IsStrict =
N->isStrictFPOpcode();
1884 if (NVT ==
N->getOperand(1).getValueType()) {
1885 Hi =
N->getOperand(1);
1886 Chain =
N->getOperand(0);
1890 {
N->getOperand(0),
N->getOperand(1) });
1891 Chain =
Hi.getValue(1);
1900 ReplaceValueWith(
SDValue(
N, 1), Chain);
1903void DAGTypeLegalizer::ExpandFloatRes_FPOW(
SDNode *
N,
1906 RTLIB::POW_F32, RTLIB::POW_F64,
1907 RTLIB::POW_F80, RTLIB::POW_F128,
1908 RTLIB::POW_PPCF128),
Lo,
Hi);
1911void DAGTypeLegalizer::ExpandFloatRes_FPOWI(
SDNode *
N,
1921void DAGTypeLegalizer::ExpandFloatRes_FREEZE(
SDNode *
N,
1923 assert(
N->getValueType(0) == MVT::ppcf128 &&
1924 "Logic only correct for ppcf128!");
1927 GetExpandedFloat(
N->getOperand(0),
Lo,
Hi);
1932void DAGTypeLegalizer::ExpandFloatRes_FREM(
SDNode *
N,
1935 RTLIB::REM_F32, RTLIB::REM_F64,
1936 RTLIB::REM_F80, RTLIB::REM_F128,
1937 RTLIB::REM_PPCF128),
Lo,
Hi);
1940void DAGTypeLegalizer::ExpandFloatRes_FRINT(
SDNode *
N,
1943 RTLIB::RINT_F32, RTLIB::RINT_F64,
1944 RTLIB::RINT_F80, RTLIB::RINT_F128,
1945 RTLIB::RINT_PPCF128),
Lo,
Hi);
1948void DAGTypeLegalizer::ExpandFloatRes_FROUND(
SDNode *
N,
1955 RTLIB::ROUND_PPCF128),
Lo,
Hi);
1958void DAGTypeLegalizer::ExpandFloatRes_FROUNDEVEN(
SDNode *
N,
1961 RTLIB::ROUNDEVEN_F32,
1962 RTLIB::ROUNDEVEN_F64,
1963 RTLIB::ROUNDEVEN_F80,
1964 RTLIB::ROUNDEVEN_F128,
1965 RTLIB::ROUNDEVEN_PPCF128),
Lo,
Hi);
1968void DAGTypeLegalizer::ExpandFloatRes_FSIN(
SDNode *
N,
1971 RTLIB::SIN_F32, RTLIB::SIN_F64,
1972 RTLIB::SIN_F80, RTLIB::SIN_F128,
1973 RTLIB::SIN_PPCF128),
Lo,
Hi);
1978 ExpandFloatRes_Unary(
N,
1980 RTLIB::SINH_F64, RTLIB::SINH_F80,
1981 RTLIB::SINH_F128, RTLIB::SINH_PPCF128),
1985void DAGTypeLegalizer::ExpandFloatRes_FSQRT(
SDNode *
N,
1988 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1989 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1990 RTLIB::SQRT_PPCF128),
Lo,
Hi);
2000 RTLIB::SUB_PPCF128),
Lo,
Hi);
2005 ExpandFloatRes_Unary(
N,
2007 RTLIB::TAN_F64, RTLIB::TAN_F80,
2008 RTLIB::TAN_F128, RTLIB::TAN_PPCF128),
2014 ExpandFloatRes_Unary(
N,
2016 RTLIB::TANH_F64, RTLIB::TANH_F80,
2017 RTLIB::TANH_F128, RTLIB::TANH_PPCF128),
2021void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(
SDNode *
N,
2024 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
2025 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
2026 RTLIB::TRUNC_PPCF128),
Lo,
Hi);
2032 ExpandRes_NormalLoad(
N,
Lo,
Hi);
2044 assert(
LD->getMemoryVT().bitsLE(NVT) &&
"Float type not round?");
2047 LD->getMemoryVT(),
LD->getMemOperand());
2050 Chain =
Hi.getValue(1);
2057 ReplaceValueWith(
SDValue(LD, 1), Chain);
2062 assert(
N->getValueType(0) == MVT::ppcf128 &&
"Unsupported XINT_TO_FP!");
2063 EVT VT =
N->getValueType(0);
2065 bool Strict =
N->isStrictFPOpcode();
2066 SDValue Src =
N->getOperand(Strict ? 1 : 0);
2067 EVT SrcVT = Src.getValueType();
2075 Flags.setNoFPExcept(
N->getFlags().hasNoFPExcept());
2080 if (SrcVT.
bitsLE(MVT::i32)) {
2085 {Chain, Src}, Flags);
2086 Chain =
Hi.getValue(1);
2088 Hi = DAG.
getNode(
N->getOpcode(), dl, NVT, Src);
2091 if (SrcVT.
bitsLE(MVT::i64)) {
2094 LC = RTLIB::SINTTOFP_I64_PPCF128;
2095 }
else if (SrcVT.
bitsLE(MVT::i128)) {
2097 LC = RTLIB::SINTTOFP_I128_PPCF128;
2099 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported XINT_TO_FP!");
2103 std::pair<SDValue, SDValue> Tmp =
2104 TLI.
makeLibCall(DAG, LC, VT, Src, CallOptions, dl, Chain);
2107 GetPairElements(Tmp.first,
Lo,
Hi);
2113 ReplaceValueWith(
SDValue(
N, 1), Chain);
2123 SrcVT = Src.getValueType();
2126 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
2127 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
2128 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
2150 {Chain, Hi, NewLo}, Flags);
2151 Chain =
Lo.getValue(1);
2152 ReplaceValueWith(
SDValue(
N, 1), Chain);
2157 GetPairElements(
Lo,
Lo,
Hi);
2169bool DAGTypeLegalizer::ExpandFloatOperand(
SDNode *
N,
unsigned OpNo) {
2174 if (CustomLowerNode(
N,
N->getOperand(OpNo).getValueType(),
false))
2177 switch (
N->getOpcode()) {
2180 dbgs() <<
"ExpandFloatOperand Op #" << OpNo <<
": ";
2181 N->dump(&DAG);
dbgs() <<
"\n";
2189 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(
N);
break;
2197 case ISD::LROUND: Res = ExpandFloatOp_LROUND(
N);
break;
2199 case ISD::LRINT: Res = ExpandFloatOp_LRINT(
N);
break;
2200 case ISD::LLRINT: Res = ExpandFloatOp_LLRINT(
N);
break;
2204 case ISD::SETCC: Res = ExpandFloatOp_SETCC(
N);
break;
2205 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(
N),
2210 if (!Res.
getNode())
return false;
2218 "Invalid operand expansion");
2220 ReplaceValueWith(
SDValue(
N, 0), Res);
2226void DAGTypeLegalizer::FloatExpandSetCCOperands(
SDValue &NewLHS,
2231 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
2232 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
2233 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
2242 SDValue Tmp1, Tmp2, Tmp3, OutputChain;
2247 RHSLo, CCCode, OutputChain, IsSignaling);
2255 RHSHi, CCCode, OutputChain, IsSignaling);
2260 Chain = OutputChain;
2264 SDValue NewLHS =
N->getOperand(2), NewRHS =
N->getOperand(3);
2265 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(1))->get();
2267 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode,
SDLoc(
N), Chain);
2279 N->getOperand(4)), 0);
2283 assert(
N->getOperand(1).getValueType() == MVT::ppcf128 &&
2284 "Logic only correct for ppcf128!");
2286 GetExpandedFloat(
N->getOperand(1),
Lo,
Hi);
2290 N->getValueType(0),
N->getOperand(0),
Hi);
2294 bool IsStrict =
N->isStrictFPOpcode();
2295 assert(
N->getOperand(IsStrict ? 1 : 0).getValueType() == MVT::ppcf128 &&
2296 "Logic only correct for ppcf128!");
2298 GetExpandedFloat(
N->getOperand(IsStrict ? 1 : 0),
Lo,
Hi);
2303 N->getValueType(0),
Hi,
N->getOperand(1));
2307 if (
Hi.getValueType() ==
N->getValueType(0)) {
2309 ReplaceValueWith(
SDValue(
N, 1),
N->getOperand(0));
2315 {
N->getValueType(0), MVT::Other},
2316 {
N->getOperand(0),
Hi,
N->getOperand(2)});
2323 EVT RVT =
N->getValueType(0);
2326 bool IsStrict =
N->isStrictFPOpcode();
2329 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
2335 "Unsupported FP_TO_XINT!");
2337 std::pair<SDValue, SDValue> Tmp =
2342 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
2343 ReplaceValueWith(
SDValue(
N, 0), Tmp.first);
2348 SDValue NewLHS =
N->getOperand(0), NewRHS =
N->getOperand(1);
2349 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(4))->get();
2351 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode,
SDLoc(
N), Chain);
2362 N->getOperand(2),
N->getOperand(3),
2367 bool IsStrict =
N->isStrictFPOpcode();
2368 SDValue NewLHS =
N->getOperand(IsStrict ? 1 : 0);
2369 SDValue NewRHS =
N->getOperand(IsStrict ? 2 : 1);
2372 cast<CondCodeSDNode>(
N->getOperand(IsStrict ? 3 : 2))->get();
2373 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode,
SDLoc(
N), Chain,
2379 "Unexpected setcc expansion!");
2381 ReplaceValueWith(
SDValue(
N, 0), NewLHS);
2382 ReplaceValueWith(
SDValue(
N, 1), Chain);
2388SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(
SDNode *
N,
unsigned OpNo) {
2390 return ExpandOp_NormalStore(
N, OpNo);
2393 assert(OpNo == 1 &&
"Can only expand the stored value so far");
2400 ST->getValue().getValueType());
2402 assert(
ST->getMemoryVT().bitsLE(NVT) &&
"Float type not round?");
2406 GetExpandedOp(
ST->getValue(),
Lo,
Hi);
2409 ST->getMemoryVT(),
ST->getMemOperand());
2413 EVT RVT =
N->getValueType(0);
2414 EVT RetVT =
N->getOperand(0).getValueType();
2421 RTLIB::LROUND_PPCF128),
2422 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2426 EVT RVT =
N->getValueType(0);
2427 EVT RetVT =
N->getOperand(0).getValueType();
2433 RTLIB::LLROUND_F128,
2434 RTLIB::LLROUND_PPCF128),
2435 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2439 EVT RVT =
N->getValueType(0);
2440 EVT RetVT =
N->getOperand(0).getValueType();
2447 RTLIB::LRINT_PPCF128),
2448 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2452 EVT RVT =
N->getValueType(0);
2453 EVT RetVT =
N->getOperand(0).getValueType();
2460 RTLIB::LLRINT_PPCF128),
2461 RVT,
N->getOperand(0), CallOptions,
SDLoc(
N)).first;
2470 if (OpVT == MVT::f16)
2472 if (RetVT == MVT::f16)
2474 if (OpVT == MVT::bf16)
2476 if (RetVT == MVT::bf16)
2482 if (OpVT == MVT::f16)
2484 if (RetVT == MVT::f16)
2486 if (OpVT == MVT::bf16)
2488 if (RetVT == MVT::bf16)
2493bool DAGTypeLegalizer::PromoteFloatOperand(
SDNode *
N,
unsigned OpNo) {
2494 LLVM_DEBUG(
dbgs() <<
"Promote float operand " << OpNo <<
": ";
N->dump(&DAG));
2497 if (CustomLowerNode(
N,
N->getOperand(OpNo).getValueType(),
false)) {
2508 switch (
N->getOpcode()) {
2511 dbgs() <<
"PromoteFloatOperand Op #" << OpNo <<
": ";
2512 N->dump(&DAG);
dbgs() <<
"\n";
2518 R = PromoteFloatOp_FAKE_USE(
N, OpNo);
2526 case ISD::LLRINT:
R = PromoteFloatOp_UnaryOp(
N, OpNo);
break;
2529 R = PromoteFloatOp_FP_TO_XINT_SAT(
N, OpNo);
break;
2532 R = PromoteFloatOp_STRICT_FP_EXTEND(
N, OpNo);
2535 case ISD::SETCC:
R = PromoteFloatOp_SETCC(
N, OpNo);
break;
2536 case ISD::STORE:
R = PromoteFloatOp_STORE(
N, OpNo);
break;
2542 ReplaceValueWith(
SDValue(
N, 0), R);
2546SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(
SDNode *
N,
unsigned OpNo) {
2548 EVT OpVT =
Op->getValueType(0);
2550 SDValue Promoted = GetPromotedFloat(
N->getOperand(0));
2559 return DAG.
getBitcast(
N->getValueType(0), Convert);
2562SDValue DAGTypeLegalizer::PromoteFloatOp_FAKE_USE(
SDNode *
N,
unsigned OpNo) {
2563 assert(OpNo == 1 &&
"Only Operand 1 must need promotion here");
2564 SDValue Op = GetPromotedFloat(
N->getOperand(OpNo));
2565 return DAG.
getNode(
N->getOpcode(),
SDLoc(
N), MVT::Other,
N->getOperand(0),
2571SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(
SDNode *
N,
unsigned OpNo) {
2572 assert (OpNo == 1 &&
"Only Operand 1 must need promotion here");
2573 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2576 N->getOperand(0), Op1);
2580SDValue DAGTypeLegalizer::PromoteFloatOp_UnaryOp(
SDNode *
N,
unsigned OpNo) {
2581 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2585SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT_SAT(
SDNode *
N,
2587 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2592SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(
SDNode *
N,
unsigned OpNo) {
2593 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2594 EVT VT =
N->getValueType(0);
2597 if (VT ==
Op->getValueType(0))
2604SDValue DAGTypeLegalizer::PromoteFloatOp_STRICT_FP_EXTEND(
SDNode *
N,
2606 assert(OpNo == 1 &&
"Promoting unpromotable operand");
2608 SDValue Op = GetPromotedFloat(
N->getOperand(1));
2609 EVT VT =
N->getValueType(0);
2612 if (VT ==
Op->getValueType(0)) {
2613 ReplaceValueWith(
SDValue(
N, 1),
N->getOperand(0));
2619 N->getOperand(0),
Op);
2627SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(
SDNode *
N,
unsigned OpNo) {
2632 LHS, RHS,
N->getOperand(2),
N->getOperand(3),
2638SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(
SDNode *
N,
unsigned OpNo) {
2639 EVT VT =
N->getValueType(0);
2640 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2641 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2642 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(2))->get();
2650SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(
SDNode *
N,
unsigned OpNo) {
2655 SDValue Promoted = GetPromotedFloat(Val);
2656 EVT VT =
ST->getOperand(1).getValueType();
2663 return DAG.
getStore(
ST->getChain(),
DL, NewVal,
ST->getBasePtr(),
2664 ST->getMemOperand());
2673 SDValue Promoted = GetPromotedFloat(Val);
2674 EVT VT =
ST->getOperand(1).getValueType();
2681 ST->getBasePtr(),
ST->getMemOperand());
2688void DAGTypeLegalizer::PromoteFloatResult(
SDNode *
N,
unsigned ResNo) {
2689 LLVM_DEBUG(
dbgs() <<
"Promote float result " << ResNo <<
": ";
N->dump(&DAG));
2693 if (CustomLowerNode(
N,
N->getValueType(ResNo),
true)) {
2698 switch (
N->getOpcode()) {
2705 dbgs() <<
"PromoteFloatResult #" << ResNo <<
": ";
2706 N->dump(&DAG);
dbgs() <<
"\n";
2713 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(
N);
break;
2760 case ISD::FSUB:
R = PromoteFloatRes_BinOp(
N);
break;
2763 case ISD::FMAD:
R = PromoteFloatRes_FMAD(
N);
break;
2770 R = PromoteFloatRes_UnaryWithTwoFPResults(
N);
2775 R = PromoteFloatRes_STRICT_FP_ROUND(
N);
2777 case ISD::LOAD:
R = PromoteFloatRes_LOAD(
N);
break;
2779 R = PromoteFloatRes_ATOMIC_LOAD(
N);
2794 R = PromoteFloatRes_VECREDUCE(
N);
2798 R = PromoteFloatRes_VECREDUCE_SEQ(
N);
2803 SetPromotedFloat(
SDValue(
N, ResNo), R);
2812 EVT VT =
N->getValueType(0);
2817 N->getOperand(0).getValueType().getSizeInBits());
2824 EVT VT =
N->getValueType(0);
2843SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(
SDNode *
N) {
2848 if (isa<ConstantSDNode>(
N->getOperand(1))) {
2856 switch (getTypeAction(VecVT)) {
2859 SDValue Res = GetScalarizedVector(
N->getOperand(0));
2860 ReplaceValueWith(
SDValue(
N, 0), Res);
2864 Vec = GetWidenedVector(Vec);
2866 ReplaceValueWith(
SDValue(
N, 0), Res);
2871 GetSplitVector(Vec,
Lo,
Hi);
2873 uint64_t LoElts =
Lo.getValueType().getVectorNumElements();
2875 if (IdxVal < LoElts)
2880 Idx.getValueType()));
2881 ReplaceValueWith(
SDValue(
N, 0), Res);
2889 SDValue NewOp = BitConvertVectorToIntegerVector(
N->getOperand(0));
2894 NewOp,
N->getOperand(1));
2897 EVT VT =
N->getValueType(0);
2906 EVT VT =
N->getValueType(0);
2908 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2919 EVT VT =
N->getValueType(0);
2921 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2930 EVT VT =
N->getValueType(0);
2932 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2933 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2934 return DAG.
getNode(
N->getOpcode(),
SDLoc(
N), NVT, Op0, Op1,
N->getFlags());
2938 EVT VT =
N->getValueType(0);
2940 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2941 SDValue Op1 = GetPromotedFloat(
N->getOperand(1));
2942 SDValue Op2 = GetPromotedFloat(
N->getOperand(2));
2944 return DAG.
getNode(
N->getOpcode(),
SDLoc(
N), NVT, Op0, Op1, Op2);
2949 EVT VT =
N->getValueType(0);
2951 SDValue Op0 = GetPromotedFloat(
N->getOperand(0));
2958 EVT VT =
N->getValueType(0);
2960 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2968SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryWithTwoFPResults(
SDNode *
N) {
2969 EVT VT =
N->getValueType(0);
2971 SDValue Op = GetPromotedFloat(
N->getOperand(0));
2974 for (
unsigned ResNum = 0, NumValues =
N->getNumValues(); ResNum < NumValues;
2988 EVT VT =
N->getValueType(0);
2989 EVT OpVT =
Op->getValueType(0);
3001SDValue DAGTypeLegalizer::PromoteFloatRes_STRICT_FP_ROUND(
SDNode *
N) {
3006 EVT VT =
N->getValueType(0);
3007 EVT OpVT =
Op->getValueType(0);
3024 EVT VT =
N->getValueType(0);
3029 L->getAddressingMode(),
L->getExtensionType(), IVT,
SDLoc(
N),
3030 L->getChain(),
L->getBasePtr(),
L->getOffset(),
L->getPointerInfo(), IVT,
3031 L->getOriginalAlign(),
L->getMemOperand()->getFlags(),
L->getAAInfo());
3041SDValue DAGTypeLegalizer::PromoteFloatRes_ATOMIC_LOAD(
SDNode *
N) {
3066 N->getOperand(0), TrueVal, FalseVal);
3076 TrueVal.getNode()->getValueType(0),
N->getOperand(0),
3077 N->getOperand(1), TrueVal, FalseVal,
N->getOperand(4));
3084 EVT VT =
N->getValueType(0);
3096 N->getValueType(0)));
3108SDValue DAGTypeLegalizer::PromoteFloatRes_VECREDUCE_SEQ(
SDNode *
N) {
3114 EVT VT =
N->getValueType(0);
3125 { AM->getChain(), AM->getBasePtr(), CastVal },
3148void DAGTypeLegalizer::SoftPromoteHalfResult(
SDNode *
N,
unsigned ResNo) {
3149 LLVM_DEBUG(
dbgs() <<
"Soft promote half result " << ResNo <<
": ";
3154 if (CustomLowerNode(
N,
N->getValueType(ResNo),
true)) {
3159 switch (
N->getOpcode()) {
3162 dbgs() <<
"SoftPromoteHalfResult #" << ResNo <<
": ";
3163 N->dump(&DAG);
dbgs() <<
"\n";
3169 R = SoftPromoteHalfRes_ARITH_FENCE(
N);
break;
3173 R = SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(
N);
break;
3221 case ISD::FSUB:
R = SoftPromoteHalfRes_BinOp(
N);
break;
3224 case ISD::FMAD:
R = SoftPromoteHalfRes_FMAD(
N);
break;
3232 R = SoftPromoteHalfRes_UnaryWithTwoFPResults(
N);
3235 case ISD::LOAD:
R = SoftPromoteHalfRes_LOAD(
N);
break;
3237 R = SoftPromoteHalfRes_ATOMIC_LOAD(
N);
3245 case ISD::UNDEF:
R = SoftPromoteHalfRes_UNDEF(
N);
break;
3253 R = SoftPromoteHalfRes_VECREDUCE(
N);
3257 R = SoftPromoteHalfRes_VECREDUCE_SEQ(
N);
3262 SetSoftPromotedHalf(
SDValue(
N, ResNo), R);
3265SDValue DAGTypeLegalizer::SoftPromoteHalfRes_ARITH_FENCE(
SDNode *
N) {
3267 BitConvertToInteger(
N->getOperand(0)));
3271 return BitConvertToInteger(
N->getOperand(0));
3274SDValue DAGTypeLegalizer::SoftPromoteHalfRes_ConstantFP(
SDNode *
N) {
3282SDValue DAGTypeLegalizer::SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(
SDNode *
N) {
3283 SDValue NewOp = BitConvertVectorToIntegerVector(
N->getOperand(0));
3289SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FCOPYSIGN(
SDNode *
N) {
3290 SDValue LHS = GetSoftPromotedHalf(
N->getOperand(0));
3291 SDValue RHS = BitConvertToInteger(
N->getOperand(1));
3294 EVT LVT =
LHS.getValueType();
3295 EVT RVT =
RHS.getValueType();
3316 }
else if (SizeDiff < 0) {
3338 EVT OVT =
N->getValueType(0);
3340 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
3341 SDValue Op1 = GetSoftPromotedHalf(
N->getOperand(1));
3342 SDValue Op2 = GetSoftPromotedHalf(
N->getOperand(2));
3347 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3348 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3349 Op2 = DAG.
getNode(PromotionOpcode, dl, NVT, Op2);
3358 EVT OVT =
N->getValueType(0);
3360 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
3374 EVT OVT =
N->getValueType(0);
3376 SDValue Op = GetSoftPromotedHalf(
N->getOperand(0));
3391SDValue DAGTypeLegalizer::SoftPromoteHalfRes_UnaryWithTwoFPResults(
SDNode *
N) {
3392 EVT OVT =
N->getValueType(0);
3394 SDValue Op = GetSoftPromotedHalf(
N->getOperand(0));
3403 for (
unsigned ResNum = 0, NumValues =
N->getNumValues(); ResNum < NumValues;
3406 SetSoftPromotedHalf(
SDValue(
N, ResNum), Trunc);
3412SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FP_ROUND(
SDNode *
N) {
3413 EVT RVT =
N->getValueType(0);
3414 bool IsStrict =
N->isStrictFPOpcode();
3415 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
3416 EVT SVT =
Op.getValueType();
3422 assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unsupported FP_ROUND libcall");
3425 Op = GetSoftenedFloat(
Op);
3428 std::pair<SDValue, SDValue> Tmp =
3431 ReplaceValueWith(
SDValue(
N, 1), Tmp.second);
3437 {MVT::i16, MVT::Other}, {
N->getOperand(0),
Op});
3452 DAG.
getLoad(
L->getAddressingMode(),
L->getExtensionType(), MVT::i16,
3453 SDLoc(
N),
L->getChain(),
L->getBasePtr(),
L->getOffset(),
3454 L->getPointerInfo(), MVT::i16,
L->getOriginalAlign(),
3455 L->getMemOperand()->getFlags(),
L->getAAInfo());
3462SDValue DAGTypeLegalizer::SoftPromoteHalfRes_ATOMIC_LOAD(
SDNode *
N) {
3477 SDValue Op1 = GetSoftPromotedHalf(
N->getOperand(1));
3478 SDValue Op2 = GetSoftPromotedHalf(
N->getOperand(2));
3483SDValue DAGTypeLegalizer::SoftPromoteHalfRes_SELECT_CC(
SDNode *
N) {
3484 SDValue Op2 = GetSoftPromotedHalf(
N->getOperand(2));
3485 SDValue Op3 = GetSoftPromotedHalf(
N->getOperand(3));
3487 N->getOperand(0),
N->getOperand(1), Op2, Op3,
3491SDValue DAGTypeLegalizer::SoftPromoteHalfRes_XINT_TO_FP(
SDNode *
N) {
3492 EVT OVT =
N->getValueType(0);
3496 if (
N->isStrictFPOpcode()) {
3498 {N->getOperand(0), N->getOperand(1)});
3500 {MVT::i16, MVT::Other}, {
Op.getValue(1),
Op});
3501 ReplaceValueWith(
SDValue(
N, 1),
Op.getValue(1));
3516 EVT OVT =
N->getValueType(0);
3518 SDValue Op = GetSoftPromotedHalf(
N->getOperand(0));
3531 EVT OVT =
N->getValueType(0);
3533 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
3534 SDValue Op1 = GetSoftPromotedHalf(
N->getOperand(1));
3539 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3540 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3548SDValue DAGTypeLegalizer::SoftPromoteHalfRes_VECREDUCE(
SDNode *
N) {
3554SDValue DAGTypeLegalizer::SoftPromoteHalfRes_VECREDUCE_SEQ(
SDNode *
N) {
3564bool DAGTypeLegalizer::SoftPromoteHalfOperand(
SDNode *
N,
unsigned OpNo) {
3565 LLVM_DEBUG(
dbgs() <<
"Soft promote half operand " << OpNo <<
": ";
3569 if (CustomLowerNode(
N,
N->getOperand(OpNo).getValueType(),
false)) {
3579 switch (
N->getOpcode()) {
3582 dbgs() <<
"SoftPromoteHalfOperand Op #" << OpNo <<
": ";
3583 N->dump(&DAG);
dbgs() <<
"\n";
3588 case ISD::BITCAST: Res = SoftPromoteHalfOp_BITCAST(
N);
break;
3590 Res = SoftPromoteHalfOp_FAKE_USE(
N, OpNo);
3592 case ISD::FCOPYSIGN: Res = SoftPromoteHalfOp_FCOPYSIGN(
N, OpNo);
break;
3599 Res = SoftPromoteHalfOp_FP_TO_XINT_SAT(
N);
break;
3602 case ISD::SELECT_CC: Res = SoftPromoteHalfOp_SELECT_CC(
N, OpNo);
break;
3603 case ISD::SETCC: Res = SoftPromoteHalfOp_SETCC(
N);
break;
3604 case ISD::STORE: Res = SoftPromoteHalfOp_STORE(
N, OpNo);
break;
3606 Res = SoftPromoteHalfOp_ATOMIC_STORE(
N, OpNo);
3609 Res = SoftPromoteHalfOp_STACKMAP(
N, OpNo);
3612 Res = SoftPromoteHalfOp_PATCHPOINT(
N, OpNo);
3622 "Invalid operand expansion");
3624 ReplaceValueWith(
SDValue(
N, 0), Res);
3629 SDValue Op0 = GetSoftPromotedHalf(
N->getOperand(0));
3634SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FAKE_USE(
SDNode *
N,
unsigned OpNo) {
3635 assert(OpNo == 1 &&
"Only Operand 1 must need promotion here");
3636 SDValue Op = GetSoftPromotedHalf(
N->getOperand(OpNo));
3637 return DAG.
getNode(
N->getOpcode(),
SDLoc(
N), MVT::Other,
N->getOperand(0),
3643 assert(OpNo == 1 &&
"Only Operand 1 must need promotion here");
3650 Op1 = GetSoftPromotedHalf(Op1);
3653 return DAG.
getNode(
N->getOpcode(), dl,
N->getValueType(0),
N->getOperand(0),
3657SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FP_EXTEND(
SDNode *
N) {
3658 EVT RVT =
N->getValueType(0);
3659 bool IsStrict =
N->isStrictFPOpcode();
3660 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
3661 EVT SVT =
Op.getValueType();
3662 Op = GetSoftPromotedHalf(
N->getOperand(IsStrict ? 1 : 0));
3666 {RVT, MVT::Other}, {
N->getOperand(0),
Op});
3668 ReplaceValueWith(
SDValue(
N, 0), Res);
3675SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FP_TO_XINT(
SDNode *
N) {
3676 EVT RVT =
N->getValueType(0);
3677 bool IsStrict =
N->isStrictFPOpcode();
3678 SDValue Op =
N->getOperand(IsStrict ? 1 : 0);
3679 EVT SVT =
Op.getValueType();
3683 Op = GetSoftPromotedHalf(
Op);
3687 {
N->getOperand(0),
Op});
3688 Op = DAG.
getNode(
N->getOpcode(), dl, {RVT, MVT::Other},
3689 {Op.getValue(1), Op});
3690 ReplaceValueWith(
SDValue(
N, 1),
Op.getValue(1));
3696 return DAG.
getNode(
N->getOpcode(), dl, RVT, Res);
3699SDValue DAGTypeLegalizer::SoftPromoteHalfOp_FP_TO_XINT_SAT(
SDNode *
N) {
3700 EVT RVT =
N->getValueType(0);
3702 EVT SVT =
Op.getValueType();
3707 Op = GetSoftPromotedHalf(
Op);
3711 return DAG.
getNode(
N->getOpcode(), dl,
N->getValueType(0), Res,
3717 assert(OpNo == 0 &&
"Can only soften the comparison values");
3725 Op0 = GetSoftPromotedHalf(Op0);
3726 Op1 = GetSoftPromotedHalf(Op1);
3730 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3731 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3734 N->getOperand(2),
N->getOperand(3),
N->getOperand(4));
3740 ISD::CondCode CCCode = cast<CondCodeSDNode>(
N->getOperand(2))->get();
3746 Op0 = GetSoftPromotedHalf(Op0);
3747 Op1 = GetSoftPromotedHalf(Op1);
3751 Op0 = DAG.
getNode(PromotionOpcode, dl, NVT, Op0);
3752 Op1 = DAG.
getNode(PromotionOpcode, dl, NVT, Op1);
3757SDValue DAGTypeLegalizer::SoftPromoteHalfOp_STORE(
SDNode *
N,
unsigned OpNo) {
3758 assert(OpNo == 1 &&
"Can only soften the stored value!");
3763 assert(!
ST->isTruncatingStore() &&
"Unexpected truncating store.");
3764 SDValue Promoted = GetSoftPromotedHalf(Val);
3765 return DAG.
getStore(
ST->getChain(), dl, Promoted,
ST->getBasePtr(),
3766 ST->getMemOperand());
3769SDValue DAGTypeLegalizer::SoftPromoteHalfOp_ATOMIC_STORE(
SDNode *
N,
3771 assert(OpNo == 1 &&
"Can only soften the stored value!");
3776 SDValue Promoted = GetSoftPromotedHalf(Val);
3778 ST->getChain(), Promoted,
ST->getBasePtr(),
3779 ST->getMemOperand());
3782SDValue DAGTypeLegalizer::SoftPromoteHalfOp_STACKMAP(
SDNode *
N,
unsigned OpNo) {
3786 NewOps[OpNo] = GetSoftPromotedHalf(
Op);
3790 for (
unsigned ResNum = 0; ResNum <
N->getNumValues(); ResNum++)
3801 NewOps[OpNo] = GetSoftPromotedHalf(
Op);
3805 for (
unsigned ResNum = 0; ResNum <
N->getNumValues(); ResNum++)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static bool isSigned(unsigned int Opcode)
static RTLIB::Libcall findFPToIntLibcall(EVT SrcVT, EVT RetVT, EVT &Promoted, bool Signed)
static RTLIB::Libcall GetFPLibCall(EVT VT, RTLIB::Libcall Call_F32, RTLIB::Libcall Call_F64, RTLIB::Libcall Call_F80, RTLIB::Libcall Call_F128, RTLIB::Libcall Call_PPCF128)
GetFPLibCall - Return the right libcall for the given floating point type.
static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT)
static ISD::NodeType GetPromotionOpcodeStrict(EVT OpVT, EVT RetVT)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static Type * getValueType(Value *V)
Returns the type of the given value/instruction V.
APInt bitcastToAPInt() const
static APFloat getZero(const fltSemantics &Sem, bool Negative=false)
Factory for Positive and Negative Zero.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
const uint64_t * getRawData() const
This function returns a pointer to the internal storage of the APInt.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
This is an SDNode representing atomic operations.
const SDValue & getVal() const
const APFloat & getValueAPF() const
@ NewNode
This is a new node, not before seen, that was created in the process of legalizing some other node.
This class represents an Operation in the Expression.
void emitError(const Instruction *I, const Twine &ErrorStr)
emitError - Emit an error message to the currently installed error handler with optional location inf...
This class is used to represent ISD::LOAD nodes.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOInvariant
The memory access always returns the same value (or traps).
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDNode * getNode() const
get the SDNode which holds the desired result
SDValue getValue(unsigned R) const
EVT getValueType() const
Return the ValueType of the referenced return value.
SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL)
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond, SDValue Chain=SDValue(), bool IsSignaling=false)
Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SD...
SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT, bool isTarget=false)
Create a ConstantFPSDNode wrapping a constant value.
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands,...
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO)
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands.
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
SDValue getBitcast(EVT VT, SDValue V)
Return a bitcast using the SDLoc of the value operand, and casting to the provided type.
SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS, SDNodeFlags Flags=SDNodeFlags())
Helper function to make it easier to build Select's if you just have operands and don't want to check...
const DataLayout & getDataLayout() const
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input.
SDValue getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
SDValue getSelectCC(const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond)
Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an...
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
const TargetLibraryInfo & getLibInfo() const
MachineFunction & getMachineFunction() const
SDValue getCondCode(ISD::CondCode Cond)
LLVMContext * getContext() const
SDValue CreateStackTemporary(TypeSize Bytes, Align Alignment)
Create a stack temporary based on the size in bytes and the alignment.
SDNode * UpdateNodeOperands(SDNode *N, SDValue Op)
Mutate the specified node in-place to have the specified operands.
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This class is used to represent ISD::STORE nodes.
unsigned getIntSize() const
Get size of a C-level int or unsigned int, in bits.
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const
Returns the type for the shift amount of a shift opcode.
virtual EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
const char * getLibcallName(RTLIB::Libcall Call) const
Get the libcall routine name for the specified libcall.
void softenSetCCOperands(SelectionDAG &DAG, EVT VT, SDValue &NewLHS, SDValue &NewRHS, ISD::CondCode &CCCode, const SDLoc &DL, const SDValue OldLHS, const SDValue OldRHS) const
Soften the operands of a comparison.
std::pair< SDValue, SDValue > makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, ArrayRef< SDValue > Ops, MakeLibCallOptions CallOptions, const SDLoc &dl, SDValue Chain=SDValue()) const
Returns a pair of (return value, chain).
SDValue expandVecReduceSeq(SDNode *Node, SelectionDAG &DAG) const
Expand a VECREDUCE_SEQ_* into an explicit ordered calculation.
SDValue expandFP_TO_INT_SAT(SDNode *N, SelectionDAG &DAG) const
Expand FP_TO_[US]INT_SAT into FP_TO_[US]INT and selects or min/max.
SDValue expandVecReduce(SDNode *Node, SelectionDAG &DAG) const
Expand a VECREDUCE_* into an explicit calculation.
SDValue createSelectForFMINNUM_FMAXNUM(SDNode *Node, SelectionDAG &DAG) const
Try to convert the fminnum/fmaxnum to a compare/select sequence.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
@ C
The default llvm calling convention, compatible with C.
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
@ FADD
Simple binary floating point operators.
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
@ SIGN_EXTEND
Conversion operators.
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ FNEG
Perform various unary floating-point operations inspired by libm.
@ BR_CC
BR_CC - Conditional branch.
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
@ UNDEF
UNDEF - An undefined node.
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
@ ARITH_FENCE
ARITH_FENCE - This corresponds to a arithmetic fence intrinsic.
@ SHL
Shift and rotation operations.
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
@ AND
Bitwise operators - logical and, logical or, logical xor.
@ STRICT_FADD
Constrained versions of the binary floating point operators.
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
bool isNormalStore(const SDNode *N)
Returns true if the specified node is a non-truncating and unindexed store.
bool isUNINDEXEDLoad(const SDNode *N)
Returns true if the specified node is an unindexed load.
bool isUNINDEXEDStore(const SDNode *N)
Returns true if the specified node is an unindexed store.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
bool isNormalLoad(const SDNode *N)
Returns true if the specified node is a non-extending and unindexed load.
Libcall getFSINCOS(EVT RetVT)
getFSINCOS - Return the FSINCOS_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getPOWI(EVT RetVT)
getPOWI - Return the POWI_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getSINTTOFP(EVT OpVT, EVT RetVT)
getSINTTOFP - Return the SINTTOFP_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getLDEXP(EVT RetVT)
getLDEXP - Return the LDEXP_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getUINTTOFP(EVT OpVT, EVT RetVT)
getUINTTOFP - Return the UINTTOFP_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFREXP(EVT RetVT)
getFREXP - Return the FREXP_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit.
Libcall getFPTOUINT(EVT OpVT, EVT RetVT)
getFPTOUINT - Return the FPTOUINT_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFPTOSINT(EVT OpVT, EVT RetVT)
getFPTOSINT - Return the FPTOSINT_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFPEXT(EVT OpVT, EVT RetVT)
getFPEXT - Return the FPEXT_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
Libcall getFPROUND(EVT OpVT, EVT RetVT)
getFPROUND - Return the FPROUND_*_* value for the given types, or UNKNOWN_LIBCALL if there is none.
DiagnosticInfoOptimizationBase::Argument NV
This is an optimization pass for GlobalISel generic memory operations.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
DWARFExpression::Operation Op
static const fltSemantics & PPCDoubleDouble() LLVM_READNONE
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
TypeSize getSizeInBits() const
Return the size of the specified value type in bits.
bool isByteSized() const
Return true if the bit size is a multiple of 8.
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
bool bitsGE(EVT VT) const
Return true if this has no less bits than VT.
EVT getVectorElementType() const
Given a vector type, return the type of each element.
const fltSemantics & getFltSemantics() const
Returns an APFloat semantics tag appropriate for the value type.
bool bitsLE(EVT VT) const
Return true if this has no more bits than VT.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
These are IR-level optimization flags that may be propagated to SDNodes.
This structure is used to pass arguments to makeLibCall function.
MakeLibCallOptions & setIsSigned(bool Value=true)
MakeLibCallOptions & setTypeListBeforeSoften(ArrayRef< EVT > OpsVT, EVT RetVT, bool Value=true)