15#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
16#define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
67 bool isTypeLegal(
EVT VT)
const {
68 return TLI.getTypeAction(*DAG.
getContext(), VT) == TargetLowering::TypeLegal;
72 bool isSimpleLegalType(
EVT VT)
const {
73 return VT.
isSimple() && TLI.isTypeLegal(VT);
76 EVT getSetCCResultType(
EVT VT)
const {
81 bool IgnoreNodeResults(
SDNode *
N)
const {
89 typedef unsigned TableId;
91 TableId NextValueId = 1;
140 TableId getTableId(
SDValue V) {
141 assert(
V.getNode() &&
"Getting TableId on SDValue()");
143 auto I = ValueToIdMap.
find(V);
144 if (
I != ValueToIdMap.
end()) {
147 assert(
I->second &&
"All Ids should be nonzero");
151 ValueToIdMap.
insert(std::make_pair(V, NextValueId));
152 IdToValueMap.
insert(std::make_pair(NextValueId, V));
154 assert(NextValueId != 0 &&
155 "Ran out of Ids. Increase id type size or add compactification");
156 return NextValueId - 1;
159 const SDValue &getSDValue(TableId &Id) {
161 assert(Id &&
"TableId should be non-zero");
162 auto I = IdToValueMap.
find(Id);
163 assert(
I != IdToValueMap.
end() &&
"cannot find Id in map");
169 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
170 ValueTypeActions(TLI.getValueTypeActions()) {
179 assert(Old != New &&
"node replaced with self");
180 for (
unsigned i = 0, e = Old->
getNumValues(); i != e; ++i) {
184 if (OldId != NewId) {
185 ReplacedValues[OldId] = NewId;
190 IdToValueMap.
erase(OldId);
191 PromotedIntegers.
erase(OldId);
192 ExpandedIntegers.
erase(OldId);
193 SoftenedFloats.
erase(OldId);
194 PromotedFloats.
erase(OldId);
195 SoftPromotedHalfs.
erase(OldId);
196 ExpandedFloats.
erase(OldId);
197 ScalarizedVectors.
erase(OldId);
198 SplitVectors.
erase(OldId);
199 WidenedVectors.
erase(OldId);
210 void AnalyzeNewValue(
SDValue &Val);
211 void PerformExpensiveChecks();
212 void RemapId(TableId &Id);
219 bool CustomLowerNode(
SDNode *
N,
EVT VT,
bool LegalizeResult);
229 std::pair<SDValue, SDValue> ExpandAtomic(
SDNode *Node);
252 TableId &PromotedId = PromotedIntegers[getTableId(
Op)];
253 SDValue PromotedOp = getSDValue(PromotedId);
261 EVT OldVT =
Op.getValueType();
263 Op = GetPromotedInteger(
Op);
270 EVT OldVT =
Op.getValueType();
272 Op = GetPromotedInteger(
Op);
278 EVT OldVT =
Op.getValueType();
280 Op = GetPromotedInteger(
Op);
282 EVT VT =
Op.getValueType();
286 return DAG.
getNode(ISD::VP_SRA, dl, VT, Shl, ShiftCst, Mask, EVL);
291 EVT OldVT =
Op.getValueType();
293 Op = GetPromotedInteger(
Op);
304 void PromoteIntegerResult(
SDNode *
N,
unsigned ResNo);
366 template <
class MatchContextClass>
380 bool PromoteIntegerOperand(
SDNode *
N,
unsigned OpNo);
442 void ExpandIntegerResult(
SDNode *
N,
unsigned ResNo);
506 bool ExpandIntegerOperand(
SDNode *
N,
unsigned OpNo);
536 TableId
Id = getTableId(
Op);
537 auto Iter = SoftenedFloats.
find(Id);
538 if (Iter == SoftenedFloats.
end()) {
539 assert(isSimpleLegalType(
Op.getValueType()) &&
540 "Operand wasn't converted to integer?");
543 SDValue SoftenedOp = getSDValue(Iter->second);
544 assert(SoftenedOp.
getNode() &&
"Unconverted op in SoftenedFloats?");
550 void SoftenFloatResult(
SDNode *
N,
unsigned ResNo);
559 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(
SDNode *
N,
unsigned ResNo);
608 bool SoftenFloatOperand(
SDNode *
N,
unsigned OpNo);
639 void ExpandFloatResult(
SDNode *
N,
unsigned ResNo);
685 bool ExpandFloatOperand(
SDNode *
N,
unsigned OpNo);
700 SDValue &Chain,
bool IsSignaling =
false);
707 TableId &PromotedId = PromotedFloats[getTableId(
Op)];
708 SDValue PromotedOp = getSDValue(PromotedId);
714 void PromoteFloatResult(
SDNode *
N,
unsigned ResNo);
736 bool PromoteFloatOperand(
SDNode *
N,
unsigned OpNo);
740 SDValue PromoteFloatOp_STRICT_FP_EXTEND(
SDNode *
N,
unsigned OpNo);
753 TableId &PromotedId = SoftPromotedHalfs[getTableId(
Op)];
754 SDValue PromotedOp = getSDValue(PromotedId);
760 void SoftPromoteHalfResult(
SDNode *
N,
unsigned ResNo);
781 bool SoftPromoteHalfOperand(
SDNode *
N,
unsigned OpNo);
802 TableId &ScalarizedId = ScalarizedVectors[getTableId(
Op)];
803 SDValue ScalarizedOp = getSDValue(ScalarizedId);
804 assert(ScalarizedOp.
getNode() &&
"Operand wasn't scalarized?");
810 void ScalarizeVectorResult(
SDNode *
N,
unsigned ResNo);
843 bool ScalarizeVectorOperand(
SDNode *
N,
unsigned OpNo);
875 std::pair<SDValue, SDValue> SplitMask(
SDValue Mask);
878 std::pair<SDValue, SDValue> SplitMask(
SDValue Mask,
const SDLoc &
DL);
886 void SplitVectorResult(
SDNode *
N,
unsigned ResNo);
897 void SplitVecRes_OverflowOp(
SDNode *
N,
unsigned ResNo,
916 bool SplitSETCC =
false);
924 void SplitVecRes_VECTOR_DEINTERLEAVE(
SDNode *
N);
925 void SplitVecRes_VECTOR_INTERLEAVE(
SDNode *
N);
931 bool SplitVectorOperand(
SDNode *
N,
unsigned OpNo);
969 TableId &WidenedId = WidenedVectors[getTableId(
Op)];
970 SDValue WidenedOp = getSDValue(WidenedId);
985 TargetLowering::TypeWidenVector &&
986 "Unable to widen binary VP op");
987 Mask = GetWidenedVector(Mask);
988 assert(
Mask.getValueType().getVectorElementCount() == EC &&
989 "Unable to widen binary VP op");
994 void WidenVectorResult(
SDNode *
N,
unsigned ResNo);
1039 bool WidenVectorOperand(
SDNode *
N,
unsigned OpNo);
1118 if (
Op.getValueType().isVector())
1119 GetSplitVector(
Op,
Lo,
Hi);
1120 else if (
Op.getValueType().isInteger())
1121 GetExpandedInteger(
Op,
Lo,
Hi);
1123 GetExpandedFloat(
Op,
Lo,
Hi);
1131 void SplitRes_MERGE_VALUES(
SDNode *
N,
unsigned ResNo,
1150 if (
Op.getValueType().isInteger())
1151 GetExpandedInteger(
Op,
Lo,
Hi);
1153 GetExpandedFloat(
Op,
Lo,
Hi);
1159 void IntegerToVector(
SDValue Op,
unsigned NumElements,
1163 void ExpandRes_MERGE_VALUES (
SDNode *
N,
unsigned ResNo,
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
BlockVerifier::State From
#define LLVM_LIBRARY_VISIBILITY
This file defines the DenseMap class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file describes how to lower LLVM code to machine code.
support::ulittle16_t & Lo
support::ulittle16_t & Hi
Class for arbitrary precision integers.
This is an SDNode representing atomic operations.
This takes an arbitrary SelectionDAG as input and hacks on it until only value types the target machi...
DAGTypeLegalizer(SelectionDAG &dag)
void NoteDeletion(SDNode *Old, SDNode *New)
SelectionDAG & getDAG() const
NodeIdFlags
This pass uses the NodeId on the SDNodes to hold information about the state of the node.
This class represents an Operation in the Expression.
iterator find(const_arg_type_t< KeyT > Val)
bool erase(const KeyT &Val)
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
This class is used to represent ISD::LOAD nodes.
This class is used to represent an MGATHER node.
This class is used to represent an MLOAD node.
This class is used to represent an MSCATTER node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SDNode * getNode() const
get the SDNode which holds the desired result
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
SDValue getVPZeroExtendInReg(SDValue Op, SDValue Mask, SDValue EVL, const SDLoc &DL, EVT VT)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
const DataLayout & getDataLayout() const
SDValue getValueType(EVT)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
LLVMContext * getContext() const
SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL, bool LegalTypes=true)
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This class is used to represent ISD::STORE nodes.
LegalizeTypeAction getTypeAction(MVT VT) const
LegalizeTypeAction
This enum indicates whether a types are legal for a target, and if not, what action should be used to...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
This class is used to represent an VP_GATHER node.
This class is used to represent a VP_LOAD node.
This class is used to represent a VP_STORE node.
This class is used to represent an EXPERIMENTAL_VP_STRIDED_LOAD node.
This class is used to represent an EXPERIMENTAL_VP_STRIDED_STORE node.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
LoadExtType
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit.
This is an optimization pass for GlobalISel generic memory operations.
DWARFExpression::Operation Op
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
uint64_t getScalarSizeInBits() const
This class contains a discriminated union of information about pointers in memory operands,...