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LLVM 24.0.0git
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#include "llvm/CodeGen/ScheduleDAGInstrs.h"#include "llvm/ADT/IntEqClasses.h"#include "llvm/ADT/MapVector.h"#include "llvm/ADT/SmallVector.h"#include "llvm/ADT/SparseSet.h"#include "llvm/ADT/iterator_range.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/Analysis/ValueTracking.h"#include "llvm/CodeGen/LiveIntervals.h"#include "llvm/CodeGen/LivePhysRegs.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBundle.h"#include "llvm/CodeGen/MachineMemOperand.h"#include "llvm/CodeGen/MachineOperand.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/PseudoSourceValue.h"#include "llvm/CodeGen/RegisterPressure.h"#include "llvm/CodeGen/ScheduleDAG.h"#include "llvm/CodeGen/ScheduleDFS.h"#include "llvm/CodeGen/SlotIndexes.h"#include "llvm/CodeGen/TargetInstrInfo.h"#include "llvm/CodeGen/TargetRegisterInfo.h"#include "llvm/CodeGen/TargetSubtargetInfo.h"#include "llvm/Config/llvm-config.h"#include "llvm/IR/Constants.h"#include "llvm/IR/Function.h"#include "llvm/IR/Type.h"#include "llvm/IR/Value.h"#include "llvm/MC/LaneBitmask.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/Support/Casting.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/Format.h"#include "llvm/Support/raw_ostream.h"#include <algorithm>#include <cassert>#include <iterator>#include <list>#include <utility>#include <vector>Go to the source code of this file.
Classes | |
| class | llvm::ScheduleDAGDependencyBuilder |
| class | llvm::SchedDFSImpl |
| Internal state used to compute SchedDFSResult. More... | |
Namespaces | |
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
Macros | |
| #define | DEBUG_TYPE "machine-scheduler" |
Functions | |
| static bool | getUnderlyingObjectsForInstr (const MachineInstr *MI, const MachineFrameInfo &MFI, UnderlyingObjectsVector &Objects, const DataLayout &DL) |
If this machine instruction has memory reference information, collect the list of underlying objects in Objects. | |
| static void | toggleKills (const MachineRegisterInfo &MRI, LiveRegUnits &LiveRegs, MachineInstr &MI, bool addToLiveRegs) |
| static bool | hasDataSucc (const SUnit *SU) |
Variables | |
| static cl::opt< bool > | EnableAASchedMI ("enable-aa-sched-mi", cl::Hidden, cl::desc("Enable use of AA during MI DAG construction")) |
| static cl::opt< bool > | UseTBAA ("use-tbaa-in-sched-mi", cl::Hidden, cl::init(true), cl::desc("Enable use of TBAA during MI DAG construction")) |
| static cl::opt< bool > | EnableSchedModel ("schedmodel", cl::Hidden, cl::init(true), cl::desc("Use TargetSchedModel for latency lookup")) |
| static cl::opt< bool > | EnableSchedItins ("scheditins", cl::Hidden, cl::init(true), cl::desc("Use InstrItineraryData for latency lookup")) |
| static cl::opt< unsigned > | HugeRegion ("dag-maps-huge-region", cl::Hidden, cl::init(500), cl::desc("The limit to use while constructing the DAG " "prior to scheduling, at which point a trade-off " "is made to avoid excessive compile time. Ignored when " "store-sequencing is enabled.")) |
| static cl::opt< bool > | EnableStoreSequencing ("enable-store-sequencing", cl::Hidden, cl::init(false), cl::desc("Enable the store-sequencing DAG construction algorithm. This can " "eliminate a large number of redundant control dependencies and " "spurious alias analysis queries at the cost of some unnecessary " "dependencies.")) |
| static cl::opt< unsigned > | MaxFrontierSize ("store-sequencing-max-frontier-size", cl::Hidden, cl::init(500), cl::desc("With store-sequencing DAG construction, after the number of " "memops in a frontier reaches this threshold, automatically " "promote the next store and clear the frontier.")) |
| static cl::opt< unsigned > | MaxMemopsInFlight ("store-sequencing-max-memops-in-flight", cl::Hidden, cl::init(3000), cl::desc("With store-sequencing DAG construction, if the occupancy of all " "frontiers reaches this threshold, automatically promote the next " "memory operation to a global memory barrier and clear the " "frontiers.")) |
| static cl::opt< bool > | SchedPrintCycles ("sched-print-cycles", cl::Hidden, cl::init(false), cl::desc("Report top/bottom cycles when dumping SUnit instances")) |
| #define DEBUG_TYPE "machine-scheduler" |
Definition at line 64 of file ScheduleDAGInstrs.cpp.
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If this machine instruction has memory reference information, collect the list of underlying objects in Objects.
If any of these objects are unknown or may alias anything, return false. Atomic and volatile memory operands are skipped.
Definition at line 136 of file ScheduleDAGInstrs.cpp.
References assert(), DL, llvm::getUnderlyingObjectsForCodeGen(), llvm::MachineFrameInfo::hasTailCall(), llvm::isIdentifiedObject(), MI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by llvm::ScheduleDAGDependencyBuilder::buildDeps().
Definition at line 1590 of file ScheduleDAGInstrs.cpp.
References llvm::SDep::Data, llvm::SDep::getKind(), llvm::SDep::getSUnit(), llvm::SUnit::isBoundaryNode(), and llvm::SUnit::Succs.
Referenced by llvm::SchedDFSResult::compute().
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Definition at line 1238 of file ScheduleDAGInstrs.cpp.
Referenced by llvm::ScheduleDAGInstrs::fixupKills().
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Referenced by llvm::ScheduleDAGInstrs::buildSchedGraph().
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Referenced by llvm::ScheduleDAGInstrs::ScheduleDAGInstrs().
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Referenced by llvm::ScheduleDAGInstrs::ScheduleDAGInstrs().
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Referenced by llvm::ScheduleDAGDependencyBuilder::buildDeps().
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Referenced by llvm::ScheduleDAGDependencyBuilder::buildDeps().
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Referenced by llvm::ScheduleDAGDependencyBuilder::buildDeps().
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Referenced by llvm::ScheduleDAGInstrs::dumpNode().