LLVM 22.0.0git
Macros | Functions
WebAssemblyISelLowering.cpp File Reference

This file implements the WebAssemblyTargetLowering class. More...

#include "WebAssemblyISelLowering.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "Utils/WebAssemblyTypeUtilities.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "WebAssemblyTargetMachine.h"
#include "WebAssemblyUtilities.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SDPatternMatch.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/DiagnosticPrinter.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
#include "WebAssemblyISD.def"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "wasm-lower"
 
#define HANDLE_NODETYPE(NODE)
 

Functions

static MachineBasicBlockLowerFPToInt (MachineInstr &MI, DebugLoc DL, MachineBasicBlock *BB, const TargetInstrInfo &TII, bool IsUnsigned, bool Int64, bool Float64, unsigned LoweredOpcode)
 
static MachineBasicBlockLowerMemcpy (MachineInstr &MI, DebugLoc DL, MachineBasicBlock *BB, const TargetInstrInfo &TII, bool Int64)
 
static MachineBasicBlockLowerMemset (MachineInstr &MI, DebugLoc DL, MachineBasicBlock *BB, const TargetInstrInfo &TII, bool Int64)
 
static MachineBasicBlockLowerCallResults (MachineInstr &CallResults, DebugLoc DL, MachineBasicBlock *BB, const WebAssemblySubtarget *Subtarget, const TargetInstrInfo &TII)
 
static void fail (const SDLoc &DL, SelectionDAG &DAG, const char *Msg)
 
static bool callingConvSupported (CallingConv::ID CallConv)
 
static bool IsWebAssemblyGlobal (SDValue Op)
 
static std::optional< unsignedIsWebAssemblyLocal (SDValue Op, SelectionDAG &DAG)
 
SDValue performLowerPartialReduction (SDNode *N, SelectionDAG &DAG)
 
static SDValue GetExtendHigh (SDValue Op, unsigned UserOpc, EVT VT, SelectionDAG &DAG)
 
static SDValue LowerConvertLow (SDValue Op, SelectionDAG &DAG)
 
static SDValue unrollVectorShift (SDValue Op, SelectionDAG &DAG)
 
static SDValue performVECTOR_SHUFFLECombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 
static SDValue performVectorExtendToFPCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 Convert ({u,s}itofp vec) --> ({u,s}itofp ({s,z}ext vec)) so it doesn't get split up into scalar instructions during legalization, and the vector extending instructions are selected in performVectorExtendCombine below.
 
static SDValue performVectorNonNegToFPCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 
static SDValue performVectorExtendCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 
static SDValue performVectorTruncZeroCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 
static SDValue extractSubVector (SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, const SDLoc &DL, unsigned VectorWidth)
 
static SDValue truncateVectorWithNARROW (EVT DstVT, SDValue In, const SDLoc &DL, SelectionDAG &DAG)
 
static SDValue performTruncateCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 
static SDValue performBitcastCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 
static SDValue performAnyAllCombine (SDNode *N, SelectionDAG &DAG)
 
template<int MatchRHS, ISD::CondCode MatchCond, bool RequiresNegate, Intrinsic::ID Intrin>
static SDValue TryMatchTrue (SDNode *N, EVT VecVT, SelectionDAG &DAG)
 
static SDValue combineVectorSizedSetCCEquality (SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const WebAssemblySubtarget *Subtarget)
 Try to convert a i128 comparison to a v16i8 comparison before type legalization splits it up into chunks.
 
static SDValue performSETCCCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const WebAssemblySubtarget *Subtarget)
 
static SDValue TryWideExtMulCombine (SDNode *N, SelectionDAG &DAG)
 
static SDValue performMulCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 

Detailed Description

This file implements the WebAssemblyTargetLowering class.

Definition in file WebAssemblyISelLowering.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "wasm-lower"

Definition at line 42 of file WebAssemblyISelLowering.cpp.

◆ HANDLE_NODETYPE

#define HANDLE_NODETYPE (   NODE)
Value:
case WebAssemblyISD::NODE: \
return "WebAssemblyISD::" #NODE;
#define NODE(NodeKind)

Function Documentation

◆ callingConvSupported()

static bool callingConvSupported ( CallingConv::ID  CallConv)
static

◆ combineVectorSizedSetCCEquality()

static SDValue combineVectorSizedSetCCEquality ( SDNode N,
TargetLowering::DAGCombinerInfo DCI,
const WebAssemblySubtarget Subtarget 
)
static

◆ extractSubVector()

static SDValue extractSubVector ( SDValue  Vec,
unsigned  IdxVal,
SelectionDAG DAG,
const SDLoc DL,
unsigned  VectorWidth 
)
static

◆ fail()

static void fail ( const SDLoc DL,
SelectionDAG DAG,
const char Msg 
)
static

◆ GetExtendHigh()

static SDValue GetExtendHigh ( SDValue  Op,
unsigned  UserOpc,
EVT  VT,
SelectionDAG DAG 
)
static

◆ IsWebAssemblyGlobal()

static bool IsWebAssemblyGlobal ( SDValue  Op)
static

◆ IsWebAssemblyLocal()

static std::optional< unsigned > IsWebAssemblyLocal ( SDValue  Op,
SelectionDAG DAG 
)
static

◆ LowerCallResults()

static MachineBasicBlock * LowerCallResults ( MachineInstr CallResults,
DebugLoc  DL,
MachineBasicBlock BB,
const WebAssemblySubtarget Subtarget,
const TargetInstrInfo TII 
)
static

◆ LowerConvertLow()

static SDValue LowerConvertLow ( SDValue  Op,
SelectionDAG DAG 
)
static

◆ LowerFPToInt()

static MachineBasicBlock * LowerFPToInt ( MachineInstr MI,
DebugLoc  DL,
MachineBasicBlock BB,
const TargetInstrInfo TII,
bool  IsUnsigned,
bool  Int64,
bool  Float64,
unsigned  LoweredOpcode 
)
static

◆ LowerMemcpy()

static MachineBasicBlock * LowerMemcpy ( MachineInstr MI,
DebugLoc  DL,
MachineBasicBlock BB,
const TargetInstrInfo TII,
bool  Int64 
)
static

◆ LowerMemset()

static MachineBasicBlock * LowerMemset ( MachineInstr MI,
DebugLoc  DL,
MachineBasicBlock BB,
const TargetInstrInfo TII,
bool  Int64 
)
static

◆ performAnyAllCombine()

static SDValue performAnyAllCombine ( SDNode N,
SelectionDAG DAG 
)
static

◆ performBitcastCombine()

static SDValue performBitcastCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ performLowerPartialReduction()

SDValue performLowerPartialReduction ( SDNode N,
SelectionDAG DAG 
)

◆ performMulCombine()

static SDValue performMulCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ performSETCCCombine()

static SDValue performSETCCCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI,
const WebAssemblySubtarget Subtarget 
)
static

◆ performTruncateCombine()

static SDValue performTruncateCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ performVECTOR_SHUFFLECombine()

static SDValue performVECTOR_SHUFFLECombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ performVectorExtendCombine()

static SDValue performVectorExtendCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ performVectorExtendToFPCombine()

static SDValue performVectorExtendToFPCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

Convert ({u,s}itofp vec) --> ({u,s}itofp ({s,z}ext vec)) so it doesn't get split up into scalar instructions during legalization, and the vector extending instructions are selected in performVectorExtendCombine below.

Definition at line 2925 of file WebAssemblyISelLowering.cpp.

References assert(), llvm::TargetLowering::DAGCombinerInfo::DAG, llvm::SelectionDAG::getNode(), N, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::UINT_TO_FP, and llvm::ISD::ZERO_EXTEND.

◆ performVectorNonNegToFPCombine()

static SDValue performVectorNonNegToFPCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ performVectorTruncZeroCombine()

static SDValue performVectorTruncZeroCombine ( SDNode N,
TargetLowering::DAGCombinerInfo DCI 
)
static

◆ truncateVectorWithNARROW()

static SDValue truncateVectorWithNARROW ( EVT  DstVT,
SDValue  In,
const SDLoc DL,
SelectionDAG DAG 
)
static

◆ TryMatchTrue()

template<int MatchRHS, ISD::CondCode MatchCond, bool RequiresNegate, Intrinsic::ID Intrin>
static SDValue TryMatchTrue ( SDNode N,
EVT  VecVT,
SelectionDAG DAG 
)
static

◆ TryWideExtMulCombine()

static SDValue TryWideExtMulCombine ( SDNode N,
SelectionDAG DAG 
)
static

◆ unrollVectorShift()

static SDValue unrollVectorShift ( SDValue  Op,
SelectionDAG DAG 
)
static