LLVM 20.0.0git
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#include "Target/ARM/ARMCallLowering.h"
Public Member Functions | |
ARMCallLowering (const ARMTargetLowering &TLI) | |
bool | lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override |
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion. | |
bool | lowerFormalArguments (MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override |
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs , for GlobalISel. | |
bool | lowerCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override |
This hook must be implemented to lower the given call instruction, including argument and return value marshalling. | |
bool | enableBigEndian () const override |
For targets which want to use big-endian can enable it with enableBigEndian() hook. | |
Public Member Functions inherited from llvm::CallLowering | |
CallLowering (const TargetLowering *TLI) | |
virtual | ~CallLowering ()=default |
virtual bool | supportSwiftError () const |
void | insertSRetLoads (MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg, int FI) const |
Load the returned value from the stack into virtual registers in VRegs . | |
void | insertSRetStores (MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg) const |
Store the return value given by VRegs into stack starting at the offset specified in DemoteReg . | |
void | insertSRetIncomingArgument (const Function &F, SmallVectorImpl< ArgInfo > &SplitArgs, Register &DemoteReg, MachineRegisterInfo &MRI, const DataLayout &DL) const |
Insert the hidden sret ArgInfo to the beginning of SplitArgs . | |
void | insertSRetOutgoingArgument (MachineIRBuilder &MIRBuilder, const CallBase &CB, CallLoweringInfo &Info) const |
For the call-base described by CB , insert the hidden sret ArgInfo to the OrigArgs field of Info . | |
bool | checkReturn (CCState &CCInfo, SmallVectorImpl< BaseArgInfo > &Outs, CCAssignFn *Fn) const |
void | getReturnInfo (CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs, SmallVectorImpl< BaseArgInfo > &Outs, const DataLayout &DL) const |
Get the type and the ArgFlags for the split components of RetTy as returned by ComputeValueVTs . | |
bool | checkReturnTypeForCallConv (MachineFunction &MF) const |
Toplevel function to check the return type based on the target calling convention. | |
virtual bool | canLowerReturn (MachineFunction &MF, CallingConv::ID CallConv, SmallVectorImpl< BaseArgInfo > &Outs, bool IsVarArg) const |
This hook must be implemented to check whether the return values described by Outs can fit into the return registers. | |
virtual bool | lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI, Register SwiftErrorVReg) const |
This hook must be implemented to lower outgoing return values, described by Val , into the specified virtual registers VRegs . | |
virtual bool | lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const |
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion. | |
virtual bool | fallBackToDAGISel (const MachineFunction &MF) const |
virtual bool | lowerFormalArguments (MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const |
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs , for GlobalISel. | |
virtual bool | lowerCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const |
This hook must be implemented to lower the given call instruction, including argument and return value marshalling. | |
bool | lowerCall (MachineIRBuilder &MIRBuilder, const CallBase &Call, ArrayRef< Register > ResRegs, ArrayRef< ArrayRef< Register > > ArgRegs, Register SwiftErrorVReg, std::optional< PtrAuthInfo > PAI, Register ConvergenceCtrlToken, std::function< unsigned()> GetCalleeReg) const |
Lower the given call instruction, including argument and return value marshalling. | |
virtual bool | enableBigEndian () const |
For targets which want to use big-endian can enable it with enableBigEndian() hook. | |
virtual bool | isTypeIsValidForThisReturn (EVT Ty) const |
For targets which support the "returned" parameter attribute, returns true if the given type is a valid one to use with "returned". | |
Additional Inherited Members | |
Protected Member Functions inherited from llvm::CallLowering | |
const TargetLowering * | getTLI () const |
Getter for generic TargetLowering class. | |
template<class XXXTargetLowering > | |
const XXXTargetLowering * | getTLI () const |
Getter for target specific TargetLowering class. | |
ISD::ArgFlagsTy | getAttributesForArgIdx (const CallBase &Call, unsigned ArgIdx) const |
ISD::ArgFlagsTy | getAttributesForReturn (const CallBase &Call) const |
void | addArgFlagsFromAttributes (ISD::ArgFlagsTy &Flags, const AttributeList &Attrs, unsigned OpIdx) const |
Adds flags to Flags based off of the attributes in Attrs . | |
template<typename FuncInfoTy > | |
void | setArgFlags (ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const |
void | splitToValueTypes (const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const |
Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs . | |
bool | determineAssignments (ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const |
Analyze the argument list in Args , using Assigner to populate CCInfo . | |
bool | determineAndHandleAssignments (ValueHandler &Handler, ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool IsVarArg, ArrayRef< Register > ThisReturnRegs={}) const |
Invoke ValueAssigner::assignArg on each of the given Args and then use Handler to move them to the assigned locations. | |
bool | handleAssignments (ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs={}) const |
Use Handler to insert code to handle the argument/return values represented by Args . | |
bool | parametersInCSRMatch (const MachineRegisterInfo &MRI, const uint32_t *CallerPreservedMask, const SmallVectorImpl< CCValAssign > &ArgLocs, const SmallVectorImpl< ArgInfo > &OutVals) const |
Check whether parameters to a call that are passed in callee saved registers are the same as from the calling function. | |
bool | resultsCompatible (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs, ValueAssigner &CalleeAssigner, ValueAssigner &CallerAssigner) const |
Definition at line 30 of file ARMCallLowering.h.
ARMCallLowering::ARMCallLowering | ( | const ARMTargetLowering & | TLI | ) |
Definition at line 60 of file ARMCallLowering.cpp.
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overridevirtual |
For targets which want to use big-endian can enable it with enableBigEndian() hook.
Reimplemented from llvm::CallLowering.
Definition at line 550 of file ARMCallLowering.cpp.
References EnableGISelBigEndian.
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overridevirtual |
This hook must be implemented to lower the given call instruction, including argument and return value marshalling.
Reimplemented from llvm::CallLowering.
Definition at line 463 of file ARMCallLowering.cpp.
References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), llvm::ARMCC::AL, llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::SmallVectorImpl< T >::clear(), llvm::constrainOperandRegClass(), llvm::CallLowering::determineAndHandleAssignments(), DL, llvm::CallLowering::BaseArgInfo::Flags, getCallOpcode(), llvm::MachineFunction::getDataLayout(), llvm::ARMSubtarget::getInstrInfo(), llvm::MachineIRBuilder::getMF(), llvm::ARMSubtarget::getRegBankInfo(), llvm::MachineFunction::getRegInfo(), llvm::ARMSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), Info, llvm::MachineIRBuilder::insertInstr(), isSupportedType(), llvm::ARMSubtarget::isThumb1Only(), MRI, llvm::predOps(), llvm::CallLowering::splitToValueTypes(), llvm::CallLowering::ValueAssigner::StackSize, TRI, and llvm::CallLowering::BaseArgInfo::Ty.
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overridevirtual |
This hook must be implemented to lower the incoming (formal) arguments, described by VRegs
, for GlobalISel.
Each argument must end up in the related virtual registers described by VRegs
. In other words, the first argument should end up in VRegs
[0], the second in VRegs
[1], and so on. For each argument, there will be one register for each non-aggregate type, as returned by computeValueLLTs
. MIRBuilder
is set to the proper insertion for the argument lowering. FLI
is required for sret demotion.
Reimplemented from llvm::CallLowering.
Definition at line 372 of file ARMCallLowering.cpp.
References llvm::MachineBasicBlock::begin(), llvm::CallLowering::determineAndHandleAssignments(), DL, llvm::MachineBasicBlock::empty(), F, llvm::AttributeList::FirstArgIndex, llvm::MachineFunction::getDataLayout(), llvm::MachineIRBuilder::getMBB(), llvm::MachineIRBuilder::getMF(), llvm::MachineFunction::getRegInfo(), Idx, isSupportedType(), MBB, llvm::CallLowering::setArgFlags(), llvm::MachineIRBuilder::setInstr(), llvm::MachineIRBuilder::setMBB(), and llvm::CallLowering::splitToValueTypes().
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overridevirtual |
This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion.
Reimplemented from llvm::CallLowering.
Definition at line 221 of file ARMCallLowering.cpp.
References llvm::MachineInstrBuilder::add(), llvm::ARMCC::AL, assert(), llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::ArrayRef< T >::empty(), llvm::MachineIRBuilder::getMF(), llvm::MachineFunction::getSubtarget(), llvm::MachineIRBuilder::insertInstr(), and llvm::predOps().