LLVM 20.0.0git
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#include "Target/PowerPC/PPCRegisterInfo.h"
Public Member Functions | |
PPCRegisterInfo (const PPCTargetMachine &TM) | |
unsigned | getMappedIdxOpcForImmOpc (unsigned ImmOpcode) const |
getMappedIdxOpcForImmOpc - Return the mapped index form load/store opcode for a given imm form load/store opcode ImmFormOpcode . | |
const TargetRegisterClass * | getPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override |
getPointerRegClass - Return the register class to use to hold pointers. | |
unsigned | getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override |
const TargetRegisterClass * | getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override |
const MCPhysReg * | getCalleeSavedRegs (const MachineFunction *MF) const override |
Code Generation virtual methods... | |
const uint32_t * | getCallPreservedMask (const MachineFunction &MF, CallingConv::ID CC) const override |
const uint32_t * | getNoPreservedMask () const override |
void | adjustStackMapLiveOutMask (uint32_t *Mask) const override |
BitVector | getReservedRegs (const MachineFunction &MF) const override |
bool | isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override |
bool | isCallerPreservedPhysReg (MCRegister PhysReg, const MachineFunction &MF) const override |
bool | getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override |
bool | requiresRegisterScavenging (const MachineFunction &MF) const override |
We require the register scavenger. | |
bool | requiresFrameIndexScavenging (const MachineFunction &MF) const override |
bool | requiresVirtualBaseRegisters (const MachineFunction &MF) const override |
void | lowerDynamicAlloc (MachineBasicBlock::iterator II) const |
lowerDynamicAlloc - Generate the code for allocating an object in the current frame. | |
void | lowerDynamicAreaOffset (MachineBasicBlock::iterator II) const |
void | prepareDynamicAlloca (MachineBasicBlock::iterator II, Register &NegSizeReg, bool &KillNegSizeReg, Register &FramePointer) const |
To accomplish dynamic stack allocation, we have to calculate exact size subtracted from the stack pointer according alignment information and get previous frame pointer. | |
void | lowerPrepareProbedAlloca (MachineBasicBlock::iterator II) const |
void | lowerCRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerCRSpilling - Generate the code for spilling a CR register. | |
void | lowerCRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
void | lowerCRBitSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
void | lowerCRBitRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
void | lowerOctWordSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
Remove any STXVP[X] instructions and split them out into a pair of STXV[X] instructions if –disable-auto-paired-vec-st is specified on the command line. | |
void | lowerACCSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerACCSpilling - Generate the code for spilling the accumulator register. | |
void | lowerACCRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerACCRestore - Generate the code to restore the accumulator register. | |
void | lowerWACCSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerWACCSpilling - Generate the code for spilling the wide accumulator register. | |
void | lowerWACCRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerWACCRestore - Generate the code to restore the wide accumulator register. | |
void | lowerQuadwordSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerQuadwordSpilling - Generate code to spill paired general register. | |
void | lowerQuadwordRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const |
lowerQuadwordRestore - Generate code to restore paired general register. | |
bool | hasReservedSpillSlot (const MachineFunction &MF, Register Reg, int &FrameIdx) const override |
bool | eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override |
bool | needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override |
Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. | |
Register | materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override |
Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block. | |
void | resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override |
bool | isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override |
Register | getFrameRegister (const MachineFunction &MF) const override |
Register | getBaseRegister (const MachineFunction &MF) const |
bool | hasBasePointer (const MachineFunction &MF) const |
bool | isNonallocatableRegisterCalleeSave (MCRegister Reg) const override |
Static Public Member Functions | |
static void | emitAccCopyInfo (MachineBasicBlock &MBB, MCRegister DestReg, MCRegister SrcReg) |
Definition at line 57 of file PPCRegisterInfo.h.
PPCRegisterInfo::PPCRegisterInfo | ( | const PPCTargetMachine & | TM | ) |
Definition at line 98 of file PPCRegisterInfo.cpp.
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Definition at line 349 of file PPCRegisterInfo.cpp.
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Definition at line 1580 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BitVector::any(), assert(), llvm::BuildMI(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::MachineRegisterInfo::createVirtualRegister(), DisableAutoPairedVecSt, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), getBaseRegister(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFunctionInfo::getFramePointerSaveIndex(), getFrameRegister(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), getOffsetONFromFION(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::RegScavenger::getRegsAvailable(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::Function::hasFnAttribute(), II, is64Bit(), llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, lowerACCRestore(), lowerACCSpilling(), lowerCRBitRestore(), lowerCRBitSpilling(), lowerCRRestore(), lowerCRSpilling(), lowerDynamicAlloc(), lowerDynamicAreaOffset(), lowerOctWordSpilling(), lowerPrepareProbedAlloca(), lowerQuadwordRestore(), lowerQuadwordSpilling(), lowerWACCRestore(), lowerWACCSpilling(), MBB, MI, llvm::BitVector::none(), llvm::Offset, offsetMinAlign(), and TII.
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Definition at line 1211 of file PPCRegisterInfo.cpp.
References llvm::dbgs(), llvm::MachineBasicBlock::dump(), MBB, and ReportAccMoves.
Referenced by llvm::PPCInstrInfo::copyPhysReg().
Register PPCRegisterInfo::getBaseRegister | ( | const MachineFunction & | MF | ) | const |
Definition at line 1824 of file PPCRegisterInfo.cpp.
References getFrameRegister(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::TargetMachine::isPositionIndependent(), llvm::PPCTargetMachine::isPPC64(), and llvm::PPCSubtarget::isSVR4ABI().
Referenced by llvm::PPCFrameLowering::determineCalleeSaves(), eliminateFrameIndex(), llvm::PPCFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitPrologue(), llvm::PPCFrameLowering::inlineStackProbe(), needsFrameBaseReg(), llvm::PPCFrameLowering::processFunctionBeforeFrameFinalized(), and llvm::PPCFrameLowering::replaceFPWithRealFP().
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Code Generation virtual methods...
Definition at line 185 of file PPCRegisterInfo.cpp.
References llvm::CallingConv::AnyReg, llvm::CallingConv::Cold, llvm::TargetMachine::getAIXExtendedAltivecABI(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::isAIXABI(), llvm::MachineRegisterInfo::isAllocatable(), llvm::TargetMachine::isPositionIndependent(), llvm::PPCTargetMachine::isPPC64(), llvm::PPCSubtarget::isUsingPCRelativeCalls(), and llvm::report_fatal_error().
Referenced by llvm::PPCFrameLowering::assignCalleeSavedSpillSlots(), and llvm::PPCFrameLowering::updateCalleeSaves().
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Definition at line 278 of file PPCRegisterInfo.cpp.
References llvm::CallingConv::AnyReg, CC, llvm::CallingConv::Cold, llvm::TargetMachine::getAIXExtendedAltivecABI(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::isAIXABI(), llvm::TargetMachine::isPositionIndependent(), and llvm::PPCTargetMachine::isPPC64().
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Definition at line 1815 of file PPCRegisterInfo.cpp.
References llvm::PPCFrameLowering::hasFP(), and llvm::PPCTargetMachine::isPPC64().
Referenced by eliminateFrameIndex(), and getBaseRegister().
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Definition at line 679 of file PPCRegisterInfo.cpp.
References EnableGPRToVecSpills, llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::MachineFunction::getSubtarget(), llvm::TargetRegisterClass::getSuperClasses(), I, llvm::PPCSubtarget::isAIXABI(), and llvm::PPCTargetMachine::isELFv2ABI().
getMappedIdxOpcForImmOpc - Return the mapped index form load/store opcode for a given imm form load/store opcode ImmFormOpcode
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FIXME: move this to PPCInstrInfo class.
Definition at line 67 of file PPCRegisterInfo.h.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), and llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find().
Referenced by llvm::PPCInstrInfo::convertToImmediateForm(), and llvm::PPCInstrInfo::isImmInstrEligibleForFolding().
Definition at line 345 of file PPCRegisterInfo.cpp.
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getPointerRegClass - Return the register class to use to hold pointers.
This is used for addressing modes.
Definition at line 169 of file PPCRegisterInfo.cpp.
References llvm::PPCTargetMachine::isPPC64().
Referenced by materializeFrameBaseRegister().
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Definition at line 561 of file PPCRegisterInfo.cpp.
References assert(), llvm::TargetRegisterClass::contains(), llvm::VirtRegMap::getPhys(), llvm::MachineOperand::getReg(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineFunction::getRegInfo(), llvm::MachineOperand::getSubReg(), llvm::MachineFunction::getSubtarget(), llvm::VirtRegMap::hasPhys(), llvm::Register::isVirtual(), Matrix, MRI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().
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Definition at line 634 of file PPCRegisterInfo.cpp.
References FP, llvm::TargetMachine::getAIXExtendedAltivecABI(), llvm::TargetRegisterClass::getID(), llvm::MachineFunction::getSubtarget(), llvm::PPCFrameLowering::hasFP(), and llvm::PPCSubtarget::isAIXABI().
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Definition at line 354 of file PPCRegisterInfo.cpp.
References assert(), llvm::TargetMachine::getAIXExtendedAltivecABI(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::MachineFunction::hasInlineAsm(), llvm::PPCSubtarget::is32BitELFABI(), llvm::PPCSubtarget::isAIXABI(), llvm::TargetMachine::isPositionIndependent(), llvm::PPCTargetMachine::isPPC64(), llvm::PPCSubtarget::isSVR4ABI(), llvm::MCRegAliasIterator::isValid(), llvm::Reserved, and llvm::PPCFunctionInfo::usesTOCBasePtr().
Referenced by isCallerPreservedPhysReg().
bool PPCRegisterInfo::hasBasePointer | ( | const MachineFunction & | MF | ) | const |
Definition at line 1838 of file PPCRegisterInfo.cpp.
References AlwaysBasePointer, and EnableBasePointer.
Referenced by llvm::PPCFrameLowering::determineCalleeSaves(), llvm::PPCFrameLowering::determineFrameLayout(), eliminateFrameIndex(), llvm::PPCFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitPrologue(), getBaseRegister(), getReservedRegs(), llvm::PPCFrameLowering::inlineStackProbe(), llvm::PPCFrameLowering::processFunctionBeforeFrameFinalized(), and llvm::PPCFrameLowering::replaceFPWithRealFP().
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Definition at line 1509 of file PPCRegisterInfo.cpp.
References llvm::MachineFunction::getInfo().
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Definition at line 442 of file PPCRegisterInfo.cpp.
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Definition at line 538 of file PPCRegisterInfo.cpp.
References assert(), llvm::MachineFunction::getFrameInfo(), getReservedRegs(), llvm::PPCSubtarget::getStackPointerRegister(), llvm::MachineFunction::getSubtarget(), llvm::PPCSubtarget::getTOCPointerRegister(), llvm::PPCSubtarget::is64BitELFABI(), llvm::PPCSubtarget::isAIXABI(), llvm::Register::isPhysicalRegister(), StackPtrConst, and llvm::BitVector::test().
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Definition at line 1948 of file PPCRegisterInfo.cpp.
References assert(), getOffsetONFromFION(), MI, llvm::Offset, and offsetMinAlign().
Referenced by needsFrameBaseReg().
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Definition at line 175 of file PPCRegisterInfo.h.
References Reg.
void PPCRegisterInfo::lowerACCRestore | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerACCRestore - Generate the code to restore the accumulator register.
Definition at line 1356 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), DL, emitAccSpillRestoreInfo(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerACCSpilling | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerACCSpilling - Generate the code for spilling the accumulator register.
Similarly to other spills/reloads that use pseudo-ops, we do not actually eliminate the FrameIndex here nor compute the stack offset. We simply create a real instruction with an FI and rely on eliminateFrameIndex to handle the FI elimination.
Definition at line 1313 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DisableAutoPairedVecSt, DL, emitAccSpillRestoreInfo(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, spillRegPairs(), and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerCRBitRestore | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
Definition at line 1161 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::getCRFromCRBit(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::RegState::Implicit, llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerCRBitSpilling | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
Definition at line 1042 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::getCRFromCRBit(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::PPCSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::RegState::Implicit, llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MaxCRBitSpillDist, MBB, MI, llvm::MachineBasicBlock::rend(), TII, TRI, and llvm::RegState::Undef.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerCRRestore | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
Definition at line 999 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerCRSpilling | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerCRSpilling - Generate the code for spilling a CR register.
Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:
mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.
Definition at line 954 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerDynamicAlloc | ( | MachineBasicBlock::iterator | II | ) | const |
lowerDynamicAlloc - Generate the code for allocating an object in the current frame.
The sequence of code will be in the general form
addi R0, SP, #frameSize ; get the address of the previous frame stwxu R0, SP, Rnegsize ; add and update the SP with the negated size addi Rnew, SP, #maxCalFrameSize ; get the top of the allocation
Definition at line 734 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFrameInfo::getMaxAlign(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::isAligned(), llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, MI, prepareDynamicAlloca(), and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerDynamicAreaOffset | ( | MachineBasicBlock::iterator | II | ) | const |
Definition at line 923 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineBasicBlock::erase(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFrameInfo::getMaxCallFrameSize(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, is64Bit(), llvm::PPCTargetMachine::isPPC64(), MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerOctWordSpilling | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
Remove any STXVP[X] instructions and split them out into a pair of STXV[X] instructions if –disable-auto-paired-vec-st is specified on the command line.
Definition at line 1277 of file PPCRegisterInfo.cpp.
References assert(), DisableAutoPairedVecSt, DL, llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, spillRegPairs(), and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerPrepareProbedAlloca | ( | MachineBasicBlock::iterator | II | ) | const |
Definition at line 882 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCTargetMachine::isPPC64(), MBB, MI, prepareDynamicAlloca(), and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerQuadwordRestore | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerQuadwordRestore - Generate code to restore paired general register.
Definition at line 1484 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), assert(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerQuadwordSpilling | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerQuadwordSpilling - Generate code to spill paired general register.
Definition at line 1457 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerWACCRestore | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerWACCRestore - Generate the code to restore the wide accumulator register.
Definition at line 1425 of file PPCRegisterInfo.cpp.
References llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, emitWAccSpillRestoreInfo(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), llvm::RegState::Kill, MBB, MI, and TII.
Referenced by eliminateFrameIndex().
void PPCRegisterInfo::lowerWACCSpilling | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameIndex | ||
) | const |
lowerWACCSpilling - Generate the code for spilling the wide accumulator register.
Definition at line 1391 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addDef(), llvm::addFrameReference(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, emitWAccSpillRestoreInfo(), llvm::MachineBasicBlock::erase(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCSubtarget::isLittleEndian(), llvm::RegState::Kill, MBB, MI, and TII.
Referenced by eliminateFrameIndex().
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Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.
Definition at line 1899 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), getPointerRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::PPCTargetMachine::isPPC64(), MBB, MRI, llvm::Offset, and TII.
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Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.
Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.
Definition at line 1854 of file PPCRegisterInfo.cpp.
References assert(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::PPCFrameLowering::determineFrameLayout(), getBaseRegister(), llvm::MachineBasicBlock::getParent(), isFrameOffsetLegal(), MBB, MI, and llvm::Offset.
void PPCRegisterInfo::prepareDynamicAlloca | ( | MachineBasicBlock::iterator | II, |
Register & | NegSizeReg, | ||
bool & | KillNegSizeReg, | ||
Register & | FramePointer | ||
) | const |
To accomplish dynamic stack allocation, we have to calculate exact size subtracted from the stack pointer according alignment information and get previous frame pointer.
Definition at line 791 of file PPCRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFrameInfo::getMaxAlign(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::TargetFrameLowering::getStackAlign(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), II, llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, MI, TII, and llvm::Align::value().
Referenced by lowerDynamicAlloc(), and lowerPrepareProbedAlloca().
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Definition at line 454 of file PPCRegisterInfo.cpp.
References llvm::dbgs(), llvm::MachineFrameInfo::getCalleeSavedInfo(), llvm::MachineFunction::getFrameInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFunction::getName(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), Info, llvm::MachineFrameInfo::isCalleeSavedInfoValid(), llvm::MachineFrameInfo::isFixedObjectIndex(), LLVM_DEBUG, offsetMinAlignForOpcode(), and llvm::printReg().
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We require the register scavenger.
Definition at line 110 of file PPCRegisterInfo.h.
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Definition at line 528 of file PPCRegisterInfo.cpp.
References llvm::MachineFunction::getSubtarget().
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Definition at line 1924 of file PPCRegisterInfo.cpp.
References assert(), llvm::PPCSubtarget::getInstrInfo(), getOffsetONFromFION(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), MBB, MI, MRI, llvm::Offset, and TII.