25 #define GET_INSTRINFO_MC_DESC
26 #define ENABLE_INSTR_PREDICATE_VERIFIER
27 #include "SystemZGenInstrInfo.inc"
29 #define GET_SUBTARGETINFO_MC_DESC
30 #include "SystemZGenSubtargetInfo.inc"
32 #define GET_REGINFO_MC_DESC
33 #include "SystemZGenRegisterInfo.inc"
36 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
37 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
38 SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
39 SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
43 SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H,
44 SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H,
45 SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H,
46 SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H
50 SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
51 SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
52 SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
53 SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
57 SystemZ::R0Q, 0, SystemZ::R2Q, 0,
58 SystemZ::R4Q, 0, SystemZ::R6Q, 0,
59 SystemZ::R8Q, 0, SystemZ::R10Q, 0,
60 SystemZ::R12Q, 0, SystemZ::R14Q, 0
64 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
65 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
66 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
67 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
71 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
72 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
73 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
74 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
78 SystemZ::F0Q, SystemZ::F1Q, 0, 0,
79 SystemZ::F4Q, SystemZ::F5Q, 0, 0,
80 SystemZ::F8Q, SystemZ::F9Q, 0, 0,
81 SystemZ::F12Q, SystemZ::F13Q, 0, 0
85 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
86 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
87 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
88 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S,
89 SystemZ::F16S, SystemZ::F17S, SystemZ::F18S, SystemZ::F19S,
90 SystemZ::F20S, SystemZ::F21S, SystemZ::F22S, SystemZ::F23S,
91 SystemZ::F24S, SystemZ::F25S, SystemZ::F26S, SystemZ::F27S,
92 SystemZ::F28S, SystemZ::F29S, SystemZ::F30S, SystemZ::F31S
96 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
97 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
98 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
99 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D,
100 SystemZ::F16D, SystemZ::F17D, SystemZ::F18D, SystemZ::F19D,
101 SystemZ::F20D, SystemZ::F21D, SystemZ::F22D, SystemZ::F23D,
102 SystemZ::F24D, SystemZ::F25D, SystemZ::F26D, SystemZ::F27D,
103 SystemZ::F28D, SystemZ::F29D, SystemZ::F30D, SystemZ::F31D
107 SystemZ::V0, SystemZ::V1,
SystemZ::V2, SystemZ::V3,
108 SystemZ::V4, SystemZ::V5, SystemZ::V6, SystemZ::V7,
109 SystemZ::V8, SystemZ::V9, SystemZ::V10, SystemZ::V11,
110 SystemZ::V12, SystemZ::V13, SystemZ::V14, SystemZ::V15,
111 SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19,
112 SystemZ::V20, SystemZ::V21, SystemZ::V22, SystemZ::V23,
113 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
114 SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
118 SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
119 SystemZ::A4, SystemZ::A5, SystemZ::A6, SystemZ::A7,
120 SystemZ::A8, SystemZ::A9, SystemZ::A10, SystemZ::A11,
121 SystemZ::A12, SystemZ::A13, SystemZ::A14, SystemZ::A15
125 SystemZ::C0,
SystemZ::C1, SystemZ::C2, SystemZ::C3,
126 SystemZ::C4, SystemZ::C5, SystemZ::C6, SystemZ::C7,
127 SystemZ::C8, SystemZ::C9, SystemZ::C10, SystemZ::C11,
128 SystemZ::C12, SystemZ::C13, SystemZ::C14, SystemZ::C15
132 static unsigned Map[SystemZ::NUM_TARGET_REGS];
133 static bool Initialized =
false;
135 for (
unsigned I = 0;
I < 16; ++
I) {
143 for (
unsigned I = 0;
I < 32; ++
I) {
161 nullptr,
MRI.getDwarfRegNum(SystemZ::R15D,
true),
169 InitSystemZMCInstrInfo(
X);
175 InitSystemZMCRegisterInfo(
X, SystemZ::R14D);
181 return createSystemZMCSubtargetInfoImpl(TT, CPU, CPU,
FS);
185 unsigned SyntaxVariant,
214 void emitMachine(
StringRef CPU)
override {
215 OS <<
"\t.machine " << CPU <<
"\n";
222 void emitMachine(
StringRef CPU)
override {}
231 return new SystemZTargetAsmStreamer(
S, OS);
236 return new SystemZTargetELFStreamer(
S);