LLVM 19.0.0git
SystemZMCAsmBackend.cpp
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1//===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
13#include "llvm/MC/MCAssembler.h"
14#include "llvm/MC/MCContext.h"
17#include "llvm/MC/MCInst.h"
20
21using namespace llvm;
22
23// Value is a fully-resolved relocation value: Symbol + Addend [- Pivot].
24// Return the bits that should be installed in a relocation field for
25// fixup kind Kind.
27 const MCFixup &Fixup, MCContext &Ctx) {
28 if (Kind < FirstTargetFixupKind)
29 return Value;
30
31 auto checkFixupInRange = [&](int64_t Min, int64_t Max) -> bool {
32 int64_t SVal = int64_t(Value);
33 if (SVal < Min || SVal > Max) {
34 Ctx.reportError(Fixup.getLoc(), "operand out of range (" + Twine(SVal) +
35 " not between " + Twine(Min) +
36 " and " + Twine(Max) + ")");
37 return false;
38 }
39 return true;
40 };
41
42 auto handlePCRelFixupValue = [&](unsigned W) -> uint64_t {
43 if (Value % 2 != 0)
44 Ctx.reportError(Fixup.getLoc(), "Non-even PC relative offset.");
45 if (!checkFixupInRange(minIntN(W) * 2, maxIntN(W) * 2))
46 return 0;
47 return (int64_t)Value / 2;
48 };
49
50 auto handleImmValue = [&](bool IsSigned, unsigned W) -> uint64_t {
51 if (!(IsSigned ? checkFixupInRange(minIntN(W), maxIntN(W))
52 : checkFixupInRange(0, maxUIntN(W))))
53 return 0;
54 return Value;
55 };
56
57 switch (unsigned(Kind)) {
59 return handlePCRelFixupValue(12);
61 return handlePCRelFixupValue(16);
63 return handlePCRelFixupValue(24);
65 return handlePCRelFixupValue(32);
66
68 return 0;
69
71 return handleImmValue(true, 8);
73 return handleImmValue(true, 16);
75 Value = handleImmValue(true, 20);
76 // S20Imm is used only for signed 20-bit displacements.
77 // The high byte of a 20 bit displacement value comes first.
78 uint64_t DLo = Value & 0xfff;
79 uint64_t DHi = (Value >> 12) & 0xff;
80 return (DLo << 8) | DHi;
81 }
83 return handleImmValue(true, 32);
85 return handleImmValue(false, 1);
87 return handleImmValue(false, 2);
89 return handleImmValue(false, 3);
91 return handleImmValue(false, 4);
93 return handleImmValue(false, 8);
95 return handleImmValue(false, 12);
97 return handleImmValue(false, 16);
99 return handleImmValue(false, 32);
101 return handleImmValue(false, 48);
102 }
103
104 llvm_unreachable("Unknown fixup kind!");
105}
106
107namespace {
108class SystemZMCAsmBackend : public MCAsmBackend {
109public:
110 SystemZMCAsmBackend() : MCAsmBackend(llvm::endianness::big) {}
111
112 // Override MCAsmBackend
113 unsigned getNumFixupKinds() const override {
115 }
116 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
117 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
118 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
119 const MCValue &Target,
120 const MCSubtargetInfo *STI) override;
121 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
123 uint64_t Value, bool IsResolved,
124 const MCSubtargetInfo *STI) const override;
126 const MCRelaxableFragment *Fragment,
127 const MCAsmLayout &Layout) const override {
128 return false;
129 }
130 bool writeNopData(raw_ostream &OS, uint64_t Count,
131 const MCSubtargetInfo *STI) const override;
132};
133} // end anonymous namespace
134
135std::optional<MCFixupKind>
136SystemZMCAsmBackend::getFixupKind(StringRef Name) const {
138#define ELF_RELOC(X, Y) .Case(#X, Y)
139#include "llvm/BinaryFormat/ELFRelocs/SystemZ.def"
140#undef ELF_RELOC
141 .Case("BFD_RELOC_NONE", ELF::R_390_NONE)
142 .Case("BFD_RELOC_8", ELF::R_390_8)
143 .Case("BFD_RELOC_16", ELF::R_390_16)
144 .Case("BFD_RELOC_32", ELF::R_390_32)
145 .Case("BFD_RELOC_64", ELF::R_390_64)
146 .Default(-1u);
147 if (Type != -1u)
148 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
149 return std::nullopt;
150}
151
152const MCFixupKindInfo &
153SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
154 // Fixup kinds from .reloc directive are like R_390_NONE. They
155 // do not require any extra processing.
156 if (Kind >= FirstLiteralRelocationKind)
158
159 if (Kind < FirstTargetFixupKind)
161
162 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
163 "Invalid kind!");
165}
166
167bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
168 const MCFixup &Fixup,
169 const MCValue &,
170 const MCSubtargetInfo *STI) {
171 return Fixup.getKind() >= FirstLiteralRelocationKind;
172}
173
174void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
175 const MCFixup &Fixup,
176 const MCValue &Target,
178 bool IsResolved,
179 const MCSubtargetInfo *STI) const {
180 MCFixupKind Kind = Fixup.getKind();
181 if (Kind >= FirstLiteralRelocationKind)
182 return;
183 unsigned Offset = Fixup.getOffset();
184 unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
185 unsigned Size = (BitSize + 7) / 8;
186
187 assert(Offset + Size <= Data.size() && "Invalid fixup offset!");
188
189 // Big-endian insertion of Size bytes.
190 Value = extractBitsForFixup(Kind, Value, Fixup, Asm.getContext());
191 if (BitSize < 64)
192 Value &= ((uint64_t)1 << BitSize) - 1;
193 unsigned ShiftValue = (Size * 8) - 8;
194 for (unsigned I = 0; I != Size; ++I) {
195 Data[Offset + I] |= uint8_t(Value >> ShiftValue);
196 ShiftValue -= 8;
197 }
198}
199
200bool SystemZMCAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
201 const MCSubtargetInfo *STI) const {
202 for (uint64_t I = 0; I != Count; ++I)
203 OS << '\x7';
204 return true;
205}
206
207namespace {
208class ELFSystemZAsmBackend : public SystemZMCAsmBackend {
209 uint8_t OSABI;
210
211public:
212 ELFSystemZAsmBackend(uint8_t OsABI) : SystemZMCAsmBackend(), OSABI(OsABI){};
213
214 std::unique_ptr<MCObjectTargetWriter>
215 createObjectTargetWriter() const override {
216 return createSystemZELFObjectWriter(OSABI);
217 }
218};
219
220class GOFFSystemZAsmBackend : public SystemZMCAsmBackend {
221public:
222 GOFFSystemZAsmBackend() : SystemZMCAsmBackend(){};
223
224 std::unique_ptr<MCObjectTargetWriter>
225 createObjectTargetWriter() const override {
227 }
228};
229} // namespace
230
232 const MCSubtargetInfo &STI,
233 const MCRegisterInfo &MRI,
234 const MCTargetOptions &Options) {
235 if (STI.getTargetTriple().isOSzOS()) {
236 return new GOFFSystemZAsmBackend();
237 }
238
239 uint8_t OSABI =
241 return new ELFSystemZAsmBackend(OSABI);
242}
unsigned const MachineRegisterInfo * MRI
std::string Name
uint64_t Size
static LVOptions Options
Definition: LVOptions.cpp:25
#define I(x, y, z)
Definition: MD5.cpp:58
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
static uint64_t extractBitsForFixup(MCFixupKind Kind, uint64_t Value, const MCFixup &Fixup, MCContext &Ctx)
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:43
virtual bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
Write an (optimal) nop sequence of Count bytes to the given output.
virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const =0
Simple predicate for targets where !Resolved implies requiring relaxation.
virtual bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, const MCSubtargetInfo *STI)
Hook to check if a relocation is needed for some target specific reason.
Definition: MCAsmBackend.h:102
virtual unsigned getNumFixupKinds() const =0
Get the number of target specific fixup kinds.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
virtual std::optional< MCFixupKind > getFixupKind(StringRef Name) const
Map a relocation name used in .reloc to a fixup kind.
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const =0
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
Context object for machine code objects.
Definition: MCContext.h:82
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1093
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:267
Generic base class for all target subtargets.
const Triple & getTargetTriple() const
This represents an "assembler immediate".
Definition: MCValue.h:36
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
R Default(T Value)
Definition: StringSwitch.h:182
Target - Wrapper for Target specific information.
OSType getOS() const
Get the parsed operating system type of this triple.
Definition: Triple.h:382
bool isOSzOS() const
Definition: Triple.h:555
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static const MCFixupKindInfo MCFixupKindInfos[SystemZ::NumTargetFixupKinds]
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
int64_t maxIntN(int64_t N)
Gets the maximum value for a N-bit signed integer.
Definition: MathExtras.h:228
std::unique_ptr< MCObjectTargetWriter > createSystemZGOFFObjectWriter()
MCAsmBackend * createSystemZMCAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FirstTargetFixupKind
Definition: MCFixup.h:45
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
Definition: MCFixup.h:50
@ FK_NONE
A no-op fixup.
Definition: MCFixup.h:22
int64_t minIntN(int64_t N)
Gets the minimum value for a N-bit signed integer.
Definition: MathExtras.h:219
endianness
Definition: bit.h:70
std::unique_ptr< MCObjectTargetWriter > createSystemZELFObjectWriter(uint8_t OSABI)
uint64_t maxUIntN(uint64_t N)
Gets the maximum value for a N-bit unsigned integer.
Definition: MathExtras.h:203
Target independent information on a fixup kind.