LLVM 17.0.0git
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#include "llvm/MC/MCInstrAnalysis.h"
Public Member Functions | |
MCInstrAnalysis (const MCInstrInfo *Info) | |
virtual | ~MCInstrAnalysis ()=default |
virtual bool | isBranch (const MCInst &Inst) const |
virtual bool | isConditionalBranch (const MCInst &Inst) const |
virtual bool | isUnconditionalBranch (const MCInst &Inst) const |
virtual bool | isIndirectBranch (const MCInst &Inst) const |
virtual bool | isCall (const MCInst &Inst) const |
virtual bool | isReturn (const MCInst &Inst) const |
virtual bool | isTerminator (const MCInst &Inst) const |
virtual bool | clearsSuperRegisters (const MCRegisterInfo &MRI, const MCInst &Inst, APInt &Writes) const |
Returns true if at least one of the register writes performed by. | |
virtual bool | isZeroIdiom (const MCInst &MI, APInt &Mask, unsigned CPUID) const |
Returns true if MI is a dependency breaking zero-idiom for the given subtarget. | |
virtual bool | isDependencyBreaking (const MCInst &MI, APInt &Mask, unsigned CPUID) const |
Returns true if MI is a dependency breaking instruction for the subtarget associated with CPUID . | |
virtual bool | isOptimizableRegisterMove (const MCInst &MI, unsigned CPUID) const |
Returns true if MI is a candidate for move elimination. | |
virtual bool | evaluateBranch (const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const |
Given a branch instruction try to get the address the branch targets. | |
virtual std::optional< uint64_t > | evaluateMemoryOperandAddress (const MCInst &Inst, const MCSubtargetInfo *STI, uint64_t Addr, uint64_t Size) const |
Given an instruction tries to get the address of a memory operand. | |
virtual std::optional< uint64_t > | getMemoryOperandRelocationOffset (const MCInst &Inst, uint64_t Size) const |
Given an instruction with a memory operand that could require relocation, returns the offset within the instruction of that relocation. | |
virtual std::vector< std::pair< uint64_t, uint64_t > > | findPltEntries (uint64_t PltSectionVA, ArrayRef< uint8_t > PltContents, const Triple &TargetTriple) const |
Returns (PLT virtual address, GOT virtual address) pairs for PLT entries. | |
Protected Attributes | |
const MCInstrInfo * | Info |
Friends | |
class | Target |
Definition at line 29 of file MCInstrAnalysis.h.
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inline |
Definition at line 36 of file MCInstrAnalysis.h.
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virtualdefault |
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Returns true if at least one of the register writes performed by.
Inst | implicitly clears the upper portion of all super-registers. |
Example: on X86-64, a write to EAX implicitly clears the upper half of RAX. Also (still on x86) an XMM write perfomed by an AVX 128-bit instruction implicitly clears the upper portion of the correspondent YMM register.
This method also updates an APInt which is used as mask of register writes. There is one bit for every explicit/implicit write performed by the instruction. If a write implicitly clears its super-registers, then the corresponding bit is set (vic. the corresponding bit is cleared).
The first bits in the APint are related to explicit writes. The remaining bits are related to implicit writes. The sequence of writes follows the machine operand sequence. For implicit writes, the sequence is defined by the MCInstrDesc.
The assumption is that the bit-width of the APInt is correctly set by the caller. The default implementation conservatively assumes that none of the writes clears the upper portion of a super-register.
Reimplemented in llvm::X86_MC::X86MCInstrAnalysis.
Definition at line 20 of file MCInstrAnalysis.cpp.
References Writes.
Referenced by llvm::mca::InstrBuilder::createInstruction().
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Given a branch instruction try to get the address the branch targets.
Return true on success, and the address in Target.
Reimplemented in llvm::X86_MC::X86MCInstrAnalysis.
Definition at line 27 of file MCInstrAnalysis.cpp.
Referenced by llvm::X86IntelInstPrinter::printMemReference(), and llvm::X86ATTInstPrinter::printMemReference().
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Given an instruction tries to get the address of a memory operand.
Returns the address on success.
Reimplemented in llvm::X86_MC::X86MCInstrAnalysis.
Definition at line 33 of file MCInstrAnalysis.cpp.
Referenced by llvm::orc::addFunctionPointerRelocationsToCurrentSymbol(), llvm::X86IntelInstPrinter::printMemReference(), and llvm::X86ATTInstPrinter::printMemReference().
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Returns (PLT virtual address, GOT virtual address) pairs for PLT entries.
Reimplemented in llvm::X86_MC::X86MCInstrAnalysis.
Definition at line 170 of file MCInstrAnalysis.h.
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Given an instruction with a memory operand that could require relocation, returns the offset within the instruction of that relocation.
Reimplemented in llvm::X86_MC::X86MCInstrAnalysis.
Definition at line 40 of file MCInstrAnalysis.cpp.
Referenced by llvm::orc::addFunctionPointerRelocationsToCurrentSymbol().
Definition at line 39 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isBranch().
Definition at line 55 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isCall().
Definition at line 43 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isConditionalBranch().
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Returns true if MI is a dependency breaking instruction for the subtarget associated with CPUID .
The value computed by a dependency breaking instruction is not dependent on the inputs. An example of dependency breaking instruction on X86 is XOR eax, eax
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If MI is a dependency breaking instruction for subtarget CPUID, then Mask can be inspected to identify independent operands.
Essentially, each bit of the mask corresponds to an input operand. Explicit operands are laid out first in the mask; implicit operands follow explicit operands. Bits are set for operands that are independent.
Note that the number of bits in Mask may not be equivalent to the sum of explicit and implicit operands in MI. Operands that don't have a corresponding bit in Mask are assumed "not independente".
The only exception is for when Mask is all zeroes. That means: explicit input operands of MI are independent.
Definition at line 135 of file MCInstrAnalysis.h.
References isZeroIdiom(), and MI.
Referenced by llvm::mca::InstrBuilder::createInstruction().
Definition at line 51 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isIndirectBranch().
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Returns true if MI is a candidate for move elimination.
Different subtargets may apply different constraints to optimizable register moves. For example, on most X86 subtargets, a candidate for move elimination cannot specify the same register for both source and destination.
Definition at line 146 of file MCInstrAnalysis.h.
Referenced by llvm::mca::InstrBuilder::createInstruction().
Definition at line 59 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isReturn().
Definition at line 63 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isTerminator().
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Definition at line 47 of file MCInstrAnalysis.h.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), Info, and llvm::MCInstrDesc::isUnconditionalBranch().
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Returns true if MI is a dependency breaking zero-idiom for the given subtarget.
Mask is used to identify input operands that have their dependency broken. Each bit of the mask is associated with a specific input operand. Bits associated with explicit input operands are laid out first in the mask; implicit operands come after explicit operands.
Dependencies are broken only for operands that have their corresponding bit set. Operands that have their bit cleared, or that don't have a corresponding bit in the mask don't have their dependency broken. Note that Mask may not be big enough to describe all operands. The assumption for operands that don't have a correspondent bit in the mask is that those are still data dependent.
The only exception to the rule is for when Mask has all zeroes. A zero mask means: dependencies are broken for all explicit register operands.
Definition at line 110 of file MCInstrAnalysis.h.
Referenced by llvm::mca::InstrBuilder::createInstruction(), and isDependencyBreaking().
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Definition at line 31 of file MCInstrAnalysis.h.
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Definition at line 33 of file MCInstrAnalysis.h.
Referenced by llvm::X86_MC::X86MCInstrAnalysis::clearsSuperRegisters(), llvm::X86_MC::X86MCInstrAnalysis::evaluateBranch(), llvm::X86_MC::X86MCInstrAnalysis::evaluateMemoryOperandAddress(), llvm::X86_MC::X86MCInstrAnalysis::getMemoryOperandRelocationOffset(), isBranch(), isCall(), isConditionalBranch(), isIndirectBranch(), isReturn(), isTerminator(), and isUnconditionalBranch().