LLVM 20.0.0git
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#include "Target/XCore/XCoreInstrInfo.h"
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XCoreInstrInfo () | |
const TargetRegisterInfo & | getRegisterInfo () const |
getRegisterInfo - TargetInstrInfo is a superset of MRegister info. | |
Register | isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. | |
Register | isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. | |
bool | analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override |
analyzeBranch - Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g. | |
unsigned | insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override |
unsigned | removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override |
void | copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override |
void | storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override |
void | loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override |
bool | reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override |
MachineBasicBlock::iterator | loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const |
Definition at line 24 of file XCoreInstrInfo.h.
XCoreInstrInfo::XCoreInstrInfo | ( | ) |
Definition at line 48 of file XCoreInstrInfo.cpp.
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analyzeBranch - Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.
it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:
Note that removeBranch and insertBranch must be implemented to support cases where this method returns success.
Definition at line 189 of file XCoreInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), Cond, llvm::XCore::COND_INVALID, llvm::MachineOperand::CreateImm(), llvm::MachineBasicBlock::end(), GetCondFromBranchOpc(), llvm::MachineBasicBlock::getLastNonDebugInstr(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), I, IsBR_JT(), IsBRU(), MBB, and TBB.
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Definition at line 331 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::get(), llvm::getKillRegState(), I, llvm_unreachable, and MBB.
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getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Definition at line 34 of file XCoreInstrInfo.h.
Referenced by llvm::XCoreSubtarget::getRegisterInfo().
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Definition at line 271 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Cond, DL, llvm::get(), GetCondBranchFromCond(), getReg(), MBB, and TBB.
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isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Definition at line 62 of file XCoreInstrInfo.cpp.
References isZeroImm(), and MI.
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isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Definition at line 82 of file XCoreInstrInfo.cpp.
References isZeroImm(), and MI.
MachineBasicBlock::iterator XCoreInstrInfo::loadImmediate | ( | MachineBasicBlock & | MBB, |
MachineBasicBlock::iterator | MI, | ||
unsigned | Reg, | ||
uint64_t | Value | ||
) | const |
Definition at line 423 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addImm(), llvm::bit_width(), llvm::BuildMI(), llvm::CallingConv::C, llvm::MachineBasicBlock::end(), llvm::get(), llvm::MachineFunction::getConstantPool(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineInstrBuilder::getInstr(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), Idx, isImmMskBitp(), isImmU16(), isImmU6(), MBB, MI, and N.
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Definition at line 378 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), I, MBB, and llvm::MachineMemOperand::MOLoad.
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Definition at line 306 of file XCoreInstrInfo.cpp.
References assert(), llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getLastNonDebugInstr(), I, IsBRU(), IsCondBranch(), and MBB.
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Definition at line 399 of file XCoreInstrInfo.cpp.
References assert(), Cond, and GetOppositeBranchCondition().
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Definition at line 358 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), I, MBB, and llvm::MachineMemOperand::MOStore.