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LLVM 24.0.0git
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#include "Hexagon.h"#include "HexagonGlobalRegion.h"#include "HexagonRegisterInfo.h"#include "HexagonSubtarget.h"#include "HexagonVLIWPacketizer.h"#include "llvm/ADT/DenseMap.h"#include "llvm/ADT/SmallSet.h"#include "llvm/ADT/Statistic.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/Analysis/ValueTracking.h"#include "llvm/CodeGen/DFAPacketizer.h"#include "llvm/CodeGen/LiveIntervals.h"#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"#include "llvm/CodeGen/MachineDominators.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineLoopInfo.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/Passes.h"#include "llvm/CodeGen/PseudoSourceValue.h"#include "llvm/CodeGen/TargetInstrInfo.h"#include "llvm/CodeGen/TargetRegisterInfo.h"#include "llvm/CodeGen/TargetSchedule.h"#include "llvm/InitializePasses.h"#include "llvm/MC/MCInstrItineraries.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Debug.h"#include "llvm/Target/TargetMachine.h"#include "llvm/Transforms/Utils/BasicBlockUtils.h"#include <list>#include <map>Go to the source code of this file.
Namespaces | |
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
Macros | |
| #define | DEBUG_TYPE "global_sched" |
Functions | |
| STATISTIC (HexagonNumPullUps, "Number of instructions pull-ups") | |
| STATISTIC (HexagonNumDualJumps, "Number of dual jumps formed") | |
| FunctionPass * | llvm::createHexagonGlobalScheduler () |
| void | llvm::initializeHexagonGlobalSchedulerPass (PassRegistry &) |
| INITIALIZE_PASS_BEGIN (HexagonGlobalScheduler, "global-sched", "Hexagon Global Scheduler", false, false) INITIALIZE_PASS_END(HexagonGlobalScheduler | |
| static unsigned | nonDbgBundleSize (MachineBasicBlock::iterator &TargetPacket) |
| static bool | IsSchedBarrier (const MachineInstr *MI) |
| static bool | IsIndirectCall (const MachineInstr *MI) |
| static void | DumpLinked (MachineInstr *MI) |
| static void | DumpPacket (MachineBasicBlock::instr_iterator MII) |
| static void | DumpPacket (MachineBasicBlock::instr_iterator MII, MachineBasicBlock::instr_iterator BBEnd) |
| static bool | isBranch (MachineInstr *MI) |
| static MachineBasicBlock::instr_iterator | getHexagonFirstInstrTerminator (MachineBasicBlock *MBB) |
| static bool | selectBestBB (BlockFrequency &BBaFreq, unsigned BBaSize, BlockFrequency &BBbFreq, unsigned BBbSize) |
| Select best candidate to form regions. | |
| static bool | isGlobalMemoryObject (MachineInstr *MI) |
| Return true if MI is an instruction we are unable to reason about (like something with unmodeled memory side effects). | |
| static bool | isUnsafeMemoryObject (MachineInstr *MI) |
| static bool | MIsNeedChainEdge (AliasAnalysis *AA, const TargetInstrInfo *TII, MachineInstr *MIa, MachineInstr *MIb) |
| This returns true if the two MIs could be memory dependent. | |
| static void | parseOperands (MachineInstr *MI, SmallVector< unsigned, 4 > &Defs, SmallVector< unsigned, 8 > &Uses) |
| Gather register def/uses from MI. | |
| static bool | isDelayedUseException (MachineInstr *MIa, MachineInstr *MIb) |
| Some apparent dependencies are not actually restricting us since there is a delay between assignment and actual usage, like in case of a call. | |
| static bool | MIMustNotBePulledUp (MachineInstr *MI) |
| static bool | MIShouldNotBePulledUp (MachineInstr *MI) |
| static void | unmarkKillReg (MachineInstr *MI, unsigned Reg) |
| Find use with this reg, and unmark the kill flag. | |
| static void | markKillReg (MachineInstr *MI, unsigned Reg) |
| Find use with this reg, and unmark the kill flag. | |
| static void | debugLivenessForBB (const MachineBasicBlock *MBB, const TargetRegisterInfo *TRI) |
| static bool | IsEmptyBlock (MachineBasicBlock *MBB) |
| static MachineBasicBlock * | getBranchDestination (MachineInstr *MI) |
| Treat given instruction as a branch, go through its operands and see if any of them is a BB address. | |
| static void | updateBranches (MachineBasicBlock &InBlock, MachineBasicBlock *From, MachineBasicBlock *To) |
updateBranches - Updates all branches to From in the basic block InBlock to branches to To. | |
| static void | updatePredecessors (MachineBasicBlock &MBB, MachineBasicBlock *MFBB) |
| Rewrite all predecessors of the old block to go to the fallthrough instead. | |
| static void | UpdateCFG (MachineBasicBlock *HomeBB, MachineBasicBlock *OriginBB, MachineInstr *MII, MachineBasicBlock *HomeTBB, MachineBasicBlock *HomeFBB, MachineInstr *FTA, MachineInstr *STA, const MachineBranchProbabilityInfo *MBPI) |
| template<typename ElemType, typename IndexType> | |
| void | Unify (std::vector< ElemType > Range, std::map< ElemType, std::vector< IndexType > > &Set1, std::map< ElemType, std::vector< IndexType > > &Set2, std::pair< std::vector< IndexType >, std::vector< IndexType > > &UnionSet, unsigned union_size=100) |
| static void | UpdateBundle (MachineInstr *BundleHead) |
Variables | |
| static cl::opt< bool > | DisablePullUp ("disable-pull-up", cl::Hidden, cl::desc("Disable Hexagon pull-up pass")) |
| static cl::opt< bool > | EnableSpeculativePullUp ("enable-speculative-pull-up", cl::Hidden, cl::desc("Enable speculation during Hexagon pull-up pass")) |
| static cl::opt< bool > | EnableLocalPullUp ("enable-local-pull-up", cl::Hidden, cl::init(true), cl::desc("Enable same BB pull during Hexagon pull-up pass")) |
| static cl::opt< bool > | AllowSpeculateLoads ("speculate-loads-on-pull-up", cl::Hidden, cl::init(true), cl::desc("Allow speculative loads during Hexagon pull-up pass")) |
| static cl::opt< bool > | AllowCmpBranchLoads ("cmp-branch-loads-pull-up", cl::Hidden, cl::init(true), cl::desc("Allow compare-branch loads during Hexagon pull-up pass")) |
| static cl::opt< bool > | AllowUnlikelyPath ("unlikely-path-pull-up", cl::Hidden, cl::init(true), cl::desc("Allow unlikely path pull up")) |
| static cl::opt< bool > | PerformDualJumps ("dual-jump-in-pull-up", cl::Hidden, cl::init(true), cl::desc("Perform dual jump formation during pull up")) |
| static cl::opt< bool > | AllowDependentPullUp ("enable-dependent-pull-up", cl::Hidden, cl::init(true), cl::desc("Perform dual jump formation during pull up")) |
| static cl::opt< bool > | AllowBBPeelPullUp ("enable-bb-peel-pull-up", cl::Hidden, cl::init(true), cl::desc("Peel a reg copy out of a BBloop")) |
| static cl::opt< bool > | PreventCompoundSeparation ("prevent-compound-separation", cl::Hidden, cl::desc("Do not destroy existing compounds during pull up")) |
| static cl::opt< bool > | PreventDuplexSeparation ("prevent-duplex-separation", cl::Hidden, cl::init(true), cl::desc("Do not destroy existing duplexes during pull up")) |
| static cl::opt< unsigned > | MainCandidateQueueSize ("pull-up-main-queue-size", cl::Hidden, cl::init(8)) |
| static cl::opt< unsigned > | SecondaryCandidateQueueSize ("pull-up-sec-queue-size", cl::Hidden, cl::init(2)) |
| static cl::opt< bool > | PostPullUpOpt ("post-pull-up-opt", cl::Hidden, cl::init(true), cl::desc("Enable opt. exposed by pull-up e.g., remove redundant jumps")) |
| static cl::opt< bool > | SpeculateNonPredInsn ("speculate-non-pred-insn", cl::Hidden, cl::init(true), cl::desc("Speculate non-predicable instructions in parent BB")) |
| static cl::opt< bool > | DisableCheckBundles ("disable-hexagon-check-bundles", cl::Hidden, cl::init(true), cl::desc("Disable Hexagon check bundles pass")) |
| static cl::opt< bool > | WarnOnBundleSize ("warn-on-bundle-size", cl::Hidden, cl::desc("Hexagon check bundles and warn on size")) |
| static cl::opt< bool > | ForceNoopHazards ("force-noop-hazards", cl::Hidden, cl::init(false), cl::desc("Force noop hazards in scheduler")) |
| static cl::opt< bool > | OneFloatPerPacket ("single-float-packet", cl::Hidden, cl::desc("Allow only one single floating point instruction in a packet")) |
| static cl::opt< bool > | OneComplexPerPacket ("single-complex-packet", cl::Hidden, cl::desc("Allow only one complex instruction in a packet")) |
| global | sched |
| global Hexagon Global | Scheduler |
| global Hexagon Global | false |
| static const unsigned | SafetyBuffer = 200 |
| #define DEBUG_TYPE "global_sched" |
Definition at line 53 of file HexagonGlobalScheduler.cpp.
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Definition at line 2458 of file HexagonGlobalScheduler.cpp.
References llvm::dbgs(), E(), I, LLVM_DEBUG, MBB, llvm::printReg(), and TRI.
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Definition at line 682 of file HexagonGlobalScheduler.cpp.
References llvm::dbgs(), and MI.
Referenced by DumpPacket().
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Definition at line 694 of file HexagonGlobalScheduler.cpp.
References llvm::dbgs(), DumpLinked(), MBB, and MI.
Referenced by DumpPacket().
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Definition at line 719 of file HexagonGlobalScheduler.cpp.
References llvm::dbgs(), and DumpPacket().
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Treat given instruction as a branch, go through its operands and see if any of them is a BB address.
If so, return it. Return NULL otherwise.
Definition at line 2490 of file HexagonGlobalScheduler.cpp.
References llvm::MachineOperand::getMBB(), llvm::MachineOperand::isMBB(), and MI.
Referenced by UpdateCFG().
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Definition at line 827 of file HexagonGlobalScheduler.cpp.
References MBB.
| INITIALIZE_PASS_BEGIN | ( | HexagonGlobalScheduler | , |
| "global-sched" | , | ||
| "Hexagon Global Scheduler" | , | ||
| false | , | ||
| false | ) |
References INITIALIZE_PASS_DEPENDENCY.
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Definition at line 730 of file HexagonGlobalScheduler.cpp.
References MI.
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Some apparent dependencies are not actually restricting us since there is a delay between assignment and actual usage, like in case of a call.
There could be more cases here, but this one seems the most obvious.
Definition at line 1259 of file HexagonGlobalScheduler.cpp.
References llvm::MachineInstr::isCall().
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Definition at line 2476 of file HexagonGlobalScheduler.cpp.
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Return true if MI is an instruction we are unable to reason about (like something with unmodeled memory side effects).
Definition at line 1112 of file HexagonGlobalScheduler.cpp.
References MI.
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Definition at line 677 of file HexagonGlobalScheduler.cpp.
References MI.
Referenced by canSinkInstructions(), llvm::NVPTXTargetLowering::LowerCall(), and mergeCompatibleInvokesImpl().
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Definition at line 673 of file HexagonGlobalScheduler.cpp.
References MI.
Referenced by MIMustNotBePulledUp().
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Definition at line 1122 of file HexagonGlobalScheduler.cpp.
References MI.
Referenced by MIsNeedChainEdge().
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Find use with this reg, and unmark the kill flag.
Definition at line 2140 of file HexagonGlobalScheduler.cpp.
References llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), MI, Reg, and llvm::MachineOperand::setIsKill().
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Definition at line 1675 of file HexagonGlobalScheduler.cpp.
References IsSchedBarrier(), and MI.
Referenced by MIShouldNotBePulledUp().
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Definition at line 1681 of file HexagonGlobalScheduler.cpp.
References MI, and MIMustNotBePulledUp().
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This returns true if the two MIs could be memory dependent.
Definition at line 1139 of file HexagonGlobalScheduler.cpp.
References assert(), llvm::MachineMemOperand::getAAInfo(), llvm::MachineMemOperand::getOffset(), llvm::MachineMemOperand::getSize(), getValue(), llvm::LocationSize::getValue(), llvm::MachineMemOperand::getValue(), llvm::MachineInstr::hasOneMemOperand(), llvm::LocationSize::hasValue(), isUnsafeMemoryObject(), llvm::MachineInstr::mayStore(), llvm::MachineInstr::memoperands_begin(), llvm::AliasResult::NoAlias, TII, and uint64_t.
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Definition at line 590 of file HexagonGlobalScheduler.cpp.
References llvm::count(), and llvm::MachineInstrBundleIterator< Ty, IsReverse >::getInstrIterator().
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Gather register def/uses from MI.
This treats possible (predicated) defs as actually happening ones (conservatively).
Definition at line 1205 of file HexagonGlobalScheduler.cpp.
References assert(), llvm::SmallVectorImpl< T >::clear(), llvm::MachineOperand::clobbersPhysReg(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::Register::isPhysicalRegister(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::MachineOperand::isUse(), MI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), Reg, and Uses.
Referenced by llvm::HexagonInstrInfo::isDependent().
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Select best candidate to form regions.
Definition at line 978 of file HexagonGlobalScheduler.cpp.
References llvm::BlockFrequency::getFrequency().
| STATISTIC | ( | HexagonNumDualJumps | , |
| "Number of dual jumps formed" | ) |
| STATISTIC | ( | HexagonNumPullUps | , |
| "Number of instructions pull-ups" | ) |
| void Unify | ( | std::vector< ElemType > | Range, |
| std::map< ElemType, std::vector< IndexType > > & | Set1, | ||
| std::map< ElemType, std::vector< IndexType > > & | Set2, | ||
| std::pair< std::vector< IndexType >, std::vector< IndexType > > & | UnionSet, | ||
| unsigned | union_size = 100 ) |
Definition at line 3274 of file HexagonGlobalScheduler.cpp.
References assert(), llvm::dbgs(), LLVM_DEBUG, and Range.
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Find use with this reg, and unmark the kill flag.
Definition at line 2124 of file HexagonGlobalScheduler.cpp.
References llvm::MachineOperand::getReg(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), MI, Reg, and llvm::MachineOperand::setIsKill().
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updateBranches - Updates all branches to From in the basic block InBlock to branches to To.
Definition at line 2695 of file HexagonGlobalScheduler.cpp.
References E(), llvm::MachineOperand::getMBB(), InBlock(), llvm::MachineInstr::isBranch(), llvm::MachineOperand::isMBB(), llvm::MachineInstr::operands_begin(), llvm::MachineInstr::operands_end(), and llvm::MachineOperand::setMBB().
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Definition at line 3314 of file HexagonGlobalScheduler.cpp.
References assert(), llvm::MachineInstr::eraseFromParent(), llvm::MachineInstr::getBundleSize(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineInstr::isBundle(), MI, and Size.
Referenced by INITIALIZE_PASS().
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Definition at line 2741 of file HexagonGlobalScheduler.cpp.
References llvm::MachineBasicBlock::addSuccessor(), llvm::dbgs(), llvm::MachineFunction::end(), getBranchDestination(), llvm::MachineBranchProbabilityInfo::getEdgeProbability(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::isConditionalBranch(), llvm::MachineBasicBlock::isLayoutSuccessor(), llvm::MachineBasicBlock::isSuccessor(), llvm::MachineInstr::isUnconditionalBranch(), LLVM_DEBUG, and llvm::MachineBasicBlock::removeSuccessor().
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Rewrite all predecessors of the old block to go to the fallthrough instead.
NB: Collect predecessors into a snapshot vector before iterating to avoid iterator invalidation on MBB's predecessor list. Each call to ReplaceUsesOfBlockWith modifies both the successor list of Pred and the predecessor list of MBB, which invalidates debug-mode iterators (detected by _GLIBCXX_DEBUG).
Definition at line 2724 of file HexagonGlobalScheduler.cpp.
References llvm::MachineFunction::end(), llvm::ilist_node_impl< OptionsT >::getIterator(), MBB, and updateBranches().
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| global Hexagon Global false |
Definition at line 571 of file HexagonGlobalScheduler.cpp.
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Definition at line 824 of file HexagonGlobalScheduler.cpp.
| global sched |
Definition at line 570 of file HexagonGlobalScheduler.cpp.
| global Hexagon Global Scheduler |
Definition at line 571 of file HexagonGlobalScheduler.cpp.
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