LLVM 20.0.0git
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#include "SelectionDAGBuilder.h"
#include "SDNodeDbgValue.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/Loads.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Analysis/VectorUtils.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/AssignmentTrackingAnalysis.h"
#include "llvm/CodeGen/CodeGenCommonISel.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GCMetadata.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineInstrBundleIterator.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/SwiftErrorValueTracking.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
#include "llvm/IR/Argument.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/ConstantRange.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DebugInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/EHPersonalities.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GetElementPtrTypeIterator.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsAArch64.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/MemoryModelRelaxationAnnotations.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Operator.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/IR/Statepoint.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/User.h"
#include "llvm/IR/Value.h"
#include "llvm/MC/MCContext.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/InstructionCost.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/Transforms/Utils/Local.h"
#include <cstddef>
#include <limits>
#include <optional>
#include <tuple>
#include "llvm/IR/Instruction.def"
#include "llvm/IR/ConstrainedOps.def"
#include "llvm/IR/VPIntrinsics.def"
#include "llvm/CodeGen/SelectionDAGISel.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "isel" |
#define | HANDLE_INST(NUM, OPCODE, CLASS) case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break; |
#define | INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC) case Intrinsic::INTRINSIC: |
#define | BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID: |
#define | DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) |
#define | HELPER_MAP_VPID_TO_VPSD(VPID, VPSD) |
Typedefs | |
using | ArgCopyElisionMapTy = DenseMap< const Argument *, std::pair< const AllocaInst *, const StoreInst * > > |
Functions | |
static SDValue | getCopyFromPartsVector (SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, SDValue InChain, std::optional< CallingConv::ID > CallConv) |
getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent. | |
static SDValue | getCopyFromParts (SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, SDValue InChain, std::optional< CallingConv::ID > CC=std::nullopt, std::optional< ISD::NodeType > AssertOp=std::nullopt) |
getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent. | |
static void | diagnosePossiblyInvalidConstraint (LLVMContext &Ctx, const Value *V, const Twine &ErrMsg) |
static void | getCopyToPartsVector (SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, std::optional< CallingConv::ID > CallConv) |
getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts. | |
static void | getCopyToParts (SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, std::optional< CallingConv::ID > CallConv=std::nullopt, ISD::NodeType ExtendKind=ISD::ANY_EXTEND) |
getCopyToParts - Create a series of nodes that contain the specified value split into legal parts. | |
static SDValue | widenVectorToPartType (SelectionDAG &DAG, SDValue Val, const SDLoc &DL, EVT PartVT) |
static bool | handleDanglingVariadicDebugInfo (SelectionDAG &DAG, DILocalVariable *Variable, DebugLoc DL, unsigned Order, SmallVectorImpl< Value * > &Values, DIExpression *Expression) |
static void | findWasmUnwindDestinations (FunctionLoweringInfo &FuncInfo, const BasicBlock *EHPadBB, BranchProbability Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability > > &UnwindDests) |
static void | findUnwindDestinations (FunctionLoweringInfo &FuncInfo, const BasicBlock *EHPadBB, BranchProbability Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability > > &UnwindDests) |
When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go. | |
static bool | InBlock (const Value *V, const BasicBlock *BB) |
static bool | collectInstructionDeps (SmallMapVector< const Instruction *, bool, 8 > *Deps, const Value *V, SmallMapVector< const Instruction *, bool, 8 > *Necessary=nullptr, unsigned Depth=0) |
static SDValue | getLoadStackGuard (SelectionDAG &DAG, const SDLoc &DL, SDValue &Chain) |
Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists one. | |
static bool | hasOnlySelectUsers (const Value *Cond) |
static const MDNode * | getRangeMetadata (const Instruction &I) |
static std::optional< ConstantRange > | getRange (const Instruction &I) |
static bool | getUniformBase (const Value *Ptr, SDValue &Base, SDValue &Index, ISD::MemIndexType &IndexType, SDValue &Scale, SelectionDAGBuilder *SDB, const BasicBlock *CurBB, uint64_t ElemSize) |
static SDValue | GetSignificand (SelectionDAG &DAG, SDValue Op, const SDLoc &dl) |
GetSignificand - Get the significand and build it into a floating-point number with exponent of 1: | |
static SDValue | GetExponent (SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, const SDLoc &dl) |
GetExponent - Get the exponent: | |
static SDValue | getF32Constant (SelectionDAG &DAG, unsigned Flt, const SDLoc &dl) |
getF32Constant - Get 32-bit floating point constant. | |
static SDValue | getLimitedPrecisionExp2 (SDValue t0, const SDLoc &dl, SelectionDAG &DAG) |
static SDValue | expandExp (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags) |
expandExp - Lower an exp intrinsic. | |
static SDValue | expandLog (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags) |
expandLog - Lower a log intrinsic. | |
static SDValue | expandLog2 (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags) |
expandLog2 - Lower a log2 intrinsic. | |
static SDValue | expandLog10 (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags) |
expandLog10 - Lower a log10 intrinsic. | |
static SDValue | expandExp2 (const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags) |
expandExp2 - Lower an exp2 intrinsic. | |
static SDValue | expandPow (const SDLoc &dl, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const TargetLowering &TLI, SDNodeFlags Flags) |
visitPow - Lower a pow intrinsic. | |
static SDValue | ExpandPowI (const SDLoc &DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG) |
ExpandPowI - Expand a llvm.powi intrinsic. | |
static SDValue | expandDivFix (unsigned Opcode, const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue Scale, SelectionDAG &DAG, const TargetLowering &TLI) |
static void | getUnderlyingArgRegs (SmallVectorImpl< std::pair< Register, TypeSize > > &Regs, const SDValue &N) |
static unsigned | FixedPointIntrinsicToOpcode (unsigned Intrinsic) |
static const CallBase * | FindPreallocatedCall (const Value *PreallocatedSetup) |
Given a @llvm.call.preallocated.setup, return the corresponding preallocated call. | |
static unsigned | getISDForVPIntrinsic (const VPIntrinsic &VPIntrin) |
static SDValue | getMemCmpLoad (const Value *PtrVal, MVT LoadVT, SelectionDAGBuilder &Builder) |
static void | patchMatchingInput (const SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &MatchingOpInfo, SelectionDAG &DAG) |
Make sure that the output operand OpInfo and its corresponding input operand MatchingOpInfo have compatible constraint types (otherwise error out). | |
static SDValue | getAddressForMemoryInput (SDValue Chain, const SDLoc &Location, SDISelAsmOperandInfo &OpInfo, SelectionDAG &DAG) |
Get a direct memory input to behave well as an indirect operand. | |
static std::optional< unsigned > | getRegistersForValue (SelectionDAG &DAG, const SDLoc &DL, SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &RefOpInfo) |
GetRegistersForValue - Assign registers (virtual or physical) for the specified operand. | |
static unsigned | findMatchingInlineAsmOperand (unsigned OperandNo, const std::vector< SDValue > &AsmNodeOperands) |
static bool | isFunction (SDValue Op) |
static void | addStackMapLiveVars (const CallBase &Call, unsigned StartIdx, const SDLoc &DL, SmallVectorImpl< SDValue > &Ops, SelectionDAGBuilder &Builder) |
Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list. | |
static AttributeList | getReturnAttrs (TargetLowering::CallLoweringInfo &CLI) |
Returns an AttributeList representing the attributes applied to the return value of the given call. | |
static bool | isOnlyUsedInEntryBlock (const Argument *A, bool FastISel) |
isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true. | |
static void | findArgumentCopyElisionCandidates (const DataLayout &DL, FunctionLoweringInfo *FuncInfo, ArgCopyElisionMapTy &ArgCopyElisionCandidates) |
Scan the entry block of the function in FuncInfo for arguments that look like copies into a local alloca. | |
static void | tryToElideArgumentCopy (FunctionLoweringInfo &FuncInfo, SmallVectorImpl< SDValue > &Chains, DenseMap< int, int > &ArgCopyElisionFrameIndexMap, SmallPtrSetImpl< const Instruction * > &ElidedArgCopyInstrs, ArgCopyElisionMapTy &ArgCopyElisionCandidates, const Argument &Arg, ArrayRef< SDValue > ArgVals, bool &ArgHasUses) |
Try to elide argument copies from memory into a local alloca. | |
static BranchProbability | scaleCaseProbality (BranchProbability CaseProb, BranchProbability PeeledCaseProb) |
static Register | FollowCopyChain (MachineRegisterInfo &MRI, Register Reg) |
Variables | |
static unsigned | LimitFloatPrecision |
LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits). | |
static cl::opt< bool > | InsertAssertAlign ("insert-assert-align", cl::init(true), cl::desc("Insert the experimental `assertalign` node."), cl::ReallyHidden) |
static cl::opt< unsigned, true > | LimitFPPrecision ("limit-float-precision", cl::desc("Generate low-precision inline sequences " "for some float libcalls"), cl::location(LimitFloatPrecision), cl::Hidden, cl::init(0)) |
static cl::opt< unsigned > | SwitchPeelThreshold ("switch-peel-threshold", cl::Hidden, cl::init(66), cl::desc("Set the case probability threshold for peeling the case from a " "switch statement. A value greater than 100 will void this " "optimization")) |
static const unsigned | MaxParallelChains = 64 |
#define BEGIN_REGISTER_VP_INTRINSIC | ( | VPID, | |
... | |||
) | case Intrinsic::VPID: |
#define DAG_INSTRUCTION | ( | NAME, | |
NARG, | |||
ROUND_MODE, | |||
INTRINSIC, | |||
DAGN | |||
) |
#define DEBUG_TYPE "isel" |
Definition at line 114 of file SelectionDAGBuilder.cpp.
#define HANDLE_INST | ( | NUM, | |
OPCODE, | |||
CLASS | |||
) | case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break; |
#define HELPER_MAP_VPID_TO_VPSD | ( | VPID, | |
VPSD | |||
) |
#define INSTRUCTION | ( | NAME, | |
NARG, | |||
ROUND_MODE, | |||
INTRINSIC | |||
) | case Intrinsic::INTRINSIC: |
using ArgCopyElisionMapTy = DenseMap<const Argument *, std::pair<const AllocaInst *, const StoreInst *> > |
Definition at line 11442 of file SelectionDAGBuilder.cpp.
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Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list.
Constants are converted to TargetConstants purely as an optimization to avoid constant materialization and register allocation.
FrameIndex operands are converted to TargetFrameIndex so that ISEL does not generate addess computation nodes, and so FinalizeISel can convert the TargetFrameIndex into a DirectMemRefOp StackMap location. This avoids address materialization and register allocation, but may also be required for correctness. If a StackMap (or PatchPoint) intrinsic directly uses an alloca in the entry block, then the runtime may assume that the alloca's StackMap location can be read immediately after compilation and that the location is valid at any point during execution (this is similar to the assumption made by the llvm.gcroot intrinsic). If the alloca's location were only available in a register, then the runtime would need to trap when execution reaches the StackMap in order to read the alloca's location.
Definition at line 10652 of file SelectionDAGBuilder.cpp.
References llvm::SelectionDAGBuilder::DAG, llvm::SelectionDAG::getTargetFrameIndex(), llvm::SelectionDAGBuilder::getValue(), I, and llvm::SmallVectorTemplateBase< T, bool >::push_back().
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Definition at line 2482 of file SelectionDAGBuilder.cpp.
References collectInstructionDeps(), llvm::Depth, I, llvm::SelectionDAG::MaxRecursionDepth, and llvm::MapVector< KeyT, ValueT, MapType, VectorType >::try_emplace().
Referenced by collectInstructionDeps(), and llvm::SelectionDAGBuilder::shouldKeepJumpConditionsTogether().
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Definition at line 319 of file SelectionDAGBuilder.cpp.
References llvm::LLVMContext::diagnose(), llvm::LLVMContext::emitError(), and I.
Referenced by getCopyFromPartsVector(), and getCopyToParts().
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Definition at line 5922 of file SelectionDAGBuilder.cpp.
References llvm::TargetLoweringBase::Custom, DL, llvm::SDNode::getAsZExtVal(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getExtOrTrunc(), llvm::TargetLoweringBase::getFixedPointOperationAction(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::EVT::getSizeInBits(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorVT(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::EVT::isScalarInteger(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), llvm::TargetLoweringBase::Legal, LHS, llvm_unreachable, RHS, llvm::ISD::SDIVFIX, llvm::ISD::SDIVFIXSAT, llvm::ISD::SHL, Signed, llvm::ISD::SRA, llvm::ISD::SRL, and llvm::ISD::UDIVFIXSAT.
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expandExp - Lower an exp intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 5522 of file SelectionDAGBuilder.cpp.
References llvm::ISD::FEXP, llvm::ISD::FMUL, llvm::SelectionDAG::getConstantFP(), getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), LimitFloatPrecision, and llvm::numbers::log2ef.
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expandExp2 - Lower an exp2 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 5830 of file SelectionDAGBuilder.cpp.
References llvm::ISD::FEXP2, getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), and LimitFloatPrecision.
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expandLog - Lower a log intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 5544 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, llvm::ISD::FADD, llvm::ISD::FLOG, llvm::ISD::FMUL, llvm::ISD::FSUB, llvm::SelectionDAG::getConstantFP(), GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), LimitFloatPrecision, llvm::numbers::ln2f, and X.
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expandLog10 - Lower a log10 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 5740 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, llvm::ISD::FADD, llvm::ISD::FLOG10, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), LimitFloatPrecision, and X.
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expandLog2 - Lower a log2 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 5643 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, llvm::ISD::FADD, llvm::ISD::FLOG2, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), LimitFloatPrecision, and X.
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visitPow - Lower a pow intrinsic.
Handles the special sequences for limited-precision mode with x == 10.0f.
Definition at line 5842 of file SelectionDAGBuilder.cpp.
References llvm::ISD::FMUL, llvm::ISD::FPOW, getF32Constant(), getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), LHS, LimitFloatPrecision, and RHS.
ExpandPowI - Expand a llvm.powi intrinsic.
Definition at line 5871 of file SelectionDAGBuilder.cpp.
References DL, llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FPOWI, llvm::SelectionDAG::getConstantFP(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::TargetLoweringBase::isBeneficialToExpandPowI(), LHS, RHS, and llvm::SelectionDAG::shouldOptForSize().
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Scan the entry block of the function in FuncInfo for arguments that look like copies into a local alloca.
Record any copied arguments in ArgCopyElisionCandidates.
Definition at line 11450 of file SelectionDAGBuilder.cpp.
References llvm::Function::arg_size(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::dbgs(), DL, llvm::FunctionLoweringInfo::Fn, llvm::AllocaInst::getAllocatedType(), llvm::Function::getEntryBlock(), I, Info, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), LLVM_DEBUG, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::reserve(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::size(), llvm::FunctionLoweringInfo::StaticAllocaMap, and llvm::Unknown.
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Definition at line 9890 of file SelectionDAGBuilder.cpp.
References assert(), F, and llvm::InlineAsm::Op_FirstOperand.
Given a @llvm.call.preallocated.setup, return the corresponding preallocated call.
Definition at line 6297 of file SelectionDAGBuilder.cpp.
References assert(), getCalledFunction(), llvm::Function::getIntrinsicID(), getIntrinsicID(), llvm_unreachable, and llvm::Value::users().
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When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go.
In the IR, we have a single unwind destination, but in the machine CFG, we enumerate all the possible blocks. This function skips over imaginary basic blocks that hold catchswitch instructions, and finds all the "real" machine basic block destinations. As those destinations may not be successors of EHPadBB, here we also calculate the edge probability to those destinations. The passed-in Prob is the edge probability to EHPadBB.
Definition at line 2094 of file SelectionDAGBuilder.cpp.
References assert(), llvm::BasicBlock::back(), llvm::FunctionLoweringInfo::BPI, llvm::classifyEHPersonality(), llvm::CoreCLR, findWasmUnwindDestinations(), llvm::FunctionLoweringInfo::Fn, llvm::BranchProbabilityInfo::getEdgeProbability(), llvm::BasicBlock::getFirstNonPHI(), llvm::FunctionLoweringInfo::getMBB(), llvm::Function::getPersonalityFn(), llvm::isAsynchronousEHPersonality(), llvm::MSVC_CXX, and llvm::Wasm_CXX.
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Definition at line 2060 of file SelectionDAGBuilder.cpp.
References llvm::BasicBlock::getFirstNonPHI(), and llvm::FunctionLoweringInfo::getMBB().
Referenced by findUnwindDestinations().
Definition at line 6263 of file SelectionDAGBuilder.cpp.
References llvm_unreachable, llvm::ISD::SDIVFIX, llvm::ISD::SDIVFIXSAT, llvm::ISD::SMULFIX, llvm::ISD::SMULFIXSAT, llvm::ISD::UDIVFIX, llvm::ISD::UDIVFIXSAT, llvm::ISD::UMULFIX, and llvm::ISD::UMULFIXSAT.
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Definition at line 12713 of file SelectionDAGBuilder.cpp.
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Get a direct memory input to behave well as an indirect operand.
This may introduce stores, hence the need for a Chain
.
Definition at line 9728 of file SelectionDAGBuilder.cpp.
References llvm::MachineFrameInfo::CreateStackObject(), DL, llvm::SelectionDAG::getConstantPool(), llvm::SelectionDAG::getDataLayout(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::TargetLoweringBase::getFrameIndexTy(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::SelectionDAG::getMachineFunction(), llvm::TargetLoweringBase::getMemValueType(), llvm::TargetLoweringBase::getPointerTy(), llvm::TargetFrameLowering::getStackIDForScalableVectors(), llvm::MachineFunction::getSubtarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getTruncStore(), llvm::Value::getType(), and llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable().
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getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent.
If the parts combine to a type larger than ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).
Definition at line 166 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ANY_EXTEND, assert(), llvm::bit_floor(), llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BUILD_PAIR, CC, DL, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::Function::getAttributes(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAG::getDataLayout(), llvm::MachineFunction::getFunction(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::SelectionDAG::getVTList(), llvm::TargetLoweringBase::hasBigEndianPartOrdering(), llvm::AttributeList::hasFnAttr(), Hi, llvm::DataLayout::isBigEndian(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::MVT::isInteger(), llvm::EVT::isVector(), llvm::MVT::isVector(), llvm::TargetLowering::joinRegisterPartsIntoValue(), Lo, llvm::ISD::OR, llvm::report_fatal_error(), llvm::ISD::SHL, llvm::ISD::STRICT_FP_ROUND, std::swap(), llvm::ISD::TRUNCATE, and llvm::ISD::ZERO_EXTEND.
Referenced by getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), and llvm::TargetLowering::LowerCallTo().
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getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent.
If the parts combine to a type larger than ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).
Definition at line 339 of file SelectionDAGBuilder.cpp.
References assert(), llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, diagnosePossiblyInvalidConstraint(), DL, llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getContext(), getCopyFromParts(), llvm::EVT::getFixedSizeInBits(), llvm::SelectionDAG::getFPExtendOrRound(), llvm::EVT::getIntegerVT(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::SelectionDAG::getVectorIdxConstant(), llvm::EVT::getVectorNumElements(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::TargetLoweringBase::getVectorTypeBreakdownForCallingConv(), llvm::EVT::getVectorVT(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), and llvm::ISD::TRUNCATE.
Referenced by getCopyFromParts().
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getCopyToParts - Create a series of nodes that contain the specified value split into legal parts.
If the parts contain more bits than Val, then, for integers, ExtendKind can be used to specify how to generate the extra bits.
Definition at line 505 of file SelectionDAGBuilder.cpp.
References assert(), llvm::bit_floor(), llvm::ISD::BITCAST, diagnosePossiblyInvalidConstraint(), DL, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::FP_EXTEND, llvm::SelectionDAG::getContext(), getCopyToParts(), getCopyToPartsVector(), llvm::SelectionDAG::getDataLayout(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getShiftAmountConstant(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::DataLayout::isBigEndian(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::MVT::isInteger(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), llvm::TargetLowering::splitValueIntoRegisterParts(), llvm::ISD::SRL, and llvm::ISD::TRUNCATE.
Referenced by getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), and llvm::TargetLowering::LowerCallTo().
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getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts.
Definition at line 688 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::BITCAST, llvm::EVT::bitsGE(), llvm::EVT::bitsGT(), DL, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FP_EXTEND, llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getContext(), getCopyToParts(), llvm::ElementCount::getFixed(), llvm::EVT::getFixedSizeInBits(), llvm::MVT::getFixedSizeInBits(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::TargetLoweringBase::getTypeAction(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::MVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::SelectionDAG::getVectorIdxConstant(), llvm::EVT::getVectorMinNumElements(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::TargetLoweringBase::getVectorTypeBreakdownForCallingConv(), llvm::EVT::getVectorVT(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::MVT::isInteger(), llvm::EVT::isScalableVector(), llvm::ElementCount::isScalar(), llvm::EVT::isVector(), llvm::MVT::isVector(), and widenVectorToPartType().
Referenced by getCopyToParts().
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GetExponent - Get the exponent:
(float)(int)(((Op & 0x7f800000) >> 23) - 127);
where Op is the hexadecimal representation of floating point value.
Definition at line 5409 of file SelectionDAGBuilder.cpp.
References llvm::ISD::AND, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::ISD::SINT_TO_FP, llvm::ISD::SRL, and llvm::ISD::SUB.
Referenced by expandLog(), expandLog10(), and expandLog2().
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getF32Constant - Get 32-bit floating point constant.
Definition at line 5423 of file SelectionDAGBuilder.cpp.
References Flt, llvm::SelectionDAG::getConstantFP(), and llvm::APFloatBase::IEEEsingle().
Referenced by expandLog(), expandLog10(), expandLog2(), expandPow(), and getLimitedPrecisionExp2().
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Definition at line 8402 of file SelectionDAGBuilder.cpp.
References llvm::FastMathFlags::allowReassoc(), llvm::CallBase::getArgOperand(), llvm::Instruction::getFastMathFlags(), llvm::IntrinsicInst::getIntrinsicID(), and llvm_unreachable.
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Definition at line 5429 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ADD, llvm::ISD::BITCAST, llvm::ISD::FADD, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FSUB, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), getF32Constant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::SelectionDAG::getTargetLoweringInfo(), LimitFloatPrecision, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, and X.
Referenced by expandExp(), expandExp2(), and expandPow().
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Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists one.
Definition at line 3060 of file SelectionDAGBuilder.cpp.
References DL, llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getEVTAlign(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::SelectionDAG::getMachineNode(), llvm::GlobalValue::getParent(), llvm::TargetLoweringBase::getPointerMemTy(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getPtrExtOrTrunc(), llvm::TargetLoweringBase::getSDagStackGuard(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::Global, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::LocationSize::precise(), and llvm::SelectionDAG::setNodeMemRefs().
Referenced by llvm::SelectionDAGBuilder::visitSPDescriptorParent().
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Definition at line 9015 of file SelectionDAGBuilder.cpp.
References llvm::SelectionDAGBuilder::AA, llvm::ConstantFoldLoadFromConstPtr(), llvm::SelectionDAGBuilder::DAG, llvm::FixedVectorType::get(), llvm::ConstantExpr::getBitCast(), llvm::Value::getContext(), llvm::SelectionDAGBuilder::getCurSDLoc(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getEntryNode(), llvm::Type::getIntNTy(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getRoot(), llvm::MVT::getScalarSizeInBits(), llvm::PointerType::getUnqual(), llvm::SelectionDAGBuilder::getValue(), llvm::SDValue::getValue(), llvm::MVT::getVectorNumElements(), llvm::MVT::isVector(), llvm::SelectionDAGBuilder::PendingLoads, llvm::AAResults::pointsToConstantMemory(), and Ptr.
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Definition at line 4533 of file SelectionDAGBuilder.cpp.
References llvm::getConstantRangeFromMetadata(), getRangeMetadata(), I, and Range.
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GetRegistersForValue - Assign registers (virtual or physical) for the specified operand.
We prefer to assign virtual registers, to allow the register allocator to handle the assignment process. However, if the asm uses features that we can't model on machineinstrs, we have SDISel do the allocation. This produces generally horrible, but correct, code.
OpInfo describes the operand RefOpInfo describes the matching operand if any, the operand otherwise
Definition at line 9780 of file SelectionDAGBuilder.cpp.
References assert(), llvm::TargetRegisterClass::begin(), llvm::ISD::BITCAST, llvm::TargetLowering::C_Address, llvm::TargetLowering::C_Memory, DL, llvm::TargetRegisterClass::end(), llvm::SelectionDAG::getContext(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MVT::getSizeInBits(), llvm::MachineFunction::getSubtarget(), llvm::SelectionDAG::getTargetLoweringInfo(), I, llvm::InlineAsm::isInput, llvm::MVT::isInteger(), llvm::InlineAsm::isOutput, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and TRI.
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Returns an AttributeList representing the attributes applied to the return value of the given call.
Definition at line 10961 of file SelectionDAGBuilder.cpp.
References llvm::AttributeList::get(), llvm::Type::getContext(), llvm::TargetLowering::CallLoweringInfo::IsInReg, llvm::TargetLowering::CallLoweringInfo::RetSExt, llvm::TargetLowering::CallLoweringInfo::RetTy, llvm::AttributeList::ReturnIndex, and llvm::TargetLowering::CallLoweringInfo::RetZExt.
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GetSignificand - Get the significand and build it into a floating-point number with exponent of 1:
Op = (Op & 0x007fffff) | 0x3f800000;
where Op is the hexadecimal representation of floating point value.
Definition at line 5396 of file SelectionDAGBuilder.cpp.
References llvm::ISD::AND, llvm::ISD::BITCAST, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), and llvm::ISD::OR.
Referenced by expandLog(), expandLog10(), and expandLog2().
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Definition at line 5985 of file SelectionDAGBuilder.cpp.
References llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::BITCAST, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, llvm::ISD::CopyFromReg, getReg(), getUnderlyingArgRegs(), N, and llvm::ISD::TRUNCATE.
Referenced by getUnderlyingArgRegs().
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Definition at line 4860 of file SelectionDAGBuilder.cpp.
References assert(), llvm::sampleprof::Base, llvm::CallingConv::C, llvm::SelectionDAGBuilder::DAG, DL, GEP, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAGBuilder::getCurSDLoc(), llvm::SelectionDAG::getDataLayout(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getFixedValue(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::Value::getType(), llvm::SelectionDAGBuilder::getValue(), llvm::EVT::getVectorVT(), llvm::TargetLoweringBase::isLegalScaleForGatherScatter(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(), llvm::Type::isVectorTy(), Ptr, and llvm::ISD::SIGNED_SCALED.
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Definition at line 1384 of file SelectionDAGBuilder.cpp.
References llvm::SelectionDAG::AddDbgValue(), DL, llvm::SDDbgOperand::fromConst(), llvm::UndefValue::get(), llvm::SelectionDAG::getDbgValueList(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by llvm::SelectionDAGBuilder::addDanglingDebugInfo().
Definition at line 3690 of file SelectionDAGBuilder.cpp.
References llvm::all_of(), and Cond.
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Definition at line 2423 of file SelectionDAGBuilder.cpp.
References I.
Referenced by llvm::SelectionDAGBuilder::FindMergedConditions().
Definition at line 9944 of file SelectionDAGBuilder.cpp.
References llvm::ISD::GlobalAddress, and llvm::GlobalValue::hasDLLImportStorageClass().
isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true.
This includes arguments used by switches, since the switch may expand into multiple basic blocks.
Definition at line 11428 of file SelectionDAGBuilder.cpp.
References A, and getParent().
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Make sure that the output operand OpInfo
and its corresponding input operand MatchingOpInfo
have compatible constraint types (otherwise error out).
Definition at line 9697 of file SelectionDAGBuilder.cpp.
References llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::SelectionDAG::getSubtarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::report_fatal_error(), and TRI.
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Try to elide argument copies from memory into a local alloca.
Succeeds if ArgVal is a load from a suitable fixed stack object.
Definition at line 11546 of file SelectionDAGBuilder.cpp.
References assert(), llvm::dbgs(), llvm::dwarf_linker::DebugStr, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), llvm::AllocaInst::getAlign(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), llvm::SmallPtrSetImpl< PtrType >::insert(), LLVM_DEBUG, llvm::FunctionLoweringInfo::MF, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::MachineFrameInfo::RemoveStackObject(), llvm::MachineFrameInfo::setIsAliasedObjectIndex(), llvm::MachineFrameInfo::setIsImmutableObjectIndex(), llvm::FunctionLoweringInfo::StaticAllocaMap, and llvm::Value::users().
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Definition at line 641 of file SelectionDAGBuilder.cpp.
References llvm::SmallVectorImpl< T >::append(), assert(), llvm::ISD::BITCAST, llvm::EVT::changeVectorElementType(), DL, llvm::SelectionDAG::ExtractVectorElements(), llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::SelectionDAG::getVectorIdxConstant(), llvm::ISD::INSERT_SUBVECTOR, llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(), llvm::TargetLoweringBase::isTypeLegal(), and llvm::EVT::isVector().
Referenced by getCopyToPartsVector().
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LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits).
Definition at line 118 of file SelectionDAGBuilder.cpp.
Referenced by expandExp(), expandExp2(), expandLog(), expandLog10(), expandLog2(), expandPow(), and getLimitedPrecisionExp2().
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Definition at line 152 of file SelectionDAGBuilder.cpp.
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