LLVM API Documentation

Public Member Functions
llvm::SparcTargetLowering Class Reference

#include <SparcISelLowering.h>

Inheritance diagram for llvm::SparcTargetLowering:
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List of all members.

Public Member Functions

 SparcTargetLowering (TargetMachine &TM)
virtual SDValue LowerOperation (SDValue Op, SelectionDAG &DAG) const
virtual void computeMaskedBitsForTargetNode (const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const
virtual MachineBasicBlockEmitInstrWithCustomInserter (MachineInstr *MI, MachineBasicBlock *MBB) const
virtual const char * getTargetNodeName (unsigned Opcode) const
ConstraintType getConstraintType (const std::string &Constraint) const
std::pair< unsigned, const
TargetRegisterClass * > 
getRegForInlineAsmConstraint (const std::string &Constraint, EVT VT) const
virtual bool isOffsetFoldingLegal (const GlobalAddressSDNode *GA) const
virtual MVT getScalarShiftAmountTy (EVT LHSTy) const
virtual SDValue LowerFormalArguments (SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const
SDValue LowerFormalArguments_32 (SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const
SDValue LowerFormalArguments_64 (SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const
virtual SDValue LowerCall (TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const
SDValue LowerCall_32 (TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const
SDValue LowerCall_64 (TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const
virtual SDValue LowerReturn (SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, SDLoc dl, SelectionDAG &DAG) const
SDValue LowerReturn_32 (SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, SDLoc DL, SelectionDAG &DAG) const
SDValue LowerReturn_64 (SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, SDLoc DL, SelectionDAG &DAG) const
SDValue LowerGlobalAddress (SDValue Op, SelectionDAG &DAG) const
SDValue LowerConstantPool (SDValue Op, SelectionDAG &DAG) const
unsigned getSRetArgSize (SelectionDAG &DAG, SDValue Callee) const
SDValue withTargetFlags (SDValue Op, unsigned TF, SelectionDAG &DAG) const
SDValue makeHiLoPair (SDValue Op, unsigned HiTF, unsigned LoTF, SelectionDAG &DAG) const
SDValue makeAddress (SDValue Op, SelectionDAG &DAG) const

Detailed Description

Definition at line 48 of file SparcISelLowering.h.


Constructor & Destructor Documentation

SparcTargetLowering::SparcTargetLowering ( TargetMachine TM)

Definition at line 1237 of file SparcISelLowering.cpp.

References llvm::TargetLoweringBase::addRegisterClass(), llvm::ISD::ATOMIC_FENCE, llvm::ISD::BITCAST, llvm::ISD::BR_CC, llvm::ISD::BR_JT, llvm::ISD::BRCOND, llvm::ISD::BRIND, llvm::ISD::BSWAP, llvm::TargetLoweringBase::computeRegisterProperties(), llvm::ISD::ConstantPool, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::TargetLoweringBase::Custom, llvm::ISD::DYNAMIC_STACKALLOC, llvm::ISD::EH_LABEL, llvm::TargetLoweringBase::Expand, llvm::ISD::EXTLOAD, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FCOPYSIGN, llvm::ISD::FCOS, llvm::ISD::FMA, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FPOW, llvm::ISD::FREM, llvm::ISD::FSIN, llvm::ISD::FSINCOS, llvm::TargetLoweringBase::getPointerTy(), llvm::TargetMachine::getSubtarget(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::SparcSubtarget::is64Bit(), llvm::SparcSubtarget::isV9(), llvm::TargetLoweringBase::Legal, llvm::MVT::Other, llvm::TargetLoweringBase::Promote, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SDIVREM, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::TargetLoweringBase::setLoadExtAction(), llvm::TargetLoweringBase::setMinFunctionAlignment(), llvm::TargetLoweringBase::setOperationAction(), llvm::TargetLoweringBase::setStackPointerRegisterToSaveRestore(), llvm::TargetLoweringBase::setTruncStoreAction(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SMUL_LOHI, llvm::ISD::SRA_PARTS, llvm::ISD::SREM, llvm::ISD::SRL_PARTS, llvm::ISD::STACKRESTORE, llvm::ISD::STACKSAVE, llvm::ISD::UDIVREM, llvm::ISD::UINT_TO_FP, llvm::ISD::UMUL_LOHI, llvm::ISD::UREM, llvm::ISD::VAARG, llvm::ISD::VACOPY, llvm::ISD::VAEND, and llvm::ISD::VASTART.


Member Function Documentation

void SparcTargetLowering::computeMaskedBitsForTargetNode ( const SDValue  Op,
APInt KnownZero,
APInt KnownOne,
const SelectionDAG DAG,
unsigned  Depth = 0 
) const [virtual]

computeMaskedBitsForTargetNode - Determine which of the bits specified in Mask are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.

isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to be zero. Op is expected to be a target specific node. Used by DAG combiner.

Reimplemented from llvm::TargetLowering.

Definition at line 1398 of file SparcISelLowering.cpp.

References llvm::SelectionDAG::ComputeMaskedBits(), llvm::APInt::getBitWidth(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SPISD::SELECT_FCC, llvm::SPISD::SELECT_ICC, and llvm::SPISD::SELECT_XCC.

MachineBasicBlock * SparcTargetLowering::EmitInstrWithCustomInserter ( MachineInstr MI,
MachineBasicBlock MBB 
) const [virtual]
SparcTargetLowering::ConstraintType SparcTargetLowering::getConstraintType ( const std::string &  Constraint) const [virtual]

getConstraintType - Given a constraint letter, return the type of constraint it is for this target.

Reimplemented from llvm::TargetLowering.

Definition at line 1841 of file SparcISelLowering.cpp.

References llvm::TargetLowering::C_RegisterClass.

std::pair< unsigned, const TargetRegisterClass * > SparcTargetLowering::getRegForInlineAsmConstraint ( const std::string &  Constraint,
EVT  VT 
) const [virtual]

getRegForInlineAsmConstraint - Given a physical register constraint (e.g. {edx}), return the register number and the register class for the register.

Given a register class constraint, like 'r', if this corresponds directly to an LLVM register class, return a register of 0 and the register class pointer.

This should only be used for C_Register constraints. On error, this returns a register number of 0 and a null register class pointer..

Reimplemented from llvm::TargetLowering.

Definition at line 1853 of file SparcISelLowering.cpp.

virtual MVT llvm::SparcTargetLowering::getScalarShiftAmountTy ( EVT  LHSTy) const [inline, virtual]

Reimplemented from llvm::TargetLoweringBase.

Definition at line 74 of file SparcISelLowering.h.

References llvm::MVT::i32.

unsigned SparcTargetLowering::getSRetArgSize ( SelectionDAG DAG,
SDValue  Callee 
) const
const char * SparcTargetLowering::getTargetNodeName ( unsigned  Opcode) const [virtual]
bool SparcTargetLowering::isOffsetFoldingLegal ( const GlobalAddressSDNode GA) const [virtual]

isOffsetFoldingLegal - Return true if folding a constant offset with the given GlobalAddress is legal. It is frequently not legal in PIC relocation models.

Reimplemented from llvm::TargetLowering.

Definition at line 1866 of file SparcISelLowering.cpp.

SDValue SparcTargetLowering::LowerCall ( TargetLowering::CallLoweringInfo ,
SmallVectorImpl< SDValue > &   
) const [virtual]

LowerCall - This hook must be implemented to lower calls into the the specified DAG. The outgoing arguments to the call are described by the Outs array, and the values to be returned by the call are described by the Ins array. The implementation should fill in the InVals array with legal-type return values from the call, and return the resulting token chain value.

Reimplemented from llvm::TargetLowering.

Definition at line 644 of file SparcISelLowering.cpp.

References llvm::SparcSubtarget::is64Bit(), LowerCall_32(), and LowerCall_64().

SDValue SparcTargetLowering::LowerCall_32 ( TargetLowering::CallLoweringInfo CLI,
SmallVectorImpl< SDValue > &  InVals 
) const

Definition at line 653 of file SparcISelLowering.cpp.

References llvm::ISD::ADD, llvm::CCValAssign::AExt, Align(), llvm::CCState::AnalyzeCallOperands(), llvm::CCState::AnalyzeCallResult(), llvm::ISD::ANY_EXTEND, llvm::CCValAssign::BCvt, llvm::ISD::BITCAST, llvm::SPISD::CALL, llvm::TargetLowering::CallLoweringInfo::CallConv, llvm::TargetLowering::CallLoweringInfo::Callee, llvm::TargetLowering::CallLoweringInfo::Chain, llvm::MachineFrameInfo::CreateStackObject(), llvm::SelectionDAG::CreateStackTemporary(), llvm::TargetLowering::CallLoweringInfo::DAG, llvm::TargetLowering::CallLoweringInfo::DL, llvm::SmallVectorBase::empty(), llvm::MVT::f32, llvm::MVT::f64, llvm::CCValAssign::Full, G, llvm::ISD::ArgFlagsTy::getByValAlign(), llvm::ISD::ArgFlagsTy::getByValSize(), llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getCALLSEQ_START(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getLoad(), llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getMemcpy(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getRegister(), getSRetArgSize(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTarget(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetExternalSymbol(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::SDValue::getValue(), llvm::SelectionDAG::getVTList(), llvm::MVT::Glue, llvm::HexagonISD::Hi, llvm::MVT::i32, llvm::MipsISD::Ins, llvm::TargetLowering::CallLoweringInfo::Ins, llvm::ISD::ArgFlagsTy::isByVal(), llvm::CCValAssign::isMemLoc(), llvm::CCValAssign::isRegLoc(), llvm::ISD::ArgFlagsTy::isSRet(), llvm::TargetLowering::CallLoweringInfo::IsTailCall, llvm::TargetLowering::CallLoweringInfo::IsVarArg, llvm_unreachable, llvm::HexagonISD::Lo, llvm::CCValAssign::needsCustom(), llvm::MVT::Other, llvm::TargetLowering::CallLoweringInfo::Outs, llvm::TargetLowering::CallLoweringInfo::OutVals, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::CCValAssign::SExt, llvm::ISD::SIGN_EXTEND, llvm::SmallVectorTemplateCommon< T >::size(), llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::SPII::Store, toCallerWindow(), llvm::ISD::TokenFactor, llvm::ISD::ZERO_EXTEND, and llvm::CCValAssign::ZExt.

Referenced by LowerCall().

SDValue SparcTargetLowering::LowerCall_64 ( TargetLowering::CallLoweringInfo CLI,
SmallVectorImpl< SDValue > &  InVals 
) const

Definition at line 979 of file SparcISelLowering.cpp.

References llvm::ISD::ADD, llvm::CCValAssign::AExt, llvm::CCState::AnalyzeCallOperands(), llvm::CCState::AnalyzeCallResult(), llvm::ISD::ANY_EXTEND, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::CCValAssign::BCvt, llvm::ISD::BITCAST, llvm::SPISD::CALL, llvm::TargetLowering::CallLoweringInfo::CallConv, llvm::TargetLowering::CallLoweringInfo::Callee, llvm::TargetLowering::CallLoweringInfo::Chain, llvm::ISD::CopyFromReg, llvm::TargetLowering::CallLoweringInfo::DAG, llvm::TargetLowering::CallLoweringInfo::DL, llvm::SmallVectorBase::empty(), fixupVariableFloatArgs(), llvm::CCValAssign::Full, G, llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getCALLSEQ_START(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getIntPtrConstant(), llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getRegister(), llvm::SparcSubtarget::getStackPointerBias(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTarget(), llvm::SelectionDAG::getTargetExternalSymbol(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::SDValue::getValue(), llvm::SelectionDAG::getValueType(), llvm::CCValAssign::getValVT(), llvm::SelectionDAG::getVTList(), llvm::MVT::Glue, llvm::MVT::i32, llvm::MVT::i64, llvm::TargetLowering::CallLoweringInfo::Ins, llvm::CCValAssign::isExtInLoc(), llvm::CCValAssign::isMemLoc(), llvm::CCValAssign::isRegLoc(), llvm::TargetLowering::CallLoweringInfo::IsVarArg, llvm_unreachable, llvm::CCValAssign::needsCustom(), llvm::A64CC::NV, llvm::ISD::OR, llvm::MVT::Other, llvm::TargetLowering::CallLoweringInfo::Outs, llvm::TargetLowering::CallLoweringInfo::OutVals, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::RoundUpToAlignment(), llvm::CCValAssign::SExt, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::SmallVectorTemplateCommon< T >::size(), llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::ISD::SRL, toCallerWindow(), llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::ISD::ZERO_EXTEND, and llvm::CCValAssign::ZExt.

Referenced by LowerCall().

SDValue SparcTargetLowering::LowerConstantPool ( SDValue  Op,
SelectionDAG DAG 
) const

Definition at line 1526 of file SparcISelLowering.cpp.

References makeAddress().

Referenced by LowerOperation().

SDValue SparcTargetLowering::LowerFormalArguments ( SDValue  ,
CallingConv::ID  ,
bool  ,
const SmallVectorImpl< ISD::InputArg > &  ,
SDLoc  ,
SelectionDAG ,
SmallVectorImpl< SDValue > &   
) const [virtual]

LowerFormalArguments - This hook must be implemented to lower the incoming (formal) arguments, described by the Ins array, into the specified DAG. The implementation should fill in the InVals array with legal-type argument values, and return the resulting token chain value.

Reimplemented from llvm::TargetLowering.

Definition at line 313 of file SparcISelLowering.cpp.

References llvm::SparcSubtarget::is64Bit(), LowerFormalArguments_32(), and LowerFormalArguments_64().

SDValue SparcTargetLowering::LowerFormalArguments_32 ( SDValue  Chain,
CallingConv::ID  CallConv,
bool  isVarArg,
const SmallVectorImpl< ISD::InputArg > &  Ins,
SDLoc  dl,
SelectionDAG DAG,
SmallVectorImpl< SDValue > &  InVals 
) const

LowerFormalArguments32 - V8 uses a very simple ABI, where all values are passed in either one or two GPRs, including FP values. TODO: we should pass FP values in FP registers for fastcc functions.

Definition at line 331 of file SparcISelLowering.cpp.

References llvm::ISD::ADD, llvm::MachineFunction::addLiveIn(), llvm::MachineRegisterInfo::addLiveIn(), llvm::CCState::AnalyzeFormalArguments(), llvm::ISD::AssertSext, llvm::ISD::BITCAST, llvm::ISD::BUILD_PAIR, llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MVT::f32, llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getExtLoad(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getLoad(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::MachineFunction::getRegInfo(), llvm::SelectionDAG::getRoot(), llvm::MVT::getSizeInBits(), llvm::SparcMachineFunctionInfo::getSRetReturnReg(), llvm::SelectionDAG::getStore(), llvm::TargetLoweringBase::getTargetMachine(), llvm::SelectionDAG::getValueType(), llvm::CCValAssign::getValVT(), llvm::Function::hasStructRetAttr(), llvm::MVT::i32, llvm::MVT::i64, llvm::CCValAssign::isMemLoc(), llvm::CCValAssign::isRegLoc(), llvm::SPII::Load, llvm::CCValAssign::needsCustom(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SparcMachineFunctionInfo::setSRetReturnReg(), llvm::SparcMachineFunctionInfo::setVarArgsFrameOffset(), llvm::ISD::SEXTLOAD, llvm::ISD::TokenFactor, and llvm::ISD::TRUNCATE.

Referenced by LowerFormalArguments().

SDValue SparcTargetLowering::LowerFormalArguments_64 ( SDValue  Chain,
CallingConv::ID  CallConv,
bool  isVarArg,
const SmallVectorImpl< ISD::InputArg > &  Ins,
SDLoc  dl,
SelectionDAG DAG,
SmallVectorImpl< SDValue > &  InVals 
) const

Definition at line 531 of file SparcISelLowering.cpp.

References llvm::MachineFunction::addLiveIn(), llvm::CCState::AnalyzeFormalArguments(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::MachineFrameInfo::CreateFixedObject(), llvm::SmallVectorBase::empty(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getLoad(), llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::TargetLoweringBase::getRegClassFor(), llvm::MVT::getSizeInBits(), llvm::SparcSubtarget::getStackPointerBias(), llvm::SelectionDAG::getStore(), llvm::TargetLoweringBase::getTargetMachine(), llvm::SelectionDAG::getValueType(), llvm::CCValAssign::getValVT(), llvm::MVT::i32, llvm::MVT::i64, llvm::CCValAssign::isExtInLoc(), llvm::CCValAssign::isMemLoc(), llvm::CCValAssign::isRegLoc(), llvm::CCValAssign::needsCustom(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SparcMachineFunctionInfo::setVarArgsFrameOffset(), llvm::CCValAssign::SExt, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::ISD::SRL, llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, and llvm::CCValAssign::ZExt.

Referenced by LowerFormalArguments().

SDValue SparcTargetLowering::LowerGlobalAddress ( SDValue  Op,
SelectionDAG DAG 
) const

Definition at line 1521 of file SparcISelLowering.cpp.

References makeAddress().

Referenced by LowerOperation().

SDValue SparcTargetLowering::LowerOperation ( SDValue  Op,
SelectionDAG DAG 
) const [virtual]

LowerOperation - This callback is invoked for operations that are unsupported by the target, which are registered to use 'custom' lowering, and whose defined values are all legal. If the target has no operations that require custom lowering, it need not implement this. The default implementation of this aborts.

Reimplemented from llvm::TargetLowering.

Definition at line 1739 of file SparcISelLowering.cpp.

References llvm::ISD::BR_CC, llvm::ISD::ConstantPool, llvm::ISD::DYNAMIC_STACKALLOC, llvm::ISD::FP_TO_SINT, llvm::ISD::FRAMEADDR, llvm::SDValue::getOpcode(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm_unreachable, LowerBR_CC(), LowerConstantPool(), LowerDYNAMIC_STACKALLOC(), LowerFP_TO_SINT(), LowerFRAMEADDR(), LowerGlobalAddress(), LowerRETURNADDR(), LowerSELECT_CC(), LowerSINT_TO_FP(), LowerVAARG(), LowerVASTART(), llvm::ISD::RETURNADDR, llvm::ISD::SELECT_CC, llvm::ISD::SINT_TO_FP, llvm::ISD::VAARG, and llvm::ISD::VASTART.

SDValue SparcTargetLowering::LowerReturn ( SDValue  ,
CallingConv::ID  ,
bool  ,
const SmallVectorImpl< ISD::OutputArg > &  ,
const SmallVectorImpl< SDValue > &  ,
SDLoc  ,
SelectionDAG  
) const [virtual]

LowerReturn - This hook must be implemented to lower outgoing return values, described by the Outs array, into the specified DAG. The implementation should return the resulting token chain value.

Reimplemented from llvm::TargetLowering.

Definition at line 163 of file SparcISelLowering.cpp.

References llvm::SparcSubtarget::is64Bit(), LowerReturn_32(), and LowerReturn_64().

SDValue SparcTargetLowering::LowerReturn_32 ( SDValue  Chain,
CallingConv::ID  CallConv,
bool  IsVarArg,
const SmallVectorImpl< ISD::OutputArg > &  Outs,
const SmallVectorImpl< SDValue > &  OutVals,
SDLoc  DL,
SelectionDAG DAG 
) const
SDValue SparcTargetLowering::LowerReturn_64 ( SDValue  Chain,
CallingConv::ID  CallConv,
bool  IsVarArg,
const SmallVectorImpl< ISD::OutputArg > &  Outs,
const SmallVectorImpl< SDValue > &  OutVals,
SDLoc  DL,
SelectionDAG DAG 
) const
SDValue SparcTargetLowering::makeAddress ( SDValue  Op,
SelectionDAG DAG 
) const
SDValue SparcTargetLowering::makeHiLoPair ( SDValue  Op,
unsigned  HiTF,
unsigned  LoTF,
SelectionDAG DAG 
) const
SDValue SparcTargetLowering::withTargetFlags ( SDValue  Op,
unsigned  TF,
SelectionDAG DAG 
) const

The documentation for this class was generated from the following files: